;; @file
; IPRT - X86 and AMD64 Structures and Definitions that are not automatically
;        converted from the C header file.
;

;
; Copyright (C) 2012 Oracle Corporation
;
; This file is part of VirtualBox Open Source Edition (OSE), as
; available from http://www.virtualbox.org. This file is free software;
; you can redistribute it and/or modify it under the terms of the GNU
; General Public License (GPL) as published by the Free Software
; Foundation, in version 2 as it comes in the "COPYING" file of the
; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
;
; The contents of this file may alternatively be used under the terms
; of the Common Development and Distribution License Version 1.0
; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
; VirtualBox OSE distribution, in which case the provisions of the
; CDDL are applicable instead of those of the GPL.
;
; You may elect to license modified versions of this file under the
; terms and conditions of either the GPL or the CDDL or both.
;

%ifndef ___iprt_x86extra_mac
%define ___iprt_x86extra_mac


%define X86_XCPT_UD     6
%define X86_XCPT_GP     13
%define X86_XCPT_PF     14
%define X86_XCPT_MF     16

%define PAGE_SIZE       0x1000


;;
; 32-bit protected mode fstenv image.
;
struc X86FSTENV32P
        .FCW            resw 1
        .padding1       resw 1
        .FSW            resw 1
        .padding2       resw 1
        .FTW            resw 1
        .padding3       resw 1
        .FPUIP          resd 1
        .FPUCS          resw 1
        .FOP            resw 1
        .FPUDP          resd 1
        .FPUDS          resw 1
        .padding4       resw 1
endstruc


;;
; The image saved by FXSAVE.
;
struc X86FXSTATE
        .FCW            resw 1
        .FSW            resw 1
        .FTW            resw 1
        .FOP            resw 1
        .FPUIP          resd 1
        .FPUCS          resw 1
        .Rsrvd1         resw 1
        .FPUDP          resd 1
        .FPUDS          resw 1
        .Rsrvd2         resw 1
        .MXCSR          resd 1
        .MXCSR_MASK     resd 1
        .st0            resd 4
        .st1            resd 4
        .st2            resd 4
        .st3            resd 4
        .st4            resd 4
        .st5            resd 4
        .st6            resd 4
        .st7            resd 4
        .xmm0           resd 4
        .xmm1           resd 4
        .xmm2           resd 4
        .xmm3           resd 4
        .xmm4           resd 4
        .xmm5           resd 4
        .xmm6           resd 4
        .xmm7           resd 4
        .xmm8           resd 4
        .xmm9           resd 4
        .xmm10          resd 4
        .xmm11          resd 4
        .xmm12          resd 4
        .xmm13          resd 4
        .xmm14          resd 4
        .xmm15          resd 4
        .au32RsrvdRest  resd 24
endstruc


%endif