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source: vbox/trunk/src/recompiler_new/target-i386/exec.h@ 13371

Last change on this file since 13371 was 13230, checked in by vboxsync, 16 years ago

further new recompiler work
  • Property svn:eol-style set to native
File size: 12.4 KB
Line 
1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29#include "config.h"
30#include "dyngen-exec.h"
31
32/* XXX: factorize this mess */
33#ifdef TARGET_X86_64
34#define TARGET_LONG_BITS 64
35#else
36#define TARGET_LONG_BITS 32
37#endif
38
39#include "cpu-defs.h"
40
41/* at least 4 register variables are defined */
42register struct CPUX86State *env asm(AREG0);
43
44#ifndef VBOX
45#include "qemu-log.h"
46#endif
47
48#ifndef reg_EAX
49#define EAX (env->regs[R_EAX])
50#endif
51#ifndef reg_ECX
52#define ECX (env->regs[R_ECX])
53#endif
54#ifndef reg_EDX
55#define EDX (env->regs[R_EDX])
56#endif
57#ifndef reg_EBX
58#define EBX (env->regs[R_EBX])
59#endif
60#ifndef reg_ESP
61#define ESP (env->regs[R_ESP])
62#endif
63#ifndef reg_EBP
64#define EBP (env->regs[R_EBP])
65#endif
66#ifndef reg_ESI
67#define ESI (env->regs[R_ESI])
68#endif
69#ifndef reg_EDI
70#define EDI (env->regs[R_EDI])
71#endif
72#define EIP (env->eip)
73#define DF (env->df)
74
75#define CC_SRC (env->cc_src)
76#define CC_DST (env->cc_dst)
77#define CC_OP (env->cc_op)
78
79/* float macros */
80#define FT0 (env->ft0)
81#define ST0 (env->fpregs[env->fpstt].d)
82#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
83#define ST1 ST(1)
84
85#include "cpu.h"
86#include "exec-all.h"
87
88void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
89void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
90int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
91 int is_write, int mmu_idx, int is_softmmu);
92void __hidden cpu_lock(void);
93void __hidden cpu_unlock(void);
94void do_interrupt(int intno, int is_int, int error_code,
95 target_ulong next_eip, int is_hw);
96void do_interrupt_user(int intno, int is_int, int error_code,
97 target_ulong next_eip);
98void raise_interrupt(int intno, int is_int, int error_code,
99 int next_eip_addend);
100void raise_exception_err(int exception_index, int error_code);
101void raise_exception(int exception_index);
102void do_smm_enter(void);
103void __hidden cpu_loop_exit(void);
104
105void OPPROTO op_movl_eflags_T0(void);
106void OPPROTO op_movl_T0_eflags(void);
107#ifdef VBOX
108void OPPROTO op_movl_T0_eflags_vme(void);
109void OPPROTO op_movw_eflags_T0_vme(void);
110void OPPROTO op_cli_vme(void);
111void OPPROTO op_sti_vme(void);
112#endif
113
114/* n must be a constant to be efficient */
115static inline target_long lshift(target_long x, int n)
116{
117 if (n >= 0)
118 return x << n;
119 else
120 return x >> (-n);
121}
122
123#include "helper.h"
124
125static inline void svm_check_intercept(uint32_t type)
126{
127 helper_svm_check_intercept_param(type, 0);
128}
129
130void check_iob_T0(void);
131void check_iow_T0(void);
132void check_iol_T0(void);
133void check_iob_DX(void);
134void check_iow_DX(void);
135void check_iol_DX(void);
136
137#if !defined(CONFIG_USER_ONLY)
138
139#include "softmmu_exec.h"
140
141static inline double ldfq(target_ulong ptr)
142{
143 union {
144 double d;
145 uint64_t i;
146 } u;
147 u.i = ldq(ptr);
148 return u.d;
149}
150
151static inline void stfq(target_ulong ptr, double v)
152{
153 union {
154 double d;
155 uint64_t i;
156 } u;
157 u.d = v;
158 stq(ptr, u.i);
159}
160
161static inline float ldfl(target_ulong ptr)
162{
163 union {
164 float f;
165 uint32_t i;
166 } u;
167 u.i = ldl(ptr);
168 return u.f;
169}
170
171static inline void stfl(target_ulong ptr, float v)
172{
173 union {
174 float f;
175 uint32_t i;
176 } u;
177 u.f = v;
178 stl(ptr, u.i);
179}
180
181#endif /* !defined(CONFIG_USER_ONLY) */
182
183#ifdef USE_X86LDOUBLE
184/* use long double functions */
185#define floatx_to_int32 floatx80_to_int32
186#define floatx_to_int64 floatx80_to_int64
187#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
188#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
189#define int32_to_floatx int32_to_floatx80
190#define int64_to_floatx int64_to_floatx80
191#define float32_to_floatx float32_to_floatx80
192#define float64_to_floatx float64_to_floatx80
193#define floatx_to_float32 floatx80_to_float32
194#define floatx_to_float64 floatx80_to_float64
195#define floatx_abs floatx80_abs
196#define floatx_chs floatx80_chs
197#define floatx_round_to_int floatx80_round_to_int
198#define floatx_compare floatx80_compare
199#define floatx_compare_quiet floatx80_compare_quiet
200#ifdef VBOX
201#undef sin
202#undef cos
203#undef sqrt
204#undef pow
205#undef log
206#undef tan
207#undef atan2
208#undef floor
209#undef ceil
210#undef ldexp
211#endif /* !VBOX */
212#define sin sinl
213#define cos cosl
214#define sqrt sqrtl
215#define pow powl
216#define log logl
217#define tan tanl
218#define atan2 atan2l
219#define floor floorl
220#define ceil ceill
221#define ldexp ldexpl
222#else
223#define floatx_to_int32 float64_to_int32
224#define floatx_to_int64 float64_to_int64
225#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
226#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
227#define int32_to_floatx int32_to_float64
228#define int64_to_floatx int64_to_float64
229#define float32_to_floatx float32_to_float64
230#define float64_to_floatx(x, e) (x)
231#define floatx_to_float32 float64_to_float32
232#define floatx_to_float64(x, e) (x)
233#define floatx_abs float64_abs
234#define floatx_chs float64_chs
235#define floatx_round_to_int float64_round_to_int
236#define floatx_compare float64_compare
237#define floatx_compare_quiet float64_compare_quiet
238#endif
239
240#ifdef VBOX
241extern CPU86_LDouble sin(CPU86_LDouble x);
242extern CPU86_LDouble cos(CPU86_LDouble x);
243extern CPU86_LDouble sqrt(CPU86_LDouble x);
244extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
245extern CPU86_LDouble log(CPU86_LDouble x);
246extern CPU86_LDouble tan(CPU86_LDouble x);
247extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
248extern CPU86_LDouble floor(CPU86_LDouble x);
249extern CPU86_LDouble ceil(CPU86_LDouble x);
250#endif
251
252#define RC_MASK 0xc00
253#define RC_NEAR 0x000
254#define RC_DOWN 0x400
255#define RC_UP 0x800
256#define RC_CHOP 0xc00
257
258#define MAXTAN 9223372036854775808.0
259
260#ifdef USE_X86LDOUBLE
261
262/* only for x86 */
263typedef union {
264 long double d;
265 struct {
266 unsigned long long lower;
267 unsigned short upper;
268 } l;
269} CPU86_LDoubleU;
270
271/* the following deal with x86 long double-precision numbers */
272#define MAXEXPD 0x7fff
273#define EXPBIAS 16383
274#define EXPD(fp) (fp.l.upper & 0x7fff)
275#define SIGND(fp) ((fp.l.upper) & 0x8000)
276#define MANTD(fp) (fp.l.lower)
277#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
278
279#else
280
281/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
282typedef union {
283 double d;
284#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
285 struct {
286 uint32_t lower;
287 int32_t upper;
288 } l;
289#else
290 struct {
291 int32_t upper;
292 uint32_t lower;
293 } l;
294#endif
295#ifndef __arm__
296 int64_t ll;
297#endif
298} CPU86_LDoubleU;
299
300/* the following deal with IEEE double-precision numbers */
301#define MAXEXPD 0x7ff
302#define EXPBIAS 1023
303#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
304#define SIGND(fp) ((fp.l.upper) & 0x80000000)
305#ifdef __arm__
306#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
307#else
308#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
309#endif
310#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
311#endif
312
313static inline void fpush(void)
314{
315 env->fpstt = (env->fpstt - 1) & 7;
316 env->fptags[env->fpstt] = 0; /* validate stack entry */
317}
318
319static inline void fpop(void)
320{
321 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
322 env->fpstt = (env->fpstt + 1) & 7;
323}
324
325#ifndef USE_X86LDOUBLE
326static inline CPU86_LDouble helper_fldt(target_ulong ptr)
327{
328 CPU86_LDoubleU temp;
329 int upper, e;
330 uint64_t ll;
331
332 /* mantissa */
333 upper = lduw(ptr + 8);
334 /* XXX: handle overflow ? */
335 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
336 e |= (upper >> 4) & 0x800; /* sign */
337 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
338#ifdef __arm__
339 temp.l.upper = (e << 20) | (ll >> 32);
340 temp.l.lower = ll;
341#else
342 temp.ll = ll | ((uint64_t)e << 52);
343#endif
344 return temp.d;
345}
346
347static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
348{
349 CPU86_LDoubleU temp;
350 int e;
351
352 temp.d = f;
353 /* mantissa */
354 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
355 /* exponent + sign */
356 e = EXPD(temp) - EXPBIAS + 16383;
357 e |= SIGND(temp) >> 16;
358 stw(ptr + 8, e);
359}
360#else
361
362/* XXX: same endianness assumed */
363
364#ifdef CONFIG_USER_ONLY
365
366static inline CPU86_LDouble helper_fldt(target_ulong ptr)
367{
368 return *(CPU86_LDouble *)ptr;
369}
370
371static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
372{
373 *(CPU86_LDouble *)ptr = f;
374}
375
376#else
377
378/* we use memory access macros */
379
380static inline CPU86_LDouble helper_fldt(target_ulong ptr)
381{
382 CPU86_LDoubleU temp;
383
384 temp.l.lower = ldq(ptr);
385 temp.l.upper = lduw(ptr + 8);
386 return temp.d;
387}
388
389static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
390{
391 CPU86_LDoubleU temp;
392
393 temp.d = f;
394 stq(ptr, temp.l.lower);
395 stw(ptr + 8, temp.l.upper);
396}
397
398#endif /* !CONFIG_USER_ONLY */
399
400#endif /* USE_X86LDOUBLE */
401
402#define FPUS_IE (1 << 0)
403#define FPUS_DE (1 << 1)
404#define FPUS_ZE (1 << 2)
405#define FPUS_OE (1 << 3)
406#define FPUS_UE (1 << 4)
407#define FPUS_PE (1 << 5)
408#define FPUS_SF (1 << 6)
409#define FPUS_SE (1 << 7)
410#define FPUS_B (1 << 15)
411
412#define FPUC_EM 0x3f
413
414extern const CPU86_LDouble f15rk[7];
415
416void fpu_raise_exception(void);
417void restore_native_fp_state(CPUState *env);
418void save_native_fp_state(CPUState *env);
419
420extern const uint8_t parity_table[256];
421extern const uint8_t rclw_table[32];
422extern const uint8_t rclb_table[32];
423
424static inline uint32_t compute_eflags(void)
425{
426 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
427}
428
429/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
430static inline void load_eflags(int eflags, int update_mask)
431{
432 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
433 DF = 1 - (2 * ((eflags >> 10) & 1));
434 env->eflags = (env->eflags & ~update_mask) |
435 (eflags & update_mask);
436}
437
438static inline void env_to_regs(void)
439{
440#ifdef reg_EAX
441 EAX = env->regs[R_EAX];
442#endif
443#ifdef reg_ECX
444 ECX = env->regs[R_ECX];
445#endif
446#ifdef reg_EDX
447 EDX = env->regs[R_EDX];
448#endif
449#ifdef reg_EBX
450 EBX = env->regs[R_EBX];
451#endif
452#ifdef reg_ESP
453 ESP = env->regs[R_ESP];
454#endif
455#ifdef reg_EBP
456 EBP = env->regs[R_EBP];
457#endif
458#ifdef reg_ESI
459 ESI = env->regs[R_ESI];
460#endif
461#ifdef reg_EDI
462 EDI = env->regs[R_EDI];
463#endif
464}
465
466static inline void regs_to_env(void)
467{
468#ifdef reg_EAX
469 env->regs[R_EAX] = EAX;
470#endif
471#ifdef reg_ECX
472 env->regs[R_ECX] = ECX;
473#endif
474#ifdef reg_EDX
475 env->regs[R_EDX] = EDX;
476#endif
477#ifdef reg_EBX
478 env->regs[R_EBX] = EBX;
479#endif
480#ifdef reg_ESP
481 env->regs[R_ESP] = ESP;
482#endif
483#ifdef reg_EBP
484 env->regs[R_EBP] = EBP;
485#endif
486#ifdef reg_ESI
487 env->regs[R_ESI] = ESI;
488#endif
489#ifdef reg_EDI
490 env->regs[R_EDI] = EDI;
491#endif
492}
493
494static inline int cpu_halted(CPUState *env) {
495 /* handle exit of HALTED state */
496 if (!env->halted)
497 return 0;
498 /* disable halt condition */
499 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
500 (env->eflags & IF_MASK)) ||
501 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
502 env->halted = 0;
503 return 0;
504 }
505 return EXCP_HALTED;
506}
507
508/* load efer and update the corresponding hflags. XXX: do consistency
509 checks with cpuid bits ? */
510static inline void cpu_load_efer(CPUState *env, uint64_t val)
511{
512 env->efer = val;
513 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
514 if (env->efer & MSR_EFER_LMA)
515 env->hflags |= HF_LMA_MASK;
516 if (env->efer & MSR_EFER_SVME)
517 env->hflags |= HF_SVME_MASK;
518}
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