1 | /*
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2 | * Software MMU support
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3 | *
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4 | * Copyright (c) 2003 Fabrice Bellard
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5 | *
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6 | * This library is free software; you can redistribute it and/or
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7 | * modify it under the terms of the GNU Lesser General Public
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8 | * License as published by the Free Software Foundation; either
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9 | * version 2 of the License, or (at your option) any later version.
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10 | *
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11 | * This library is distributed in the hope that it will be useful,
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12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | * Lesser General Public License for more details.
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15 | *
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16 | * You should have received a copy of the GNU Lesser General Public
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17 | * License along with this library; if not, write to the Free Software
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18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | */
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20 |
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21 | /*
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22 | * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
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23 | * other than GPL or LGPL is available it will apply instead, Sun elects to use only
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24 | * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
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25 | * a choice of LGPL license versions is made available with the language indicating
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26 | * that LGPLv2 or any later version may be used, or where a choice of which version
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27 | * of the LGPL is applied is otherwise unspecified.
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28 | */
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29 | #if DATA_SIZE == 8
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30 | #define SUFFIX q
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31 | #define USUFFIX q
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32 | #define DATA_TYPE uint64_t
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33 | #elif DATA_SIZE == 4
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34 | #define SUFFIX l
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35 | #define USUFFIX l
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36 | #define DATA_TYPE uint32_t
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37 | #elif DATA_SIZE == 2
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38 | #define SUFFIX w
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39 | #define USUFFIX uw
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40 | #define DATA_TYPE uint16_t
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41 | #define DATA_STYPE int16_t
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42 | #elif DATA_SIZE == 1
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43 | #define SUFFIX b
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44 | #define USUFFIX ub
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45 | #define DATA_TYPE uint8_t
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46 | #define DATA_STYPE int8_t
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47 | #else
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48 | #error unsupported data size
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49 | #endif
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50 |
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51 | #if ACCESS_TYPE < (NB_MMU_MODES)
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52 |
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53 | #define CPU_MMU_INDEX ACCESS_TYPE
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54 | #define MMUSUFFIX _mmu
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55 |
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56 | #elif ACCESS_TYPE == (NB_MMU_MODES)
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57 |
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58 | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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59 | #define MMUSUFFIX _mmu
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60 |
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61 | #elif ACCESS_TYPE == (NB_MMU_MODES + 1)
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62 |
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63 | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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64 | #define MMUSUFFIX _cmmu
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65 |
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66 | #else
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67 | #error invalid ACCESS_TYPE
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68 | #endif
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69 |
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70 | #if DATA_SIZE == 8
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71 | #define RES_TYPE uint64_t
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72 | #else
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73 | #define RES_TYPE int
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74 | #endif
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75 |
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76 | #if ACCESS_TYPE == (NB_MMU_MODES + 1)
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77 | #define ADDR_READ addr_code
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78 | #else
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79 | #define ADDR_READ addr_read
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80 | #endif
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81 |
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82 | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
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83 | (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) && !defined(VBOX)
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84 |
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85 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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86 | {
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87 | int res;
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88 |
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89 | asm volatile ("movl %1, %%edx\n"
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90 | "movl %1, %%eax\n"
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91 | "shrl %3, %%edx\n"
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92 | "andl %4, %%eax\n"
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93 | "andl %2, %%edx\n"
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94 | "leal %5(%%edx, %%ebp), %%edx\n"
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95 | "cmpl (%%edx), %%eax\n"
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96 | "movl %1, %%eax\n"
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97 | "je 1f\n"
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98 | "movl %6, %%edx\n"
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99 | "call %7\n"
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100 | "movl %%eax, %0\n"
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101 | "jmp 2f\n"
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102 | "1:\n"
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103 | "addl 12(%%edx), %%eax\n"
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104 | #if DATA_SIZE == 1
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105 | "movzbl (%%eax), %0\n"
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106 | #elif DATA_SIZE == 2
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107 | "movzwl (%%eax), %0\n"
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108 | #elif DATA_SIZE == 4
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109 | "movl (%%eax), %0\n"
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110 | #else
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111 | #error unsupported size
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112 | #endif
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113 | "2:\n"
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114 | : "=r" (res)
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115 | : "r" (ptr),
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116 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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117 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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118 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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119 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
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120 | "i" (CPU_MMU_INDEX),
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121 | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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122 | : "%eax", "%ecx", "%edx", "memory", "cc");
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123 | return res;
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124 | }
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125 |
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126 | #if DATA_SIZE <= 2
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127 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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128 | {
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129 | int res;
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130 |
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131 | asm volatile ("movl %1, %%edx\n"
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132 | "movl %1, %%eax\n"
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133 | "shrl %3, %%edx\n"
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134 | "andl %4, %%eax\n"
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135 | "andl %2, %%edx\n"
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136 | "leal %5(%%edx, %%ebp), %%edx\n"
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137 | "cmpl (%%edx), %%eax\n"
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138 | "movl %1, %%eax\n"
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139 | "je 1f\n"
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140 | "movl %6, %%edx\n"
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141 | "call %7\n"
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142 | #if DATA_SIZE == 1
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143 | "movsbl %%al, %0\n"
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144 | #elif DATA_SIZE == 2
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145 | "movswl %%ax, %0\n"
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146 | #else
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147 | #error unsupported size
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148 | #endif
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149 | "jmp 2f\n"
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150 | "1:\n"
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151 | "addl 12(%%edx), %%eax\n"
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152 | #if DATA_SIZE == 1
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153 | "movsbl (%%eax), %0\n"
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154 | #elif DATA_SIZE == 2
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155 | "movswl (%%eax), %0\n"
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156 | #else
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157 | #error unsupported size
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158 | #endif
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159 | "2:\n"
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160 | : "=r" (res)
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161 | : "r" (ptr),
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162 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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163 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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164 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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165 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
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166 | "i" (CPU_MMU_INDEX),
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167 | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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168 | : "%eax", "%ecx", "%edx", "memory", "cc");
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169 | return res;
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170 | }
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171 | #endif
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172 |
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173 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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174 | {
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175 | asm volatile ("movl %0, %%edx\n"
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176 | "movl %0, %%eax\n"
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177 | "shrl %3, %%edx\n"
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178 | "andl %4, %%eax\n"
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179 | "andl %2, %%edx\n"
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180 | "leal %5(%%edx, %%ebp), %%edx\n"
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181 | "cmpl (%%edx), %%eax\n"
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182 | "movl %0, %%eax\n"
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183 | "je 1f\n"
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184 | #if DATA_SIZE == 1
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185 | "movzbl %b1, %%edx\n"
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186 | #elif DATA_SIZE == 2
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187 | "movzwl %w1, %%edx\n"
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188 | #elif DATA_SIZE == 4
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189 | "movl %1, %%edx\n"
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190 | #else
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191 | #error unsupported size
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192 | #endif
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193 | "movl %6, %%ecx\n"
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194 | "call %7\n"
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195 | "jmp 2f\n"
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196 | "1:\n"
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197 | "addl 8(%%edx), %%eax\n"
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198 | #if DATA_SIZE == 1
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199 | "movb %b1, (%%eax)\n"
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200 | #elif DATA_SIZE == 2
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201 | "movw %w1, (%%eax)\n"
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202 | #elif DATA_SIZE == 4
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203 | "movl %1, (%%eax)\n"
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204 | #else
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205 | #error unsupported size
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206 | #endif
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207 | "2:\n"
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208 | :
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209 | : "r" (ptr),
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210 | #if DATA_SIZE == 1
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211 | "q" (v),
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212 | #else
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213 | "r" (v),
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214 | #endif
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215 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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216 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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217 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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218 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
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219 | "i" (CPU_MMU_INDEX),
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220 | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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221 | : "%eax", "%ecx", "%edx", "memory", "cc");
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222 | }
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223 | #else
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224 |
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225 | /* generic load/store macros */
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226 |
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227 | #ifndef VBOX
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228 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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229 | #else
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230 | DECLINLINE(RES_TYPE) glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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231 | #endif
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232 | {
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233 |
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234 | int page_index;
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235 | RES_TYPE res;
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236 | target_ulong addr;
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237 | unsigned long physaddr;
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238 | int mmu_idx;
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239 |
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240 | addr = ptr;
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241 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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242 | mmu_idx = CPU_MMU_INDEX;
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243 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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244 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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245 | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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246 | } else {
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247 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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248 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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249 | }
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250 | return res;
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251 | }
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252 |
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253 | #if DATA_SIZE <= 2
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254 | #ifndef VBOX
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255 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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256 | #else
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257 | DECLINLINE(int) glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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258 | #endif
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259 | {
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260 | int res, page_index;
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261 | target_ulong addr;
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262 | unsigned long physaddr;
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263 | int mmu_idx;
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264 |
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265 | addr = ptr;
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266 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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267 | mmu_idx = CPU_MMU_INDEX;
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268 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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269 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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270 | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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271 | } else {
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272 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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273 | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
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274 | }
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275 | return res;
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276 | }
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277 | #endif
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278 |
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279 | #if ACCESS_TYPE != (NB_MMU_MODES + 1)
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280 |
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281 | /* generic store macro */
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282 | #ifndef VBOX
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283 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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284 | #else
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285 | DECLINLINE(void) glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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286 | #endif
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287 | {
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288 | int page_index;
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289 | target_ulong addr;
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290 | unsigned long physaddr;
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291 | int mmu_idx;
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292 |
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293 | addr = ptr;
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294 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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295 | mmu_idx = CPU_MMU_INDEX;
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296 | if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
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297 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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298 | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
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299 | } else {
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300 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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301 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
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302 | }
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303 | }
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304 |
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305 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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306 |
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307 | #endif /* !asm */
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308 |
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309 | #if ACCESS_TYPE != (NB_MMU_MODES + 1)
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310 |
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311 | #if DATA_SIZE == 8
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312 | #ifndef VBOX
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313 | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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314 | #else
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315 | DECLINLINE(float64) glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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316 | #endif
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317 | {
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318 | union {
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319 | float64 d;
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320 | uint64_t i;
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321 | } u;
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322 | u.i = glue(ldq, MEMSUFFIX)(ptr);
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323 | return u.d;
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324 | }
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325 |
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326 | #ifndef VBOX
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327 | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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328 | #else
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329 | DECLINLINE(void) glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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330 | #endif
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331 | {
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332 | union {
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333 | float64 d;
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334 | uint64_t i;
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335 | } u;
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336 | u.d = v;
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337 | glue(stq, MEMSUFFIX)(ptr, u.i);
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338 | }
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339 | #endif /* DATA_SIZE == 8 */
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340 |
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341 | #if DATA_SIZE == 4
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342 | #ifndef VBOX
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343 | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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344 | #else
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345 | DECLINLINE(float32) glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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346 | #endif
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347 | {
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348 | union {
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349 | float32 f;
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350 | uint32_t i;
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351 | } u;
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352 | u.i = glue(ldl, MEMSUFFIX)(ptr);
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353 | return u.f;
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354 | }
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355 |
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356 | #ifndef VBOX
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357 | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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358 | #else
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359 | DECLINLINE(void) glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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360 | #endif
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361 | {
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362 | union {
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363 | float32 f;
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364 | uint32_t i;
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365 | } u;
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366 | u.f = v;
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367 | glue(stl, MEMSUFFIX)(ptr, u.i);
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368 | }
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369 | #endif /* DATA_SIZE == 4 */
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370 |
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371 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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372 |
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373 | #undef RES_TYPE
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374 | #undef DATA_TYPE
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375 | #undef DATA_STYPE
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376 | #undef SUFFIX
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377 | #undef USUFFIX
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378 | #undef DATA_SIZE
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379 | #undef CPU_MMU_INDEX
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380 | #undef MMUSUFFIX
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381 | #undef ADDR_READ
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