1 | /*
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2 | * Host code generation
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3 | *
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4 | * Copyright (c) 2003 Fabrice Bellard
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5 | *
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6 | * This library is free software; you can redistribute it and/or
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7 | * modify it under the terms of the GNU Lesser General Public
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8 | * License as published by the Free Software Foundation; either
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9 | * version 2 of the License, or (at your option) any later version.
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10 | *
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11 | * This library is distributed in the hope that it will be useful,
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12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | * Lesser General Public License for more details.
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15 | *
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16 | * You should have received a copy of the GNU Lesser General Public
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17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | */
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19 |
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20 | /*
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21 | * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
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22 | * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
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23 | * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
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24 | * a choice of LGPL license versions is made available with the language indicating
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25 | * that LGPLv2 or any later version may be used, or where a choice of which version
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26 | * of the LGPL is applied is otherwise unspecified.
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27 | */
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28 |
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29 | #include <stdarg.h>
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30 | #include <stdlib.h>
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31 | #include <stdio.h>
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32 | #include <string.h>
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33 | #include <inttypes.h>
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34 |
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35 | #include "config.h"
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36 |
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37 | #define NO_CPU_IO_DEFS
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38 | #include "cpu.h"
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39 | #include "exec-all.h"
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40 | #include "disas.h"
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41 | #include "tcg.h"
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42 | #include "qemu-timer.h"
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43 |
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44 | /* code generation context */
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45 | TCGContext tcg_ctx;
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46 |
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47 | uint16_t gen_opc_buf[OPC_BUF_SIZE];
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48 | TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
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49 |
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50 | target_ulong gen_opc_pc[OPC_BUF_SIZE];
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51 | uint16_t gen_opc_icount[OPC_BUF_SIZE];
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52 | uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
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53 |
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54 | void cpu_gen_init(void)
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55 | {
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56 | tcg_context_init(&tcg_ctx);
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57 | tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
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58 | sizeof(((CPUState *)0)->temp_buf));
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59 | }
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60 |
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61 | /* return non zero if the very first instruction is invalid so that
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62 | the virtual CPU can trigger an exception.
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63 |
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64 | '*gen_code_size_ptr' contains the size of the generated code (host
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65 | code).
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66 | */
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67 | int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
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68 | {
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69 | TCGContext *s = &tcg_ctx;
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70 | uint8_t *gen_code_buf;
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71 | int gen_code_size;
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72 | #ifdef CONFIG_PROFILER
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73 | int64_t ti;
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74 | #endif
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75 |
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76 | #ifdef CONFIG_PROFILER
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77 | s->tb_count1++; /* includes aborted translations because of
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78 | exceptions */
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79 | ti = profile_getclock();
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80 | #endif
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81 |
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82 | #ifdef VBOX
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83 | RAWEx_ProfileStart(env, STATS_QEMU_COMPILATION);
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84 | #endif
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85 |
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86 | tcg_func_start(s);
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87 |
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88 | gen_intermediate_code(env, tb);
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89 |
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90 | /* generate machine code */
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91 | gen_code_buf = tb->tc_ptr;
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92 | tb->tb_next_offset[0] = 0xffff;
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93 | tb->tb_next_offset[1] = 0xffff;
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94 | s->tb_next_offset = tb->tb_next_offset;
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95 | #ifdef USE_DIRECT_JUMP
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96 | s->tb_jmp_offset = tb->tb_jmp_offset;
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97 | s->tb_next = NULL;
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98 | #else
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99 | s->tb_jmp_offset = NULL;
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100 | s->tb_next = tb->tb_next;
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101 | #endif
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102 |
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103 | #ifdef CONFIG_PROFILER
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104 | s->tb_count++;
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105 | s->interm_time += profile_getclock() - ti;
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106 | s->code_time -= profile_getclock();
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107 | #endif
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108 | gen_code_size = tcg_gen_code(s, gen_code_buf);
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109 | *gen_code_size_ptr = gen_code_size;
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110 | #ifdef CONFIG_PROFILER
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111 | s->code_time += profile_getclock();
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112 | s->code_in_len += tb->size;
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113 | s->code_out_len += gen_code_size;
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114 | #endif
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115 |
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116 | #ifdef VBOX
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117 | RAWEx_ProfileStop(env, STATS_QEMU_COMPILATION);
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118 | #endif
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119 |
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120 | #ifdef DEBUG_DISAS
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121 | if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
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122 | qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
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123 | log_disas(tb->tc_ptr, *gen_code_size_ptr);
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124 | qemu_log("\n");
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125 | qemu_log_flush();
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126 | }
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127 | #endif
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128 | return 0;
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129 | }
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130 |
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131 | /* The cpu state corresponding to 'searched_pc' is restored.
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132 | */
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133 | int cpu_restore_state(TranslationBlock *tb,
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134 | CPUState *env, uintptr_t searched_pc,
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135 | void *puc)
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136 | {
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137 | TCGContext *s = &tcg_ctx;
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138 | int j;
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139 | uintptr_t tc_ptr;
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140 | #ifdef CONFIG_PROFILER
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141 | int64_t ti;
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142 | #endif
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143 |
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144 | #ifdef CONFIG_PROFILER
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145 | ti = profile_getclock();
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146 | #endif
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147 | tcg_func_start(s);
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148 |
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149 | gen_intermediate_code_pc(env, tb);
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150 |
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151 | if (use_icount) {
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152 | /* Reset the cycle counter to the start of the block. */
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153 | env->icount_decr.u16.low += tb->icount;
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154 | /* Clear the IO flag. */
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155 | env->can_do_io = 0;
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156 | }
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157 |
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158 | /* find opc index corresponding to search_pc */
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159 | tc_ptr = (uintptr_t)tb->tc_ptr;
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160 | if (searched_pc < tc_ptr)
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161 | return -1;
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162 |
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163 | s->tb_next_offset = tb->tb_next_offset;
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164 | #ifdef USE_DIRECT_JUMP
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165 | s->tb_jmp_offset = tb->tb_jmp_offset;
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166 | s->tb_next = NULL;
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167 | #else
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168 | s->tb_jmp_offset = NULL;
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169 | s->tb_next = tb->tb_next;
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170 | #endif
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171 | j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
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172 | if (j < 0)
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173 | return -1;
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174 | /* now find start of instruction before */
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175 | while (gen_opc_instr_start[j] == 0)
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176 | j--;
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177 | env->icount_decr.u16.low -= gen_opc_icount[j];
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178 |
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179 | gen_pc_load(env, tb, searched_pc, j, puc);
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180 |
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181 | #ifdef CONFIG_PROFILER
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182 | s->restore_time += profile_getclock() - ti;
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183 | s->restore_count++;
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184 | #endif
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185 | return 0;
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186 | }
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