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source: vbox/trunk/src/recompiler/translate-all.c@ 42681

Last change on this file since 42681 was 42601, checked in by vboxsync, 12 years ago

REM: Initial changes to make it work (seemingly) with MinGW-w64.

  • Property svn:eol-style set to native
File size: 5.0 KB
Line 
1/*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20/*
21 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
22 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
23 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
24 * a choice of LGPL license versions is made available with the language indicating
25 * that LGPLv2 or any later version may be used, or where a choice of which version
26 * of the LGPL is applied is otherwise unspecified.
27 */
28
29#include <stdarg.h>
30#include <stdlib.h>
31#include <stdio.h>
32#include <string.h>
33#include <inttypes.h>
34
35#include "config.h"
36
37#define NO_CPU_IO_DEFS
38#include "cpu.h"
39#include "exec-all.h"
40#include "disas.h"
41#include "tcg.h"
42#include "qemu-timer.h"
43
44/* code generation context */
45TCGContext tcg_ctx;
46
47uint16_t gen_opc_buf[OPC_BUF_SIZE];
48TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
49
50target_ulong gen_opc_pc[OPC_BUF_SIZE];
51uint16_t gen_opc_icount[OPC_BUF_SIZE];
52uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
53
54void cpu_gen_init(void)
55{
56 tcg_context_init(&tcg_ctx);
57 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
58 sizeof(((CPUState *)0)->temp_buf));
59}
60
61/* return non zero if the very first instruction is invalid so that
62 the virtual CPU can trigger an exception.
63
64 '*gen_code_size_ptr' contains the size of the generated code (host
65 code).
66*/
67int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
68{
69 TCGContext *s = &tcg_ctx;
70 uint8_t *gen_code_buf;
71 int gen_code_size;
72#ifdef CONFIG_PROFILER
73 int64_t ti;
74#endif
75
76#ifdef CONFIG_PROFILER
77 s->tb_count1++; /* includes aborted translations because of
78 exceptions */
79 ti = profile_getclock();
80#endif
81
82#ifdef VBOX
83 RAWEx_ProfileStart(env, STATS_QEMU_COMPILATION);
84#endif
85
86 tcg_func_start(s);
87
88 gen_intermediate_code(env, tb);
89
90 /* generate machine code */
91 gen_code_buf = tb->tc_ptr;
92 tb->tb_next_offset[0] = 0xffff;
93 tb->tb_next_offset[1] = 0xffff;
94 s->tb_next_offset = tb->tb_next_offset;
95#ifdef USE_DIRECT_JUMP
96 s->tb_jmp_offset = tb->tb_jmp_offset;
97 s->tb_next = NULL;
98#else
99 s->tb_jmp_offset = NULL;
100 s->tb_next = tb->tb_next;
101#endif
102
103#ifdef CONFIG_PROFILER
104 s->tb_count++;
105 s->interm_time += profile_getclock() - ti;
106 s->code_time -= profile_getclock();
107#endif
108 gen_code_size = tcg_gen_code(s, gen_code_buf);
109 *gen_code_size_ptr = gen_code_size;
110#ifdef CONFIG_PROFILER
111 s->code_time += profile_getclock();
112 s->code_in_len += tb->size;
113 s->code_out_len += gen_code_size;
114#endif
115
116#ifdef VBOX
117 RAWEx_ProfileStop(env, STATS_QEMU_COMPILATION);
118#endif
119
120#ifdef DEBUG_DISAS
121 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
122 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
123 log_disas(tb->tc_ptr, *gen_code_size_ptr);
124 qemu_log("\n");
125 qemu_log_flush();
126 }
127#endif
128 return 0;
129}
130
131/* The cpu state corresponding to 'searched_pc' is restored.
132 */
133int cpu_restore_state(TranslationBlock *tb,
134 CPUState *env, uintptr_t searched_pc,
135 void *puc)
136{
137 TCGContext *s = &tcg_ctx;
138 int j;
139 uintptr_t tc_ptr;
140#ifdef CONFIG_PROFILER
141 int64_t ti;
142#endif
143
144#ifdef CONFIG_PROFILER
145 ti = profile_getclock();
146#endif
147 tcg_func_start(s);
148
149 gen_intermediate_code_pc(env, tb);
150
151 if (use_icount) {
152 /* Reset the cycle counter to the start of the block. */
153 env->icount_decr.u16.low += tb->icount;
154 /* Clear the IO flag. */
155 env->can_do_io = 0;
156 }
157
158 /* find opc index corresponding to search_pc */
159 tc_ptr = (uintptr_t)tb->tc_ptr;
160 if (searched_pc < tc_ptr)
161 return -1;
162
163 s->tb_next_offset = tb->tb_next_offset;
164#ifdef USE_DIRECT_JUMP
165 s->tb_jmp_offset = tb->tb_jmp_offset;
166 s->tb_next = NULL;
167#else
168 s->tb_jmp_offset = NULL;
169 s->tb_next = tb->tb_next;
170#endif
171 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
172 if (j < 0)
173 return -1;
174 /* now find start of instruction before */
175 while (gen_opc_instr_start[j] == 0)
176 j--;
177 env->icount_decr.u16.low -= gen_opc_icount[j];
178
179 gen_pc_load(env, tb, searched_pc, j, puc);
180
181#ifdef CONFIG_PROFILER
182 s->restore_time += profile_getclock() - ti;
183 s->restore_count++;
184#endif
185 return 0;
186}
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