1 | /*
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2 | * i386 micro operations (included several times to generate
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3 | * different operand sizes)
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4 | *
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5 | * Copyright (c) 2003 Fabrice Bellard
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6 | *
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7 | * This library is free software; you can redistribute it and/or
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8 | * modify it under the terms of the GNU Lesser General Public
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9 | * License as published by the Free Software Foundation; either
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10 | * version 2 of the License, or (at your option) any later version.
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11 | *
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12 | * This library is distributed in the hope that it will be useful,
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13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | * Lesser General Public License for more details.
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16 | *
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17 | * You should have received a copy of the GNU Lesser General Public
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18 | * License along with this library; if not, write to the Free Software
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19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 | */
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21 | #ifdef MEM_WRITE
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22 |
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23 | #if MEM_WRITE == 0
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24 |
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25 | #if DATA_BITS == 8
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26 | #define MEM_SUFFIX b_raw
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27 | #elif DATA_BITS == 16
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28 | #define MEM_SUFFIX w_raw
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29 | #elif DATA_BITS == 32
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30 | #define MEM_SUFFIX l_raw
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31 | #elif DATA_BITS == 64
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32 | #define MEM_SUFFIX q_raw
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33 | #endif
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34 |
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35 | #elif MEM_WRITE == 1
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36 |
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37 | #if DATA_BITS == 8
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38 | #define MEM_SUFFIX b_kernel
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39 | #elif DATA_BITS == 16
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40 | #define MEM_SUFFIX w_kernel
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41 | #elif DATA_BITS == 32
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42 | #define MEM_SUFFIX l_kernel
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43 | #elif DATA_BITS == 64
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44 | #define MEM_SUFFIX q_kernel
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45 | #endif
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46 |
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47 | #elif MEM_WRITE == 2
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48 |
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49 | #if DATA_BITS == 8
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50 | #define MEM_SUFFIX b_user
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51 | #elif DATA_BITS == 16
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52 | #define MEM_SUFFIX w_user
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53 | #elif DATA_BITS == 32
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54 | #define MEM_SUFFIX l_user
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55 | #elif DATA_BITS == 64
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56 | #define MEM_SUFFIX q_user
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57 | #endif
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58 |
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59 | #else
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60 |
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61 | #error invalid MEM_WRITE
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62 |
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63 | #endif
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64 |
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65 | #else
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66 |
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67 | #define MEM_SUFFIX SUFFIX
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68 |
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69 | #endif
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70 |
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71 | void OPPROTO glue(glue(op_rol, MEM_SUFFIX), _T0_T1_cc)(void)
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72 | {
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73 | int count;
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74 | target_long src;
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75 |
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76 | if (T1 & SHIFT1_MASK) {
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77 | count = T1 & SHIFT_MASK;
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78 | src = T0;
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79 | T0 &= DATA_MASK;
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80 | T0 = (T0 << count) | (T0 >> (DATA_BITS - count));
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81 | #ifdef MEM_WRITE
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82 | glue(st, MEM_SUFFIX)(A0, T0);
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83 | #else
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84 | /* gcc 3.2 workaround. This is really a bug in gcc. */
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85 | asm volatile("" : : "r" (T0));
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86 | #endif
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87 | CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) |
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88 | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) |
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89 | (T0 & CC_C);
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90 | CC_OP = CC_OP_EFLAGS;
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91 | }
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92 | FORCE_RET();
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93 | }
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94 |
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95 | void OPPROTO glue(glue(op_ror, MEM_SUFFIX), _T0_T1_cc)(void)
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96 | {
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97 | int count;
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98 | target_long src;
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99 |
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100 | if (T1 & SHIFT1_MASK) {
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101 | count = T1 & SHIFT_MASK;
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102 | src = T0;
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103 | T0 &= DATA_MASK;
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104 | T0 = (T0 >> count) | (T0 << (DATA_BITS - count));
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105 | #ifdef MEM_WRITE
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106 | glue(st, MEM_SUFFIX)(A0, T0);
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107 | #else
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108 | /* gcc 3.2 workaround. This is really a bug in gcc. */
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109 | asm volatile("" : : "r" (T0));
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110 | #endif
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111 | CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) |
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112 | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) |
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113 | ((T0 >> (DATA_BITS - 1)) & CC_C);
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114 | CC_OP = CC_OP_EFLAGS;
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115 | }
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116 | FORCE_RET();
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117 | }
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118 |
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119 | void OPPROTO glue(glue(op_rol, MEM_SUFFIX), _T0_T1)(void)
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120 | {
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121 | int count;
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122 | count = T1 & SHIFT_MASK;
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123 | if (count) {
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124 | T0 &= DATA_MASK;
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125 | T0 = (T0 << count) | (T0 >> (DATA_BITS - count));
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126 | #ifdef MEM_WRITE
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127 | glue(st, MEM_SUFFIX)(A0, T0);
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128 | #endif
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129 | }
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130 | FORCE_RET();
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131 | }
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132 |
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133 | void OPPROTO glue(glue(op_ror, MEM_SUFFIX), _T0_T1)(void)
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134 | {
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135 | int count;
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136 | count = T1 & SHIFT_MASK;
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137 | if (count) {
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138 | T0 &= DATA_MASK;
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139 | T0 = (T0 >> count) | (T0 << (DATA_BITS - count));
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140 | #ifdef MEM_WRITE
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141 | glue(st, MEM_SUFFIX)(A0, T0);
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142 | #endif
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143 | }
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144 | FORCE_RET();
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145 | }
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146 |
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147 | void OPPROTO glue(glue(op_rcl, MEM_SUFFIX), _T0_T1_cc)(void)
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148 | {
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149 | int count, eflags;
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150 | target_ulong src;
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151 | target_long res;
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152 |
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153 | count = T1 & SHIFT1_MASK;
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154 | #if DATA_BITS == 16
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155 | count = rclw_table[count];
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156 | #elif DATA_BITS == 8
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157 | count = rclb_table[count];
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158 | #endif
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159 | if (count) {
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160 | eflags = cc_table[CC_OP].compute_all();
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161 | T0 &= DATA_MASK;
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162 | src = T0;
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163 | res = (T0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
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164 | if (count > 1)
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165 | res |= T0 >> (DATA_BITS + 1 - count);
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166 | T0 = res;
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167 | #ifdef MEM_WRITE
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168 | glue(st, MEM_SUFFIX)(A0, T0);
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169 | #endif
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170 | CC_SRC = (eflags & ~(CC_C | CC_O)) |
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171 | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) |
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172 | ((src >> (DATA_BITS - count)) & CC_C);
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173 | CC_OP = CC_OP_EFLAGS;
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174 | }
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175 | FORCE_RET();
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176 | }
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177 |
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178 | void OPPROTO glue(glue(op_rcr, MEM_SUFFIX), _T0_T1_cc)(void)
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179 | {
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180 | int count, eflags;
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181 | target_ulong src;
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182 | target_long res;
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183 |
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184 | count = T1 & SHIFT1_MASK;
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185 | #if DATA_BITS == 16
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186 | count = rclw_table[count];
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187 | #elif DATA_BITS == 8
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188 | count = rclb_table[count];
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189 | #endif
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190 | if (count) {
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191 | eflags = cc_table[CC_OP].compute_all();
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192 | T0 &= DATA_MASK;
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193 | src = T0;
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194 | res = (T0 >> count) | ((target_ulong)(eflags & CC_C) << (DATA_BITS - count));
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195 | if (count > 1)
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196 | res |= T0 << (DATA_BITS + 1 - count);
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197 | T0 = res;
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198 | #ifdef MEM_WRITE
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199 | glue(st, MEM_SUFFIX)(A0, T0);
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200 | #endif
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201 | CC_SRC = (eflags & ~(CC_C | CC_O)) |
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202 | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) |
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203 | ((src >> (count - 1)) & CC_C);
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204 | CC_OP = CC_OP_EFLAGS;
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205 | }
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206 | FORCE_RET();
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207 | }
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208 |
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209 | void OPPROTO glue(glue(op_shl, MEM_SUFFIX), _T0_T1_cc)(void)
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210 | {
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211 | int count;
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212 | target_long src;
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213 |
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214 | count = T1 & SHIFT1_MASK;
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215 | if (count) {
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216 | src = (DATA_TYPE)T0 << (count - 1);
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217 | T0 = T0 << count;
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218 | #ifdef MEM_WRITE
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219 | glue(st, MEM_SUFFIX)(A0, T0);
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220 | #endif
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221 | CC_SRC = src;
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222 | CC_DST = T0;
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223 | CC_OP = CC_OP_SHLB + SHIFT;
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224 | }
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225 | FORCE_RET();
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226 | }
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227 |
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228 | void OPPROTO glue(glue(op_shr, MEM_SUFFIX), _T0_T1_cc)(void)
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229 | {
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230 | int count;
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231 | target_long src;
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232 |
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233 | count = T1 & SHIFT1_MASK;
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234 | if (count) {
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235 | T0 &= DATA_MASK;
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236 | src = T0 >> (count - 1);
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237 | T0 = T0 >> count;
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238 | #ifdef MEM_WRITE
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239 | glue(st, MEM_SUFFIX)(A0, T0);
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240 | #endif
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241 | CC_SRC = src;
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242 | CC_DST = T0;
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243 | CC_OP = CC_OP_SARB + SHIFT;
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244 | }
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245 | FORCE_RET();
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246 | }
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247 |
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248 | void OPPROTO glue(glue(op_sar, MEM_SUFFIX), _T0_T1_cc)(void)
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249 | {
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250 | int count;
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251 | target_long src;
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252 |
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253 | count = T1 & SHIFT1_MASK;
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254 | if (count) {
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255 | src = (DATA_STYPE)T0;
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256 | T0 = src >> count;
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257 | src = src >> (count - 1);
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258 | #ifdef MEM_WRITE
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259 | glue(st, MEM_SUFFIX)(A0, T0);
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260 | #endif
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261 | CC_SRC = src;
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262 | CC_DST = T0;
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263 | CC_OP = CC_OP_SARB + SHIFT;
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264 | }
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265 | FORCE_RET();
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266 | }
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267 |
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268 | #if DATA_BITS == 16
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269 | /* XXX: overflow flag might be incorrect in some cases in shldw */
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270 | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_im_cc)(void)
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271 | {
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272 | int count;
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273 | unsigned int res, tmp;
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274 | count = PARAM1;
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275 | T1 &= 0xffff;
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276 | res = T1 | (T0 << 16);
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277 | tmp = res >> (32 - count);
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278 | res <<= count;
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279 | if (count > 16)
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280 | res |= T1 << (count - 16);
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281 | T0 = res >> 16;
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282 | #ifdef MEM_WRITE
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283 | glue(st, MEM_SUFFIX)(A0, T0);
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284 | #endif
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285 | CC_SRC = tmp;
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286 | CC_DST = T0;
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287 | }
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288 |
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289 | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_ECX_cc)(void)
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290 | {
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291 | int count;
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292 | unsigned int res, tmp;
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293 | count = ECX & 0x1f;
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294 | if (count) {
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295 | T1 &= 0xffff;
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296 | res = T1 | (T0 << 16);
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297 | tmp = res >> (32 - count);
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298 | res <<= count;
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299 | if (count > 16)
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300 | res |= T1 << (count - 16);
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301 | T0 = res >> 16;
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302 | #ifdef MEM_WRITE
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303 | glue(st, MEM_SUFFIX)(A0, T0);
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304 | #endif
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305 | CC_SRC = tmp;
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306 | CC_DST = T0;
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307 | CC_OP = CC_OP_SARB + SHIFT;
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308 | }
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309 | FORCE_RET();
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310 | }
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311 |
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312 | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_im_cc)(void)
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313 | {
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314 | int count;
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315 | unsigned int res, tmp;
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316 |
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317 | count = PARAM1;
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318 | res = (T0 & 0xffff) | (T1 << 16);
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319 | tmp = res >> (count - 1);
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320 | res >>= count;
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321 | if (count > 16)
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322 | res |= T1 << (32 - count);
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323 | T0 = res;
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324 | #ifdef MEM_WRITE
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325 | glue(st, MEM_SUFFIX)(A0, T0);
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326 | #endif
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327 | CC_SRC = tmp;
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328 | CC_DST = T0;
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329 | }
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330 |
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331 |
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332 | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_ECX_cc)(void)
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333 | {
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334 | int count;
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335 | unsigned int res, tmp;
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336 |
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337 | count = ECX & 0x1f;
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338 | if (count) {
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339 | res = (T0 & 0xffff) | (T1 << 16);
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340 | tmp = res >> (count - 1);
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341 | res >>= count;
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342 | if (count > 16)
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343 | res |= T1 << (32 - count);
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344 | T0 = res;
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345 | #ifdef MEM_WRITE
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346 | glue(st, MEM_SUFFIX)(A0, T0);
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347 | #endif
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348 | CC_SRC = tmp;
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349 | CC_DST = T0;
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350 | CC_OP = CC_OP_SARB + SHIFT;
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351 | }
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352 | FORCE_RET();
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353 | }
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354 | #endif
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355 |
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356 | #if DATA_BITS >= 32
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357 | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_im_cc)(void)
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358 | {
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359 | int count;
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360 | target_long tmp;
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361 |
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362 | count = PARAM1;
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363 | T0 &= DATA_MASK;
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364 | T1 &= DATA_MASK;
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365 | tmp = T0 << (count - 1);
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366 | T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
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367 | #ifdef MEM_WRITE
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368 | glue(st, MEM_SUFFIX)(A0, T0);
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369 | #endif
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370 | CC_SRC = tmp;
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371 | CC_DST = T0;
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372 | }
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373 |
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374 | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_ECX_cc)(void)
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375 | {
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376 | int count;
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377 | target_long tmp;
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378 |
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379 | count = ECX & SHIFT1_MASK;
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380 | if (count) {
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381 | T0 &= DATA_MASK;
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382 | T1 &= DATA_MASK;
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383 | tmp = T0 << (count - 1);
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384 | T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
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385 | #ifdef MEM_WRITE
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386 | glue(st, MEM_SUFFIX)(A0, T0);
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387 | #endif
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388 | CC_SRC = tmp;
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389 | CC_DST = T0;
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390 | CC_OP = CC_OP_SHLB + SHIFT;
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391 | }
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392 | FORCE_RET();
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393 | }
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394 |
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395 | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_im_cc)(void)
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396 | {
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397 | int count;
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398 | target_long tmp;
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399 |
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400 | count = PARAM1;
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401 | T0 &= DATA_MASK;
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402 | T1 &= DATA_MASK;
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403 | tmp = T0 >> (count - 1);
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404 | T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
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405 | #ifdef MEM_WRITE
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406 | glue(st, MEM_SUFFIX)(A0, T0);
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407 | #endif
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408 | CC_SRC = tmp;
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409 | CC_DST = T0;
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410 | }
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411 |
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412 |
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413 | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_ECX_cc)(void)
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414 | {
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415 | int count;
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416 | target_long tmp;
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417 |
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418 | count = ECX & SHIFT1_MASK;
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419 | if (count) {
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420 | T0 &= DATA_MASK;
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421 | T1 &= DATA_MASK;
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422 | tmp = T0 >> (count - 1);
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423 | T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
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424 | #ifdef MEM_WRITE
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425 | glue(st, MEM_SUFFIX)(A0, T0);
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426 | #endif
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427 | CC_SRC = tmp;
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428 | CC_DST = T0;
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429 | CC_OP = CC_OP_SARB + SHIFT;
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430 | }
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431 | FORCE_RET();
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432 | }
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433 | #endif
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434 |
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435 | /* carry add/sub (we only need to set CC_OP differently) */
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436 |
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437 | void OPPROTO glue(glue(op_adc, MEM_SUFFIX), _T0_T1_cc)(void)
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438 | {
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439 | int cf;
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440 | cf = cc_table[CC_OP].compute_c();
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441 | T0 = T0 + T1 + cf;
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442 | #ifdef MEM_WRITE
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443 | glue(st, MEM_SUFFIX)(A0, T0);
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444 | #endif
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445 | CC_SRC = T1;
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446 | CC_DST = T0;
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447 | CC_OP = CC_OP_ADDB + SHIFT + cf * 4;
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448 | }
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449 |
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450 | void OPPROTO glue(glue(op_sbb, MEM_SUFFIX), _T0_T1_cc)(void)
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451 | {
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452 | int cf;
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453 | cf = cc_table[CC_OP].compute_c();
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454 | T0 = T0 - T1 - cf;
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455 | #ifdef MEM_WRITE
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456 | glue(st, MEM_SUFFIX)(A0, T0);
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457 | #endif
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458 | CC_SRC = T1;
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459 | CC_DST = T0;
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460 | CC_OP = CC_OP_SUBB + SHIFT + cf * 4;
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461 | }
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462 |
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463 | void OPPROTO glue(glue(op_cmpxchg, MEM_SUFFIX), _T0_T1_EAX_cc)(void)
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464 | {
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465 | target_ulong src, dst;
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466 |
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467 | src = T0;
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468 | dst = EAX - T0;
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469 | if ((DATA_TYPE)dst == 0) {
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470 | T0 = T1;
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471 | #ifdef MEM_WRITE
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472 | glue(st, MEM_SUFFIX)(A0, T0);
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473 | #endif
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474 | } else {
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475 | EAX = (EAX & ~DATA_MASK) | (T0 & DATA_MASK);
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476 | }
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477 | CC_SRC = src;
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478 | CC_DST = dst;
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479 | FORCE_RET();
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480 | }
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481 |
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482 | #undef MEM_SUFFIX
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483 | #undef MEM_WRITE
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