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source: vbox/trunk/src/recompiler/target-i386/op.c@ 5197

Last change on this file since 5197 was 5197, checked in by vboxsync, 17 years ago

Experiment with call recording for CSAM

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1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define ASM_SOFTMMU
22#include "exec.h"
23
24/* n must be a constant to be efficient */
25static inline target_long lshift(target_long x, int n)
26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 helper_bswapq_T0();
229}
230#endif
231
232/* multiply/divide */
233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311}
312
313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
330/* division, flags are undefined */
331
332void OPPROTO op_divb_AL_T0(void)
333{
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
339 raise_exception(EXCP00_DIVZ);
340 }
341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
345 r = (num % den) & 0xff;
346 EAX = (EAX & ~0xffff) | (r << 8) | q;
347}
348
349void OPPROTO op_idivb_AL_T0(void)
350{
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
356 raise_exception(EXCP00_DIVZ);
357 }
358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
362 r = (num % den) & 0xff;
363 EAX = (EAX & ~0xffff) | (r << 8) | q;
364}
365
366void OPPROTO op_divw_AX_T0(void)
367{
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
373 raise_exception(EXCP00_DIVZ);
374 }
375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
379 r = (num % den) & 0xffff;
380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
382}
383
384void OPPROTO op_idivw_AX_T0(void)
385{
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
391 raise_exception(EXCP00_DIVZ);
392 }
393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
397 r = (num % den) & 0xffff;
398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
400}
401
402void OPPROTO op_divl_EAX_T0(void)
403{
404 helper_divl_EAX_T0();
405}
406
407void OPPROTO op_idivl_EAX_T0(void)
408{
409 helper_idivl_EAX_T0();
410}
411
412#ifdef TARGET_X86_64
413void OPPROTO op_divq_EAX_T0(void)
414{
415 helper_divq_EAX_T0();
416}
417
418void OPPROTO op_idivq_EAX_T0(void)
419{
420 helper_idivq_EAX_T0();
421}
422#endif
423
424/* constant load & misc op */
425
426/* XXX: consistent names */
427void OPPROTO op_movl_T0_imu(void)
428{
429 T0 = (uint32_t)PARAM1;
430}
431
432void OPPROTO op_movl_T0_im(void)
433{
434 T0 = (int32_t)PARAM1;
435}
436
437void OPPROTO op_addl_T0_im(void)
438{
439 T0 += PARAM1;
440}
441
442void OPPROTO op_andl_T0_ffff(void)
443{
444 T0 = T0 & 0xffff;
445}
446
447void OPPROTO op_andl_T0_im(void)
448{
449 T0 = T0 & PARAM1;
450}
451
452void OPPROTO op_movl_T0_T1(void)
453{
454 T0 = T1;
455}
456
457void OPPROTO op_movl_T1_imu(void)
458{
459 T1 = (uint32_t)PARAM1;
460}
461
462void OPPROTO op_movl_T1_im(void)
463{
464 T1 = (int32_t)PARAM1;
465}
466
467void OPPROTO op_addl_T1_im(void)
468{
469 T1 += PARAM1;
470}
471
472void OPPROTO op_movl_T1_A0(void)
473{
474 T1 = A0;
475}
476
477void OPPROTO op_movl_A0_im(void)
478{
479 A0 = (uint32_t)PARAM1;
480}
481
482void OPPROTO op_addl_A0_im(void)
483{
484 A0 = (uint32_t)(A0 + PARAM1);
485}
486
487void OPPROTO op_movl_A0_seg(void)
488{
489#ifdef VBOX
490 /** @todo Not very efficient, but the least invasive. */
491 /** @todo Pass segment register index as parameter in translate.c. */
492 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
493
494 if (env->segs[idx].newselector && !(env->eflags & VM_MASK)) {
495 sync_seg(env, idx, env->segs[idx].newselector);
496 }
497#if 0 /* breaks Solaris */
498 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
499 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
500 && !(env->eflags & VM_MASK)
501 && env->segs[idx].selector == 0) {
502 raise_exception(EXCP0D_GPF);
503 }
504#endif
505 A0 = (uint32_t)env->segs[idx].base;
506 FORCE_RET();
507#else /* !VBOX */
508 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
509#endif /* !VBOX */
510}
511
512void OPPROTO op_addl_A0_seg(void)
513{
514#ifdef VBOX
515 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
516
517 if (env->segs[idx].newselector && !(env->eflags & VM_MASK)) {
518 sync_seg(env, idx, env->segs[idx].newselector);
519 }
520#if 0 /* breaks Solaris */
521 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
522 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
523 && !(env->eflags & VM_MASK)
524 && env->segs[idx].selector == 0) {
525 raise_exception(EXCP0D_GPF);
526 }
527#endif
528 A0 = (uint32_t)(A0 + env->segs[idx].base);
529 FORCE_RET();
530#else /* !VBOX */
531 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
532#endif /* !VBOX */
533}
534
535void OPPROTO op_addl_A0_AL(void)
536{
537 A0 = (uint32_t)(A0 + (EAX & 0xff));
538}
539
540#ifdef WORDS_BIGENDIAN
541typedef union UREG64 {
542 struct { uint16_t v3, v2, v1, v0; } w;
543 struct { uint32_t v1, v0; } l;
544 uint64_t q;
545} UREG64;
546#else
547typedef union UREG64 {
548 struct { uint16_t v0, v1, v2, v3; } w;
549 struct { uint32_t v0, v1; } l;
550 uint64_t q;
551} UREG64;
552#endif
553
554#ifdef TARGET_X86_64
555
556#define PARAMQ1 \
557({\
558 UREG64 __p;\
559 __p.l.v1 = PARAM1;\
560 __p.l.v0 = PARAM2;\
561 __p.q;\
562})
563
564void OPPROTO op_movq_T0_im64(void)
565{
566 T0 = PARAMQ1;
567}
568
569void OPPROTO op_movq_T1_im64(void)
570{
571 T1 = PARAMQ1;
572}
573
574void OPPROTO op_movq_A0_im(void)
575{
576 A0 = (int32_t)PARAM1;
577}
578
579void OPPROTO op_movq_A0_im64(void)
580{
581 A0 = PARAMQ1;
582}
583
584void OPPROTO op_addq_A0_im(void)
585{
586 A0 = (A0 + (int32_t)PARAM1);
587}
588
589void OPPROTO op_addq_A0_im64(void)
590{
591 A0 = (A0 + PARAMQ1);
592}
593
594void OPPROTO op_movq_A0_seg(void)
595{
596#ifdef VBOX
597 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
598
599 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
600 sync_seg(env, idx, env->segs[idx].newselector);
601 A0 = (target_ulong)env->segs[idx].base;
602#else /* !VBOX */
603 A0 = *(target_ulong *)((char *)env + PARAM1);
604#endif /* !VBOX */
605}
606
607void OPPROTO op_addq_A0_seg(void)
608{
609#ifdef VBOX
610 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
611
612 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
613 sync_seg(env, idx, env->segs[idx].newselector);
614 A0 += (target_ulong)env->segs[idx].base;
615#else /* !VBOX */
616 A0 += *(target_ulong *)((char *)env + PARAM1);
617#endif /* !VBOX */
618}
619
620void OPPROTO op_addq_A0_AL(void)
621{
622 A0 = (A0 + (EAX & 0xff));
623}
624
625#endif
626
627void OPPROTO op_andl_A0_ffff(void)
628{
629 A0 = A0 & 0xffff;
630}
631
632/* memory access */
633
634#define MEMSUFFIX _raw
635#include "ops_mem.h"
636
637#if !defined(CONFIG_USER_ONLY)
638#define MEMSUFFIX _kernel
639#include "ops_mem.h"
640
641#define MEMSUFFIX _user
642#include "ops_mem.h"
643#endif
644
645/* indirect jump */
646
647void OPPROTO op_jmp_T0(void)
648{
649 EIP = T0;
650}
651
652void OPPROTO op_movl_eip_im(void)
653{
654 EIP = (uint32_t)PARAM1;
655}
656
657#ifdef TARGET_X86_64
658void OPPROTO op_movq_eip_im(void)
659{
660 EIP = (int32_t)PARAM1;
661}
662
663void OPPROTO op_movq_eip_im64(void)
664{
665 EIP = PARAMQ1;
666}
667#endif
668
669void OPPROTO op_hlt(void)
670{
671 helper_hlt();
672}
673
674void OPPROTO op_monitor(void)
675{
676 helper_monitor();
677}
678
679void OPPROTO op_mwait(void)
680{
681 helper_mwait();
682}
683
684void OPPROTO op_debug(void)
685{
686 env->exception_index = EXCP_DEBUG;
687 cpu_loop_exit();
688}
689
690void OPPROTO op_raise_interrupt(void)
691{
692 int intno, next_eip_addend;
693 intno = PARAM1;
694 next_eip_addend = PARAM2;
695 raise_interrupt(intno, 1, 0, next_eip_addend);
696}
697
698void OPPROTO op_raise_exception(void)
699{
700 int exception_index;
701 exception_index = PARAM1;
702 raise_exception(exception_index);
703}
704
705void OPPROTO op_into(void)
706{
707 int eflags;
708 eflags = cc_table[CC_OP].compute_all();
709 if (eflags & CC_O) {
710 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
711 }
712 FORCE_RET();
713}
714
715void OPPROTO op_cli(void)
716{
717 env->eflags &= ~IF_MASK;
718}
719
720void OPPROTO op_sti(void)
721{
722 env->eflags |= IF_MASK;
723}
724
725void OPPROTO op_set_inhibit_irq(void)
726{
727 env->hflags |= HF_INHIBIT_IRQ_MASK;
728}
729
730void OPPROTO op_reset_inhibit_irq(void)
731{
732 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
733}
734
735void OPPROTO op_rsm(void)
736{
737 helper_rsm();
738}
739
740#ifndef VBOX
741#if 0
742/* vm86plus instructions */
743void OPPROTO op_cli_vm(void)
744{
745 env->eflags &= ~VIF_MASK;
746}
747
748void OPPROTO op_sti_vm(void)
749{
750 env->eflags |= VIF_MASK;
751 if (env->eflags & VIP_MASK) {
752 EIP = PARAM1;
753 raise_exception(EXCP0D_GPF);
754 }
755 FORCE_RET();
756}
757#endif
758
759#else /* VBOX */
760void OPPROTO op_cli_vme(void)
761{
762 env->eflags &= ~VIF_MASK;
763}
764
765void OPPROTO op_sti_vme(void)
766{
767 /* First check, then change eflags according to the AMD manual */
768 if (env->eflags & VIP_MASK) {
769 raise_exception(EXCP0D_GPF);
770 }
771 env->eflags |= VIF_MASK;
772 FORCE_RET();
773}
774#endif /* VBOX */
775
776void OPPROTO op_boundw(void)
777{
778 int low, high, v;
779 low = ldsw(A0);
780 high = ldsw(A0 + 2);
781 v = (int16_t)T0;
782 if (v < low || v > high) {
783 raise_exception(EXCP05_BOUND);
784 }
785 FORCE_RET();
786}
787
788void OPPROTO op_boundl(void)
789{
790 int low, high, v;
791 low = ldl(A0);
792 high = ldl(A0 + 4);
793 v = T0;
794 if (v < low || v > high) {
795 raise_exception(EXCP05_BOUND);
796 }
797 FORCE_RET();
798}
799
800void OPPROTO op_cmpxchg8b(void)
801{
802 helper_cmpxchg8b();
803}
804
805void OPPROTO op_movl_T0_0(void)
806{
807 T0 = 0;
808}
809
810#ifdef VBOX
811void OPPROTO op_check_external_event(void)
812{
813 if ( (env->interrupt_request & ( CPU_INTERRUPT_EXTERNAL_EXIT
814 | CPU_INTERRUPT_EXTERNAL_TIMER
815 | CPU_INTERRUPT_EXTERNAL_DMA))
816 || ( (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_HARD)
817 && (env->eflags & IF_MASK)
818 && !(env->hflags & HF_INHIBIT_IRQ_MASK) ) )
819 {
820 helper_external_event();
821 }
822}
823
824void OPPROTO op_record_call(void)
825{
826 helper_record_call();
827}
828
829#endif /* VBOX */
830
831void OPPROTO op_exit_tb(void)
832{
833 EXIT_TB();
834}
835
836/* multiple size ops */
837
838#define ldul ldl
839
840#define SHIFT 0
841#include "ops_template.h"
842#undef SHIFT
843
844#define SHIFT 1
845#include "ops_template.h"
846#undef SHIFT
847
848#define SHIFT 2
849#include "ops_template.h"
850#undef SHIFT
851
852#ifdef TARGET_X86_64
853
854#define SHIFT 3
855#include "ops_template.h"
856#undef SHIFT
857
858#endif
859
860/* sign extend */
861
862void OPPROTO op_movsbl_T0_T0(void)
863{
864 T0 = (int8_t)T0;
865}
866
867void OPPROTO op_movzbl_T0_T0(void)
868{
869 T0 = (uint8_t)T0;
870}
871
872void OPPROTO op_movswl_T0_T0(void)
873{
874 T0 = (int16_t)T0;
875}
876
877void OPPROTO op_movzwl_T0_T0(void)
878{
879 T0 = (uint16_t)T0;
880}
881
882void OPPROTO op_movswl_EAX_AX(void)
883{
884 EAX = (uint32_t)((int16_t)EAX);
885}
886
887#ifdef TARGET_X86_64
888void OPPROTO op_movslq_T0_T0(void)
889{
890 T0 = (int32_t)T0;
891}
892
893void OPPROTO op_movslq_RAX_EAX(void)
894{
895 EAX = (int32_t)EAX;
896}
897#endif
898
899void OPPROTO op_movsbw_AX_AL(void)
900{
901 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
902}
903
904void OPPROTO op_movslq_EDX_EAX(void)
905{
906 EDX = (uint32_t)((int32_t)EAX >> 31);
907}
908
909void OPPROTO op_movswl_DX_AX(void)
910{
911 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
912}
913
914#ifdef TARGET_X86_64
915void OPPROTO op_movsqo_RDX_RAX(void)
916{
917 EDX = (int64_t)EAX >> 63;
918}
919#endif
920
921/* string ops helpers */
922
923void OPPROTO op_addl_ESI_T0(void)
924{
925 ESI = (uint32_t)(ESI + T0);
926}
927
928void OPPROTO op_addw_ESI_T0(void)
929{
930 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
931}
932
933void OPPROTO op_addl_EDI_T0(void)
934{
935 EDI = (uint32_t)(EDI + T0);
936}
937
938void OPPROTO op_addw_EDI_T0(void)
939{
940 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
941}
942
943void OPPROTO op_decl_ECX(void)
944{
945 ECX = (uint32_t)(ECX - 1);
946}
947
948void OPPROTO op_decw_ECX(void)
949{
950 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
951}
952
953#ifdef TARGET_X86_64
954void OPPROTO op_addq_ESI_T0(void)
955{
956 ESI = (ESI + T0);
957}
958
959void OPPROTO op_addq_EDI_T0(void)
960{
961 EDI = (EDI + T0);
962}
963
964void OPPROTO op_decq_ECX(void)
965{
966 ECX--;
967}
968#endif
969
970/* push/pop utils */
971
972void op_addl_A0_SS(void)
973{
974 A0 = (uint32_t)(A0 + env->segs[R_SS].base);
975}
976
977void op_subl_A0_2(void)
978{
979 A0 = (uint32_t)(A0 - 2);
980}
981
982void op_subl_A0_4(void)
983{
984 A0 = (uint32_t)(A0 - 4);
985}
986
987void op_addl_ESP_4(void)
988{
989 ESP = (uint32_t)(ESP + 4);
990}
991
992void op_addl_ESP_2(void)
993{
994 ESP = (uint32_t)(ESP + 2);
995}
996
997void op_addw_ESP_4(void)
998{
999 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
1000}
1001
1002void op_addw_ESP_2(void)
1003{
1004 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
1005}
1006
1007void op_addl_ESP_im(void)
1008{
1009 ESP = (uint32_t)(ESP + PARAM1);
1010}
1011
1012void op_addw_ESP_im(void)
1013{
1014 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
1015}
1016
1017#ifdef TARGET_X86_64
1018void op_subq_A0_2(void)
1019{
1020 A0 -= 2;
1021}
1022
1023void op_subq_A0_8(void)
1024{
1025 A0 -= 8;
1026}
1027
1028void op_addq_ESP_8(void)
1029{
1030 ESP += 8;
1031}
1032
1033void op_addq_ESP_im(void)
1034{
1035 ESP += PARAM1;
1036}
1037#endif
1038
1039void OPPROTO op_rdtsc(void)
1040{
1041 helper_rdtsc();
1042}
1043
1044void OPPROTO op_cpuid(void)
1045{
1046 helper_cpuid();
1047}
1048
1049void OPPROTO op_enter_level(void)
1050{
1051 helper_enter_level(PARAM1, PARAM2);
1052}
1053
1054#ifdef TARGET_X86_64
1055void OPPROTO op_enter64_level(void)
1056{
1057 helper_enter64_level(PARAM1, PARAM2);
1058}
1059#endif
1060
1061void OPPROTO op_sysenter(void)
1062{
1063 helper_sysenter();
1064}
1065
1066void OPPROTO op_sysexit(void)
1067{
1068 helper_sysexit();
1069}
1070
1071#ifdef TARGET_X86_64
1072void OPPROTO op_syscall(void)
1073{
1074 helper_syscall(PARAM1);
1075}
1076
1077void OPPROTO op_sysret(void)
1078{
1079 helper_sysret(PARAM1);
1080}
1081#endif
1082
1083void OPPROTO op_rdmsr(void)
1084{
1085 helper_rdmsr();
1086}
1087
1088void OPPROTO op_wrmsr(void)
1089{
1090 helper_wrmsr();
1091}
1092
1093/* bcd */
1094
1095/* XXX: exception */
1096void OPPROTO op_aam(void)
1097{
1098 int base = PARAM1;
1099 int al, ah;
1100 al = EAX & 0xff;
1101 ah = al / base;
1102 al = al % base;
1103 EAX = (EAX & ~0xffff) | al | (ah << 8);
1104 CC_DST = al;
1105}
1106
1107void OPPROTO op_aad(void)
1108{
1109 int base = PARAM1;
1110 int al, ah;
1111 al = EAX & 0xff;
1112 ah = (EAX >> 8) & 0xff;
1113 al = ((ah * base) + al) & 0xff;
1114 EAX = (EAX & ~0xffff) | al;
1115 CC_DST = al;
1116}
1117
1118void OPPROTO op_aaa(void)
1119{
1120 int icarry;
1121 int al, ah, af;
1122 int eflags;
1123
1124 eflags = cc_table[CC_OP].compute_all();
1125 af = eflags & CC_A;
1126 al = EAX & 0xff;
1127 ah = (EAX >> 8) & 0xff;
1128
1129 icarry = (al > 0xf9);
1130 if (((al & 0x0f) > 9 ) || af) {
1131 al = (al + 6) & 0x0f;
1132 ah = (ah + 1 + icarry) & 0xff;
1133 eflags |= CC_C | CC_A;
1134 } else {
1135 eflags &= ~(CC_C | CC_A);
1136 al &= 0x0f;
1137 }
1138 EAX = (EAX & ~0xffff) | al | (ah << 8);
1139 CC_SRC = eflags;
1140 FORCE_RET();
1141}
1142
1143void OPPROTO op_aas(void)
1144{
1145 int icarry;
1146 int al, ah, af;
1147 int eflags;
1148
1149 eflags = cc_table[CC_OP].compute_all();
1150 af = eflags & CC_A;
1151 al = EAX & 0xff;
1152 ah = (EAX >> 8) & 0xff;
1153
1154 icarry = (al < 6);
1155 if (((al & 0x0f) > 9 ) || af) {
1156 al = (al - 6) & 0x0f;
1157 ah = (ah - 1 - icarry) & 0xff;
1158 eflags |= CC_C | CC_A;
1159 } else {
1160 eflags &= ~(CC_C | CC_A);
1161 al &= 0x0f;
1162 }
1163 EAX = (EAX & ~0xffff) | al | (ah << 8);
1164 CC_SRC = eflags;
1165 FORCE_RET();
1166}
1167
1168void OPPROTO op_daa(void)
1169{
1170 int al, af, cf;
1171 int eflags;
1172
1173 eflags = cc_table[CC_OP].compute_all();
1174 cf = eflags & CC_C;
1175 af = eflags & CC_A;
1176 al = EAX & 0xff;
1177
1178 eflags = 0;
1179 if (((al & 0x0f) > 9 ) || af) {
1180 al = (al + 6) & 0xff;
1181 eflags |= CC_A;
1182 }
1183 if ((al > 0x9f) || cf) {
1184 al = (al + 0x60) & 0xff;
1185 eflags |= CC_C;
1186 }
1187 EAX = (EAX & ~0xff) | al;
1188 /* well, speed is not an issue here, so we compute the flags by hand */
1189 eflags |= (al == 0) << 6; /* zf */
1190 eflags |= parity_table[al]; /* pf */
1191 eflags |= (al & 0x80); /* sf */
1192 CC_SRC = eflags;
1193 FORCE_RET();
1194}
1195
1196void OPPROTO op_das(void)
1197{
1198 int al, al1, af, cf;
1199 int eflags;
1200
1201 eflags = cc_table[CC_OP].compute_all();
1202 cf = eflags & CC_C;
1203 af = eflags & CC_A;
1204 al = EAX & 0xff;
1205
1206 eflags = 0;
1207 al1 = al;
1208 if (((al & 0x0f) > 9 ) || af) {
1209 eflags |= CC_A;
1210 if (al < 6 || cf)
1211 eflags |= CC_C;
1212 al = (al - 6) & 0xff;
1213 }
1214 if ((al1 > 0x99) || cf) {
1215 al = (al - 0x60) & 0xff;
1216 eflags |= CC_C;
1217 }
1218 EAX = (EAX & ~0xff) | al;
1219 /* well, speed is not an issue here, so we compute the flags by hand */
1220 eflags |= (al == 0) << 6; /* zf */
1221 eflags |= parity_table[al]; /* pf */
1222 eflags |= (al & 0x80); /* sf */
1223 CC_SRC = eflags;
1224 FORCE_RET();
1225}
1226
1227/* segment handling */
1228
1229/* never use it with R_CS */
1230void OPPROTO op_movl_seg_T0(void)
1231{
1232 load_seg(PARAM1, T0);
1233}
1234
1235/* faster VM86 version */
1236void OPPROTO op_movl_seg_T0_vm(void)
1237{
1238 int selector;
1239 SegmentCache *sc;
1240
1241 selector = T0 & 0xffff;
1242 /* env->segs[] access */
1243 sc = (SegmentCache *)((char *)env + PARAM1);
1244 sc->selector = selector;
1245 sc->base = (selector << 4);
1246#ifdef VBOX
1247 sc->flags = 0; /* clear attributes */
1248#endif
1249}
1250
1251void OPPROTO op_movl_T0_seg(void)
1252{
1253 T0 = env->segs[PARAM1].selector;
1254}
1255
1256void OPPROTO op_lsl(void)
1257{
1258 helper_lsl();
1259}
1260
1261void OPPROTO op_lar(void)
1262{
1263 helper_lar();
1264}
1265
1266void OPPROTO op_verr(void)
1267{
1268 helper_verr();
1269}
1270
1271void OPPROTO op_verw(void)
1272{
1273 helper_verw();
1274}
1275
1276void OPPROTO op_arpl(void)
1277{
1278 if ((T0 & 3) < (T1 & 3)) {
1279 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1280 T0 = (T0 & ~3) | (T1 & 3);
1281 T1 = CC_Z;
1282 } else {
1283 T1 = 0;
1284 }
1285 FORCE_RET();
1286}
1287
1288void OPPROTO op_arpl_update(void)
1289{
1290 int eflags;
1291 eflags = cc_table[CC_OP].compute_all();
1292 CC_SRC = (eflags & ~CC_Z) | T1;
1293}
1294
1295/* T0: segment, T1:eip */
1296void OPPROTO op_ljmp_protected_T0_T1(void)
1297{
1298 helper_ljmp_protected_T0_T1(PARAM1);
1299}
1300
1301void OPPROTO op_lcall_real_T0_T1(void)
1302{
1303 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1304}
1305
1306void OPPROTO op_lcall_protected_T0_T1(void)
1307{
1308 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1309}
1310
1311void OPPROTO op_iret_real(void)
1312{
1313 helper_iret_real(PARAM1);
1314}
1315
1316void OPPROTO op_iret_protected(void)
1317{
1318 helper_iret_protected(PARAM1, PARAM2);
1319}
1320
1321void OPPROTO op_lret_protected(void)
1322{
1323 helper_lret_protected(PARAM1, PARAM2);
1324}
1325
1326void OPPROTO op_lldt_T0(void)
1327{
1328 helper_lldt_T0();
1329}
1330
1331void OPPROTO op_ltr_T0(void)
1332{
1333 helper_ltr_T0();
1334}
1335
1336/* CR registers access */
1337void OPPROTO op_movl_crN_T0(void)
1338{
1339 helper_movl_crN_T0(PARAM1);
1340}
1341
1342#if !defined(CONFIG_USER_ONLY)
1343void OPPROTO op_movtl_T0_cr8(void)
1344{
1345 T0 = cpu_get_apic_tpr(env);
1346}
1347#endif
1348
1349/* DR registers access */
1350void OPPROTO op_movl_drN_T0(void)
1351{
1352 helper_movl_drN_T0(PARAM1);
1353}
1354
1355void OPPROTO op_lmsw_T0(void)
1356{
1357 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1358 if already set to one. */
1359 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1360 helper_movl_crN_T0(0);
1361}
1362
1363void OPPROTO op_invlpg_A0(void)
1364{
1365 helper_invlpg(A0);
1366}
1367
1368void OPPROTO op_movl_T0_env(void)
1369{
1370 T0 = *(uint32_t *)((char *)env + PARAM1);
1371}
1372
1373void OPPROTO op_movl_env_T0(void)
1374{
1375 *(uint32_t *)((char *)env + PARAM1) = T0;
1376}
1377
1378void OPPROTO op_movl_env_T1(void)
1379{
1380 *(uint32_t *)((char *)env + PARAM1) = T1;
1381}
1382
1383void OPPROTO op_movtl_T0_env(void)
1384{
1385 T0 = *(target_ulong *)((char *)env + PARAM1);
1386}
1387
1388void OPPROTO op_movtl_env_T0(void)
1389{
1390 *(target_ulong *)((char *)env + PARAM1) = T0;
1391}
1392
1393void OPPROTO op_movtl_T1_env(void)
1394{
1395 T1 = *(target_ulong *)((char *)env + PARAM1);
1396}
1397
1398void OPPROTO op_movtl_env_T1(void)
1399{
1400 *(target_ulong *)((char *)env + PARAM1) = T1;
1401}
1402
1403void OPPROTO op_clts(void)
1404{
1405 env->cr[0] &= ~CR0_TS_MASK;
1406 env->hflags &= ~HF_TS_MASK;
1407}
1408
1409/* flags handling */
1410
1411void OPPROTO op_goto_tb0(void)
1412{
1413 GOTO_TB(op_goto_tb0, PARAM1, 0);
1414}
1415
1416void OPPROTO op_goto_tb1(void)
1417{
1418 GOTO_TB(op_goto_tb1, PARAM1, 1);
1419}
1420
1421void OPPROTO op_jmp_label(void)
1422{
1423 GOTO_LABEL_PARAM(1);
1424}
1425
1426void OPPROTO op_jnz_T0_label(void)
1427{
1428 if (T0)
1429 GOTO_LABEL_PARAM(1);
1430 FORCE_RET();
1431}
1432
1433void OPPROTO op_jz_T0_label(void)
1434{
1435 if (!T0)
1436 GOTO_LABEL_PARAM(1);
1437 FORCE_RET();
1438}
1439
1440/* slow set cases (compute x86 flags) */
1441void OPPROTO op_seto_T0_cc(void)
1442{
1443 int eflags;
1444 eflags = cc_table[CC_OP].compute_all();
1445 T0 = (eflags >> 11) & 1;
1446}
1447
1448void OPPROTO op_setb_T0_cc(void)
1449{
1450 T0 = cc_table[CC_OP].compute_c();
1451}
1452
1453void OPPROTO op_setz_T0_cc(void)
1454{
1455 int eflags;
1456 eflags = cc_table[CC_OP].compute_all();
1457 T0 = (eflags >> 6) & 1;
1458}
1459
1460void OPPROTO op_setbe_T0_cc(void)
1461{
1462 int eflags;
1463 eflags = cc_table[CC_OP].compute_all();
1464 T0 = (eflags & (CC_Z | CC_C)) != 0;
1465}
1466
1467void OPPROTO op_sets_T0_cc(void)
1468{
1469 int eflags;
1470 eflags = cc_table[CC_OP].compute_all();
1471 T0 = (eflags >> 7) & 1;
1472}
1473
1474void OPPROTO op_setp_T0_cc(void)
1475{
1476 int eflags;
1477 eflags = cc_table[CC_OP].compute_all();
1478 T0 = (eflags >> 2) & 1;
1479}
1480
1481void OPPROTO op_setl_T0_cc(void)
1482{
1483 int eflags;
1484 eflags = cc_table[CC_OP].compute_all();
1485 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1486}
1487
1488void OPPROTO op_setle_T0_cc(void)
1489{
1490 int eflags;
1491 eflags = cc_table[CC_OP].compute_all();
1492 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1493}
1494
1495void OPPROTO op_xor_T0_1(void)
1496{
1497 T0 ^= 1;
1498}
1499
1500void OPPROTO op_set_cc_op(void)
1501{
1502 CC_OP = PARAM1;
1503}
1504
1505void OPPROTO op_mov_T0_cc(void)
1506{
1507 T0 = cc_table[CC_OP].compute_all();
1508}
1509
1510/* XXX: clear VIF/VIP in all ops ? */
1511#ifdef VBOX
1512/* XXX: AMD docs say they remain unchanged. */
1513#endif
1514
1515void OPPROTO op_movl_eflags_T0(void)
1516{
1517 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1518}
1519
1520void OPPROTO op_movw_eflags_T0(void)
1521{
1522 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1523}
1524
1525void OPPROTO op_movl_eflags_T0_io(void)
1526{
1527 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1528}
1529
1530void OPPROTO op_movw_eflags_T0_io(void)
1531{
1532 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1533}
1534
1535void OPPROTO op_movl_eflags_T0_cpl0(void)
1536{
1537 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1538}
1539
1540void OPPROTO op_movw_eflags_T0_cpl0(void)
1541{
1542 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1543}
1544
1545#ifndef VBOX
1546#if 0
1547/* vm86plus version */
1548void OPPROTO op_movw_eflags_T0_vm(void)
1549{
1550 int eflags;
1551 eflags = T0;
1552 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1553 DF = 1 - (2 * ((eflags >> 10) & 1));
1554 /* we also update some system flags as in user mode */
1555 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1556 (eflags & FL_UPDATE_MASK16);
1557 if (eflags & IF_MASK) {
1558 env->eflags |= VIF_MASK;
1559 if (env->eflags & VIP_MASK) {
1560 EIP = PARAM1;
1561 raise_exception(EXCP0D_GPF);
1562 }
1563 }
1564 FORCE_RET();
1565}
1566
1567void OPPROTO op_movl_eflags_T0_vm(void)
1568{
1569 int eflags;
1570 eflags = T0;
1571 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1572 DF = 1 - (2 * ((eflags >> 10) & 1));
1573 /* we also update some system flags as in user mode */
1574 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1575 (eflags & FL_UPDATE_MASK32);
1576 if (eflags & IF_MASK) {
1577 env->eflags |= VIF_MASK;
1578 if (env->eflags & VIP_MASK) {
1579 EIP = PARAM1;
1580 raise_exception(EXCP0D_GPF);
1581 }
1582 }
1583 FORCE_RET();
1584}
1585#endif
1586
1587#else /* VBOX */
1588/* IOPL != 3, CR4.VME=1 */
1589void OPPROTO op_movw_eflags_T0_vme(void)
1590{
1591 unsigned int new_eflags = T0;
1592
1593 /* if virtual interrupt pending and (virtual) interrupts will be enabled -> #GP */
1594 /* if TF will be set -> #GP */
1595 if ( ((new_eflags & IF_MASK) && (env->eflags & VIP_MASK))
1596 || (new_eflags & TF_MASK)) {
1597 raise_exception(EXCP0D_GPF);
1598 } else {
1599 load_eflags(new_eflags, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1600
1601 if (new_eflags & IF_MASK) {
1602 env->eflags |= VIF_MASK;
1603 } else {
1604 env->eflags &= ~VIF_MASK;
1605 }
1606 }
1607
1608 FORCE_RET();
1609}
1610#endif /* VBOX */
1611
1612/* XXX: compute only O flag */
1613void OPPROTO op_movb_eflags_T0(void)
1614{
1615 int of;
1616 of = cc_table[CC_OP].compute_all() & CC_O;
1617 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1618}
1619
1620void OPPROTO op_movl_T0_eflags(void)
1621{
1622 int eflags;
1623 eflags = cc_table[CC_OP].compute_all();
1624 eflags |= (DF & DF_MASK);
1625 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1626 T0 = eflags;
1627}
1628
1629/* vm86plus version */
1630#ifdef VBOX /* #if 0 */
1631void OPPROTO op_movl_T0_eflags_vme(void)
1632{
1633 int eflags;
1634 eflags = cc_table[CC_OP].compute_all();
1635 eflags |= (DF & DF_MASK);
1636 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1637 if (env->eflags & VIF_MASK)
1638 eflags |= IF_MASK;
1639 T0 = eflags;
1640}
1641#endif /* VBOX / 0 */
1642
1643void OPPROTO op_cld(void)
1644{
1645 DF = 1;
1646}
1647
1648void OPPROTO op_std(void)
1649{
1650 DF = -1;
1651}
1652
1653void OPPROTO op_clc(void)
1654{
1655 int eflags;
1656 eflags = cc_table[CC_OP].compute_all();
1657 eflags &= ~CC_C;
1658 CC_SRC = eflags;
1659}
1660
1661void OPPROTO op_stc(void)
1662{
1663 int eflags;
1664 eflags = cc_table[CC_OP].compute_all();
1665 eflags |= CC_C;
1666 CC_SRC = eflags;
1667}
1668
1669void OPPROTO op_cmc(void)
1670{
1671 int eflags;
1672 eflags = cc_table[CC_OP].compute_all();
1673 eflags ^= CC_C;
1674 CC_SRC = eflags;
1675}
1676
1677void OPPROTO op_salc(void)
1678{
1679 int cf;
1680 cf = cc_table[CC_OP].compute_c();
1681 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1682}
1683
1684static int compute_all_eflags(void)
1685{
1686 return CC_SRC;
1687}
1688
1689static int compute_c_eflags(void)
1690{
1691 return CC_SRC & CC_C;
1692}
1693
1694CCTable cc_table[CC_OP_NB] = {
1695 [CC_OP_DYNAMIC] = { /* should never happen */ },
1696
1697 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1698
1699 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1700 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1701 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1702
1703 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1704 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1705 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1706
1707 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1708 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1709 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1710
1711 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1712 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1713 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1714
1715 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1716 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1717 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1718
1719 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1720 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1721 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1722
1723 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1724 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1725 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1726
1727 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1728 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1729 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1730
1731 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1732 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1733 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1734
1735 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1736 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1737 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1738
1739#ifdef TARGET_X86_64
1740 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1741
1742 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1743
1744 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1745
1746 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1747
1748 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1749
1750 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1751
1752 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1753
1754 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1755
1756 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1757
1758 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1759#endif
1760};
1761
1762/* floating point support. Some of the code for complicated x87
1763 functions comes from the LGPL'ed x86 emulator found in the Willows
1764 TWIN windows emulator. */
1765
1766/* fp load FT0 */
1767
1768void OPPROTO op_flds_FT0_A0(void)
1769{
1770#ifdef USE_FP_CONVERT
1771 FP_CONVERT.i32 = ldl(A0);
1772 FT0 = FP_CONVERT.f;
1773#else
1774 FT0 = ldfl(A0);
1775#endif
1776}
1777
1778void OPPROTO op_fldl_FT0_A0(void)
1779{
1780#ifdef USE_FP_CONVERT
1781 FP_CONVERT.i64 = ldq(A0);
1782 FT0 = FP_CONVERT.d;
1783#else
1784 FT0 = ldfq(A0);
1785#endif
1786}
1787
1788/* helpers are needed to avoid static constant reference. XXX: find a better way */
1789#ifdef USE_INT_TO_FLOAT_HELPERS
1790
1791void helper_fild_FT0_A0(void)
1792{
1793 FT0 = (CPU86_LDouble)ldsw(A0);
1794}
1795
1796void helper_fildl_FT0_A0(void)
1797{
1798 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1799}
1800
1801void helper_fildll_FT0_A0(void)
1802{
1803 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1804}
1805
1806void OPPROTO op_fild_FT0_A0(void)
1807{
1808 helper_fild_FT0_A0();
1809}
1810
1811void OPPROTO op_fildl_FT0_A0(void)
1812{
1813 helper_fildl_FT0_A0();
1814}
1815
1816void OPPROTO op_fildll_FT0_A0(void)
1817{
1818 helper_fildll_FT0_A0();
1819}
1820
1821#else
1822
1823void OPPROTO op_fild_FT0_A0(void)
1824{
1825#ifdef USE_FP_CONVERT
1826 FP_CONVERT.i32 = ldsw(A0);
1827 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1828#else
1829 FT0 = (CPU86_LDouble)ldsw(A0);
1830#endif
1831}
1832
1833void OPPROTO op_fildl_FT0_A0(void)
1834{
1835#ifdef USE_FP_CONVERT
1836 FP_CONVERT.i32 = (int32_t) ldl(A0);
1837 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1838#else
1839 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1840#endif
1841}
1842
1843void OPPROTO op_fildll_FT0_A0(void)
1844{
1845#ifdef USE_FP_CONVERT
1846 FP_CONVERT.i64 = (int64_t) ldq(A0);
1847 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1848#else
1849 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1850#endif
1851}
1852#endif
1853
1854/* fp load ST0 */
1855
1856void OPPROTO op_flds_ST0_A0(void)
1857{
1858 int new_fpstt;
1859 new_fpstt = (env->fpstt - 1) & 7;
1860#ifdef USE_FP_CONVERT
1861 FP_CONVERT.i32 = ldl(A0);
1862 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1863#else
1864 env->fpregs[new_fpstt].d = ldfl(A0);
1865#endif
1866 env->fpstt = new_fpstt;
1867 env->fptags[new_fpstt] = 0; /* validate stack entry */
1868}
1869
1870void OPPROTO op_fldl_ST0_A0(void)
1871{
1872 int new_fpstt;
1873 new_fpstt = (env->fpstt - 1) & 7;
1874#ifdef USE_FP_CONVERT
1875 FP_CONVERT.i64 = ldq(A0);
1876 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1877#else
1878 env->fpregs[new_fpstt].d = ldfq(A0);
1879#endif
1880 env->fpstt = new_fpstt;
1881 env->fptags[new_fpstt] = 0; /* validate stack entry */
1882}
1883
1884void OPPROTO op_fldt_ST0_A0(void)
1885{
1886 helper_fldt_ST0_A0();
1887}
1888
1889/* helpers are needed to avoid static constant reference. XXX: find a better way */
1890#ifdef USE_INT_TO_FLOAT_HELPERS
1891
1892void helper_fild_ST0_A0(void)
1893{
1894 int new_fpstt;
1895 new_fpstt = (env->fpstt - 1) & 7;
1896 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1897 env->fpstt = new_fpstt;
1898 env->fptags[new_fpstt] = 0; /* validate stack entry */
1899}
1900
1901void helper_fildl_ST0_A0(void)
1902{
1903 int new_fpstt;
1904 new_fpstt = (env->fpstt - 1) & 7;
1905 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1906 env->fpstt = new_fpstt;
1907 env->fptags[new_fpstt] = 0; /* validate stack entry */
1908}
1909
1910void helper_fildll_ST0_A0(void)
1911{
1912 int new_fpstt;
1913 new_fpstt = (env->fpstt - 1) & 7;
1914 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1915 env->fpstt = new_fpstt;
1916 env->fptags[new_fpstt] = 0; /* validate stack entry */
1917}
1918
1919void OPPROTO op_fild_ST0_A0(void)
1920{
1921 helper_fild_ST0_A0();
1922}
1923
1924void OPPROTO op_fildl_ST0_A0(void)
1925{
1926 helper_fildl_ST0_A0();
1927}
1928
1929void OPPROTO op_fildll_ST0_A0(void)
1930{
1931 helper_fildll_ST0_A0();
1932}
1933
1934#else
1935
1936void OPPROTO op_fild_ST0_A0(void)
1937{
1938 int new_fpstt;
1939 new_fpstt = (env->fpstt - 1) & 7;
1940#ifdef USE_FP_CONVERT
1941 FP_CONVERT.i32 = ldsw(A0);
1942 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1943#else
1944 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1945#endif
1946 env->fpstt = new_fpstt;
1947 env->fptags[new_fpstt] = 0; /* validate stack entry */
1948}
1949
1950void OPPROTO op_fildl_ST0_A0(void)
1951{
1952 int new_fpstt;
1953 new_fpstt = (env->fpstt - 1) & 7;
1954#ifdef USE_FP_CONVERT
1955 FP_CONVERT.i32 = (int32_t) ldl(A0);
1956 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1957#else
1958 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1959#endif
1960 env->fpstt = new_fpstt;
1961 env->fptags[new_fpstt] = 0; /* validate stack entry */
1962}
1963
1964void OPPROTO op_fildll_ST0_A0(void)
1965{
1966 int new_fpstt;
1967 new_fpstt = (env->fpstt - 1) & 7;
1968#ifdef USE_FP_CONVERT
1969 FP_CONVERT.i64 = (int64_t) ldq(A0);
1970 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1971#else
1972 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1973#endif
1974 env->fpstt = new_fpstt;
1975 env->fptags[new_fpstt] = 0; /* validate stack entry */
1976}
1977
1978#endif
1979
1980/* fp store */
1981
1982void OPPROTO op_fsts_ST0_A0(void)
1983{
1984#ifdef USE_FP_CONVERT
1985 FP_CONVERT.f = (float)ST0;
1986 stfl(A0, FP_CONVERT.f);
1987#else
1988 stfl(A0, (float)ST0);
1989#endif
1990 FORCE_RET();
1991}
1992
1993void OPPROTO op_fstl_ST0_A0(void)
1994{
1995 stfq(A0, (double)ST0);
1996 FORCE_RET();
1997}
1998
1999void OPPROTO op_fstt_ST0_A0(void)
2000{
2001 helper_fstt_ST0_A0();
2002}
2003
2004void OPPROTO op_fist_ST0_A0(void)
2005{
2006#if defined(__sparc__) && !defined(__sparc_v9__)
2007 register CPU86_LDouble d asm("o0");
2008#else
2009 CPU86_LDouble d;
2010#endif
2011 int val;
2012
2013 d = ST0;
2014 val = floatx_to_int32(d, &env->fp_status);
2015 if (val != (int16_t)val)
2016 val = -32768;
2017 stw(A0, val);
2018 FORCE_RET();
2019}
2020
2021void OPPROTO op_fistl_ST0_A0(void)
2022{
2023#if defined(__sparc__) && !defined(__sparc_v9__)
2024 register CPU86_LDouble d asm("o0");
2025#else
2026 CPU86_LDouble d;
2027#endif
2028 int val;
2029
2030 d = ST0;
2031 val = floatx_to_int32(d, &env->fp_status);
2032 stl(A0, val);
2033 FORCE_RET();
2034}
2035
2036void OPPROTO op_fistll_ST0_A0(void)
2037{
2038#if defined(__sparc__) && !defined(__sparc_v9__)
2039 register CPU86_LDouble d asm("o0");
2040#else
2041 CPU86_LDouble d;
2042#endif
2043 int64_t val;
2044
2045 d = ST0;
2046 val = floatx_to_int64(d, &env->fp_status);
2047 stq(A0, val);
2048 FORCE_RET();
2049}
2050
2051void OPPROTO op_fistt_ST0_A0(void)
2052{
2053#if defined(__sparc__) && !defined(__sparc_v9__)
2054 register CPU86_LDouble d asm("o0");
2055#else
2056 CPU86_LDouble d;
2057#endif
2058 int val;
2059
2060 d = ST0;
2061 val = floatx_to_int32_round_to_zero(d, &env->fp_status);
2062 if (val != (int16_t)val)
2063 val = -32768;
2064 stw(A0, val);
2065 FORCE_RET();
2066}
2067
2068void OPPROTO op_fisttl_ST0_A0(void)
2069{
2070#if defined(__sparc__) && !defined(__sparc_v9__)
2071 register CPU86_LDouble d asm("o0");
2072#else
2073 CPU86_LDouble d;
2074#endif
2075 int val;
2076
2077 d = ST0;
2078 val = floatx_to_int32_round_to_zero(d, &env->fp_status);
2079 stl(A0, val);
2080 FORCE_RET();
2081}
2082
2083void OPPROTO op_fisttll_ST0_A0(void)
2084{
2085#if defined(__sparc__) && !defined(__sparc_v9__)
2086 register CPU86_LDouble d asm("o0");
2087#else
2088 CPU86_LDouble d;
2089#endif
2090 int64_t val;
2091
2092 d = ST0;
2093 val = floatx_to_int64_round_to_zero(d, &env->fp_status);
2094 stq(A0, val);
2095 FORCE_RET();
2096}
2097
2098void OPPROTO op_fbld_ST0_A0(void)
2099{
2100 helper_fbld_ST0_A0();
2101}
2102
2103void OPPROTO op_fbst_ST0_A0(void)
2104{
2105 helper_fbst_ST0_A0();
2106}
2107
2108/* FPU move */
2109
2110void OPPROTO op_fpush(void)
2111{
2112 fpush();
2113}
2114
2115void OPPROTO op_fpop(void)
2116{
2117 fpop();
2118}
2119
2120void OPPROTO op_fdecstp(void)
2121{
2122 env->fpstt = (env->fpstt - 1) & 7;
2123 env->fpus &= (~0x4700);
2124}
2125
2126void OPPROTO op_fincstp(void)
2127{
2128 env->fpstt = (env->fpstt + 1) & 7;
2129 env->fpus &= (~0x4700);
2130}
2131
2132void OPPROTO op_ffree_STN(void)
2133{
2134 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
2135}
2136
2137void OPPROTO op_fmov_ST0_FT0(void)
2138{
2139 ST0 = FT0;
2140}
2141
2142void OPPROTO op_fmov_FT0_STN(void)
2143{
2144 FT0 = ST(PARAM1);
2145}
2146
2147void OPPROTO op_fmov_ST0_STN(void)
2148{
2149 ST0 = ST(PARAM1);
2150}
2151
2152void OPPROTO op_fmov_STN_ST0(void)
2153{
2154 ST(PARAM1) = ST0;
2155}
2156
2157void OPPROTO op_fxchg_ST0_STN(void)
2158{
2159 CPU86_LDouble tmp;
2160 tmp = ST(PARAM1);
2161 ST(PARAM1) = ST0;
2162 ST0 = tmp;
2163}
2164
2165/* FPU operations */
2166
2167const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
2168
2169void OPPROTO op_fcom_ST0_FT0(void)
2170{
2171 int ret;
2172
2173 ret = floatx_compare(ST0, FT0, &env->fp_status);
2174 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
2175 FORCE_RET();
2176}
2177
2178void OPPROTO op_fucom_ST0_FT0(void)
2179{
2180 int ret;
2181
2182 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2183 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
2184 FORCE_RET();
2185}
2186
2187const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
2188
2189void OPPROTO op_fcomi_ST0_FT0(void)
2190{
2191 int eflags;
2192 int ret;
2193
2194 ret = floatx_compare(ST0, FT0, &env->fp_status);
2195 eflags = cc_table[CC_OP].compute_all();
2196 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2197 CC_SRC = eflags;
2198 FORCE_RET();
2199}
2200
2201void OPPROTO op_fucomi_ST0_FT0(void)
2202{
2203 int eflags;
2204 int ret;
2205
2206 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2207 eflags = cc_table[CC_OP].compute_all();
2208 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2209 CC_SRC = eflags;
2210 FORCE_RET();
2211}
2212
2213void OPPROTO op_fcmov_ST0_STN_T0(void)
2214{
2215 if (T0) {
2216 ST0 = ST(PARAM1);
2217 }
2218 FORCE_RET();
2219}
2220
2221void OPPROTO op_fadd_ST0_FT0(void)
2222{
2223 ST0 += FT0;
2224}
2225
2226void OPPROTO op_fmul_ST0_FT0(void)
2227{
2228 ST0 *= FT0;
2229}
2230
2231void OPPROTO op_fsub_ST0_FT0(void)
2232{
2233 ST0 -= FT0;
2234}
2235
2236void OPPROTO op_fsubr_ST0_FT0(void)
2237{
2238 ST0 = FT0 - ST0;
2239}
2240
2241void OPPROTO op_fdiv_ST0_FT0(void)
2242{
2243 ST0 = helper_fdiv(ST0, FT0);
2244}
2245
2246void OPPROTO op_fdivr_ST0_FT0(void)
2247{
2248 ST0 = helper_fdiv(FT0, ST0);
2249}
2250
2251/* fp operations between STN and ST0 */
2252
2253void OPPROTO op_fadd_STN_ST0(void)
2254{
2255 ST(PARAM1) += ST0;
2256}
2257
2258void OPPROTO op_fmul_STN_ST0(void)
2259{
2260 ST(PARAM1) *= ST0;
2261}
2262
2263void OPPROTO op_fsub_STN_ST0(void)
2264{
2265 ST(PARAM1) -= ST0;
2266}
2267
2268void OPPROTO op_fsubr_STN_ST0(void)
2269{
2270 CPU86_LDouble *p;
2271 p = &ST(PARAM1);
2272 *p = ST0 - *p;
2273}
2274
2275void OPPROTO op_fdiv_STN_ST0(void)
2276{
2277 CPU86_LDouble *p;
2278 p = &ST(PARAM1);
2279 *p = helper_fdiv(*p, ST0);
2280}
2281
2282void OPPROTO op_fdivr_STN_ST0(void)
2283{
2284 CPU86_LDouble *p;
2285 p = &ST(PARAM1);
2286 *p = helper_fdiv(ST0, *p);
2287}
2288
2289/* misc FPU operations */
2290void OPPROTO op_fchs_ST0(void)
2291{
2292 ST0 = floatx_chs(ST0);
2293}
2294
2295void OPPROTO op_fabs_ST0(void)
2296{
2297 ST0 = floatx_abs(ST0);
2298}
2299
2300void OPPROTO op_fxam_ST0(void)
2301{
2302 helper_fxam_ST0();
2303}
2304
2305void OPPROTO op_fld1_ST0(void)
2306{
2307 ST0 = f15rk[1];
2308}
2309
2310void OPPROTO op_fldl2t_ST0(void)
2311{
2312 ST0 = f15rk[6];
2313}
2314
2315void OPPROTO op_fldl2e_ST0(void)
2316{
2317 ST0 = f15rk[5];
2318}
2319
2320void OPPROTO op_fldpi_ST0(void)
2321{
2322 ST0 = f15rk[2];
2323}
2324
2325void OPPROTO op_fldlg2_ST0(void)
2326{
2327 ST0 = f15rk[3];
2328}
2329
2330void OPPROTO op_fldln2_ST0(void)
2331{
2332 ST0 = f15rk[4];
2333}
2334
2335void OPPROTO op_fldz_ST0(void)
2336{
2337 ST0 = f15rk[0];
2338}
2339
2340void OPPROTO op_fldz_FT0(void)
2341{
2342 FT0 = f15rk[0];
2343}
2344
2345/* associated heplers to reduce generated code length and to simplify
2346 relocation (FP constants are usually stored in .rodata section) */
2347
2348void OPPROTO op_f2xm1(void)
2349{
2350 helper_f2xm1();
2351}
2352
2353void OPPROTO op_fyl2x(void)
2354{
2355 helper_fyl2x();
2356}
2357
2358void OPPROTO op_fptan(void)
2359{
2360 helper_fptan();
2361}
2362
2363void OPPROTO op_fpatan(void)
2364{
2365 helper_fpatan();
2366}
2367
2368void OPPROTO op_fxtract(void)
2369{
2370 helper_fxtract();
2371}
2372
2373void OPPROTO op_fprem1(void)
2374{
2375 helper_fprem1();
2376}
2377
2378
2379void OPPROTO op_fprem(void)
2380{
2381 helper_fprem();
2382}
2383
2384void OPPROTO op_fyl2xp1(void)
2385{
2386 helper_fyl2xp1();
2387}
2388
2389void OPPROTO op_fsqrt(void)
2390{
2391 helper_fsqrt();
2392}
2393
2394void OPPROTO op_fsincos(void)
2395{
2396 helper_fsincos();
2397}
2398
2399void OPPROTO op_frndint(void)
2400{
2401 helper_frndint();
2402}
2403
2404void OPPROTO op_fscale(void)
2405{
2406 helper_fscale();
2407}
2408
2409void OPPROTO op_fsin(void)
2410{
2411 helper_fsin();
2412}
2413
2414void OPPROTO op_fcos(void)
2415{
2416 helper_fcos();
2417}
2418
2419void OPPROTO op_fnstsw_A0(void)
2420{
2421 int fpus;
2422 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2423 stw(A0, fpus);
2424 FORCE_RET();
2425}
2426
2427void OPPROTO op_fnstsw_EAX(void)
2428{
2429 int fpus;
2430 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2431 EAX = (EAX & ~0xffff) | fpus;
2432}
2433
2434void OPPROTO op_fnstcw_A0(void)
2435{
2436 stw(A0, env->fpuc);
2437 FORCE_RET();
2438}
2439
2440void OPPROTO op_fldcw_A0(void)
2441{
2442 env->fpuc = lduw(A0);
2443 update_fp_status();
2444}
2445
2446void OPPROTO op_fclex(void)
2447{
2448 env->fpus &= 0x7f00;
2449}
2450
2451void OPPROTO op_fwait(void)
2452{
2453 if (env->fpus & FPUS_SE)
2454 fpu_raise_exception();
2455 FORCE_RET();
2456}
2457
2458void OPPROTO op_fninit(void)
2459{
2460 env->fpus = 0;
2461 env->fpstt = 0;
2462 env->fpuc = 0x37f;
2463 env->fptags[0] = 1;
2464 env->fptags[1] = 1;
2465 env->fptags[2] = 1;
2466 env->fptags[3] = 1;
2467 env->fptags[4] = 1;
2468 env->fptags[5] = 1;
2469 env->fptags[6] = 1;
2470 env->fptags[7] = 1;
2471}
2472
2473void OPPROTO op_fnstenv_A0(void)
2474{
2475 helper_fstenv(A0, PARAM1);
2476}
2477
2478void OPPROTO op_fldenv_A0(void)
2479{
2480 helper_fldenv(A0, PARAM1);
2481}
2482
2483void OPPROTO op_fnsave_A0(void)
2484{
2485 helper_fsave(A0, PARAM1);
2486}
2487
2488void OPPROTO op_frstor_A0(void)
2489{
2490 helper_frstor(A0, PARAM1);
2491}
2492
2493/* threading support */
2494void OPPROTO op_lock(void)
2495{
2496 cpu_lock();
2497}
2498
2499void OPPROTO op_unlock(void)
2500{
2501 cpu_unlock();
2502}
2503
2504/* SSE support */
2505static inline void memcpy16(void *d, void *s)
2506{
2507 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2508 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2509 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2510 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2511}
2512
2513void OPPROTO op_movo(void)
2514{
2515 /* XXX: badly generated code */
2516 XMMReg *d, *s;
2517 d = (XMMReg *)((char *)env + PARAM1);
2518 s = (XMMReg *)((char *)env + PARAM2);
2519 memcpy16(d, s);
2520}
2521
2522void OPPROTO op_movq(void)
2523{
2524 uint64_t *d, *s;
2525 d = (uint64_t *)((char *)env + PARAM1);
2526 s = (uint64_t *)((char *)env + PARAM2);
2527 *d = *s;
2528}
2529
2530void OPPROTO op_movl(void)
2531{
2532 uint32_t *d, *s;
2533 d = (uint32_t *)((char *)env + PARAM1);
2534 s = (uint32_t *)((char *)env + PARAM2);
2535 *d = *s;
2536}
2537
2538void OPPROTO op_movq_env_0(void)
2539{
2540 uint64_t *d;
2541 d = (uint64_t *)((char *)env + PARAM1);
2542 *d = 0;
2543}
2544
2545void OPPROTO op_fxsave_A0(void)
2546{
2547 helper_fxsave(A0, PARAM1);
2548}
2549
2550void OPPROTO op_fxrstor_A0(void)
2551{
2552 helper_fxrstor(A0, PARAM1);
2553}
2554
2555/* XXX: optimize by storing fptt and fptags in the static cpu state */
2556void OPPROTO op_enter_mmx(void)
2557{
2558 env->fpstt = 0;
2559 *(uint32_t *)(env->fptags) = 0;
2560 *(uint32_t *)(env->fptags + 4) = 0;
2561}
2562
2563void OPPROTO op_emms(void)
2564{
2565 /* set to empty state */
2566 *(uint32_t *)(env->fptags) = 0x01010101;
2567 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2568}
2569
2570#define SHIFT 0
2571#include "ops_sse.h"
2572
2573#define SHIFT 1
2574#include "ops_sse.h"
2575
2576#ifdef VBOX
2577/* Instantiate the structure signatures. */
2578# define REM_STRUCT_OP 1
2579# include "../InnoTek/structs.h"
2580#endif
2581
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