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source: vbox/trunk/src/recompiler/target-i386/exec.h@ 5197

Last change on this file since 5197 was 5197, checked in by vboxsync, 17 years ago

Experiment with call recording for CSAM
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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include "config.h"
21#include "dyngen-exec.h"
22
23/* XXX: factorize this mess */
24#ifdef TARGET_X86_64
25#define TARGET_LONG_BITS 64
26#else
27#define TARGET_LONG_BITS 32
28#endif
29
30#include "cpu-defs.h"
31
32/* at least 4 register variables are defined */
33register struct CPUX86State *env asm(AREG0);
34
35#if TARGET_LONG_BITS > HOST_LONG_BITS
36
37/* no registers can be used */
38#define T0 (env->t0)
39#define T1 (env->t1)
40#define T2 (env->t2)
41
42#else
43
44/* XXX: use unsigned long instead of target_ulong - better code will
45 be generated for 64 bit CPUs */
46register target_ulong T0 asm(AREG1);
47register target_ulong T1 asm(AREG2);
48register target_ulong T2 asm(AREG3);
49
50/* if more registers are available, we define some registers too */
51#ifdef AREG4
52register target_ulong EAX asm(AREG4);
53#define reg_EAX
54#endif
55
56#ifdef AREG5
57register target_ulong ESP asm(AREG5);
58#define reg_ESP
59#endif
60
61#ifdef AREG6
62register target_ulong EBP asm(AREG6);
63#define reg_EBP
64#endif
65
66#ifdef AREG7
67register target_ulong ECX asm(AREG7);
68#define reg_ECX
69#endif
70
71#ifdef AREG8
72register target_ulong EDX asm(AREG8);
73#define reg_EDX
74#endif
75
76#ifdef AREG9
77register target_ulong EBX asm(AREG9);
78#define reg_EBX
79#endif
80
81#ifdef AREG10
82register target_ulong ESI asm(AREG10);
83#define reg_ESI
84#endif
85
86#ifdef AREG11
87register target_ulong EDI asm(AREG11);
88#define reg_EDI
89#endif
90
91#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
92
93#define A0 T2
94
95extern FILE *logfile;
96extern int loglevel;
97
98#ifndef reg_EAX
99#define EAX (env->regs[R_EAX])
100#endif
101#ifndef reg_ECX
102#define ECX (env->regs[R_ECX])
103#endif
104#ifndef reg_EDX
105#define EDX (env->regs[R_EDX])
106#endif
107#ifndef reg_EBX
108#define EBX (env->regs[R_EBX])
109#endif
110#ifndef reg_ESP
111#define ESP (env->regs[R_ESP])
112#endif
113#ifndef reg_EBP
114#define EBP (env->regs[R_EBP])
115#endif
116#ifndef reg_ESI
117#define ESI (env->regs[R_ESI])
118#endif
119#ifndef reg_EDI
120#define EDI (env->regs[R_EDI])
121#endif
122#define EIP (env->eip)
123#define DF (env->df)
124
125#define CC_SRC (env->cc_src)
126#define CC_DST (env->cc_dst)
127#define CC_OP (env->cc_op)
128
129/* float macros */
130#define FT0 (env->ft0)
131#define ST0 (env->fpregs[env->fpstt].d)
132#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
133#define ST1 ST(1)
134
135#ifdef USE_FP_CONVERT
136#define FP_CONVERT (env->fp_convert)
137#endif
138
139#include "cpu.h"
140#include "exec-all.h"
141
142typedef struct CCTable {
143 int (*compute_all)(void); /* return all the flags */
144 int (*compute_c)(void); /* return the C flag */
145} CCTable;
146
147extern CCTable cc_table[];
148
149void load_seg(int seg_reg, int selector);
150void helper_ljmp_protected_T0_T1(int next_eip);
151void helper_lcall_real_T0_T1(int shift, int next_eip);
152void helper_lcall_protected_T0_T1(int shift, int next_eip);
153void helper_iret_real(int shift);
154void helper_iret_protected(int shift, int next_eip);
155void helper_lret_protected(int shift, int addend);
156void helper_lldt_T0(void);
157void helper_ltr_T0(void);
158void helper_movl_crN_T0(int reg);
159void helper_movl_drN_T0(int reg);
160void helper_invlpg(target_ulong addr);
161void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
162void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
163void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
164void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
165int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
166 int is_write, int is_user, int is_softmmu);
167void tlb_fill(target_ulong addr, int is_write, int is_user,
168 void *retaddr);
169void __hidden cpu_lock(void);
170void __hidden cpu_unlock(void);
171void do_interrupt(int intno, int is_int, int error_code,
172 target_ulong next_eip, int is_hw);
173void do_interrupt_user(int intno, int is_int, int error_code,
174 target_ulong next_eip);
175void raise_interrupt(int intno, int is_int, int error_code,
176 int next_eip_addend);
177void raise_exception_err(int exception_index, int error_code);
178void raise_exception(int exception_index);
179void do_smm_enter(void);
180void __hidden cpu_loop_exit(void);
181
182void OPPROTO op_movl_eflags_T0(void);
183void OPPROTO op_movl_T0_eflags(void);
184#ifdef VBOX
185void OPPROTO op_movl_T0_eflags_vme(void);
186void OPPROTO op_movw_eflags_T0_vme(void);
187void OPPROTO op_cli_vme(void);
188void OPPROTO op_sti_vme(void);
189#endif
190void helper_divl_EAX_T0(void);
191void helper_idivl_EAX_T0(void);
192void helper_mulq_EAX_T0(void);
193void helper_imulq_EAX_T0(void);
194void helper_imulq_T0_T1(void);
195void helper_divq_EAX_T0(void);
196void helper_idivq_EAX_T0(void);
197void helper_bswapq_T0(void);
198void helper_cmpxchg8b(void);
199void helper_cpuid(void);
200void helper_enter_level(int level, int data32);
201void helper_enter64_level(int level, int data64);
202void helper_sysenter(void);
203void helper_sysexit(void);
204void helper_syscall(int next_eip_addend);
205void helper_sysret(int dflag);
206void helper_rdtsc(void);
207void helper_rdmsr(void);
208void helper_wrmsr(void);
209void helper_lsl(void);
210void helper_lar(void);
211void helper_verr(void);
212void helper_verw(void);
213void helper_rsm(void);
214
215#ifdef VBOX
216void helper_external_event(void);
217void helper_record_call(void);
218
219/* in helper.c */
220void sync_seg(CPUX86State *env1, int seg_reg, int selector);
221void sync_ldtr(CPUX86State *env1, int selector);
222int sync_tr(CPUX86State *env1, int selector);
223
224#endif
225
226void check_iob_T0(void);
227void check_iow_T0(void);
228void check_iol_T0(void);
229void check_iob_DX(void);
230void check_iow_DX(void);
231void check_iol_DX(void);
232
233#if !defined(CONFIG_USER_ONLY)
234
235#include "softmmu_exec.h"
236
237static inline double ldfq(target_ulong ptr)
238{
239 union {
240 double d;
241 uint64_t i;
242 } u;
243 u.i = ldq(ptr);
244 return u.d;
245}
246
247static inline void stfq(target_ulong ptr, double v)
248{
249 union {
250 double d;
251 uint64_t i;
252 } u;
253 u.d = v;
254 stq(ptr, u.i);
255}
256
257static inline float ldfl(target_ulong ptr)
258{
259 union {
260 float f;
261 uint32_t i;
262 } u;
263 u.i = ldl(ptr);
264 return u.f;
265}
266
267static inline void stfl(target_ulong ptr, float v)
268{
269 union {
270 float f;
271 uint32_t i;
272 } u;
273 u.f = v;
274 stl(ptr, u.i);
275}
276
277#endif /* !defined(CONFIG_USER_ONLY) */
278
279#ifdef USE_X86LDOUBLE
280/* use long double functions */
281#define floatx_to_int32 floatx80_to_int32
282#define floatx_to_int64 floatx80_to_int64
283#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
284#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
285#define floatx_abs floatx80_abs
286#define floatx_chs floatx80_chs
287#define floatx_round_to_int floatx80_round_to_int
288#define floatx_compare floatx80_compare
289#define floatx_compare_quiet floatx80_compare_quiet
290#ifdef VBOX
291#undef sin
292#undef cos
293#undef sqrt
294#undef pow
295#undef log
296#undef tan
297#undef atan2
298#undef floor
299#undef ceil
300#undef ldexp
301#endif /* !VBOX */
302#define sin sinl
303#define cos cosl
304#define sqrt sqrtl
305#define pow powl
306#define log logl
307#define tan tanl
308#define atan2 atan2l
309#define floor floorl
310#define ceil ceill
311#define ldexp ldexpl
312#else
313#define floatx_to_int32 float64_to_int32
314#define floatx_to_int64 float64_to_int64
315#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
316#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
317#define floatx_abs float64_abs
318#define floatx_chs float64_chs
319#define floatx_round_to_int float64_round_to_int
320#define floatx_compare float64_compare
321#define floatx_compare_quiet float64_compare_quiet
322#endif
323
324extern CPU86_LDouble sin(CPU86_LDouble x);
325extern CPU86_LDouble cos(CPU86_LDouble x);
326extern CPU86_LDouble sqrt(CPU86_LDouble x);
327extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
328extern CPU86_LDouble log(CPU86_LDouble x);
329extern CPU86_LDouble tan(CPU86_LDouble x);
330extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
331extern CPU86_LDouble floor(CPU86_LDouble x);
332extern CPU86_LDouble ceil(CPU86_LDouble x);
333
334#define RC_MASK 0xc00
335#define RC_NEAR 0x000
336#define RC_DOWN 0x400
337#define RC_UP 0x800
338#define RC_CHOP 0xc00
339
340#define MAXTAN 9223372036854775808.0
341
342#ifdef USE_X86LDOUBLE
343
344/* only for x86 */
345typedef union {
346 long double d;
347 struct {
348 unsigned long long lower;
349 unsigned short upper;
350 } l;
351} CPU86_LDoubleU;
352
353/* the following deal with x86 long double-precision numbers */
354#define MAXEXPD 0x7fff
355#define EXPBIAS 16383
356#define EXPD(fp) (fp.l.upper & 0x7fff)
357#define SIGND(fp) ((fp.l.upper) & 0x8000)
358#define MANTD(fp) (fp.l.lower)
359#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
360
361#else
362
363/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
364typedef union {
365 double d;
366#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
367 struct {
368 uint32_t lower;
369 int32_t upper;
370 } l;
371#else
372 struct {
373 int32_t upper;
374 uint32_t lower;
375 } l;
376#endif
377#ifndef __arm__
378 int64_t ll;
379#endif
380} CPU86_LDoubleU;
381
382/* the following deal with IEEE double-precision numbers */
383#define MAXEXPD 0x7ff
384#define EXPBIAS 1023
385#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
386#define SIGND(fp) ((fp.l.upper) & 0x80000000)
387#ifdef __arm__
388#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
389#else
390#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
391#endif
392#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
393#endif
394
395static inline void fpush(void)
396{
397 env->fpstt = (env->fpstt - 1) & 7;
398 env->fptags[env->fpstt] = 0; /* validate stack entry */
399}
400
401static inline void fpop(void)
402{
403 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
404 env->fpstt = (env->fpstt + 1) & 7;
405}
406
407#ifndef USE_X86LDOUBLE
408static inline CPU86_LDouble helper_fldt(target_ulong ptr)
409{
410 CPU86_LDoubleU temp;
411 int upper, e;
412 uint64_t ll;
413
414 /* mantissa */
415 upper = lduw(ptr + 8);
416 /* XXX: handle overflow ? */
417 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
418 e |= (upper >> 4) & 0x800; /* sign */
419 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
420#ifdef __arm__
421 temp.l.upper = (e << 20) | (ll >> 32);
422 temp.l.lower = ll;
423#else
424 temp.ll = ll | ((uint64_t)e << 52);
425#endif
426 return temp.d;
427}
428
429static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
430{
431 CPU86_LDoubleU temp;
432 int e;
433
434 temp.d = f;
435 /* mantissa */
436 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
437 /* exponent + sign */
438 e = EXPD(temp) - EXPBIAS + 16383;
439 e |= SIGND(temp) >> 16;
440 stw(ptr + 8, e);
441}
442#else
443
444/* XXX: same endianness assumed */
445
446#ifdef CONFIG_USER_ONLY
447
448static inline CPU86_LDouble helper_fldt(target_ulong ptr)
449{
450 return *(CPU86_LDouble *)ptr;
451}
452
453static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
454{
455 *(CPU86_LDouble *)ptr = f;
456}
457
458#else
459
460/* we use memory access macros */
461
462static inline CPU86_LDouble helper_fldt(target_ulong ptr)
463{
464 CPU86_LDoubleU temp;
465
466 temp.l.lower = ldq(ptr);
467 temp.l.upper = lduw(ptr + 8);
468 return temp.d;
469}
470
471static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
472{
473 CPU86_LDoubleU temp;
474
475 temp.d = f;
476 stq(ptr, temp.l.lower);
477 stw(ptr + 8, temp.l.upper);
478}
479
480#endif /* !CONFIG_USER_ONLY */
481
482#endif /* USE_X86LDOUBLE */
483
484#define FPUS_IE (1 << 0)
485#define FPUS_DE (1 << 1)
486#define FPUS_ZE (1 << 2)
487#define FPUS_OE (1 << 3)
488#define FPUS_UE (1 << 4)
489#define FPUS_PE (1 << 5)
490#define FPUS_SF (1 << 6)
491#define FPUS_SE (1 << 7)
492#define FPUS_B (1 << 15)
493
494#define FPUC_EM 0x3f
495
496extern const CPU86_LDouble f15rk[7];
497
498void helper_fldt_ST0_A0(void);
499void helper_fstt_ST0_A0(void);
500void fpu_raise_exception(void);
501CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
502void helper_fbld_ST0_A0(void);
503void helper_fbst_ST0_A0(void);
504void helper_f2xm1(void);
505void helper_fyl2x(void);
506void helper_fptan(void);
507void helper_fpatan(void);
508void helper_fxtract(void);
509void helper_fprem1(void);
510void helper_fprem(void);
511void helper_fyl2xp1(void);
512void helper_fsqrt(void);
513void helper_fsincos(void);
514void helper_frndint(void);
515void helper_fscale(void);
516void helper_fsin(void);
517void helper_fcos(void);
518void helper_fxam_ST0(void);
519void helper_fstenv(target_ulong ptr, int data32);
520void helper_fldenv(target_ulong ptr, int data32);
521void helper_fsave(target_ulong ptr, int data32);
522void helper_frstor(target_ulong ptr, int data32);
523void helper_fxsave(target_ulong ptr, int data64);
524void helper_fxrstor(target_ulong ptr, int data64);
525void restore_native_fp_state(CPUState *env);
526void save_native_fp_state(CPUState *env);
527float approx_rsqrt(float a);
528float approx_rcp(float a);
529void update_fp_status(void);
530void helper_hlt(void);
531void helper_monitor(void);
532void helper_mwait(void);
533
534extern const uint8_t parity_table[256];
535extern const uint8_t rclw_table[32];
536extern const uint8_t rclb_table[32];
537
538static inline uint32_t compute_eflags(void)
539{
540 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
541}
542
543/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
544static inline void load_eflags(int eflags, int update_mask)
545{
546 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
547 DF = 1 - (2 * ((eflags >> 10) & 1));
548 env->eflags = (env->eflags & ~update_mask) |
549 (eflags & update_mask);
550}
551
552static inline void env_to_regs(void)
553{
554#ifdef reg_EAX
555 EAX = env->regs[R_EAX];
556#endif
557#ifdef reg_ECX
558 ECX = env->regs[R_ECX];
559#endif
560#ifdef reg_EDX
561 EDX = env->regs[R_EDX];
562#endif
563#ifdef reg_EBX
564 EBX = env->regs[R_EBX];
565#endif
566#ifdef reg_ESP
567 ESP = env->regs[R_ESP];
568#endif
569#ifdef reg_EBP
570 EBP = env->regs[R_EBP];
571#endif
572#ifdef reg_ESI
573 ESI = env->regs[R_ESI];
574#endif
575#ifdef reg_EDI
576 EDI = env->regs[R_EDI];
577#endif
578}
579
580static inline void regs_to_env(void)
581{
582#ifdef reg_EAX
583 env->regs[R_EAX] = EAX;
584#endif
585#ifdef reg_ECX
586 env->regs[R_ECX] = ECX;
587#endif
588#ifdef reg_EDX
589 env->regs[R_EDX] = EDX;
590#endif
591#ifdef reg_EBX
592 env->regs[R_EBX] = EBX;
593#endif
594#ifdef reg_ESP
595 env->regs[R_ESP] = ESP;
596#endif
597#ifdef reg_EBP
598 env->regs[R_EBP] = EBP;
599#endif
600#ifdef reg_ESI
601 env->regs[R_ESI] = ESI;
602#endif
603#ifdef reg_EDI
604 env->regs[R_EDI] = EDI;
605#endif
606}
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