exec.h@ 1478

Last change on this file since 1478 was 1478, checked in by vboxsync, 18 years ago
Support VME in guests. (v86 extensions)
Property svn:eol-style set to `native`
File size: 16.3 KB

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1	/*
2	* i386 execution defines
3	*
4	* Copyright (c) 2003 Fabrice Bellard
5	*
6	* This library is free software; you can redistribute it and/or
7	* modify it under the terms of the GNU Lesser General Public
8	* License as published by the Free Software Foundation; either
9	* version 2 of the License, or (at your option) any later version.
10	*
11	* This library is distributed in the hope that it will be useful,
12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14	* Lesser General Public License for more details.
15	*
16	* You should have received a copy of the GNU Lesser General Public
17	* License along with this library; if not, write to the Free Software
18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19	*/
20	#include "config.h"
21	#include "dyngen-exec.h"
22
23	/* XXX: factorize this mess */
24	#if defined(__alpha__) \|\| defined (__ia64__) \|\| defined(__x86_64__)
25	#define HOST_LONG_BITS 64
26	#else
27	#define HOST_LONG_BITS 32
28	#endif
29
30	#ifdef TARGET_X86_64
31	#define TARGET_LONG_BITS 64
32	#else
33	#define TARGET_LONG_BITS 32
34	#endif
35
36	/* at least 4 register variables are defined */
37	register struct CPUX86State *env asm(AREG0);
38
39	/* XXX: use 64 bit regs if HOST_LONG_BITS == 64 */
40	#if TARGET_LONG_BITS == 32
41
42	register uint32_t T0 asm(AREG1);
43	register uint32_t T1 asm(AREG2);
44	register uint32_t T2 asm(AREG3);
45
46	/* if more registers are available, we define some registers too */
47	#ifdef AREG4
48	register uint32_t EAX asm(AREG4);
49	#define reg_EAX
50	#endif
51
52	#ifdef AREG5
53	register uint32_t ESP asm(AREG5);
54	#define reg_ESP
55	#endif
56
57	#ifdef AREG6
58	register uint32_t EBP asm(AREG6);
59	#define reg_EBP
60	#endif
61
62	#ifdef AREG7
63	register uint32_t ECX asm(AREG7);
64	#define reg_ECX
65	#endif
66
67	#ifdef AREG8
68	register uint32_t EDX asm(AREG8);
69	#define reg_EDX
70	#endif
71
72	#ifdef AREG9
73	register uint32_t EBX asm(AREG9);
74	#define reg_EBX
75	#endif
76
77	#ifdef AREG10
78	register uint32_t ESI asm(AREG10);
79	#define reg_ESI
80	#endif
81
82	#ifdef AREG11
83	register uint32_t EDI asm(AREG11);
84	#define reg_EDI
85	#endif
86
87	#else
88
89	/* no registers can be used */
90	#define T0 (env->t0)
91	#define T1 (env->t1)
92	#define T2 (env->t2)
93
94	#endif
95
96	#define A0 T2
97
98	extern FILE *logfile;
99	extern int loglevel;
100
101	#ifndef reg_EAX
102	#define EAX (env->regs[R_EAX])
103	#endif
104	#ifndef reg_ECX
105	#define ECX (env->regs[R_ECX])
106	#endif
107	#ifndef reg_EDX
108	#define EDX (env->regs[R_EDX])
109	#endif
110	#ifndef reg_EBX
111	#define EBX (env->regs[R_EBX])
112	#endif
113	#ifndef reg_ESP
114	#define ESP (env->regs[R_ESP])
115	#endif
116	#ifndef reg_EBP
117	#define EBP (env->regs[R_EBP])
118	#endif
119	#ifndef reg_ESI
120	#define ESI (env->regs[R_ESI])
121	#endif
122	#ifndef reg_EDI
123	#define EDI (env->regs[R_EDI])
124	#endif
125	#define EIP (env->eip)
126	#define DF (env->df)
127
128	#define CC_SRC (env->cc_src)
129	#define CC_DST (env->cc_dst)
130	#define CC_OP (env->cc_op)
131
132	/* float macros */
133	#define FT0 (env->ft0)
134	#define ST0 (env->fpregs[env->fpstt].d)
135	#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
136	#define ST1 ST(1)
137
138	#ifdef USE_FP_CONVERT
139	#define FP_CONVERT (env->fp_convert)
140	#endif
141
142	#if defined(VBOX) && !defined(REMR3PHYSREADWRITE_DEFINED)
143	#define REMR3PHYSREADWRITE_DEFINED
144	/* Header sharing between vbox & qemu is rather ugly. */
145	void remR3PhysReadBytes(uint8_t pbSrcPhys, void pvDst, unsigned cb);
146	uint8_t remR3PhysReadUByte(uint8_t *pbSrcPhys);
147	uint8_t remR3PhysReadSByte(uint8_t *pbSrcPhys);
148	uint16_t remR3PhysReadUWord(uint8_t *pbSrcPhys);
149	int16_t remR3PhysReadSWord(uint8_t *pbSrcPhys);
150	uint32_t remR3PhysReadULong(uint8_t *pbSrcPhys);
151	uint32_t remR3PhysReadSLong(uint8_t *pbSrcPhys);
152	void remR3PhysWriteBytes(uint8_t pbDstPhys, const void pvSrc, unsigned cb);
153	void remR3PhysWriteByte(uint8_t *pbDstPhys, uint8_t val);
154	void remR3PhysWriteWord(uint8_t *pbDstPhys, uint16_t val);
155	void remR3PhysWriteDword(uint8_t *pbDstPhys, uint32_t val);
156	#endif
157
158	#include "cpu.h"
159	#include "exec-all.h"
160
161	/* XXX: add a generic FPU library */
162
163	static inline double float32_to_float64(float a)
164	{
165	return a;
166	}
167
168	static inline float float64_to_float32(double a)
169	{
170	return a;
171	}
172
173	#if defined(__powerpc__)
174	/* better to call an helper on ppc */
175	float int32_to_float32(int32_t a);
176	double int32_to_float64(int32_t a);
177	#else
178	static inline float int32_to_float32(int32_t a)
179	{
180	return (float)a;
181	}
182
183	static inline double int32_to_float64(int32_t a)
184	{
185	return (double)a;
186	}
187	#endif
188
189	static inline float int64_to_float32(int64_t a)
190	{
191	return (float)a;
192	}
193
194	static inline double int64_to_float64(int64_t a)
195	{
196	return (double)a;
197	}
198
199	typedef struct CCTable {
200	int (compute_all)(void); / return all the flags */
201	int (compute_c)(void); / return the C flag */
202	} CCTable;
203
204	extern CCTable cc_table[];
205
206	void load_seg(int seg_reg, int selector);
207	void helper_ljmp_protected_T0_T1(int next_eip);
208	void helper_lcall_real_T0_T1(int shift, int next_eip);
209	void helper_lcall_protected_T0_T1(int shift, int next_eip);
210	void helper_iret_real(int shift);
211	void helper_iret_protected(int shift, int next_eip);
212	void helper_lret_protected(int shift, int addend);
213	void helper_lldt_T0(void);
214	void helper_ltr_T0(void);
215	void helper_movl_crN_T0(int reg);
216	void helper_movl_drN_T0(int reg);
217	void helper_invlpg(unsigned int addr);
218	void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
219	void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
220	void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
221	void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
222	int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
223	int is_write, int is_user, int is_softmmu);
224	void tlb_fill(target_ulong addr, int is_write, int is_user,
225	void *retaddr);
226	void __hidden cpu_lock(void);
227	void __hidden cpu_unlock(void);
228	void do_interrupt(int intno, int is_int, int error_code,
229	target_ulong next_eip, int is_hw);
230	void do_interrupt_user(int intno, int is_int, int error_code,
231	target_ulong next_eip);
232	void raise_interrupt(int intno, int is_int, int error_code,
233	int next_eip_addend);
234	void raise_exception_err(int exception_index, int error_code);
235	void raise_exception(int exception_index);
236	void __hidden cpu_loop_exit(void);
237
238	void OPPROTO op_movl_eflags_T0(void);
239	void OPPROTO op_movl_T0_eflags(void);
240	#ifdef VBOX
241	void OPPROTO op_movl_T0_eflags_vme(void);
242	void OPPROTO op_movw_eflags_T0_vme(void);
243	void OPPROTO op_cli_vme(void);
244	void OPPROTO op_sti_vme(void);
245	#endif
246	void helper_divl_EAX_T0(void);
247	void helper_idivl_EAX_T0(void);
248	void helper_mulq_EAX_T0(void);
249	void helper_imulq_EAX_T0(void);
250	void helper_imulq_T0_T1(void);
251	void helper_divq_EAX_T0(void);
252	void helper_idivq_EAX_T0(void);
253	void helper_cmpxchg8b(void);
254	void helper_cpuid(void);
255	void helper_enter_level(int level, int data32);
256	void helper_sysenter(void);
257	void helper_sysexit(void);
258	void helper_syscall(int next_eip_addend);
259	void helper_sysret(int dflag);
260	void helper_rdtsc(void);
261	void helper_rdmsr(void);
262	void helper_wrmsr(void);
263	void helper_lsl(void);
264	void helper_lar(void);
265	void helper_verr(void);
266	void helper_verw(void);
267
268	#ifdef VBOX
269	void helper_external_event(void);
270	void helper_hlt(void);
271	void helper_monitor(void);
272	void helper_mwait(void);
273
274	/* in helper.c */
275	void sync_seg(CPUX86State *env1, int seg_reg, int selector);
276	void sync_ldtr(CPUX86State *env1, int selector);
277	int sync_tr(CPUX86State *env1, int selector);
278
279	#endif
280
281	void check_iob_T0(void);
282	void check_iow_T0(void);
283	void check_iol_T0(void);
284	void check_iob_DX(void);
285	void check_iow_DX(void);
286	void check_iol_DX(void);
287
288	/* XXX: move that to a generic header */
289	#if !defined(CONFIG_USER_ONLY)
290
291	#define ldul_user ldl_user
292	#define ldul_kernel ldl_kernel
293
294	#define ACCESS_TYPE 0
295	#define MEMSUFFIX _kernel
296	#define DATA_SIZE 1
297	#include "softmmu_header.h"
298
299	#define DATA_SIZE 2
300	#include "softmmu_header.h"
301
302	#define DATA_SIZE 4
303	#include "softmmu_header.h"
304
305	#define DATA_SIZE 8
306	#include "softmmu_header.h"
307	#undef ACCESS_TYPE
308	#undef MEMSUFFIX
309
310	#define ACCESS_TYPE 1
311	#define MEMSUFFIX _user
312	#define DATA_SIZE 1
313	#include "softmmu_header.h"
314
315	#define DATA_SIZE 2
316	#include "softmmu_header.h"
317
318	#define DATA_SIZE 4
319	#include "softmmu_header.h"
320
321	#define DATA_SIZE 8
322	#include "softmmu_header.h"
323	#undef ACCESS_TYPE
324	#undef MEMSUFFIX
325
326	/* these access are slower, they must be as rare as possible */
327	#define ACCESS_TYPE 2
328	#define MEMSUFFIX _data
329	#define DATA_SIZE 1
330	#include "softmmu_header.h"
331
332	#define DATA_SIZE 2
333	#include "softmmu_header.h"
334
335	#define DATA_SIZE 4
336	#include "softmmu_header.h"
337
338	#define DATA_SIZE 8
339	#include "softmmu_header.h"
340	#undef ACCESS_TYPE
341	#undef MEMSUFFIX
342
343	#define ldub(p) ldub_data(p)
344	#define ldsb(p) ldsb_data(p)
345	#define lduw(p) lduw_data(p)
346	#define ldsw(p) ldsw_data(p)
347	#define ldl(p) ldl_data(p)
348	#define ldq(p) ldq_data(p)
349
350	#define stb(p, v) stb_data(p, v)
351	#define stw(p, v) stw_data(p, v)
352	#define stl(p, v) stl_data(p, v)
353	#define stq(p, v) stq_data(p, v)
354
355	static inline double ldfq(target_ulong ptr)
356	{
357	union {
358	double d;
359	uint64_t i;
360	} u;
361	u.i = ldq(ptr);
362	return u.d;
363	}
364
365	static inline void stfq(target_ulong ptr, double v)
366	{
367	union {
368	double d;
369	uint64_t i;
370	} u;
371	u.d = v;
372	stq(ptr, u.i);
373	}
374
375	static inline float ldfl(target_ulong ptr)
376	{
377	union {
378	float f;
379	uint32_t i;
380	} u;
381	u.i = ldl(ptr);
382	return u.f;
383	}
384
385	static inline void stfl(target_ulong ptr, float v)
386	{
387	union {
388	float f;
389	uint32_t i;
390	} u;
391	u.f = v;
392	stl(ptr, u.i);
393	}
394
395	#endif /* !defined(CONFIG_USER_ONLY) */
396
397	#ifdef USE_X86LDOUBLE
398	/* use long double functions */
399	#define lrint lrintl
400	#define llrint llrintl
401	#define fabs fabsl
402	#define sin sinl
403	#define cos cosl
404	#define sqrt sqrtl
405	#define pow powl
406	#define log logl
407	#define tan tanl
408	#define atan2 atan2l
409	#define floor floorl
410	#define ceil ceill
411	#define rint rintl
412	#endif
413
414	#if !defined(_BSD)
415	extern int lrint(CPU86_LDouble x);
416	extern int64_t llrint(CPU86_LDouble x);
417	#else
418	#define lrint(d) ((int)rint(d))
419	#define llrint(d) ((int)rint(d))
420	#endif
421	extern CPU86_LDouble fabs(CPU86_LDouble x);
422	extern CPU86_LDouble sin(CPU86_LDouble x);
423	extern CPU86_LDouble cos(CPU86_LDouble x);
424	extern CPU86_LDouble sqrt(CPU86_LDouble x);
425	extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
426	extern CPU86_LDouble log(CPU86_LDouble x);
427	extern CPU86_LDouble tan(CPU86_LDouble x);
428	extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
429	extern CPU86_LDouble floor(CPU86_LDouble x);
430	extern CPU86_LDouble ceil(CPU86_LDouble x);
431	extern CPU86_LDouble rint(CPU86_LDouble x);
432
433	#define RC_MASK 0xc00
434	#define RC_NEAR 0x000
435	#define RC_DOWN 0x400
436	#define RC_UP 0x800
437	#define RC_CHOP 0xc00
438
439	#define MAXTAN 9223372036854775808.0
440
441	#ifdef __arm__
442	/* we have no way to do correct rounding - a FPU emulator is needed */
443	#define FE_DOWNWARD FE_TONEAREST
444	#define FE_UPWARD FE_TONEAREST
445	#define FE_TOWARDZERO FE_TONEAREST
446	#endif
447
448	#ifdef USE_X86LDOUBLE
449
450	/* only for x86 */
451	typedef union {
452	long double d;
453	struct {
454	unsigned long long lower;
455	unsigned short upper;
456	} l;
457	} CPU86_LDoubleU;
458
459	/* the following deal with x86 long double-precision numbers */
460	#define MAXEXPD 0x7fff
461	#define EXPBIAS 16383
462	#define EXPD(fp) (fp.l.upper & 0x7fff)
463	#define SIGND(fp) ((fp.l.upper) & 0x8000)
464	#define MANTD(fp) (fp.l.lower)
465	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) \| EXPBIAS
466
467	#else
468
469	/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
470	typedef union {
471	double d;
472	#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
473	struct {
474	uint32_t lower;
475	int32_t upper;
476	} l;
477	#else
478	struct {
479	int32_t upper;
480	uint32_t lower;
481	} l;
482	#endif
483	#ifndef __arm__
484	int64_t ll;
485	#endif
486	} CPU86_LDoubleU;
487
488	/* the following deal with IEEE double-precision numbers */
489	#define MAXEXPD 0x7ff
490	#define EXPBIAS 1023
491	#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
492	#define SIGND(fp) ((fp.l.upper) & 0x80000000)
493	#ifdef __arm__
494	#define MANTD(fp) (fp.l.lower \| ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
495	#else
496	#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
497	#endif
498	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) \| (EXPBIAS << 20)
499	#endif
500
501	static inline void fpush(void)
502	{
503	env->fpstt = (env->fpstt - 1) & 7;
504	env->fptags[env->fpstt] = 0; /* validate stack entry */
505	}
506
507	static inline void fpop(void)
508	{
509	env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
510	env->fpstt = (env->fpstt + 1) & 7;
511	}
512
513	#ifndef USE_X86LDOUBLE
514	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
515	{
516	CPU86_LDoubleU temp;
517	int upper, e;
518	uint64_t ll;
519
520	/* mantissa */
521	upper = lduw(ptr + 8);
522	/* XXX: handle overflow ? */
523	e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
524	e \|= (upper >> 4) & 0x800; /* sign */
525	ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
526	#ifdef __arm__
527	temp.l.upper = (e << 20) \| (ll >> 32);
528	temp.l.lower = ll;
529	#else
530	temp.ll = ll \| ((uint64_t)e << 52);
531	#endif
532	return temp.d;
533	}
534
535	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
536	{
537	CPU86_LDoubleU temp;
538	int e;
539
540	temp.d = f;
541	/* mantissa */
542	stq(ptr, (MANTD(temp) << 11) \| (1LL << 63));
543	/* exponent + sign */
544	e = EXPD(temp) - EXPBIAS + 16383;
545	e \|= SIGND(temp) >> 16;
546	stw(ptr + 8, e);
547	}
548	#else
549
550	/* XXX: same endianness assumed */
551
552	#ifdef CONFIG_USER_ONLY
553
554	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
555	{
556	return (CPU86_LDouble )ptr;
557	}
558
559	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
560	{
561	(CPU86_LDouble )ptr = f;
562	}
563
564	#else
565
566	/* we use memory access macros */
567
568	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
569	{
570	CPU86_LDoubleU temp;
571
572	temp.l.lower = ldq(ptr);
573	temp.l.upper = lduw(ptr + 8);
574	return temp.d;
575	}
576
577	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
578	{
579	CPU86_LDoubleU temp;
580
581	temp.d = f;
582	stq(ptr, temp.l.lower);
583	stw(ptr + 8, temp.l.upper);
584	}
585
586	#endif /* !CONFIG_USER_ONLY */
587
588	#endif /* USE_X86LDOUBLE */
589
590	#define FPUS_IE (1 << 0)
591	#define FPUS_DE (1 << 1)
592	#define FPUS_ZE (1 << 2)
593	#define FPUS_OE (1 << 3)
594	#define FPUS_UE (1 << 4)
595	#define FPUS_PE (1 << 5)
596	#define FPUS_SF (1 << 6)
597	#define FPUS_SE (1 << 7)
598	#define FPUS_B (1 << 15)
599
600	#define FPUC_EM 0x3f
601
602	extern const CPU86_LDouble f15rk[7];
603
604	void helper_fldt_ST0_A0(void);
605	void helper_fstt_ST0_A0(void);
606	void fpu_raise_exception(void);
607	CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
608	void helper_fbld_ST0_A0(void);
609	void helper_fbst_ST0_A0(void);
610	void helper_f2xm1(void);
611	void helper_fyl2x(void);
612	void helper_fptan(void);
613	void helper_fpatan(void);
614	void helper_fxtract(void);
615	void helper_fprem1(void);
616	void helper_fprem(void);
617	void helper_fyl2xp1(void);
618	void helper_fsqrt(void);
619	void helper_fsincos(void);
620	void helper_frndint(void);
621	void helper_fscale(void);
622	void helper_fsin(void);
623	void helper_fcos(void);
624	void helper_fxam_ST0(void);
625	void helper_fstenv(target_ulong ptr, int data32);
626	void helper_fldenv(target_ulong ptr, int data32);
627	void helper_fsave(target_ulong ptr, int data32);
628	void helper_frstor(target_ulong ptr, int data32);
629	void helper_fxsave(target_ulong ptr, int data64);
630	void helper_fxrstor(target_ulong ptr, int data64);
631	void restore_native_fp_state(CPUState *env);
632	void save_native_fp_state(CPUState *env);
633	float approx_rsqrt(float a);
634	float approx_rcp(float a);
635	double helper_sqrt(double a);
636	int fpu_isnan(double a);
637
638	extern const uint8_t parity_table[256];
639	extern const uint8_t rclw_table[32];
640	extern const uint8_t rclb_table[32];
641
642	static inline uint32_t compute_eflags(void)
643	{
644	return env->eflags \| cc_table[CC_OP].compute_all() \| (DF & DF_MASK);
645	}
646
647	/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
648	static inline void load_eflags(int eflags, int update_mask)
649	{
650	CC_SRC = eflags & (CC_O \| CC_S \| CC_Z \| CC_A \| CC_P \| CC_C);
651	DF = 1 - (2 * ((eflags >> 10) & 1));
652	env->eflags = (env->eflags & ~update_mask) \|
653	(eflags & update_mask);
654	}
655
656	static inline void env_to_regs(void)
657	{
658	#ifdef reg_EAX
659	EAX = env->regs[R_EAX];
660	#endif
661	#ifdef reg_ECX
662	ECX = env->regs[R_ECX];
663	#endif
664	#ifdef reg_EDX
665	EDX = env->regs[R_EDX];
666	#endif
667	#ifdef reg_EBX
668	EBX = env->regs[R_EBX];
669	#endif
670	#ifdef reg_ESP
671	ESP = env->regs[R_ESP];
672	#endif
673	#ifdef reg_EBP
674	EBP = env->regs[R_EBP];
675	#endif
676	#ifdef reg_ESI
677	ESI = env->regs[R_ESI];
678	#endif
679	#ifdef reg_EDI
680	EDI = env->regs[R_EDI];
681	#endif
682	}
683
684	static inline void regs_to_env(void)
685	{
686	#ifdef reg_EAX
687	env->regs[R_EAX] = EAX;
688	#endif
689	#ifdef reg_ECX
690	env->regs[R_ECX] = ECX;
691	#endif
692	#ifdef reg_EDX
693	env->regs[R_EDX] = EDX;
694	#endif
695	#ifdef reg_EBX
696	env->regs[R_EBX] = EBX;
697	#endif
698	#ifdef reg_ESP
699	env->regs[R_ESP] = ESP;
700	#endif
701	#ifdef reg_EBP
702	env->regs[R_EBP] = EBP;
703	#endif
704	#ifdef reg_ESI
705	env->regs[R_ESI] = ESI;
706	#endif
707	#ifdef reg_EDI
708	env->regs[R_EDI] = EDI;
709	#endif
710	}

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source: vbox/trunk/src/recompiler/target-i386/exec.h@ 1478

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