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source: vbox/trunk/src/recompiler/target-i386/exec.h@ 1

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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include "config.h"
21#include "dyngen-exec.h"
22
23/* XXX: factorize this mess */
24#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
25#define HOST_LONG_BITS 64
26#else
27#define HOST_LONG_BITS 32
28#endif
29
30#ifdef TARGET_X86_64
31#define TARGET_LONG_BITS 64
32#else
33#define TARGET_LONG_BITS 32
34#endif
35
36/* at least 4 register variables are defined */
37register struct CPUX86State *env asm(AREG0);
38
39/* XXX: use 64 bit regs if HOST_LONG_BITS == 64 */
40#if TARGET_LONG_BITS == 32
41
42register uint32_t T0 asm(AREG1);
43register uint32_t T1 asm(AREG2);
44register uint32_t T2 asm(AREG3);
45
46/* if more registers are available, we define some registers too */
47#ifdef AREG4
48register uint32_t EAX asm(AREG4);
49#define reg_EAX
50#endif
51
52#ifdef AREG5
53register uint32_t ESP asm(AREG5);
54#define reg_ESP
55#endif
56
57#ifdef AREG6
58register uint32_t EBP asm(AREG6);
59#define reg_EBP
60#endif
61
62#ifdef AREG7
63register uint32_t ECX asm(AREG7);
64#define reg_ECX
65#endif
66
67#ifdef AREG8
68register uint32_t EDX asm(AREG8);
69#define reg_EDX
70#endif
71
72#ifdef AREG9
73register uint32_t EBX asm(AREG9);
74#define reg_EBX
75#endif
76
77#ifdef AREG10
78register uint32_t ESI asm(AREG10);
79#define reg_ESI
80#endif
81
82#ifdef AREG11
83register uint32_t EDI asm(AREG11);
84#define reg_EDI
85#endif
86
87#else
88
89/* no registers can be used */
90#define T0 (env->t0)
91#define T1 (env->t1)
92#define T2 (env->t2)
93
94#endif
95
96#define A0 T2
97
98extern FILE *logfile;
99extern int loglevel;
100
101#ifndef reg_EAX
102#define EAX (env->regs[R_EAX])
103#endif
104#ifndef reg_ECX
105#define ECX (env->regs[R_ECX])
106#endif
107#ifndef reg_EDX
108#define EDX (env->regs[R_EDX])
109#endif
110#ifndef reg_EBX
111#define EBX (env->regs[R_EBX])
112#endif
113#ifndef reg_ESP
114#define ESP (env->regs[R_ESP])
115#endif
116#ifndef reg_EBP
117#define EBP (env->regs[R_EBP])
118#endif
119#ifndef reg_ESI
120#define ESI (env->regs[R_ESI])
121#endif
122#ifndef reg_EDI
123#define EDI (env->regs[R_EDI])
124#endif
125#define EIP (env->eip)
126#define DF (env->df)
127
128#define CC_SRC (env->cc_src)
129#define CC_DST (env->cc_dst)
130#define CC_OP (env->cc_op)
131
132/* float macros */
133#define FT0 (env->ft0)
134#define ST0 (env->fpregs[env->fpstt].d)
135#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
136#define ST1 ST(1)
137
138#ifdef USE_FP_CONVERT
139#define FP_CONVERT (env->fp_convert)
140#endif
141
142#if defined(VBOX) && !defined(REMR3PHYSREADWRITE_DEFINED)
143#define REMR3PHYSREADWRITE_DEFINED
144/* Header sharing between vbox & qemu is rather ugly. */
145void remR3PhysReadBytes(uint8_t *pbSrcPhys, void *pvDst, unsigned cb);
146uint8_t remR3PhysReadUByte(uint8_t *pbSrcPhys);
147uint8_t remR3PhysReadSByte(uint8_t *pbSrcPhys);
148uint16_t remR3PhysReadUWord(uint8_t *pbSrcPhys);
149int16_t remR3PhysReadSWord(uint8_t *pbSrcPhys);
150uint32_t remR3PhysReadULong(uint8_t *pbSrcPhys);
151uint32_t remR3PhysReadSLong(uint8_t *pbSrcPhys);
152void remR3PhysWriteBytes(uint8_t *pbDstPhys, const void *pvSrc, unsigned cb);
153void remR3PhysWriteByte(uint8_t *pbDstPhys, uint8_t val);
154void remR3PhysWriteWord(uint8_t *pbDstPhys, uint16_t val);
155void remR3PhysWriteDword(uint8_t *pbDstPhys, uint32_t val);
156#endif
157
158#include "cpu.h"
159#include "exec-all.h"
160
161/* XXX: add a generic FPU library */
162
163static inline double float32_to_float64(float a)
164{
165 return a;
166}
167
168static inline float float64_to_float32(double a)
169{
170 return a;
171}
172
173#if defined(__powerpc__)
174/* better to call an helper on ppc */
175float int32_to_float32(int32_t a);
176double int32_to_float64(int32_t a);
177#else
178static inline float int32_to_float32(int32_t a)
179{
180 return (float)a;
181}
182
183static inline double int32_to_float64(int32_t a)
184{
185 return (double)a;
186}
187#endif
188
189static inline float int64_to_float32(int64_t a)
190{
191 return (float)a;
192}
193
194static inline double int64_to_float64(int64_t a)
195{
196 return (double)a;
197}
198
199typedef struct CCTable {
200 int (*compute_all)(void); /* return all the flags */
201 int (*compute_c)(void); /* return the C flag */
202} CCTable;
203
204extern CCTable cc_table[];
205
206void load_seg(int seg_reg, int selector);
207void helper_ljmp_protected_T0_T1(int next_eip);
208void helper_lcall_real_T0_T1(int shift, int next_eip);
209void helper_lcall_protected_T0_T1(int shift, int next_eip);
210void helper_iret_real(int shift);
211void helper_iret_protected(int shift, int next_eip);
212void helper_lret_protected(int shift, int addend);
213void helper_lldt_T0(void);
214void helper_ltr_T0(void);
215void helper_movl_crN_T0(int reg);
216void helper_movl_drN_T0(int reg);
217void helper_invlpg(unsigned int addr);
218void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
219void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
220void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
221void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
222int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
223 int is_write, int is_user, int is_softmmu);
224void tlb_fill(target_ulong addr, int is_write, int is_user,
225 void *retaddr);
226void __hidden cpu_lock(void);
227void __hidden cpu_unlock(void);
228void do_interrupt(int intno, int is_int, int error_code,
229 target_ulong next_eip, int is_hw);
230void do_interrupt_user(int intno, int is_int, int error_code,
231 target_ulong next_eip);
232void raise_interrupt(int intno, int is_int, int error_code,
233 int next_eip_addend);
234void raise_exception_err(int exception_index, int error_code);
235void raise_exception(int exception_index);
236void __hidden cpu_loop_exit(void);
237
238void OPPROTO op_movl_eflags_T0(void);
239void OPPROTO op_movl_T0_eflags(void);
240void helper_divl_EAX_T0(void);
241void helper_idivl_EAX_T0(void);
242void helper_mulq_EAX_T0(void);
243void helper_imulq_EAX_T0(void);
244void helper_imulq_T0_T1(void);
245void helper_divq_EAX_T0(void);
246void helper_idivq_EAX_T0(void);
247void helper_cmpxchg8b(void);
248void helper_cpuid(void);
249void helper_enter_level(int level, int data32);
250void helper_sysenter(void);
251void helper_sysexit(void);
252void helper_syscall(int next_eip_addend);
253void helper_sysret(int dflag);
254void helper_rdtsc(void);
255void helper_rdmsr(void);
256void helper_wrmsr(void);
257void helper_lsl(void);
258void helper_lar(void);
259void helper_verr(void);
260void helper_verw(void);
261
262#ifdef VBOX
263void helper_external_event(void);
264void helper_hlt(void);
265void helper_monitor(void);
266void helper_mwait(void);
267
268/* in helper.c */
269void sync_seg(CPUX86State *env1, int seg_reg, int selector);
270void sync_ldtr(CPUX86State *env1, int selector);
271int sync_tr(CPUX86State *env1, int selector);
272
273#endif
274
275void check_iob_T0(void);
276void check_iow_T0(void);
277void check_iol_T0(void);
278void check_iob_DX(void);
279void check_iow_DX(void);
280void check_iol_DX(void);
281
282/* XXX: move that to a generic header */
283#if !defined(CONFIG_USER_ONLY)
284
285#define ldul_user ldl_user
286#define ldul_kernel ldl_kernel
287
288#define ACCESS_TYPE 0
289#define MEMSUFFIX _kernel
290#define DATA_SIZE 1
291#include "softmmu_header.h"
292
293#define DATA_SIZE 2
294#include "softmmu_header.h"
295
296#define DATA_SIZE 4
297#include "softmmu_header.h"
298
299#define DATA_SIZE 8
300#include "softmmu_header.h"
301#undef ACCESS_TYPE
302#undef MEMSUFFIX
303
304#define ACCESS_TYPE 1
305#define MEMSUFFIX _user
306#define DATA_SIZE 1
307#include "softmmu_header.h"
308
309#define DATA_SIZE 2
310#include "softmmu_header.h"
311
312#define DATA_SIZE 4
313#include "softmmu_header.h"
314
315#define DATA_SIZE 8
316#include "softmmu_header.h"
317#undef ACCESS_TYPE
318#undef MEMSUFFIX
319
320/* these access are slower, they must be as rare as possible */
321#define ACCESS_TYPE 2
322#define MEMSUFFIX _data
323#define DATA_SIZE 1
324#include "softmmu_header.h"
325
326#define DATA_SIZE 2
327#include "softmmu_header.h"
328
329#define DATA_SIZE 4
330#include "softmmu_header.h"
331
332#define DATA_SIZE 8
333#include "softmmu_header.h"
334#undef ACCESS_TYPE
335#undef MEMSUFFIX
336
337#define ldub(p) ldub_data(p)
338#define ldsb(p) ldsb_data(p)
339#define lduw(p) lduw_data(p)
340#define ldsw(p) ldsw_data(p)
341#define ldl(p) ldl_data(p)
342#define ldq(p) ldq_data(p)
343
344#define stb(p, v) stb_data(p, v)
345#define stw(p, v) stw_data(p, v)
346#define stl(p, v) stl_data(p, v)
347#define stq(p, v) stq_data(p, v)
348
349static inline double ldfq(target_ulong ptr)
350{
351 union {
352 double d;
353 uint64_t i;
354 } u;
355 u.i = ldq(ptr);
356 return u.d;
357}
358
359static inline void stfq(target_ulong ptr, double v)
360{
361 union {
362 double d;
363 uint64_t i;
364 } u;
365 u.d = v;
366 stq(ptr, u.i);
367}
368
369static inline float ldfl(target_ulong ptr)
370{
371 union {
372 float f;
373 uint32_t i;
374 } u;
375 u.i = ldl(ptr);
376 return u.f;
377}
378
379static inline void stfl(target_ulong ptr, float v)
380{
381 union {
382 float f;
383 uint32_t i;
384 } u;
385 u.f = v;
386 stl(ptr, u.i);
387}
388
389#endif /* !defined(CONFIG_USER_ONLY) */
390
391#ifdef USE_X86LDOUBLE
392/* use long double functions */
393#define lrint lrintl
394#define llrint llrintl
395#define fabs fabsl
396#define sin sinl
397#define cos cosl
398#define sqrt sqrtl
399#define pow powl
400#define log logl
401#define tan tanl
402#define atan2 atan2l
403#define floor floorl
404#define ceil ceill
405#define rint rintl
406#endif
407
408#if !defined(_BSD)
409extern int lrint(CPU86_LDouble x);
410extern int64_t llrint(CPU86_LDouble x);
411#else
412#define lrint(d) ((int)rint(d))
413#define llrint(d) ((int)rint(d))
414#endif
415extern CPU86_LDouble fabs(CPU86_LDouble x);
416extern CPU86_LDouble sin(CPU86_LDouble x);
417extern CPU86_LDouble cos(CPU86_LDouble x);
418extern CPU86_LDouble sqrt(CPU86_LDouble x);
419extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
420extern CPU86_LDouble log(CPU86_LDouble x);
421extern CPU86_LDouble tan(CPU86_LDouble x);
422extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
423extern CPU86_LDouble floor(CPU86_LDouble x);
424extern CPU86_LDouble ceil(CPU86_LDouble x);
425extern CPU86_LDouble rint(CPU86_LDouble x);
426
427#define RC_MASK 0xc00
428#define RC_NEAR 0x000
429#define RC_DOWN 0x400
430#define RC_UP 0x800
431#define RC_CHOP 0xc00
432
433#define MAXTAN 9223372036854775808.0
434
435#ifdef __arm__
436/* we have no way to do correct rounding - a FPU emulator is needed */
437#define FE_DOWNWARD FE_TONEAREST
438#define FE_UPWARD FE_TONEAREST
439#define FE_TOWARDZERO FE_TONEAREST
440#endif
441
442#ifdef USE_X86LDOUBLE
443
444/* only for x86 */
445typedef union {
446 long double d;
447 struct {
448 unsigned long long lower;
449 unsigned short upper;
450 } l;
451} CPU86_LDoubleU;
452
453/* the following deal with x86 long double-precision numbers */
454#define MAXEXPD 0x7fff
455#define EXPBIAS 16383
456#define EXPD(fp) (fp.l.upper & 0x7fff)
457#define SIGND(fp) ((fp.l.upper) & 0x8000)
458#define MANTD(fp) (fp.l.lower)
459#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
460
461#else
462
463/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
464typedef union {
465 double d;
466#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
467 struct {
468 uint32_t lower;
469 int32_t upper;
470 } l;
471#else
472 struct {
473 int32_t upper;
474 uint32_t lower;
475 } l;
476#endif
477#ifndef __arm__
478 int64_t ll;
479#endif
480} CPU86_LDoubleU;
481
482/* the following deal with IEEE double-precision numbers */
483#define MAXEXPD 0x7ff
484#define EXPBIAS 1023
485#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
486#define SIGND(fp) ((fp.l.upper) & 0x80000000)
487#ifdef __arm__
488#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
489#else
490#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
491#endif
492#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
493#endif
494
495static inline void fpush(void)
496{
497 env->fpstt = (env->fpstt - 1) & 7;
498 env->fptags[env->fpstt] = 0; /* validate stack entry */
499}
500
501static inline void fpop(void)
502{
503 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
504 env->fpstt = (env->fpstt + 1) & 7;
505}
506
507#ifndef USE_X86LDOUBLE
508static inline CPU86_LDouble helper_fldt(target_ulong ptr)
509{
510 CPU86_LDoubleU temp;
511 int upper, e;
512 uint64_t ll;
513
514 /* mantissa */
515 upper = lduw(ptr + 8);
516 /* XXX: handle overflow ? */
517 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
518 e |= (upper >> 4) & 0x800; /* sign */
519 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
520#ifdef __arm__
521 temp.l.upper = (e << 20) | (ll >> 32);
522 temp.l.lower = ll;
523#else
524 temp.ll = ll | ((uint64_t)e << 52);
525#endif
526 return temp.d;
527}
528
529static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
530{
531 CPU86_LDoubleU temp;
532 int e;
533
534 temp.d = f;
535 /* mantissa */
536 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
537 /* exponent + sign */
538 e = EXPD(temp) - EXPBIAS + 16383;
539 e |= SIGND(temp) >> 16;
540 stw(ptr + 8, e);
541}
542#else
543
544/* XXX: same endianness assumed */
545
546#ifdef CONFIG_USER_ONLY
547
548static inline CPU86_LDouble helper_fldt(target_ulong ptr)
549{
550 return *(CPU86_LDouble *)ptr;
551}
552
553static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
554{
555 *(CPU86_LDouble *)ptr = f;
556}
557
558#else
559
560/* we use memory access macros */
561
562static inline CPU86_LDouble helper_fldt(target_ulong ptr)
563{
564 CPU86_LDoubleU temp;
565
566 temp.l.lower = ldq(ptr);
567 temp.l.upper = lduw(ptr + 8);
568 return temp.d;
569}
570
571static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
572{
573 CPU86_LDoubleU temp;
574
575 temp.d = f;
576 stq(ptr, temp.l.lower);
577 stw(ptr + 8, temp.l.upper);
578}
579
580#endif /* !CONFIG_USER_ONLY */
581
582#endif /* USE_X86LDOUBLE */
583
584#define FPUS_IE (1 << 0)
585#define FPUS_DE (1 << 1)
586#define FPUS_ZE (1 << 2)
587#define FPUS_OE (1 << 3)
588#define FPUS_UE (1 << 4)
589#define FPUS_PE (1 << 5)
590#define FPUS_SF (1 << 6)
591#define FPUS_SE (1 << 7)
592#define FPUS_B (1 << 15)
593
594#define FPUC_EM 0x3f
595
596extern const CPU86_LDouble f15rk[7];
597
598void helper_fldt_ST0_A0(void);
599void helper_fstt_ST0_A0(void);
600void fpu_raise_exception(void);
601CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
602void helper_fbld_ST0_A0(void);
603void helper_fbst_ST0_A0(void);
604void helper_f2xm1(void);
605void helper_fyl2x(void);
606void helper_fptan(void);
607void helper_fpatan(void);
608void helper_fxtract(void);
609void helper_fprem1(void);
610void helper_fprem(void);
611void helper_fyl2xp1(void);
612void helper_fsqrt(void);
613void helper_fsincos(void);
614void helper_frndint(void);
615void helper_fscale(void);
616void helper_fsin(void);
617void helper_fcos(void);
618void helper_fxam_ST0(void);
619void helper_fstenv(target_ulong ptr, int data32);
620void helper_fldenv(target_ulong ptr, int data32);
621void helper_fsave(target_ulong ptr, int data32);
622void helper_frstor(target_ulong ptr, int data32);
623void helper_fxsave(target_ulong ptr, int data64);
624void helper_fxrstor(target_ulong ptr, int data64);
625void restore_native_fp_state(CPUState *env);
626void save_native_fp_state(CPUState *env);
627float approx_rsqrt(float a);
628float approx_rcp(float a);
629double helper_sqrt(double a);
630int fpu_isnan(double a);
631
632extern const uint8_t parity_table[256];
633extern const uint8_t rclw_table[32];
634extern const uint8_t rclb_table[32];
635
636static inline uint32_t compute_eflags(void)
637{
638 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
639}
640
641/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
642static inline void load_eflags(int eflags, int update_mask)
643{
644 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
645 DF = 1 - (2 * ((eflags >> 10) & 1));
646 env->eflags = (env->eflags & ~update_mask) |
647 (eflags & update_mask);
648}
649
650static inline void env_to_regs(void)
651{
652#ifdef reg_EAX
653 EAX = env->regs[R_EAX];
654#endif
655#ifdef reg_ECX
656 ECX = env->regs[R_ECX];
657#endif
658#ifdef reg_EDX
659 EDX = env->regs[R_EDX];
660#endif
661#ifdef reg_EBX
662 EBX = env->regs[R_EBX];
663#endif
664#ifdef reg_ESP
665 ESP = env->regs[R_ESP];
666#endif
667#ifdef reg_EBP
668 EBP = env->regs[R_EBP];
669#endif
670#ifdef reg_ESI
671 ESI = env->regs[R_ESI];
672#endif
673#ifdef reg_EDI
674 EDI = env->regs[R_EDI];
675#endif
676}
677
678static inline void regs_to_env(void)
679{
680#ifdef reg_EAX
681 env->regs[R_EAX] = EAX;
682#endif
683#ifdef reg_ECX
684 env->regs[R_ECX] = ECX;
685#endif
686#ifdef reg_EDX
687 env->regs[R_EDX] = EDX;
688#endif
689#ifdef reg_EBX
690 env->regs[R_EBX] = EBX;
691#endif
692#ifdef reg_ESP
693 env->regs[R_ESP] = ESP;
694#endif
695#ifdef reg_EBP
696 env->regs[R_EBP] = EBP;
697#endif
698#ifdef reg_ESI
699 env->regs[R_ESI] = ESI;
700#endif
701#ifdef reg_EDI
702 env->regs[R_EDI] = EDI;
703#endif
704}
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