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source: vbox/trunk/src/recompiler/target-i386/exec.h@ 33935

Last change on this file since 33935 was 33656, checked in by vboxsync, 14 years ago

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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29
30#include "config.h"
31#include "dyngen-exec.h"
32
33/* XXX: factorize this mess */
34#ifdef TARGET_X86_64
35#define TARGET_LONG_BITS 64
36#else
37#define TARGET_LONG_BITS 32
38#endif
39
40#include "cpu-defs.h"
41
42#ifndef VBOX
43/* at least 4 register variables are defined */
44register struct CPUX86State *env asm(AREG0);
45#else
46REGISTER_BOUND_GLOBAL(struct CPUX86State*, env, AREG0);
47#endif /* VBOX */
48
49#include "qemu-log.h"
50
51#ifndef reg_EAX
52#define EAX (env->regs[R_EAX])
53#endif
54#ifndef reg_ECX
55#define ECX (env->regs[R_ECX])
56#endif
57#ifndef reg_EDX
58#define EDX (env->regs[R_EDX])
59#endif
60#ifndef reg_EBX
61#define EBX (env->regs[R_EBX])
62#endif
63#ifndef reg_ESP
64#define ESP (env->regs[R_ESP])
65#endif
66#ifndef reg_EBP
67#define EBP (env->regs[R_EBP])
68#endif
69#ifndef reg_ESI
70#define ESI (env->regs[R_ESI])
71#endif
72#ifndef reg_EDI
73#define EDI (env->regs[R_EDI])
74#endif
75#define EIP (env->eip)
76#define DF (env->df)
77
78#define CC_SRC (env->cc_src)
79#define CC_DST (env->cc_dst)
80#define CC_OP (env->cc_op)
81
82/* float macros */
83#define FT0 (env->ft0)
84#define ST0 (env->fpregs[env->fpstt].d)
85#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
86#define ST1 ST(1)
87
88#include "cpu.h"
89#include "exec-all.h"
90
91void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
92void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
93int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
94 int is_write, int mmu_idx, int is_softmmu);
95void __hidden cpu_lock(void);
96void __hidden cpu_unlock(void);
97void do_interrupt(int intno, int is_int, int error_code,
98 target_ulong next_eip, int is_hw);
99void do_interrupt_user(int intno, int is_int, int error_code,
100 target_ulong next_eip);
101void raise_interrupt(int intno, int is_int, int error_code,
102 int next_eip_addend);
103void raise_exception_err(int exception_index, int error_code);
104void raise_exception(int exception_index);
105void do_smm_enter(void);
106void __hidden cpu_loop_exit(void);
107
108void OPPROTO op_movl_eflags_T0(void);
109void OPPROTO op_movl_T0_eflags(void);
110#ifdef VBOX
111void OPPROTO op_movl_T0_eflags_vme(void);
112void OPPROTO op_movw_eflags_T0_vme(void);
113void OPPROTO op_cli_vme(void);
114void OPPROTO op_sti_vme(void);
115#endif
116
117/* n must be a constant to be efficient */
118#ifndef VBOX
119static inline target_long lshift(target_long x, int n)
120#else
121DECLINLINE(target_long) lshift(target_long x, int n)
122#endif
123{
124 if (n >= 0)
125 return x << n;
126 else
127 return x >> (-n);
128}
129
130#include "helper.h"
131
132#ifndef VBOX
133static inline void svm_check_intercept(uint32_t type)
134#else
135DECLINLINE(void) svm_check_intercept(uint32_t type)
136#endif
137{
138 helper_svm_check_intercept_param(type, 0);
139}
140
141void check_iob_T0(void);
142void check_iow_T0(void);
143void check_iol_T0(void);
144void check_iob_DX(void);
145void check_iow_DX(void);
146void check_iol_DX(void);
147
148#if !defined(CONFIG_USER_ONLY)
149
150#include "softmmu_exec.h"
151
152#ifndef VBOX
153static inline double ldfq(target_ulong ptr)
154#else
155DECLINLINE(double) ldfq(target_ulong ptr)
156#endif
157{
158 union {
159 double d;
160 uint64_t i;
161 } u;
162 u.i = ldq(ptr);
163 return u.d;
164}
165
166#ifndef VBOX
167static inline void stfq(target_ulong ptr, double v)
168#else
169DECLINLINE(void) stfq(target_ulong ptr, double v)
170#endif
171{
172 union {
173 double d;
174 uint64_t i;
175 } u;
176 u.d = v;
177 stq(ptr, u.i);
178}
179
180#ifndef VBOX
181static inline float ldfl(target_ulong ptr)
182#else
183DECLINLINE(float) ldfl(target_ulong ptr)
184#endif
185{
186 union {
187 float f;
188 uint32_t i;
189 } u;
190 u.i = ldl(ptr);
191 return u.f;
192}
193
194#ifndef VBOX
195static inline void stfl(target_ulong ptr, float v)
196#else
197DECLINLINE(void) stfl(target_ulong ptr, float v)
198#endif
199{
200 union {
201 float f;
202 uint32_t i;
203 } u;
204 u.f = v;
205 stl(ptr, u.i);
206}
207
208#endif /* !defined(CONFIG_USER_ONLY) */
209
210#ifdef USE_X86LDOUBLE
211/* use long double functions */
212#define floatx_to_int32 floatx80_to_int32
213#define floatx_to_int64 floatx80_to_int64
214#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
215#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
216#define int32_to_floatx int32_to_floatx80
217#define int64_to_floatx int64_to_floatx80
218#define float32_to_floatx float32_to_floatx80
219#define float64_to_floatx float64_to_floatx80
220#define floatx_to_float32 floatx80_to_float32
221#define floatx_to_float64 floatx80_to_float64
222#define floatx_abs floatx80_abs
223#define floatx_chs floatx80_chs
224#define floatx_round_to_int floatx80_round_to_int
225#define floatx_compare floatx80_compare
226#define floatx_compare_quiet floatx80_compare_quiet
227#ifdef VBOX
228#undef sin
229#undef cos
230#undef sqrt
231#undef pow
232#undef log
233#undef tan
234#undef atan2
235#undef floor
236#undef ceil
237#undef ldexp
238#endif /* !VBOX */
239#if !defined(VBOX) || !defined(_MSC_VER)
240#define sin sinl
241#define cos cosl
242#define sqrt sqrtl
243#define pow powl
244#define log logl
245#define tan tanl
246#define atan2 atan2l
247#define floor floorl
248#define ceil ceill
249#define ldexp ldexpl
250#endif
251#else
252#define floatx_to_int32 float64_to_int32
253#define floatx_to_int64 float64_to_int64
254#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
255#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
256#define int32_to_floatx int32_to_float64
257#define int64_to_floatx int64_to_float64
258#define float32_to_floatx float32_to_float64
259#define float64_to_floatx(x, e) (x)
260#define floatx_to_float32 float64_to_float32
261#define floatx_to_float64(x, e) (x)
262#define floatx_abs float64_abs
263#define floatx_chs float64_chs
264#define floatx_round_to_int float64_round_to_int
265#define floatx_compare float64_compare
266#define floatx_compare_quiet float64_compare_quiet
267#endif
268
269#ifdef VBOX
270#ifndef _MSC_VER
271extern CPU86_LDouble sin(CPU86_LDouble x);
272extern CPU86_LDouble cos(CPU86_LDouble x);
273extern CPU86_LDouble sqrt(CPU86_LDouble x);
274extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
275extern CPU86_LDouble log(CPU86_LDouble x);
276extern CPU86_LDouble tan(CPU86_LDouble x);
277extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
278extern CPU86_LDouble floor(CPU86_LDouble x);
279extern CPU86_LDouble ceil(CPU86_LDouble x);
280#endif /* !_MSC_VER */
281#endif /* VBOX */
282
283#define RC_MASK 0xc00
284#ifndef RC_NEAR
285#define RC_NEAR 0x000
286#endif
287#ifndef RC_DOWN
288#define RC_DOWN 0x400
289#endif
290#ifndef RC_UP
291#define RC_UP 0x800
292#endif
293#ifndef RC_CHOP
294#define RC_CHOP 0xc00
295#endif
296
297#define MAXTAN 9223372036854775808.0
298
299#ifdef USE_X86LDOUBLE
300
301/* only for x86 */
302typedef union {
303 long double d;
304 struct {
305 unsigned long long lower;
306 unsigned short upper;
307 } l;
308} CPU86_LDoubleU;
309
310/* the following deal with x86 long double-precision numbers */
311#define MAXEXPD 0x7fff
312#define EXPBIAS 16383
313#define EXPD(fp) (fp.l.upper & 0x7fff)
314#define SIGND(fp) ((fp.l.upper) & 0x8000)
315#define MANTD(fp) (fp.l.lower)
316#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
317
318#else
319
320/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
321typedef union {
322 double d;
323#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
324 struct {
325 uint32_t lower;
326 int32_t upper;
327 } l;
328#else
329 struct {
330 int32_t upper;
331 uint32_t lower;
332 } l;
333#endif
334#ifndef __arm__
335 int64_t ll;
336#endif
337} CPU86_LDoubleU;
338
339/* the following deal with IEEE double-precision numbers */
340#define MAXEXPD 0x7ff
341#define EXPBIAS 1023
342#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
343#define SIGND(fp) ((fp.l.upper) & 0x80000000)
344#ifdef __arm__
345#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
346#else
347#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
348#endif
349#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
350#endif
351
352#ifndef VBOX
353static inline void fpush(void)
354#else
355DECLINLINE(void) fpush(void)
356#endif
357{
358 env->fpstt = (env->fpstt - 1) & 7;
359 env->fptags[env->fpstt] = 0; /* validate stack entry */
360}
361
362#ifndef VBOX
363static inline void fpop(void)
364#else
365DECLINLINE(void) fpop(void)
366#endif
367{
368 env->fptags[env->fpstt] = 1; /* invalidate stack entry */
369 env->fpstt = (env->fpstt + 1) & 7;
370}
371
372#ifndef USE_X86LDOUBLE
373static inline CPU86_LDouble helper_fldt(target_ulong ptr)
374{
375 CPU86_LDoubleU temp;
376 int upper, e;
377 uint64_t ll;
378
379 /* mantissa */
380 upper = lduw(ptr + 8);
381 /* XXX: handle overflow ? */
382 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
383 e |= (upper >> 4) & 0x800; /* sign */
384 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
385#ifdef __arm__
386 temp.l.upper = (e << 20) | (ll >> 32);
387 temp.l.lower = ll;
388#else
389 temp.ll = ll | ((uint64_t)e << 52);
390#endif
391 return temp.d;
392}
393
394static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
395{
396 CPU86_LDoubleU temp;
397 int e;
398
399 temp.d = f;
400 /* mantissa */
401 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
402 /* exponent + sign */
403 e = EXPD(temp) - EXPBIAS + 16383;
404 e |= SIGND(temp) >> 16;
405 stw(ptr + 8, e);
406}
407#else
408
409/* XXX: same endianness assumed */
410
411#ifdef CONFIG_USER_ONLY
412
413static inline CPU86_LDouble helper_fldt(target_ulong ptr)
414{
415 return *(CPU86_LDouble *)ptr;
416}
417
418static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
419{
420 *(CPU86_LDouble *)ptr = f;
421}
422
423#else
424
425/* we use memory access macros */
426
427#ifndef VBOX
428static inline CPU86_LDouble helper_fldt(target_ulong ptr)
429#else
430DECLINLINE(CPU86_LDouble) helper_fldt(target_ulong ptr)
431#endif
432{
433 CPU86_LDoubleU temp;
434
435 temp.l.lower = ldq(ptr);
436 temp.l.upper = lduw(ptr + 8);
437 return temp.d;
438}
439
440#ifndef VBOX
441static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
442#else
443DECLINLINE(void) helper_fstt(CPU86_LDouble f, target_ulong ptr)
444#endif
445{
446 CPU86_LDoubleU temp;
447
448 temp.d = f;
449 stq(ptr, temp.l.lower);
450 stw(ptr + 8, temp.l.upper);
451}
452
453#endif /* !CONFIG_USER_ONLY */
454
455#endif /* USE_X86LDOUBLE */
456
457#define FPUS_IE (1 << 0)
458#define FPUS_DE (1 << 1)
459#define FPUS_ZE (1 << 2)
460#define FPUS_OE (1 << 3)
461#define FPUS_UE (1 << 4)
462#define FPUS_PE (1 << 5)
463#define FPUS_SF (1 << 6)
464#define FPUS_SE (1 << 7)
465#define FPUS_B (1 << 15)
466
467#define FPUC_EM 0x3f
468
469extern const CPU86_LDouble f15rk[7];
470
471void fpu_raise_exception(void);
472void restore_native_fp_state(CPUState *env);
473void save_native_fp_state(CPUState *env);
474
475extern const uint8_t parity_table[256];
476extern const uint8_t rclw_table[32];
477extern const uint8_t rclb_table[32];
478
479#ifndef VBOX
480static inline uint32_t compute_eflags(void)
481#else
482DECLINLINE(uint32_t) compute_eflags(void)
483#endif
484{
485 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
486}
487
488/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
489#ifndef VBOX
490static inline void load_eflags(int eflags, int update_mask)
491#else
492DECLINLINE(void) load_eflags(int eflags, int update_mask)
493#endif
494{
495 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
496 DF = 1 - (2 * ((eflags >> 10) & 1));
497 env->eflags = (env->eflags & ~update_mask) |
498 (eflags & update_mask);
499}
500
501#ifndef VBOX
502static inline void env_to_regs(void)
503#else
504DECLINLINE(void) env_to_regs(void)
505#endif
506{
507#ifdef reg_EAX
508 EAX = env->regs[R_EAX];
509#endif
510#ifdef reg_ECX
511 ECX = env->regs[R_ECX];
512#endif
513#ifdef reg_EDX
514 EDX = env->regs[R_EDX];
515#endif
516#ifdef reg_EBX
517 EBX = env->regs[R_EBX];
518#endif
519#ifdef reg_ESP
520 ESP = env->regs[R_ESP];
521#endif
522#ifdef reg_EBP
523 EBP = env->regs[R_EBP];
524#endif
525#ifdef reg_ESI
526 ESI = env->regs[R_ESI];
527#endif
528#ifdef reg_EDI
529 EDI = env->regs[R_EDI];
530#endif
531}
532
533#ifndef VBOX
534static inline void regs_to_env(void)
535#else
536DECLINLINE(void) regs_to_env(void)
537#endif
538{
539#ifdef reg_EAX
540 env->regs[R_EAX] = EAX;
541#endif
542#ifdef reg_ECX
543 env->regs[R_ECX] = ECX;
544#endif
545#ifdef reg_EDX
546 env->regs[R_EDX] = EDX;
547#endif
548#ifdef reg_EBX
549 env->regs[R_EBX] = EBX;
550#endif
551#ifdef reg_ESP
552 env->regs[R_ESP] = ESP;
553#endif
554#ifdef reg_EBP
555 env->regs[R_EBP] = EBP;
556#endif
557#ifdef reg_ESI
558 env->regs[R_ESI] = ESI;
559#endif
560#ifdef reg_EDI
561 env->regs[R_EDI] = EDI;
562#endif
563}
564
565#ifndef VBOX
566static inline int cpu_halted(CPUState *env) {
567#else
568DECLINLINE(int) cpu_halted(CPUState *env) {
569#endif
570 /* handle exit of HALTED state */
571 if (!env->halted)
572 return 0;
573 /* disable halt condition */
574 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
575 (env->eflags & IF_MASK)) ||
576 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
577 env->halted = 0;
578 return 0;
579 }
580 return EXCP_HALTED;
581}
582
583/* load efer and update the corresponding hflags. XXX: do consistency
584 checks with cpuid bits ? */
585#ifndef VBOX
586static inline void cpu_load_efer(CPUState *env, uint64_t val)
587#else
588DECLINLINE(void) cpu_load_efer(CPUState *env, uint64_t val)
589#endif
590{
591 env->efer = val;
592 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
593 if (env->efer & MSR_EFER_LMA)
594 env->hflags |= HF_LMA_MASK;
595 if (env->efer & MSR_EFER_SVME)
596 env->hflags |= HF_SVME_MASK;
597}
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