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source: vbox/trunk/src/recompiler/softmmu_header.h@ 36138

Last change on this file since 36138 was 36125, checked in by vboxsync, 14 years ago

recompiler: Removing traces of attempts at making the recompiler compile with the microsoft compiler. (untested)

  • Property svn:eol-style set to native
File size: 10.0 KB
Line 
1/*
2 * Software MMU support
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29
30#if DATA_SIZE == 8
31#define SUFFIX q
32#define USUFFIX q
33#define DATA_TYPE uint64_t
34#elif DATA_SIZE == 4
35#define SUFFIX l
36#define USUFFIX l
37#define DATA_TYPE uint32_t
38#elif DATA_SIZE == 2
39#define SUFFIX w
40#define USUFFIX uw
41#define DATA_TYPE uint16_t
42#define DATA_STYPE int16_t
43#elif DATA_SIZE == 1
44#define SUFFIX b
45#define USUFFIX ub
46#define DATA_TYPE uint8_t
47#define DATA_STYPE int8_t
48#else
49#error unsupported data size
50#endif
51
52#if ACCESS_TYPE < (NB_MMU_MODES)
53
54#define CPU_MMU_INDEX ACCESS_TYPE
55#define MMUSUFFIX _mmu
56
57#elif ACCESS_TYPE == (NB_MMU_MODES)
58
59#define CPU_MMU_INDEX (cpu_mmu_index(env))
60#define MMUSUFFIX _mmu
61
62#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
63
64#define CPU_MMU_INDEX (cpu_mmu_index(env))
65#define MMUSUFFIX _cmmu
66
67#else
68#error invalid ACCESS_TYPE
69#endif
70
71#if DATA_SIZE == 8
72#define RES_TYPE uint64_t
73#else
74#define RES_TYPE int
75#endif
76
77#if ACCESS_TYPE == (NB_MMU_MODES + 1)
78#define ADDR_READ addr_code
79#else
80#define ADDR_READ addr_read
81#endif
82
83#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
84 (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) && !defined(VBOX)
85
86static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
87{
88 int res;
89
90 asm volatile ("movl %1, %%edx\n"
91 "movl %1, %%eax\n"
92 "shrl %3, %%edx\n"
93 "andl %4, %%eax\n"
94 "andl %2, %%edx\n"
95 "leal %5(%%edx, %%ebp), %%edx\n"
96 "cmpl (%%edx), %%eax\n"
97 "movl %1, %%eax\n"
98 "je 1f\n"
99 "movl %6, %%edx\n"
100 "call %7\n"
101 "movl %%eax, %0\n"
102 "jmp 2f\n"
103 "1:\n"
104 "addl 12(%%edx), %%eax\n"
105#if DATA_SIZE == 1
106 "movzbl (%%eax), %0\n"
107#elif DATA_SIZE == 2
108 "movzwl (%%eax), %0\n"
109#elif DATA_SIZE == 4
110 "movl (%%eax), %0\n"
111#else
112#error unsupported size
113#endif
114 "2:\n"
115 : "=r" (res)
116 : "r" (ptr),
117 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
118 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
119 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
120 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
121 "i" (CPU_MMU_INDEX),
122 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
123 : "%eax", "%ecx", "%edx", "memory", "cc");
124 return res;
125}
126
127#if DATA_SIZE <= 2
128static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
129{
130 int res;
131
132 asm volatile ("movl %1, %%edx\n"
133 "movl %1, %%eax\n"
134 "shrl %3, %%edx\n"
135 "andl %4, %%eax\n"
136 "andl %2, %%edx\n"
137 "leal %5(%%edx, %%ebp), %%edx\n"
138 "cmpl (%%edx), %%eax\n"
139 "movl %1, %%eax\n"
140 "je 1f\n"
141 "movl %6, %%edx\n"
142 "call %7\n"
143#if DATA_SIZE == 1
144 "movsbl %%al, %0\n"
145#elif DATA_SIZE == 2
146 "movswl %%ax, %0\n"
147#else
148#error unsupported size
149#endif
150 "jmp 2f\n"
151 "1:\n"
152 "addl 12(%%edx), %%eax\n"
153#if DATA_SIZE == 1
154 "movsbl (%%eax), %0\n"
155#elif DATA_SIZE == 2
156 "movswl (%%eax), %0\n"
157#else
158#error unsupported size
159#endif
160 "2:\n"
161 : "=r" (res)
162 : "r" (ptr),
163 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
164 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
165 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
166 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
167 "i" (CPU_MMU_INDEX),
168 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
169 : "%eax", "%ecx", "%edx", "memory", "cc");
170 return res;
171}
172#endif
173
174static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
175{
176 asm volatile ("movl %0, %%edx\n"
177 "movl %0, %%eax\n"
178 "shrl %3, %%edx\n"
179 "andl %4, %%eax\n"
180 "andl %2, %%edx\n"
181 "leal %5(%%edx, %%ebp), %%edx\n"
182 "cmpl (%%edx), %%eax\n"
183 "movl %0, %%eax\n"
184 "je 1f\n"
185#if DATA_SIZE == 1
186 "movzbl %b1, %%edx\n"
187#elif DATA_SIZE == 2
188 "movzwl %w1, %%edx\n"
189#elif DATA_SIZE == 4
190 "movl %1, %%edx\n"
191#else
192#error unsupported size
193#endif
194 "movl %6, %%ecx\n"
195 "call %7\n"
196 "jmp 2f\n"
197 "1:\n"
198 "addl 8(%%edx), %%eax\n"
199#if DATA_SIZE == 1
200 "movb %b1, (%%eax)\n"
201#elif DATA_SIZE == 2
202 "movw %w1, (%%eax)\n"
203#elif DATA_SIZE == 4
204 "movl %1, (%%eax)\n"
205#else
206#error unsupported size
207#endif
208 "2:\n"
209 :
210 : "r" (ptr),
211#if DATA_SIZE == 1
212 "q" (v),
213#else
214 "r" (v),
215#endif
216 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
217 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
218 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
219 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
220 "i" (CPU_MMU_INDEX),
221 "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
222 : "%eax", "%ecx", "%edx", "memory", "cc");
223}
224#else
225
226/* generic load/store macros */
227
228static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
229{
230
231 int page_index;
232 RES_TYPE res;
233 target_ulong addr;
234 unsigned long physaddr;
235 int mmu_idx;
236
237 addr = ptr;
238 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
239 mmu_idx = CPU_MMU_INDEX;
240 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
241 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
242 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
243 } else {
244 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
245 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
246 }
247 return res;
248}
249
250#if DATA_SIZE <= 2
251static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
252{
253 int res, page_index;
254 target_ulong addr;
255 unsigned long physaddr;
256 int mmu_idx;
257
258 addr = ptr;
259 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
260 mmu_idx = CPU_MMU_INDEX;
261 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
262 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
263 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
264 } else {
265 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
266 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
267 }
268 return res;
269}
270#endif
271
272#if ACCESS_TYPE != (NB_MMU_MODES + 1)
273
274/* generic store macro */
275static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
276{
277 int page_index;
278 target_ulong addr;
279 unsigned long physaddr;
280 int mmu_idx;
281
282 addr = ptr;
283 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
284 mmu_idx = CPU_MMU_INDEX;
285 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
286 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
287 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
288 } else {
289 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
290 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
291 }
292}
293
294#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
295
296#endif /* !asm */
297
298#if ACCESS_TYPE != (NB_MMU_MODES + 1)
299
300#if DATA_SIZE == 8
301static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
302{
303 union {
304 float64 d;
305 uint64_t i;
306 } u;
307 u.i = glue(ldq, MEMSUFFIX)(ptr);
308 return u.d;
309}
310
311static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
312{
313 union {
314 float64 d;
315 uint64_t i;
316 } u;
317 u.d = v;
318 glue(stq, MEMSUFFIX)(ptr, u.i);
319}
320#endif /* DATA_SIZE == 8 */
321
322#if DATA_SIZE == 4
323static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
324{
325 union {
326 float32 f;
327 uint32_t i;
328 } u;
329 u.i = glue(ldl, MEMSUFFIX)(ptr);
330 return u.f;
331}
332
333static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
334{
335 union {
336 float32 f;
337 uint32_t i;
338 } u;
339 u.f = v;
340 glue(stl, MEMSUFFIX)(ptr, u.i);
341}
342#endif /* DATA_SIZE == 4 */
343
344#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
345
346#undef RES_TYPE
347#undef DATA_TYPE
348#undef DATA_STYPE
349#undef SUFFIX
350#undef USUFFIX
351#undef DATA_SIZE
352#undef CPU_MMU_INDEX
353#undef MMUSUFFIX
354#undef ADDR_READ
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