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source: vbox/trunk/src/recompiler/dyngen.h@ 1697

Last change on this file since 1697 was 1, checked in by vboxsync, 55 years ago

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1/*
2 * dyngen helpers
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21int __op_param1, __op_param2, __op_param3;
22int __op_gen_label1, __op_gen_label2, __op_gen_label3;
23int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
24
25#ifdef __i386__
26static inline void flush_icache_range(unsigned long start, unsigned long stop)
27{
28}
29#endif
30
31#ifdef __x86_64__
32static inline void flush_icache_range(unsigned long start, unsigned long stop)
33{
34}
35#endif
36
37#ifdef __s390__
38static inline void flush_icache_range(unsigned long start, unsigned long stop)
39{
40}
41#endif
42
43#ifdef __ia64__
44static inline void flush_icache_range(unsigned long start, unsigned long stop)
45{
46}
47#endif
48
49#ifdef __powerpc__
50
51#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
52
53static void inline flush_icache_range(unsigned long start, unsigned long stop)
54{
55 unsigned long p;
56
57 p = start & ~(MIN_CACHE_LINE_SIZE - 1);
58 stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
59
60 for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
61 asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
62 }
63 asm volatile ("sync" : : : "memory");
64 for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
65 asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
66 }
67 asm volatile ("sync" : : : "memory");
68 asm volatile ("isync" : : : "memory");
69}
70#endif
71
72#ifdef __alpha__
73static inline void flush_icache_range(unsigned long start, unsigned long stop)
74{
75 asm ("imb");
76}
77#endif
78
79#ifdef __sparc__
80
81static void inline flush_icache_range(unsigned long start, unsigned long stop)
82{
83 unsigned long p;
84
85 p = start & ~(8UL - 1UL);
86 stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL);
87
88 for (; p < stop; p += 8)
89 __asm__ __volatile__("flush\t%0" : : "r" (p));
90}
91
92#endif
93
94#ifdef __arm__
95static inline void flush_icache_range(unsigned long start, unsigned long stop)
96{
97 register unsigned long _beg __asm ("a1") = start;
98 register unsigned long _end __asm ("a2") = stop;
99 register unsigned long _flg __asm ("a3") = 0;
100 __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
101}
102#endif
103
104#ifdef __mc68000
105#include <asm/cachectl.h>
106static inline void flush_icache_range(unsigned long start, unsigned long stop)
107{
108 cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
109}
110#endif
111
112#ifdef __alpha__
113
114register int gp asm("$29");
115
116static inline void immediate_ldah(void *p, int val) {
117 uint32_t *dest = p;
118 long high = ((val >> 16) + ((val >> 15) & 1)) & 0xffff;
119
120 *dest &= ~0xffff;
121 *dest |= high;
122 *dest |= 31 << 16;
123}
124static inline void immediate_lda(void *dest, int val) {
125 *(uint16_t *) dest = val;
126}
127void fix_bsr(void *p, int offset) {
128 uint32_t *dest = p;
129 *dest &= ~((1 << 21) - 1);
130 *dest |= (offset >> 2) & ((1 << 21) - 1);
131}
132
133#endif /* __alpha__ */
134
135#ifdef __arm__
136
137#define MAX_OP_SIZE (128 * 4) /* in bytes */
138/* max size of the code that can be generated without calling arm_flush_ldr */
139#define MAX_FRAG_SIZE (1024 * 4)
140//#define MAX_FRAG_SIZE (135 * 4) /* for testing */
141
142typedef struct LDREntry {
143 uint8_t *ptr;
144 uint32_t *data_ptr;
145} LDREntry;
146
147static LDREntry arm_ldr_table[1024];
148static uint32_t arm_data_table[1024];
149
150extern char exec_loop;
151
152static inline void arm_reloc_pc24(uint32_t *ptr, uint32_t insn, int val)
153{
154 *ptr = (insn & ~0xffffff) | ((insn + ((val - (int)ptr) >> 2)) & 0xffffff);
155}
156
157static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
158 LDREntry *ldr_start, LDREntry *ldr_end,
159 uint32_t *data_start, uint32_t *data_end,
160 int gen_jmp)
161{
162 LDREntry *le;
163 uint32_t *ptr;
164 int offset, data_size, target;
165 uint8_t *data_ptr;
166 uint32_t insn;
167
168 data_size = (uint8_t *)data_end - (uint8_t *)data_start;
169
170 if (gen_jmp) {
171 /* generate branch to skip the data */
172 if (data_size == 0)
173 return gen_code_ptr;
174 target = (long)gen_code_ptr + data_size + 4;
175 arm_reloc_pc24((uint32_t *)gen_code_ptr, 0xeafffffe, target);
176 gen_code_ptr += 4;
177 }
178
179 /* copy the data */
180 data_ptr = gen_code_ptr;
181 memcpy(gen_code_ptr, data_start, data_size);
182 gen_code_ptr += data_size;
183
184 /* patch the ldr to point to the data */
185 for(le = ldr_start; le < ldr_end; le++) {
186 ptr = (uint32_t *)le->ptr;
187 offset = ((unsigned long)(le->data_ptr) - (unsigned long)data_start) +
188 (unsigned long)data_ptr -
189 (unsigned long)ptr - 8;
190 insn = *ptr & ~(0xfff | 0x00800000);
191 if (offset < 0) {
192 offset = - offset;
193 } else {
194 insn |= 0x00800000;
195 }
196 if (offset > 0xfff) {
197 fprintf(stderr, "Error ldr offset\n");
198 abort();
199 }
200 insn |= offset;
201 *ptr = insn;
202 }
203 return gen_code_ptr;
204}
205
206#endif /* __arm__ */
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