| 1 |
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| 2 | /*============================================================================
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| 3 |
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| 4 | This C source file is part of TestFloat, Release 3e, a package of programs for
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| 5 | testing the correctness of floating-point arithmetic complying with the IEEE
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| 6 | Standard for Floating-Point, by John R. Hauser.
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| 7 |
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| 8 | Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
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| 9 | University of California. All rights reserved.
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| 10 |
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| 11 | Redistribution and use in source and binary forms, with or without
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| 12 | modification, are permitted provided that the following conditions are met:
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| 13 |
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| 14 | 1. Redistributions of source code must retain the above copyright notice,
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| 15 | this list of conditions, and the following disclaimer.
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| 16 |
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| 17 | 2. Redistributions in binary form must reproduce the above copyright notice,
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| 18 | this list of conditions, and the following disclaimer in the documentation
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| 19 | and/or other materials provided with the distribution.
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| 20 |
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| 21 | 3. Neither the name of the University nor the names of its contributors may
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| 22 | be used to endorse or promote products derived from this software without
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| 23 | specific prior written permission.
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| 24 |
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| 25 | THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
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| 26 | EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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| 27 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
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| 28 | DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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| 29 | DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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| 30 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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| 31 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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| 32 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 33 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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| 34 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 35 |
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| 36 | =============================================================================*/
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| 37 |
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| 38 | #include <stdbool.h>
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| 39 | #include "platform.h"
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| 40 | #include "functions.h"
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| 41 |
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| 42 | #define RNEVEN ROUND_NEAR_EVEN
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| 43 | #define RMINM ROUND_MINMAG
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| 44 | #define RMIN ROUND_MIN
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| 45 | #define RMAX ROUND_MAX
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| 46 | #define RNMAXM ROUND_NEAR_MAXMAG
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| 47 |
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| 48 | const struct standardFunctionInfo standardFunctionInfos[] = {
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| 49 | /*------------------------------------------------------------------------
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| 50 | *------------------------------------------------------------------------*/
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| 51 | #ifdef FLOAT16
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| 52 | { "ui32_to_f16", UI32_TO_F16, 0, 0 },
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| 53 | #endif
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| 54 | { "ui32_to_f32", UI32_TO_F32, 0, 0 },
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| 55 | #ifdef FLOAT64
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| 56 | { "ui32_to_f64", UI32_TO_F64, 0, 0 },
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| 57 | #endif
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| 58 | #ifdef EXTFLOAT80
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| 59 | { "ui32_to_extF80", UI32_TO_EXTF80, 0, 0 },
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| 60 | #endif
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| 61 | #ifdef FLOAT128
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| 62 | { "ui32_to_f128", UI32_TO_F128, 0, 0 },
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| 63 | #endif
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| 64 | #ifdef FLOAT16
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| 65 | { "ui64_to_f16", UI64_TO_F16, 0, 0 },
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| 66 | #endif
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| 67 | { "ui64_to_f32", UI64_TO_F32, 0, 0 },
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| 68 | #ifdef FLOAT64
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| 69 | { "ui64_to_f64", UI64_TO_F64, 0, 0 },
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| 70 | #endif
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| 71 | #ifdef EXTFLOAT80
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| 72 | { "ui64_to_extF80", UI64_TO_EXTF80, 0, 0 },
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| 73 | #endif
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| 74 | #ifdef FLOAT128
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| 75 | { "ui64_to_f128", UI64_TO_F128, 0, 0 },
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| 76 | #endif
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| 77 | #ifdef FLOAT16
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| 78 | { "i32_to_f16", I32_TO_F16, 0, 0 },
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| 79 | #endif
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| 80 | { "i32_to_f32", I32_TO_F32, 0, 0 },
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| 81 | #ifdef FLOAT64
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| 82 | { "i32_to_f64", I32_TO_F64, 0, 0 },
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| 83 | #endif
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| 84 | #ifdef EXTFLOAT80
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| 85 | { "i32_to_extF80", I32_TO_EXTF80, 0, 0 },
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| 86 | #endif
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| 87 | #ifdef FLOAT128
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| 88 | { "i32_to_f128", I32_TO_F128, 0, 0 },
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| 89 | #endif
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| 90 | #ifdef FLOAT16
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| 91 | { "i64_to_f16", I64_TO_F16, 0, 0 },
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| 92 | #endif
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| 93 | { "i64_to_f32", I64_TO_F32, 0, 0 },
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| 94 | #ifdef FLOAT64
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| 95 | { "i64_to_f64", I64_TO_F64, 0, 0 },
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| 96 | #endif
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| 97 | #ifdef EXTFLOAT80
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| 98 | { "i64_to_extF80", I64_TO_EXTF80, 0, 0 },
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| 99 | #endif
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| 100 | #ifdef FLOAT128
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| 101 | { "i64_to_f128", I64_TO_F128, 0, 0 },
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| 102 | #endif
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| 103 | /*------------------------------------------------------------------------
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| 104 | *------------------------------------------------------------------------*/
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| 105 | #ifdef FLOAT16
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| 106 | { "f16_to_ui32_r_near_even", F16_TO_UI32, RNEVEN, false },
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| 107 | { "f16_to_ui32_r_minMag", F16_TO_UI32, RMINM, false },
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| 108 | { "f16_to_ui32_r_min", F16_TO_UI32, RMIN, false },
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| 109 | { "f16_to_ui32_r_max", F16_TO_UI32, RMAX, false },
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| 110 | { "f16_to_ui32_r_near_maxMag", F16_TO_UI32, RNMAXM, false },
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| 111 | { "f16_to_ui64_r_near_even", F16_TO_UI64, RNEVEN, false },
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| 112 | { "f16_to_ui64_r_minMag", F16_TO_UI64, RMINM, false },
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| 113 | { "f16_to_ui64_r_min", F16_TO_UI64, RMIN, false },
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| 114 | { "f16_to_ui64_r_max", F16_TO_UI64, RMAX, false },
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| 115 | { "f16_to_ui64_r_near_maxMag", F16_TO_UI64, RNMAXM, false },
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| 116 | { "f16_to_i32_r_near_even", F16_TO_I32, RNEVEN, false },
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| 117 | { "f16_to_i32_r_minMag", F16_TO_I32, RMINM, false },
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| 118 | { "f16_to_i32_r_min", F16_TO_I32, RMIN, false },
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| 119 | { "f16_to_i32_r_max", F16_TO_I32, RMAX, false },
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| 120 | { "f16_to_i32_r_near_maxMag", F16_TO_I32, RNMAXM, false },
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| 121 | { "f16_to_i64_r_near_even", F16_TO_I64, RNEVEN, false },
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| 122 | { "f16_to_i64_r_minMag", F16_TO_I64, RMINM, false },
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| 123 | { "f16_to_i64_r_min", F16_TO_I64, RMIN, false },
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| 124 | { "f16_to_i64_r_max", F16_TO_I64, RMAX, false },
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| 125 | { "f16_to_i64_r_near_maxMag", F16_TO_I64, RNMAXM, false },
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| 126 | { "f16_to_ui32_rx_near_even", F16_TO_UI32, RNEVEN, true },
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| 127 | { "f16_to_ui32_rx_minMag", F16_TO_UI32, RMINM, true },
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| 128 | { "f16_to_ui32_rx_min", F16_TO_UI32, RMIN, true },
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| 129 | { "f16_to_ui32_rx_max", F16_TO_UI32, RMAX, true },
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| 130 | { "f16_to_ui32_rx_near_maxMag", F16_TO_UI32, RNMAXM, true },
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| 131 | { "f16_to_ui64_rx_near_even", F16_TO_UI64, RNEVEN, true },
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| 132 | { "f16_to_ui64_rx_minMag", F16_TO_UI64, RMINM, true },
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| 133 | { "f16_to_ui64_rx_min", F16_TO_UI64, RMIN, true },
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| 134 | { "f16_to_ui64_rx_max", F16_TO_UI64, RMAX, true },
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| 135 | { "f16_to_ui64_rx_near_maxMag", F16_TO_UI64, RNMAXM, true },
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| 136 | { "f16_to_i32_rx_near_even", F16_TO_I32, RNEVEN, true },
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| 137 | { "f16_to_i32_rx_minMag", F16_TO_I32, RMINM, true },
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| 138 | { "f16_to_i32_rx_min", F16_TO_I32, RMIN, true },
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| 139 | { "f16_to_i32_rx_max", F16_TO_I32, RMAX, true },
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| 140 | { "f16_to_i32_rx_near_maxMag", F16_TO_I32, RNMAXM, true },
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| 141 | { "f16_to_i64_rx_near_even", F16_TO_I64, RNEVEN, true },
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| 142 | { "f16_to_i64_rx_minMag", F16_TO_I64, RMINM, true },
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| 143 | { "f16_to_i64_rx_min", F16_TO_I64, RMIN, true },
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| 144 | { "f16_to_i64_rx_max", F16_TO_I64, RMAX, true },
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| 145 | { "f16_to_i64_rx_near_maxMag", F16_TO_I64, RNMAXM, true },
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| 146 | { "f16_to_f32", F16_TO_F32, 0, 0 },
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| 147 | #ifdef FLOAT64
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| 148 | { "f16_to_f64", F16_TO_F64, 0, 0 },
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| 149 | #endif
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| 150 | #ifdef EXTFLOAT80
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| 151 | { "f16_to_extF80", F16_TO_EXTF80, 0, 0 },
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| 152 | #endif
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| 153 | #ifdef FLOAT128
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| 154 | { "f16_to_f128", F16_TO_F128, 0, 0 },
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| 155 | #endif
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| 156 | { "f16_roundToInt_r_near_even", F16_ROUNDTOINT, RNEVEN, false },
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| 157 | { "f16_roundToInt_r_minMag", F16_ROUNDTOINT, RMINM, false },
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| 158 | { "f16_roundToInt_r_min", F16_ROUNDTOINT, RMIN, false },
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| 159 | { "f16_roundToInt_r_max", F16_ROUNDTOINT, RMAX, false },
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| 160 | { "f16_roundToInt_r_near_maxMag", F16_ROUNDTOINT, RNMAXM, false },
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| 161 | { "f16_roundToInt_x", F16_ROUNDTOINT, 0, true },
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| 162 | { "f16_add", F16_ADD, 0, 0 },
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| 163 | { "f16_sub", F16_SUB, 0, 0 },
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| 164 | { "f16_mul", F16_MUL, 0, 0 },
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| 165 | { "f16_mulAdd", F16_MULADD, 0, 0 },
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| 166 | { "f16_div", F16_DIV, 0, 0 },
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| 167 | { "f16_rem", F16_REM, 0, 0 },
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| 168 | { "f16_sqrt", F16_SQRT, 0, 0 },
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| 169 | { "f16_eq", F16_EQ, 0, 0 },
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| 170 | { "f16_le", F16_LE, 0, 0 },
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| 171 | { "f16_lt", F16_LT, 0, 0 },
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| 172 | { "f16_eq_signaling", F16_EQ_SIGNALING, 0, 0 },
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| 173 | { "f16_le_quiet", F16_LE_QUIET, 0, 0 },
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| 174 | { "f16_lt_quiet", F16_LT_QUIET, 0, 0 },
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| 175 | #endif
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| 176 | /*------------------------------------------------------------------------
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| 177 | *------------------------------------------------------------------------*/
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| 178 | { "f32_to_ui32_r_near_even", F32_TO_UI32, RNEVEN, false },
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| 179 | { "f32_to_ui32_r_minMag", F32_TO_UI32, RMINM, false },
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| 180 | { "f32_to_ui32_r_min", F32_TO_UI32, RMIN, false },
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| 181 | { "f32_to_ui32_r_max", F32_TO_UI32, RMAX, false },
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| 182 | { "f32_to_ui32_r_near_maxMag", F32_TO_UI32, RNMAXM, false },
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| 183 | { "f32_to_ui64_r_near_even", F32_TO_UI64, RNEVEN, false },
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| 184 | { "f32_to_ui64_r_minMag", F32_TO_UI64, RMINM, false },
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| 185 | { "f32_to_ui64_r_min", F32_TO_UI64, RMIN, false },
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| 186 | { "f32_to_ui64_r_max", F32_TO_UI64, RMAX, false },
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| 187 | { "f32_to_ui64_r_near_maxMag", F32_TO_UI64, RNMAXM, false },
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| 188 | { "f32_to_i32_r_near_even", F32_TO_I32, RNEVEN, false },
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| 189 | { "f32_to_i32_r_minMag", F32_TO_I32, RMINM, false },
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| 190 | { "f32_to_i32_r_min", F32_TO_I32, RMIN, false },
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| 191 | { "f32_to_i32_r_max", F32_TO_I32, RMAX, false },
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| 192 | { "f32_to_i32_r_near_maxMag", F32_TO_I32, RNMAXM, false },
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| 193 | { "f32_to_i64_r_near_even", F32_TO_I64, RNEVEN, false },
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| 194 | { "f32_to_i64_r_minMag", F32_TO_I64, RMINM, false },
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| 195 | { "f32_to_i64_r_min", F32_TO_I64, RMIN, false },
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| 196 | { "f32_to_i64_r_max", F32_TO_I64, RMAX, false },
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| 197 | { "f32_to_i64_r_near_maxMag", F32_TO_I64, RNMAXM, false },
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| 198 | { "f32_to_ui32_rx_near_even", F32_TO_UI32, RNEVEN, true },
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| 199 | { "f32_to_ui32_rx_minMag", F32_TO_UI32, RMINM, true },
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| 200 | { "f32_to_ui32_rx_min", F32_TO_UI32, RMIN, true },
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| 201 | { "f32_to_ui32_rx_max", F32_TO_UI32, RMAX, true },
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| 202 | { "f32_to_ui32_rx_near_maxMag", F32_TO_UI32, RNMAXM, true },
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| 203 | { "f32_to_ui64_rx_near_even", F32_TO_UI64, RNEVEN, true },
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| 204 | { "f32_to_ui64_rx_minMag", F32_TO_UI64, RMINM, true },
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| 205 | { "f32_to_ui64_rx_min", F32_TO_UI64, RMIN, true },
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| 206 | { "f32_to_ui64_rx_max", F32_TO_UI64, RMAX, true },
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| 207 | { "f32_to_ui64_rx_near_maxMag", F32_TO_UI64, RNMAXM, true },
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| 208 | { "f32_to_i32_rx_near_even", F32_TO_I32, RNEVEN, true },
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| 209 | { "f32_to_i32_rx_minMag", F32_TO_I32, RMINM, true },
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| 210 | { "f32_to_i32_rx_min", F32_TO_I32, RMIN, true },
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| 211 | { "f32_to_i32_rx_max", F32_TO_I32, RMAX, true },
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| 212 | { "f32_to_i32_rx_near_maxMag", F32_TO_I32, RNMAXM, true },
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| 213 | { "f32_to_i64_rx_near_even", F32_TO_I64, RNEVEN, true },
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| 214 | { "f32_to_i64_rx_minMag", F32_TO_I64, RMINM, true },
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| 215 | { "f32_to_i64_rx_min", F32_TO_I64, RMIN, true },
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| 216 | { "f32_to_i64_rx_max", F32_TO_I64, RMAX, true },
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| 217 | { "f32_to_i64_rx_near_maxMag", F32_TO_I64, RNMAXM, true },
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| 218 | #ifdef FLOAT16
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| 219 | { "f32_to_f16", F32_TO_F16, 0, 0 },
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| 220 | #endif
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| 221 | #ifdef FLOAT64
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| 222 | { "f32_to_f64", F32_TO_F64, 0, 0 },
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| 223 | #endif
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| 224 | #ifdef EXTFLOAT80
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| 225 | { "f32_to_extF80", F32_TO_EXTF80, 0, 0 },
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| 226 | #endif
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| 227 | #ifdef FLOAT128
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| 228 | { "f32_to_f128", F32_TO_F128, 0, 0 },
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| 229 | #endif
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| 230 | { "f32_roundToInt_r_near_even", F32_ROUNDTOINT, RNEVEN, false },
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| 231 | { "f32_roundToInt_r_minMag", F32_ROUNDTOINT, RMINM, false },
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| 232 | { "f32_roundToInt_r_min", F32_ROUNDTOINT, RMIN, false },
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| 233 | { "f32_roundToInt_r_max", F32_ROUNDTOINT, RMAX, false },
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| 234 | { "f32_roundToInt_r_near_maxMag", F32_ROUNDTOINT, RNMAXM, false },
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| 235 | { "f32_roundToInt_x", F32_ROUNDTOINT, 0, true },
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| 236 | { "f32_add", F32_ADD, 0, 0 },
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| 237 | { "f32_sub", F32_SUB, 0, 0 },
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| 238 | { "f32_mul", F32_MUL, 0, 0 },
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| 239 | { "f32_mulAdd", F32_MULADD, 0, 0 },
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| 240 | { "f32_div", F32_DIV, 0, 0 },
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| 241 | { "f32_rem", F32_REM, 0, 0 },
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| 242 | { "f32_sqrt", F32_SQRT, 0, 0 },
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| 243 | { "f32_eq", F32_EQ, 0, 0 },
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| 244 | { "f32_le", F32_LE, 0, 0 },
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| 245 | { "f32_lt", F32_LT, 0, 0 },
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| 246 | { "f32_eq_signaling", F32_EQ_SIGNALING, 0, 0 },
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| 247 | { "f32_le_quiet", F32_LE_QUIET, 0, 0 },
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| 248 | { "f32_lt_quiet", F32_LT_QUIET, 0, 0 },
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| 249 | /*------------------------------------------------------------------------
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| 250 | *------------------------------------------------------------------------*/
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| 251 | #ifdef FLOAT64
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| 252 | { "f64_to_ui32_r_near_even", F64_TO_UI32, RNEVEN, false },
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| 253 | { "f64_to_ui32_r_minMag", F64_TO_UI32, RMINM, false },
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| 254 | { "f64_to_ui32_r_min", F64_TO_UI32, RMIN, false },
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| 255 | { "f64_to_ui32_r_max", F64_TO_UI32, RMAX, false },
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| 256 | { "f64_to_ui32_r_near_maxMag", F64_TO_UI32, RNMAXM, false },
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| 257 | { "f64_to_ui64_r_near_even", F64_TO_UI64, RNEVEN, false },
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| 258 | { "f64_to_ui64_r_minMag", F64_TO_UI64, RMINM, false },
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| 259 | { "f64_to_ui64_r_min", F64_TO_UI64, RMIN, false },
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| 260 | { "f64_to_ui64_r_max", F64_TO_UI64, RMAX, false },
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| 261 | { "f64_to_ui64_r_near_maxMag", F64_TO_UI64, RNMAXM, false },
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| 262 | { "f64_to_i32_r_near_even", F64_TO_I32, RNEVEN, false },
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| 263 | { "f64_to_i32_r_minMag", F64_TO_I32, RMINM, false },
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| 264 | { "f64_to_i32_r_min", F64_TO_I32, RMIN, false },
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| 265 | { "f64_to_i32_r_max", F64_TO_I32, RMAX, false },
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| 266 | { "f64_to_i32_r_near_maxMag", F64_TO_I32, RNMAXM, false },
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| 267 | { "f64_to_i64_r_near_even", F64_TO_I64, RNEVEN, false },
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| 268 | { "f64_to_i64_r_minMag", F64_TO_I64, RMINM, false },
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| 269 | { "f64_to_i64_r_min", F64_TO_I64, RMIN, false },
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| 270 | { "f64_to_i64_r_max", F64_TO_I64, RMAX, false },
|
|---|
| 271 | { "f64_to_i64_r_near_maxMag", F64_TO_I64, RNMAXM, false },
|
|---|
| 272 | { "f64_to_ui32_rx_near_even", F64_TO_UI32, RNEVEN, true },
|
|---|
| 273 | { "f64_to_ui32_rx_minMag", F64_TO_UI32, RMINM, true },
|
|---|
| 274 | { "f64_to_ui32_rx_min", F64_TO_UI32, RMIN, true },
|
|---|
| 275 | { "f64_to_ui32_rx_max", F64_TO_UI32, RMAX, true },
|
|---|
| 276 | { "f64_to_ui32_rx_near_maxMag", F64_TO_UI32, RNMAXM, true },
|
|---|
| 277 | { "f64_to_ui64_rx_near_even", F64_TO_UI64, RNEVEN, true },
|
|---|
| 278 | { "f64_to_ui64_rx_minMag", F64_TO_UI64, RMINM, true },
|
|---|
| 279 | { "f64_to_ui64_rx_min", F64_TO_UI64, RMIN, true },
|
|---|
| 280 | { "f64_to_ui64_rx_max", F64_TO_UI64, RMAX, true },
|
|---|
| 281 | { "f64_to_ui64_rx_near_maxMag", F64_TO_UI64, RNMAXM, true },
|
|---|
| 282 | { "f64_to_i32_rx_near_even", F64_TO_I32, RNEVEN, true },
|
|---|
| 283 | { "f64_to_i32_rx_minMag", F64_TO_I32, RMINM, true },
|
|---|
| 284 | { "f64_to_i32_rx_min", F64_TO_I32, RMIN, true },
|
|---|
| 285 | { "f64_to_i32_rx_max", F64_TO_I32, RMAX, true },
|
|---|
| 286 | { "f64_to_i32_rx_near_maxMag", F64_TO_I32, RNMAXM, true },
|
|---|
| 287 | { "f64_to_i64_rx_near_even", F64_TO_I64, RNEVEN, true },
|
|---|
| 288 | { "f64_to_i64_rx_minMag", F64_TO_I64, RMINM, true },
|
|---|
| 289 | { "f64_to_i64_rx_min", F64_TO_I64, RMIN, true },
|
|---|
| 290 | { "f64_to_i64_rx_max", F64_TO_I64, RMAX, true },
|
|---|
| 291 | { "f64_to_i64_rx_near_maxMag", F64_TO_I64, RNMAXM, true },
|
|---|
| 292 | #ifdef FLOAT16
|
|---|
| 293 | { "f64_to_f16", F64_TO_F16, 0, 0 },
|
|---|
| 294 | #endif
|
|---|
| 295 | { "f64_to_f32", F64_TO_F32, 0, 0 },
|
|---|
| 296 | #ifdef EXTFLOAT80
|
|---|
| 297 | { "f64_to_extF80", F64_TO_EXTF80, 0, 0 },
|
|---|
| 298 | #endif
|
|---|
| 299 | #ifdef FLOAT128
|
|---|
| 300 | { "f64_to_f128", F64_TO_F128, 0, 0 },
|
|---|
| 301 | #endif
|
|---|
| 302 | { "f64_roundToInt_r_near_even", F64_ROUNDTOINT, RNEVEN, false },
|
|---|
| 303 | { "f64_roundToInt_r_minMag", F64_ROUNDTOINT, RMINM, false },
|
|---|
| 304 | { "f64_roundToInt_r_min", F64_ROUNDTOINT, RMIN, false },
|
|---|
| 305 | { "f64_roundToInt_r_max", F64_ROUNDTOINT, RMAX, false },
|
|---|
| 306 | { "f64_roundToInt_r_near_maxMag", F64_ROUNDTOINT, RNMAXM, false },
|
|---|
| 307 | { "f64_roundToInt_x", F64_ROUNDTOINT, 0, true },
|
|---|
| 308 | { "f64_add", F64_ADD, 0, 0 },
|
|---|
| 309 | { "f64_sub", F64_SUB, 0, 0 },
|
|---|
| 310 | { "f64_mul", F64_MUL, 0, 0 },
|
|---|
| 311 | { "f64_mulAdd", F64_MULADD, 0, 0 },
|
|---|
| 312 | { "f64_div", F64_DIV, 0, 0 },
|
|---|
| 313 | { "f64_rem", F64_REM, 0, 0 },
|
|---|
| 314 | { "f64_sqrt", F64_SQRT, 0, 0 },
|
|---|
| 315 | { "f64_eq", F64_EQ, 0, 0 },
|
|---|
| 316 | { "f64_le", F64_LE, 0, 0 },
|
|---|
| 317 | { "f64_lt", F64_LT, 0, 0 },
|
|---|
| 318 | { "f64_eq_signaling", F64_EQ_SIGNALING, 0, 0 },
|
|---|
| 319 | { "f64_le_quiet", F64_LE_QUIET, 0, 0 },
|
|---|
| 320 | { "f64_lt_quiet", F64_LT_QUIET, 0, 0 },
|
|---|
| 321 | #endif
|
|---|
| 322 | /*------------------------------------------------------------------------
|
|---|
| 323 | *------------------------------------------------------------------------*/
|
|---|
| 324 | #ifdef EXTFLOAT80
|
|---|
| 325 | { "extF80_to_ui32_r_near_even", EXTF80_TO_UI32, RNEVEN, false },
|
|---|
| 326 | { "extF80_to_ui32_r_minMag", EXTF80_TO_UI32, RMINM, false },
|
|---|
| 327 | { "extF80_to_ui32_r_min", EXTF80_TO_UI32, RMIN, false },
|
|---|
| 328 | { "extF80_to_ui32_r_max", EXTF80_TO_UI32, RMAX, false },
|
|---|
| 329 | { "extF80_to_ui32_r_near_maxMag", EXTF80_TO_UI32, RNMAXM, false },
|
|---|
| 330 | { "extF80_to_ui64_r_near_even", EXTF80_TO_UI64, RNEVEN, false },
|
|---|
| 331 | { "extF80_to_ui64_r_minMag", EXTF80_TO_UI64, RMINM, false },
|
|---|
| 332 | { "extF80_to_ui64_r_min", EXTF80_TO_UI64, RMIN, false },
|
|---|
| 333 | { "extF80_to_ui64_r_max", EXTF80_TO_UI64, RMAX, false },
|
|---|
| 334 | { "extF80_to_ui64_r_near_maxMag", EXTF80_TO_UI64, RNMAXM, false },
|
|---|
| 335 | { "extF80_to_i32_r_near_even", EXTF80_TO_I32, RNEVEN, false },
|
|---|
| 336 | { "extF80_to_i32_r_minMag", EXTF80_TO_I32, RMINM, false },
|
|---|
| 337 | { "extF80_to_i32_r_min", EXTF80_TO_I32, RMIN, false },
|
|---|
| 338 | { "extF80_to_i32_r_max", EXTF80_TO_I32, RMAX, false },
|
|---|
| 339 | { "extF80_to_i32_r_near_maxMag", EXTF80_TO_I32, RNMAXM, false },
|
|---|
| 340 | { "extF80_to_i64_r_near_even", EXTF80_TO_I64, RNEVEN, false },
|
|---|
| 341 | { "extF80_to_i64_r_minMag", EXTF80_TO_I64, RMINM, false },
|
|---|
| 342 | { "extF80_to_i64_r_min", EXTF80_TO_I64, RMIN, false },
|
|---|
| 343 | { "extF80_to_i64_r_max", EXTF80_TO_I64, RMAX, false },
|
|---|
| 344 | { "extF80_to_i64_r_near_maxMag", EXTF80_TO_I64, RNMAXM, false },
|
|---|
| 345 | { "extF80_to_ui32_rx_near_even", EXTF80_TO_UI32, RNEVEN, true },
|
|---|
| 346 | { "extF80_to_ui32_rx_minMag", EXTF80_TO_UI32, RMINM, true },
|
|---|
| 347 | { "extF80_to_ui32_rx_min", EXTF80_TO_UI32, RMIN, true },
|
|---|
| 348 | { "extF80_to_ui32_rx_max", EXTF80_TO_UI32, RMAX, true },
|
|---|
| 349 | { "extF80_to_ui32_rx_near_maxMag", EXTF80_TO_UI32, RNMAXM, true },
|
|---|
| 350 | { "extF80_to_ui64_rx_near_even", EXTF80_TO_UI64, RNEVEN, true },
|
|---|
| 351 | { "extF80_to_ui64_rx_minMag", EXTF80_TO_UI64, RMINM, true },
|
|---|
| 352 | { "extF80_to_ui64_rx_min", EXTF80_TO_UI64, RMIN, true },
|
|---|
| 353 | { "extF80_to_ui64_rx_max", EXTF80_TO_UI64, RMAX, true },
|
|---|
| 354 | { "extF80_to_ui64_rx_near_maxMag", EXTF80_TO_UI64, RNMAXM, true },
|
|---|
| 355 | { "extF80_to_i32_rx_near_even", EXTF80_TO_I32, RNEVEN, true },
|
|---|
| 356 | { "extF80_to_i32_rx_minMag", EXTF80_TO_I32, RMINM, true },
|
|---|
| 357 | { "extF80_to_i32_rx_min", EXTF80_TO_I32, RMIN, true },
|
|---|
| 358 | { "extF80_to_i32_rx_max", EXTF80_TO_I32, RMAX, true },
|
|---|
| 359 | { "extF80_to_i32_rx_near_maxMag", EXTF80_TO_I32, RNMAXM, true },
|
|---|
| 360 | { "extF80_to_i64_rx_near_even", EXTF80_TO_I64, RNEVEN, true },
|
|---|
| 361 | { "extF80_to_i64_rx_minMag", EXTF80_TO_I64, RMINM, true },
|
|---|
| 362 | { "extF80_to_i64_rx_min", EXTF80_TO_I64, RMIN, true },
|
|---|
| 363 | { "extF80_to_i64_rx_max", EXTF80_TO_I64, RMAX, true },
|
|---|
| 364 | { "extF80_to_i64_rx_near_maxMag", EXTF80_TO_I64, RNMAXM, true },
|
|---|
| 365 | #ifdef FLOAT16
|
|---|
| 366 | { "extF80_to_f16", EXTF80_TO_F16, 0, 0 },
|
|---|
| 367 | #endif
|
|---|
| 368 | { "extF80_to_f32", EXTF80_TO_F32, 0, 0 },
|
|---|
| 369 | #ifdef FLOAT64
|
|---|
| 370 | { "extF80_to_f64", EXTF80_TO_F64, 0, 0 },
|
|---|
| 371 | #endif
|
|---|
| 372 | #ifdef FLOAT128
|
|---|
| 373 | { "extF80_to_f128", EXTF80_TO_F128, 0, 0 },
|
|---|
| 374 | #endif
|
|---|
| 375 | { "extF80_roundToInt_r_near_even", EXTF80_ROUNDTOINT, RNEVEN, false },
|
|---|
| 376 | { "extF80_roundToInt_r_minMag", EXTF80_ROUNDTOINT, RMINM, false },
|
|---|
| 377 | { "extF80_roundToInt_r_min", EXTF80_ROUNDTOINT, RMIN, false },
|
|---|
| 378 | { "extF80_roundToInt_r_max", EXTF80_ROUNDTOINT, RMAX, false },
|
|---|
| 379 | { "extF80_roundToInt_r_near_maxMag", EXTF80_ROUNDTOINT, RNMAXM, false },
|
|---|
| 380 | { "extF80_roundToInt_x", EXTF80_ROUNDTOINT, 0, true },
|
|---|
| 381 | { "extF80_add", EXTF80_ADD, 0, 0 },
|
|---|
| 382 | { "extF80_sub", EXTF80_SUB, 0, 0 },
|
|---|
| 383 | { "extF80_mul", EXTF80_MUL, 0, 0 },
|
|---|
| 384 | { "extF80_div", EXTF80_DIV, 0, 0 },
|
|---|
| 385 | { "extF80_rem", EXTF80_REM, 0, 0 },
|
|---|
| 386 | { "extF80_sqrt", EXTF80_SQRT, 0, 0 },
|
|---|
| 387 | { "extF80_eq", EXTF80_EQ, 0, 0 },
|
|---|
| 388 | { "extF80_le", EXTF80_LE, 0, 0 },
|
|---|
| 389 | { "extF80_lt", EXTF80_LT, 0, 0 },
|
|---|
| 390 | { "extF80_eq_signaling", EXTF80_EQ_SIGNALING, 0, 0 },
|
|---|
| 391 | { "extF80_le_quiet", EXTF80_LE_QUIET, 0, 0 },
|
|---|
| 392 | { "extF80_lt_quiet", EXTF80_LT_QUIET, 0, 0 },
|
|---|
| 393 | #endif
|
|---|
| 394 | /*------------------------------------------------------------------------
|
|---|
| 395 | *------------------------------------------------------------------------*/
|
|---|
| 396 | #ifdef FLOAT128
|
|---|
| 397 | { "f128_to_ui32_r_near_even", F128_TO_UI32, RNEVEN, false },
|
|---|
| 398 | { "f128_to_ui32_r_minMag", F128_TO_UI32, RMINM, false },
|
|---|
| 399 | { "f128_to_ui32_r_min", F128_TO_UI32, RMIN, false },
|
|---|
| 400 | { "f128_to_ui32_r_max", F128_TO_UI32, RMAX, false },
|
|---|
| 401 | { "f128_to_ui32_r_near_maxMag", F128_TO_UI32, RNMAXM, false },
|
|---|
| 402 | { "f128_to_ui64_r_near_even", F128_TO_UI64, RNEVEN, false },
|
|---|
| 403 | { "f128_to_ui64_r_minMag", F128_TO_UI64, RMINM, false },
|
|---|
| 404 | { "f128_to_ui64_r_min", F128_TO_UI64, RMIN, false },
|
|---|
| 405 | { "f128_to_ui64_r_max", F128_TO_UI64, RMAX, false },
|
|---|
| 406 | { "f128_to_ui64_r_near_maxMag", F128_TO_UI64, RNMAXM, false },
|
|---|
| 407 | { "f128_to_i32_r_near_even", F128_TO_I32, RNEVEN, false },
|
|---|
| 408 | { "f128_to_i32_r_minMag", F128_TO_I32, RMINM, false },
|
|---|
| 409 | { "f128_to_i32_r_min", F128_TO_I32, RMIN, false },
|
|---|
| 410 | { "f128_to_i32_r_max", F128_TO_I32, RMAX, false },
|
|---|
| 411 | { "f128_to_i32_r_near_maxMag", F128_TO_I32, RNMAXM, false },
|
|---|
| 412 | { "f128_to_i64_r_near_even", F128_TO_I64, RNEVEN, false },
|
|---|
| 413 | { "f128_to_i64_r_minMag", F128_TO_I64, RMINM, false },
|
|---|
| 414 | { "f128_to_i64_r_min", F128_TO_I64, RMIN, false },
|
|---|
| 415 | { "f128_to_i64_r_max", F128_TO_I64, RMAX, false },
|
|---|
| 416 | { "f128_to_i64_r_near_maxMag", F128_TO_I64, RNMAXM, false },
|
|---|
| 417 | { "f128_to_ui32_rx_near_even", F128_TO_UI32, RNEVEN, true },
|
|---|
| 418 | { "f128_to_ui32_rx_minMag", F128_TO_UI32, RMINM, true },
|
|---|
| 419 | { "f128_to_ui32_rx_min", F128_TO_UI32, RMIN, true },
|
|---|
| 420 | { "f128_to_ui32_rx_max", F128_TO_UI32, RMAX, true },
|
|---|
| 421 | { "f128_to_ui32_rx_near_maxMag", F128_TO_UI32, RNMAXM, true },
|
|---|
| 422 | { "f128_to_ui64_rx_near_even", F128_TO_UI64, RNEVEN, true },
|
|---|
| 423 | { "f128_to_ui64_rx_minMag", F128_TO_UI64, RMINM, true },
|
|---|
| 424 | { "f128_to_ui64_rx_min", F128_TO_UI64, RMIN, true },
|
|---|
| 425 | { "f128_to_ui64_rx_max", F128_TO_UI64, RMAX, true },
|
|---|
| 426 | { "f128_to_ui64_rx_near_maxMag", F128_TO_UI64, RNMAXM, true },
|
|---|
| 427 | { "f128_to_i32_rx_near_even", F128_TO_I32, RNEVEN, true },
|
|---|
| 428 | { "f128_to_i32_rx_minMag", F128_TO_I32, RMINM, true },
|
|---|
| 429 | { "f128_to_i32_rx_min", F128_TO_I32, RMIN, true },
|
|---|
| 430 | { "f128_to_i32_rx_max", F128_TO_I32, RMAX, true },
|
|---|
| 431 | { "f128_to_i32_rx_near_maxMag", F128_TO_I32, RNMAXM, true },
|
|---|
| 432 | { "f128_to_i64_rx_near_even", F128_TO_I64, RNEVEN, true },
|
|---|
| 433 | { "f128_to_i64_rx_minMag", F128_TO_I64, RMINM, true },
|
|---|
| 434 | { "f128_to_i64_rx_min", F128_TO_I64, RMIN, true },
|
|---|
| 435 | { "f128_to_i64_rx_max", F128_TO_I64, RMAX, true },
|
|---|
| 436 | { "f128_to_i64_rx_near_maxMag", F128_TO_I64, RNMAXM, true },
|
|---|
| 437 | #ifdef FLOAT16
|
|---|
| 438 | { "f128_to_f16", F128_TO_F16, 0, 0 },
|
|---|
| 439 | #endif
|
|---|
| 440 | { "f128_to_f32", F128_TO_F32, 0, 0 },
|
|---|
| 441 | #ifdef FLOAT64
|
|---|
| 442 | { "f128_to_f64", F128_TO_F64, 0, 0 },
|
|---|
| 443 | #endif
|
|---|
| 444 | #ifdef EXTFLOAT80
|
|---|
| 445 | { "f128_to_extF80", F128_TO_EXTF80, 0, 0 },
|
|---|
| 446 | #endif
|
|---|
| 447 | { "f128_roundToInt_r_near_even", F128_ROUNDTOINT, RNEVEN, false },
|
|---|
| 448 | { "f128_roundToInt_r_minMag", F128_ROUNDTOINT, RMINM, false },
|
|---|
| 449 | { "f128_roundToInt_r_min", F128_ROUNDTOINT, RMIN, false },
|
|---|
| 450 | { "f128_roundToInt_r_max", F128_ROUNDTOINT, RMAX, false },
|
|---|
| 451 | { "f128_roundToInt_r_near_maxMag", F128_ROUNDTOINT, RNMAXM, false },
|
|---|
| 452 | { "f128_roundToInt_x", F128_ROUNDTOINT, 0, true },
|
|---|
| 453 | { "f128_add", F128_ADD, 0, 0 },
|
|---|
| 454 | { "f128_sub", F128_SUB, 0, 0 },
|
|---|
| 455 | { "f128_mul", F128_MUL, 0, 0 },
|
|---|
| 456 | { "f128_mulAdd", F128_MULADD, 0, 0 },
|
|---|
| 457 | { "f128_div", F128_DIV, 0, 0 },
|
|---|
| 458 | { "f128_rem", F128_REM, 0, 0 },
|
|---|
| 459 | { "f128_sqrt", F128_SQRT, 0, 0 },
|
|---|
| 460 | { "f128_eq", F128_EQ, 0, 0 },
|
|---|
| 461 | { "f128_le", F128_LE, 0, 0 },
|
|---|
| 462 | { "f128_lt", F128_LT, 0, 0 },
|
|---|
| 463 | { "f128_eq_signaling", F128_EQ_SIGNALING, 0, 0 },
|
|---|
| 464 | { "f128_le_quiet", F128_LE_QUIET, 0, 0 },
|
|---|
| 465 | { "f128_lt_quiet", F128_LT_QUIET, 0, 0 },
|
|---|
| 466 | #endif
|
|---|
| 467 | /*------------------------------------------------------------------------
|
|---|
| 468 | *------------------------------------------------------------------------*/
|
|---|
| 469 | { 0, 0, 0, 0 }
|
|---|
| 470 | };
|
|---|
| 471 |
|
|---|
