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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.mac@ 102157

Last change on this file since 102157 was 102157, checked in by vboxsync, 13 months ago

ValKit/bs3kit,bs3-cpu-basic-3: Experimental support for loading a 2nd test image above 1MB (at 8MB by default). This should allow for larger testcases, esp. for 32-bit and 64-bit code. bugref:10371

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1; $Id: bs3kit.mac 102157 2023-11-20 16:16:55Z vboxsync $
2;; @file
3; BS3Kit - structures, symbols, macros and stuff.
4;
5
6;
7; Copyright (C) 2007-2023 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37%ifndef ___bs3kit_mac___
38%define ___bs3kit_mac___
39
40;
41; Before we can include anything, we need to override NAME and switch section.
42; If we don't do the latter we end up with an unused 'text' section.
43;
44
45; Drop the asmdefs-first.mac header for native bs3kit files.
46%undef RT_ASMDEFS_INC_FIRST_FILE
47
48;;
49; Macro for setting register aliases according to the bit count given by %1.
50;
51%macro BS3_SET_REG_ALIASES 1
52 ;
53 ; Register aliases.
54 ;
55 %if %1 == 64
56 %define xCB 8
57 %define xDEF dq
58 %define xRES resq
59 %define xPRE qword
60 %define xSP rsp
61 %define xBP rbp
62 %define xAX rax
63 %define xBX rbx
64 %define xCX rcx
65 %define xDX rdx
66 %define xDI rdi
67 %define xSI rsi
68 %define xWrtRIP wrt rip
69 %define xPUSHF pushfq
70 %define xPOPF popfq
71 %define xRETF o64 retf
72 %elif %1 == 32
73 %define xCB 4
74 %define xDEF dd
75 %define xRES resd
76 %define xPRE dword
77 %define xSP esp
78 %define xBP ebp
79 %define xAX eax
80 %define xBX ebx
81 %define xCX ecx
82 %define xDX edx
83 %define xDI edi
84 %define xSI esi
85 %define xWrtRIP
86 %define xPUSHF pushfd
87 %define xPOPF popfd
88 %define xRETF retf
89 %elif %1 == 16
90 %define xCB 2
91 %define xDEF dw
92 %define xRES resw
93 %define xPRE word
94 %define xSP sp
95 %define xBP bp
96 %define xAX ax
97 %define xBX bx
98 %define xCX cx
99 %define xDX dx
100 %define xDI di
101 %define xSI si
102 %define xWrtRIP
103 %define xPUSHF pushf
104 %define xPOPF popf
105 %define xRETF retf
106 %else
107 %error "Invalid BS3_SET_REG_ALIASES argument:" %1
108 %endif
109
110
111 ;
112 ; Register names corresponding to the max size for pop/push <reg>.
113 ;
114 ; 16-bit can push both 32-bit and 16-bit registers. This 's' prefixed variant
115 ; is used when 16-bit should use the 32-bit register.
116 ;
117 %if %1 == 64
118 %define sCB 8
119 %define sDEF dq
120 %define sRES resq
121 %define sPRE qword
122 %define sSP rsp
123 %define sBP rbp
124 %define sAX rax
125 %define sBX rbx
126 %define sCX rcx
127 %define sDX rdx
128 %define sDI rdi
129 %define sSI rsi
130 %define sPUSHF pushfq
131 %define sPOPF popfq
132 %else
133 %define sCB 4
134 %define sDEF dd
135 %define sRES resd
136 %define sPRE dword
137 %define sSP esp
138 %define sBP ebp
139 %define sAX eax
140 %define sBX ebx
141 %define sCX ecx
142 %define sDX edx
143 %define sDI edi
144 %define sSI esi
145 %define sPUSHF pushfd
146 %define sPOPF popfd
147 %endif
148%endmacro
149
150;;
151; Redefines macros that follows __BITS__.
152%macro BS3_SET_BITS_MACROS 1
153 ;; Emulate the __BITS__ macro in NASM 2.0+. Follows BS3_SET_BITS.
154 %ifdef __YASM__
155 %undef __BITS__
156 %define __BITS__ %1
157 %endif
158
159 ;; Mostly internal macro. Follows BS3_SET_BITS.
160 %undef BS3_NAME_UNDERSCORE
161 %define BS3_NAME_UNDERSCORE _
162
163 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
164 %undef BS3_ONLY_16BIT
165 %if %1 == 16
166 %define BS3_ONLY_16BIT(a_Expr) a_Expr
167 %else
168 %define BS3_ONLY_16BIT(a_Expr)
169 %endif
170
171 ;; For odd 64-bit stuff. Follows BS3_SET_BITS.
172 %undef BS3_ONLY_64BIT
173 %if %1 == 64
174 %define BS3_ONLY_64BIT(a_Expr) a_Expr
175 %else
176 %define BS3_ONLY_64BIT(a_Expr)
177 %endif
178
179 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
180 %undef BS3_NOT_64BIT
181 %if %1 == 64
182 %define BS3_NOT_64BIT(a_Expr)
183 %else
184 %define BS3_NOT_64BIT(a_Expr) a_Expr
185 %endif
186
187 ;; For stack cleanups and similar where each bit mode is different. Follows BS3_SET_BITS.
188 %undef BS3_IF_16_32_64BIT
189 %if %1 == 16
190 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
191 %elif %1 == 32
192 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
193 %else
194 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
195 %endif
196
197 ;; For RIP relative addressing in 64-bit mode and absolute addressing in
198 ; other modes. Follows BS3_SET_BITS.
199 %undef BS3_WRT_RIP
200 %if %1 == 64
201 %define BS3_WRT_RIP(a_Sym) rel a_Sym
202 %else
203 %define BS3_WRT_RIP(a_Sym) a_Sym
204 %endif
205
206 %undef BS3_LEA_MOV_WRT_RIP
207 %if %1 == 64
208 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) lea a_DstReg, [BS3_WRT_RIP(a_Sym)]
209 %else
210 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) mov a_DstReg, a_Sym
211 %endif
212
213 ;; @def BS3_DATA16_WRT
214 ; For accessing BS3DATA16 correctly.
215 ; @param a_Var The BS3DATA16 variable.
216 %undef BS3_DATA16_WRT
217 %if %1 == 16
218 %define BS3_DATA16_WRT(a_Var) a_Var wrt BS3KIT_GRPNM_DATA16
219 %elif %1 == 32
220 %define BS3_DATA16_WRT(a_Var) a_Var wrt FLAT
221 %else
222 %define BS3_DATA16_WRT(a_Var) BS3_WRT_RIP(a_Var) wrt FLAT
223 %endif
224
225 ;; @def BS3_TEXT16_WRT
226 ; For accessing BS3DATA16 correctly.
227 ; @param a_Label The BS3TEXT16 label.
228 %undef BS3_TEXT16_WRT
229 %if %1 == 16
230 %define BS3_TEXT16_WRT(a_Label) a_Label wrt CGROUP16
231 %elif %1 == 32
232 %define BS3_TEXT16_WRT(a_Label) a_Label wrt FLAT
233 %else
234 %define BS3_TEXT16_WRT(a_Label) BS3_WRT_RIP(a_Label) wrt FLAT
235 %endif
236
237 %undef BS3_IF_16BIT_OTHERWISE
238 %if %1 == 16
239 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_16BitExpr
240 %else
241 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
242 %endif
243
244 %undef BS3_IF_32BIT_OTHERWISE
245 %if %1 == 32
246 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_32BitExpr
247 %else
248 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
249 %endif
250
251 %undef BS3_IF_64BIT_OTHERWISE
252 %if %1 == 64
253 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_64BitExpr
254 %else
255 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
256 %endif
257
258 ;;
259 ; Same as BS3_CMN_NM except in 16-bit mode, it will generate the far name.
260 ; (16-bit code generally have both near and far callable symbols, so we won't
261 ; be restricted to 64KB test code.)
262 %if %1 == 16
263 %define BS3_CMN_NM_FAR(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _f %+ __BITS__
264 %else
265 %define BS3_CMN_NM_FAR(a_Name) BS3_CMN_NM(a_Name)
266 %endif
267
268%endmacro
269
270; Default to register aliases for ARCH_BITS.
271BS3_SET_REG_ALIASES ARCH_BITS
272
273; Define macros for ARCH_BITS.
274BS3_SET_BITS_MACROS ARCH_BITS
275
276
277;; Wrapper around BITS.
278; Updates __BITS__ (built-in variable in nasm, we work it for yasm) as well
279; a number of convenient macros and register aliases.
280;
281; @param %1 The CPU bit count: 16, 32 or 64
282; @remarks ARCH_BITS is not modified and will remain what it was on the
283; assembler command line.
284%macro BS3_SET_BITS 1
285 BITS %1
286 BS3_SET_BITS_MACROS %1
287 BS3_SET_REG_ALIASES %1
288%endmacro
289
290;;
291; For instruction that should only be emitted in 16-bit mode. Follows BS3_SET_BITS.
292; BONLY16 normally goes in column 1.
293%macro BONLY16 1+
294 %if __BITS__ == 16
295 %1
296 %endif
297%endmacro
298
299;;
300; For instruction that should only be emitted in 32-bit mode. Follows BS3_SET_BITS.
301; BONLY32 normally goes in column 1.
302%macro BONLY32 1+
303 %if __BITS__ == 32
304 %1
305 %endif
306%endmacro
307
308;;
309; For instruction that should only be emitted in 64-bit mode. Follows BS3_SET_BITS.
310; BONLY64 normally goes in column 1.
311%macro BONLY64 1+
312 %if __BITS__ == 64
313 %1
314 %endif
315%endmacro
316
317
318
319;; @name Segment definitions.
320;; @{
321
322%ifndef ASM_FORMAT_BIN
323; !!HACK ALERT!!
324;
325; To make FLAT actually be flat, i.e. have a base of 0 rather than the same as
326; the target (?) segment, we tweak it a little bit here. We associate a segment
327; with it so that we can get at it in the class/segment ordering directives
328; we pass to the linker. The segment does not contain any data or anything, it
329; is just an empty one which we assign the address of zero.
330;
331; Look for 'clname BS3FLAT segaddr=0x0000' and 'segment BS3FLAT segaddr=0x0000'
332; in the makefile.
333;
334; !!HACK ALERT!!
335 %ifndef BS3_IS_HIGH_IMAGE
336segment BS3FLAT use32 class=BS3FLAT
337GROUP FLAT BS3FLAT
338 %else
339; For HIGH DLLs the hack is WRONG, so we just declare both BS3FLAT and FLAT the way
340; wlink wants flat groups to be defined. (See FIX_FRAME_FLAT use in omfreloc.c.)
341GROUP BS3FLAT
342GROUP FLAT
343 %endif
344%endif
345
346
347;;
348; Changes to the BS3TEXT16 segment, defining it if necessary.
349; @param %1 The bitcount to invoke BS3_SET_BITS with, default is 16.
350%macro BS3_BEGIN_TEXT16 0-1 16
351 %ifndef BS3_BEGIN_TEXT16_NOT_FIRST
352 %define BS3_BEGIN_TEXT16_NOT_FIRST
353 section BS3TEXT16 align=2 CLASS=BS3CLASS16CODE PUBLIC USE16
354 %ifndef BS3_BEGIN_TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
355 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
356 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
357 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
358 %endif
359 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
360 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
361 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
362 %endif
363 GROUP CGROUP16 BS3TEXT16 BS3TEXT16_NEARSTUBS BS3TEXT16_FARSTUBS
364 section BS3TEXT16
365 %endif
366 %else
367 section BS3TEXT16
368 %endif
369 %undef BS3_CUR_SEG_BEGIN_MACRO
370 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16
371 BS3_SET_BITS %1
372%endmacro
373
374%macro BS3_BEGIN_TEXT16_NEARSTUBS 0
375 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
376 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
377 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
378 %else
379 section BS3TEXT16_NEARSTUBS
380 %endif
381 %undef BS3_CUR_SEG_BEGIN_MACRO
382 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_NEARSTUBS
383 BS3_SET_BITS 16
384%endmacro
385
386%macro BS3_BEGIN_TEXT16_FARSTUBS 0
387 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
388 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
389 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
390 %else
391 section BS3TEXT16_FARSTUBS
392 %endif
393 %undef BS3_CUR_SEG_BEGIN_MACRO
394 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_FARSTUBS
395 BS3_SET_BITS 16
396%endmacro
397
398%macro BS3_BEGIN_RMTEXT16 0-1 2
399 %ifndef BS3_BEGIN_RMTEXT16_NOT_FIRST
400 %define BS3_BEGIN_RMTEXT16_NOT_FIRST
401 section BS3RMTEXT16 align=%1 CLASS=BS3CLASS16RMCODE PUBLIC USE16
402 %ifndef BS3_BEGIN_RMTEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
403 GROUP BS3GROUPRMTEXT16 BS3RMTEXT16
404 %endif
405 %else
406 section BS3RMTEXT16
407 %endif
408 %undef BS3_CUR_SEG_BEGIN_MACRO
409 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_RMTEXT16
410 BS3_SET_BITS 16
411%endmacro
412
413%macro BS3_BEGIN_X0TEXT16 0-1 2
414 %ifndef BS3_BEGIN_X0TEXT16_NOT_FIRST
415 %define BS3_BEGIN_X0TEXT16_NOT_FIRST
416 section BS3X0TEXT16 align=%1 CLASS=BS3CLASS16X0CODE PUBLIC USE16
417 %ifndef BS3_BEGIN_X0TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
418 GROUP BS3GROUPX0TEXT16 BS3X0TEXT16
419 %endif
420 %else
421 section BS3X0TEXT16
422 %endif
423 %undef BS3_CUR_SEG_BEGIN_MACRO
424 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X0TEXT16
425 BS3_SET_BITS 16
426%endmacro
427
428%macro BS3_BEGIN_X1TEXT16 0-1 2
429 %ifndef BS3_BEGIN_X1TEXT16_NOT_FIRST
430 %define BS3_BEGIN_X1TEXT16_NOT_FIRST
431 section BS3X1TEXT16 align=%1 CLASS=BS3CLASS16X1CODE PUBLIC USE16
432 %ifndef BS3_BEGIN_X1TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
433 GROUP BS3GROUPX1TEXT16 BS3X1TEXT16
434 %endif
435 %else
436 section BS3X1TEXT16
437 %endif
438 %undef BS3_CUR_SEG_BEGIN_MACRO
439 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X1TEXT16
440 BS3_SET_BITS 16
441%endmacro
442
443
444%macro BS3_BEGIN_DATA16 0-1 2
445 %ifndef BS3_BEGIN_DATA16_NOT_FIRST
446 %define BS3_BEGIN_DATA16_NOT_FIRST
447 section BS3DATA16 align=%1 CLASS=BS3KIT_CLASS_DATA16 PUBLIC USE16
448 %ifndef BS3_BEGIN_DATA16_WITHOUT_GROUP ; bs3-first-common.mac trick.
449 GROUP BS3KIT_GRPNM_DATA16 BS3DATA16
450 %endif
451 %else
452 section BS3DATA16
453 %endif
454 %undef BS3_CUR_SEG_BEGIN_MACRO
455 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA16
456 BS3_SET_BITS 16
457%endmacro
458
459%macro BS3_BEGIN_TEXT32 0-1 2
460 %ifndef BS3_BEGIN_TEXT32_NOT_FIRST
461 %define BS3_BEGIN_TEXT32_NOT_FIRST
462 section BS3TEXT32 align=%1 CLASS=BS3CLASS32CODE PUBLIC USE32 FLAT
463 %else
464 section BS3TEXT32
465 %endif
466 %undef BS3_CUR_SEG_BEGIN_MACRO
467 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT32
468 BS3_SET_BITS 32
469%endmacro
470
471%macro BS3_BEGIN_DATA32 0-1 16
472 %ifndef BS3_BEGIN_DATA32_NOT_FIRST
473 %define BS3_BEGIN_DATA32_NOT_FIRST
474 section BS3DATA32 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT - compiler doesn't make data flat.
475 %else
476 section BS3DATA32
477 %endif
478 %undef BS3_CUR_SEG_BEGIN_MACRO
479 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA32
480 BS3_SET_BITS 32
481%endmacro
482
483%macro BS3_BEGIN_TEXT64 0-1 2
484 %ifndef BS3_BEGIN_TEXT64_NOT_FIRST
485 %define BS3_BEGIN_TEXT64_NOT_FIRST
486 section BS3TEXT64 align=%1 CLASS=BS3CLASS64CODE PUBLIC USE32 FLAT
487 %else
488 section BS3TEXT64
489 %endif
490 %undef BS3_CUR_SEG_BEGIN_MACRO
491 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT64
492 BS3_SET_BITS 64
493%endmacro
494
495%macro BS3_BEGIN_DATA64 0-1 16
496 %ifndef BS3_BEGIN_DATA64_NOT_FIRST
497 %define BS3_BEGIN_DATA64_NOT_FIRST
498 section BS3DATA64 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT (see DATA32)
499 %else
500 section BS3DATA64
501 %endif
502 %undef BS3_CUR_SEG_BEGIN_MACRO
503 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA64
504 BS3_SET_BITS 64
505%endmacro
506
507;; The system data segment containing the GDT, TSSes and IDTs.
508%macro BS3_BEGIN_SYSTEM16 0-1 16
509 %ifndef BS3_BEGIN_SYSTEM16_NOT_FIRST
510 %define BS3_BEGIN_SYSTEM16_NOT_FIRST
511 section BS3SYSTEM16 align=%1 CLASS=BS3SYSTEM16 PUBLIC USE16
512 %else
513 section BS3SYSTEM16
514 %endif
515 %undef BS3_CUR_SEG_BEGIN_MACRO
516 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_SYSTEM16
517 BS3_SET_BITS 16
518%endmacro
519
520;; Default text section.
521%macro BS3_BEGIN_DEFAULT_TEXT 0
522 %if ARCH_BITS == 16
523 BS3_BEGIN_TEXT16
524 %elif ARCH_BITS == 32
525 BS3_BEGIN_TEXT32
526 %elif ARCH_BITS == 64
527 BS3_BEGIN_TEXT64
528 %else
529 %error "ARCH_BITS must be defined as either 16, 32, or 64!"
530 INVALID_ARCH_BITS
531 %endif
532%endmacro
533
534;; @}
535
536
537;
538; Now, ditch the default 'text' section and define our own NAME macro.
539;
540%ifndef ASM_FORMAT_BIN
541 BS3_BEGIN_DEFAULT_TEXT
542 BS3_BEGIN_DEFAULT_TEXT ; stupid nasm automagically repeats the segment attributes.
543%endif
544
545;; When using watcom + OMF, we're using __cdecl by default, which
546; get an underscore added in front.
547%define NAME(name) _ %+ NAME_OVERLOAD(name)
548
549
550;
551; Include the standard headers from iprt.
552;
553
554
555%include "iprt/asmdefs.mac"
556%include "iprt/x86.mac"
557
558
559;;
560; Extern macro which mangles the name using NAME().
561%macro EXTERN 1
562 extern NAME(%1)
563%endmacro
564
565;;
566; Mangles a common name according to the current cpu bit count.
567; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
568%define BS3_CMN_NM(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _c %+ __BITS__
569
570;;
571; Extern macro which mangles the common name correctly, redefining the unmangled
572; name to the mangled one for ease of use.
573;
574; @param %1 The unmangled common name.
575;
576; @remarks Must enter the segment in which this name is defined.
577;
578%macro BS3_EXTERN_CMN 1
579 extern BS3_CMN_NM(%1)
580 %undef %1
581 %define %1 BS3_CMN_NM(%1)
582%endmacro
583
584;;
585; Same as BS3_EXTERN_CMN except it picks the far variant in 16-bit code.
586;
587; @param %1 The unmangled common name.
588;
589; @remarks Must enter the segment in which this name is defined.
590;
591%macro BS3_EXTERN_CMN_FAR 1
592 extern BS3_CMN_NM_FAR(%1)
593 %undef %1
594 %define %1 BS3_CMN_NM_FAR(%1)
595%endmacro
596
597;; @def BS3_EXTERN_TMPL
598; Mangles the given name into a template specific one. For ease of use, the
599; name is redefined to the mangled one, just like BS3_EXTERN_CMN does.
600; @note Segment does not change.
601%macro BS3_EXTERN_TMPL 1
602 extern TMPL_NM(%1)
603 %undef %1
604 %define %1 TMPL_NM(%1)
605%endmacro
606
607
608;;
609; Mangles a 16-bit and 32-bit accessible data name.
610; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
611%define BS3_DATA_NM(a_Name) _ %+ a_Name
612
613;;
614; Extern macro which mangles a DATA16 symbol correctly, redefining the
615; unmangled name to the mangled one for ease of use.
616;
617; @param %1 The unmangled common name.
618;
619; @remarks Will change to the DATA16 segment, use must switch back afterwards!
620;
621%macro BS3_EXTERN_DATA16 1
622 BS3_BEGIN_DATA16
623 extern _ %+ %1
624 %undef %1
625 %xdefine %1 _ %+ %1
626%endmacro
627
628;;
629; Extern macro which mangles a BS3SYSTEM16 symbol correctly, redefining the
630; unmangled name to the mangled one for ease of use.
631;
632; @param %1 The unmangled common name.
633;
634; @remarks Will change to the SYSTEM16 segment, use must switch back afterwards!
635;
636%macro BS3_EXTERN_SYSTEM16 1
637 BS3_BEGIN_SYSTEM16
638 extern _ %+ %1
639 %undef %1
640 %xdefine %1 _ %+ %1
641%endmacro
642
643
644;;
645; Global name with ELF attributes and size.
646;
647; This differs from GLOBALNAME_EX in that it expects a mangled symbol name,
648; and allows for nasm style symbol size expressions.
649;
650; @param %1 The mangled name.
651; @param %2 Symbol attributes.
652; @param %3 The size expression.
653;
654%macro BS3_GLOBAL_NAME_EX 3
655global %1
656%1:
657%undef BS3_LAST_LABEL
658%xdefine BS3_LAST_LABEL %1
659%endmacro
660
661;;
662; Global local label.
663;
664; This should be used when switching segments and jumping to it via a local lable.
665; It makes the lable visible to the debugger and map file.
666;
667%macro BS3_GLOBAL_LOCAL_LABEL 1
668global RT_CONCAT(BS3_LAST_LABEL,%1)
669%1:
670%endmacro
671
672;;
673; Global data unmangled label.
674;
675; @param %1 The unmangled name.
676; @param %2 The size (0 is fine).
677;
678%macro BS3_GLOBAL_DATA 2
679BS3_GLOBAL_NAME_EX BS3_DATA_NM(%1), , %2
680%endmacro
681
682;;
683; Starts a procedure.
684;
685; This differs from BEGINPROC in that it expects a mangled symbol name and
686; does the NASM symbol size stuff.
687;
688; @param %1 The mangled name.
689;
690%macro BS3_PROC_BEGIN 1
691BS3_GLOBAL_NAME_EX %1, function, (%1 %+ _EndProc - %1)
692%endmacro
693
694;;
695; Ends a procedure.
696;
697; Counter part to BS3_PROC_BEGIN.
698;
699; @param %1 The mangled name.
700;
701%macro BS3_PROC_END 1
702BS3_GLOBAL_NAME_EX %1 %+ _EndProc, function hidden, (%1 %+ _EndProc - %1)
703 int3 ; handy and avoids overlapping labels.
704%endmacro
705
706
707;; @name BS3_PBC_XXX - For use as the 2nd parameter to BS3_PROC_BEGIN_CMN and BS3_PROC_BEGIN_MODE.
708;; @{
709%define BS3_PBC_NEAR 1 ;;< Only near.
710%define BS3_PBC_FAR 2 ;;< Only far.
711%define BS3_PBC_HYBRID 3 ;;< Hybrid near/far procedure, trashing AX. Use BS3_HYBRID_RET to return.
712%define BS3_PBC_HYBRID_SAFE 4 ;;< Hybrid near/far procedure, no trashing but slower. Use BS3_HYBRID_RET to return.
713%define BS3_PBC_HYBRID_0_ARGS 5 ;;< Hybrid near/far procedure, no parameters so separate far stub, no trashing, fast near calls.
714;; @}
715
716;; Internal begin procedure macro.
717;
718; @param 1 The near name.
719; @param 2 The far name
720; @param 3 BS3_PBC_XXX.
721%macro BS3_PROC_BEGIN_INT 3
722 ;%warning "BS3_PROC_BEGIN_INT:" 1=%1 2=%2 3=%3
723 %undef BS3_CUR_PROC_FLAGS
724 %if __BITS__ == 16
725 %if %3 == BS3_PBC_NEAR
726 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
727 %xdefine cbCurRetAddr 2
728 BS3_PROC_BEGIN %1
729
730 %elif %3 == BS3_PBC_FAR
731 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_FAR
732 %xdefine cbCurRetAddr 4
733 BS3_PROC_BEGIN %2
734
735 %elif %3 == BS3_PBC_HYBRID
736 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID
737 %xdefine cbCurRetAddr 4
738 BS3_GLOBAL_NAME_EX %1, function, 3
739 pop ax
740 push cs
741 push ax
742 BS3_PROC_BEGIN %2
743
744 %elif %3 == BS3_PBC_HYBRID_SAFE
745 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID_SAFE
746 %xdefine cbCurRetAddr 4
747 BS3_GLOBAL_NAME_EX %1, function, 3
748 extern Bs3CreateHybridFarRet_c16
749 call Bs3CreateHybridFarRet_c16
750 BS3_PROC_BEGIN %2
751
752 %elif %3 == BS3_PBC_HYBRID_0_ARGS
753 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
754 %xdefine cbCurRetAddr 2
755 %xdefine TMP_BEGIN_PREV_SEG BS3_CUR_SEG_BEGIN_MACRO
756
757 BS3_BEGIN_TEXT16_FARSTUBS
758 BS3_PROC_BEGIN %2
759 call %1
760 retf
761 BS3_PROC_END %2
762
763 TMP_BEGIN_PREV_SEG
764 BS3_PROC_BEGIN %1
765 %undef TMP_BEGIN_PREV_SEG
766
767 %else
768 %error BS3_PROC_BEGIN_CMN parameter 2 value %3 is not recognized.
769
770 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
771 %xdefine cbCurRetAddr 4
772 BS3_PROC_BEGIN %1
773 %endif
774 %else
775 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
776 %xdefine cbCurRetAddr xCB
777 BS3_PROC_BEGIN %1
778 %endif
779%endmacro
780
781;; Internal end procedure macro
782;
783; @param 1 The near name.
784; @param 2 The far name
785;
786%macro BS3_PROC_END_INT 2
787 %if __BITS__ == 16
788 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR
789 BS3_PROC_END %1
790 %else
791 BS3_PROC_END %2
792 %endif
793 %else
794 BS3_PROC_END %1
795 %endif
796 %undef BS3_CUR_PROC_FLAGS
797 %undef cbCurRetAddr
798%endmacro
799
800
801;; Convenience macro for defining common procedures.
802; This will emit both near and far 16-bit symbols according to parameter %2 (BS3_PBC_XXX).
803%macro BS3_PROC_BEGIN_CMN 2
804 BS3_PROC_BEGIN_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1), %2
805%endmacro
806
807;; Convenience macro for defining common procedures.
808%macro BS3_PROC_END_CMN 1
809 BS3_PROC_END_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1)
810%endmacro
811
812;;
813; Generate a safe 16-bit far stub for function %1, shuffling %2 bytes of parameters.
814;
815; This does absolutely nothing in 32-bit and 64-bit mode.
816;
817; @param 1 The function basename.
818; @param 2 The number of bytes of parameters on the stack, must be a multiple of 2.
819; @remarks Changes the segment to TEXT16.
820;
821%macro BS3_CMN_FAR_STUB 2
822 %if %2 <= 1 || (%2 & 1)
823 %error Invalid parameter frame size passed to BS3_CMN_FAR_STUB: %2
824 %endif
825 %if __BITS__ == 16
826BS3_BEGIN_TEXT16_FARSTUBS
827BS3_PROC_BEGIN_CMN %1, BS3_PBC_FAR
828 CPU 8086
829 inc bp ; Odd bp is far call indicator.
830 push bp
831 mov bp, sp
832 %assign offParam %2
833 %rep %2/2
834 push word [bp + xCB + cbCurRetAddr + offParam - 2]
835 %assign offParam offParam - 2
836 %endrep
837 call BS3_CMN_NM(%1)
838 add sp, %2
839 pop bp
840 dec bp
841 retf
842BS3_PROC_END_CMN %1
843BS3_BEGIN_TEXT16
844 %endif
845%endmacro
846
847
848;; Convenience macro for defining mode specific procedures.
849%macro BS3_PROC_BEGIN_MODE 2
850 ;%warning "BS3_PROC_BEGIN_MODE: 1=" %1 "2=" %2
851 BS3_PROC_BEGIN_INT TMPL_NM(%1), TMPL_FAR_NM(%1), %2
852%endmacro
853
854;; Convenience macro for defining mode specific procedures.
855%macro BS3_PROC_END_MODE 1
856 BS3_PROC_END_INT TMPL_NM(%1), TMPL_FAR_NM(%1)
857%endmacro
858
859;; Does a far return in 16-bit code, near return in 32-bit and 64-bit.
860; This is for use with BS3_PBC_XXX
861%macro BS3_HYBRID_RET 0-1
862 %if __BITS__ == 16
863 %if %0 > 0
864 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
865 ret %1
866 %else
867 retf %1
868 %endif
869 %else
870 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
871 ret
872 %else
873 retf
874 %endif
875 %endif
876 %else
877 %if BS3_CUR_PROC_FLAGS != BS3_PBC_NEAR
878 %error Expected BS3_CUR_PROC_FLAGS to be BS3_PBC_NEAR in non-16-bit code.
879 %endif
880 %if %0 > 0
881 ret %1
882 %else
883 ret
884 %endif
885 %endif
886%endmacro
887
888
889;;
890; Prologue hacks for 64-bit code.
891;
892; This saves the four register parameters onto the stack so we can pretend
893; the calling convention is stack based. The 64-bit calling convension is
894; the microsoft one, so this is straight forward.
895;
896; Pairs with BS3_CALL_CONV_EPILOG.
897;
898; @param %1 The number of parameters.
899;
900; @remarks Must be invoked before any stack changing instructions are emitted.
901;
902%macro BS3_CALL_CONV_PROLOG 1
903 %undef BS3_CALL_CONV_PROLOG_PARAMS
904 %define BS3_CALL_CONV_PROLOG_PARAMS %1
905 %if __BITS__ == 64
906 %if %1 >= 1
907 mov [rsp + 008h], rcx
908 %elifdef BS3_STRICT
909 and qword [rsp + 008h], 1
910 %endif
911 %if %1 >= 2
912 mov [rsp + 010h], rdx
913 %elifdef BS3_STRICT
914 and qword [rsp + 010h], 2
915 %endif
916 %if %1 >= 3
917 mov [rsp + 018h], r8
918 %elifdef BS3_STRICT
919 and qword [rsp + 018h], 3
920 %endif
921 %if %1 >= 4
922 mov [rsp + 020h], r9
923 %elifdef BS3_STRICT
924 and qword [rsp + 020h], 4
925 %endif
926 %endif
927%endmacro
928
929;;
930; Epilogue hacks for 64-bit code.
931;
932; Counter part to BS3_CALL_CONV_PROLOG.
933;
934; @param %1 The number of parameters.
935;
936; @remarks Must be invoked right before the return instruction as it uses RSP.
937;
938%macro BS3_CALL_CONV_EPILOG 1
939 %if BS3_CALL_CONV_PROLOG_PARAMS != %1
940 %error "BS3_CALL_CONV_EPILOG argument differs from BS3_CALL_CONV_PROLOG."
941 %endif
942 %if __BITS__ == 64
943 %ifdef BS3_STRICT
944 mov dword [rsp + 008h], 31h
945 mov dword [rsp + 010h], 32h
946 mov dword [rsp + 018h], 33h
947 mov dword [rsp + 020h], 34h
948 %endif
949 %endif
950%endmacro
951
952;;
953; Wrapper for the call instruction that hides calling convension differences.
954;
955; This always calls %1.
956; In 64-bit code, it will load up to 4 parameters into register.
957;
958; @param %1 The function to call (mangled).
959; @param %2 The number of parameters.
960;
961%macro BS3_CALL 2
962 %if __BITS__ == 64
963 %if %2 >= 1
964 mov rcx, [rsp]
965 %ifdef BS3_STRICT
966 and qword [rsp], 11h
967 %endif
968 %endif
969 %if %2 >= 2
970 mov rdx, [rsp + 008h]
971 %ifdef BS3_STRICT
972 and qword [rsp + 008h], 12h
973 %endif
974 %endif
975 %if %2 >= 3
976 mov r8, [rsp + 010h]
977 %ifdef BS3_STRICT
978 and qword [rsp + 010h], 13h
979 %endif
980 %endif
981 %if %2 >= 4
982 mov r9, [rsp + 018h]
983 %ifdef BS3_STRICT
984 and qword [rsp + 018h], 14h
985 %endif
986 %endif
987 %endif
988 call %1
989%endmacro
990
991
992;; @name Execution Modes
993; @{
994%define BS3_MODE_INVALID 000h
995%define BS3_MODE_RM 001h ;;< real mode.
996%define BS3_MODE_PE16 011h ;;< 16-bit protected mode kernel+tss, running 16-bit code, unpaged.
997%define BS3_MODE_PE16_32 012h ;;< 16-bit protected mode kernel+tss, running 32-bit code, unpaged.
998%define BS3_MODE_PE16_V86 018h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
999%define BS3_MODE_PE32 022h ;;< 32-bit protected mode kernel+tss, running 32-bit code, unpaged.
1000%define BS3_MODE_PE32_16 021h ;;< 32-bit protected mode kernel+tss, running 16-bit code, unpaged.
1001%define BS3_MODE_PEV86 028h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
1002%define BS3_MODE_PP16 031h ;;< 16-bit protected mode kernel+tss, running 16-bit code, paged.
1003%define BS3_MODE_PP16_32 032h ;;< 16-bit protected mode kernel+tss, running 32-bit code, paged.
1004%define BS3_MODE_PP16_V86 038h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
1005%define BS3_MODE_PP32 042h ;;< 32-bit protected mode kernel+tss, running 32-bit code, paged.
1006%define BS3_MODE_PP32_16 041h ;;< 32-bit protected mode kernel+tss, running 16-bit code, paged.
1007%define BS3_MODE_PPV86 048h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
1008%define BS3_MODE_PAE16 051h ;;< 16-bit protected mode kernel+tss, running 16-bit code, PAE paging.
1009%define BS3_MODE_PAE16_32 052h ;;< 16-bit protected mode kernel+tss, running 32-bit code, PAE paging.
1010%define BS3_MODE_PAE16_V86 058h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
1011%define BS3_MODE_PAE32 062h ;;< 32-bit protected mode kernel+tss, running 32-bit code, PAE paging.
1012%define BS3_MODE_PAE32_16 061h ;;< 32-bit protected mode kernel+tss, running 16-bit code, PAE paging.
1013%define BS3_MODE_PAEV86 068h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
1014%define BS3_MODE_LM16 071h ;;< 16-bit long mode (paged), kernel+tss always 64-bit.
1015%define BS3_MODE_LM32 072h ;;< 32-bit long mode (paged), kernel+tss always 64-bit.
1016%define BS3_MODE_LM64 074h ;;< 64-bit long mode (paged), kernel+tss always 64-bit.
1017
1018%define BS3_MODE_CODE_MASK 00fh ;;< Running code mask.
1019%define BS3_MODE_CODE_16 001h ;;< Running 16-bit code.
1020%define BS3_MODE_CODE_32 002h ;;< Running 32-bit code.
1021%define BS3_MODE_CODE_64 004h ;;< Running 64-bit code.
1022%define BS3_MODE_CODE_V86 008h ;;< Running 16-bit virtual 8086 code.
1023
1024%define BS3_MODE_SYS_MASK 0f0h ;;< kernel+tss mask.
1025%define BS3_MODE_SYS_RM 000h ;;< Real mode kernel+tss.
1026%define BS3_MODE_SYS_PE16 010h ;;< 16-bit protected mode kernel+tss.
1027%define BS3_MODE_SYS_PE32 020h ;;< 32-bit protected mode kernel+tss.
1028%define BS3_MODE_SYS_PP16 030h ;;< 16-bit paged protected mode kernel+tss.
1029%define BS3_MODE_SYS_PP32 040h ;;< 32-bit paged protected mode kernel+tss.
1030%define BS3_MODE_SYS_PAE16 050h ;;< 16-bit PAE paged protected mode kernel+tss.
1031%define BS3_MODE_SYS_PAE32 060h ;;< 32-bit PAE paged protected mode kernel+tss.
1032%define BS3_MODE_SYS_LM 070h ;;< 64-bit (paged) long mode protected mode kernel+tss.
1033
1034;; Whether the mode has paging enabled.
1035%define BS3_MODE_IS_PAGED(a_fMode) ((a_fMode) >= BS3_MODE_PP16)
1036
1037;; Whether the mode is running v8086 code.
1038%define BS3_MODE_IS_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_V86)
1039;; Whether the we're executing in real mode or v8086 mode.
1040%define BS3_MODE_IS_RM_OR_V86(a_fMode) ((a_fMode) == BS3_MODE_RM || BS3_MODE_IS_V86(a_fMode))
1041;; Whether the mode is running 16-bit code, except v8086.
1042%define BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_16)
1043;; Whether the mode is running 16-bit code (includes v8086).
1044%define BS3_MODE_IS_16BIT_CODE(a_fMode) (BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) || BS3_MODE_IS_V86(a_fMode))
1045;; Whether the mode is running 32-bit code.
1046%define BS3_MODE_IS_32BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_32)
1047;; Whether the mode is running 64-bit code.
1048%define BS3_MODE_IS_64BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_64)
1049
1050;; Whether the system is in real mode.
1051%define BS3_MODE_IS_RM_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_RM)
1052;; Whether the system is some 16-bit mode that isn't real mode.
1053%define BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE16 \
1054 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP16 \
1055 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE16)
1056;; Whether the system is some 16-bit mode (includes real mode).
1057%define BS3_MODE_IS_16BIT_SYS(a_fMode) (BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) || BS3_MODE_IS_RM_SYS(a_fMode))
1058;; Whether the system is some 32-bit mode.
1059%define BS3_MODE_IS_32BIT_SYS(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE32 \
1060 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP32 \
1061 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE32)
1062;; Whether the system is long mode.
1063%define BS3_MODE_IS_64BIT_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_LM)
1064
1065;; @}
1066
1067;; @name For mode specfic lookups:
1068;; %[BS3_MODE_NM %+ BS3_MODE_PE32](SomeBaseName)
1069;; %[BS3_MODE_LNAME_ %+ TMPL_MODE]
1070;; @{
1071%define BS3_MODE_NM_001h(a_Name) _ %+ a_Name %+ _rm
1072%define BS3_MODE_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1073%define BS3_MODE_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1074%define BS3_MODE_NM_018h(a_Name) _ %+ a_Name %+ _pe16_v86
1075%define BS3_MODE_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1076%define BS3_MODE_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1077%define BS3_MODE_NM_028h(a_Name) _ %+ a_Name %+ _pev86
1078%define BS3_MODE_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1079%define BS3_MODE_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1080%define BS3_MODE_NM_038h(a_Name) _ %+ a_Name %+ _pp16_v86
1081%define BS3_MODE_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1082%define BS3_MODE_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1083%define BS3_MODE_NM_048h(a_Name) _ %+ a_Name %+ _ppv86
1084%define BS3_MODE_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1085%define BS3_MODE_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1086%define BS3_MODE_NM_058h(a_Name) _ %+ a_Name %+ _pae16_v86
1087%define BS3_MODE_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1088%define BS3_MODE_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1089%define BS3_MODE_NM_068h(a_Name) _ %+ a_Name %+ _paev86
1090%define BS3_MODE_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1091%define BS3_MODE_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1092%define BS3_MODE_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1093
1094%define BS3_MODE_LNAME_001h rm
1095%define BS3_MODE_LNAME_011h pe16
1096%define BS3_MODE_LNAME_012h pe16_32
1097%define BS3_MODE_LNAME_018h pe16_v86
1098%define BS3_MODE_LNAME_022h pe32
1099%define BS3_MODE_LNAME_021h pe32_16
1100%define BS3_MODE_LNAME_028h pev86
1101%define BS3_MODE_LNAME_031h pp16
1102%define BS3_MODE_LNAME_032h pp16_32
1103%define BS3_MODE_LNAME_038h pp16_v86
1104%define BS3_MODE_LNAME_042h pp32
1105%define BS3_MODE_LNAME_041h pp32_16
1106%define BS3_MODE_LNAME_048h ppv86
1107%define BS3_MODE_LNAME_051h pae16
1108%define BS3_MODE_LNAME_052h pae16_32
1109%define BS3_MODE_LNAME_058h pae16_v86
1110%define BS3_MODE_LNAME_062h pae32
1111%define BS3_MODE_LNAME_061h pae32_16
1112%define BS3_MODE_LNAME_068h paev86
1113%define BS3_MODE_LNAME_071h lm16
1114%define BS3_MODE_LNAME_072h lm32
1115%define BS3_MODE_LNAME_074h lm64
1116
1117%define BS3_MODE_UNAME_001h RM
1118%define BS3_MODE_UNAME_011h PE16
1119%define BS3_MODE_UNAME_012h PE16_32
1120%define BS3_MODE_UNAME_018h PE16_V86
1121%define BS3_MODE_UNAME_022h PE32
1122%define BS3_MODE_UNAME_021h PE32_16
1123%define BS3_MODE_UNAME_028h PEV86
1124%define BS3_MODE_UNAME_031h PP16
1125%define BS3_MODE_UNAME_032h PP16_32
1126%define BS3_MODE_UNAME_038h PP16_V86
1127%define BS3_MODE_UNAME_042h PP32
1128%define BS3_MODE_UNAME_041h PP32_16
1129%define BS3_MODE_UNAME_048h PPV86
1130%define BS3_MODE_UNAME_051h PAE16
1131%define BS3_MODE_UNAME_052h PAE16_32
1132%define BS3_MODE_UNAME_058h PAE16_V86
1133%define BS3_MODE_UNAME_062h PAE32
1134%define BS3_MODE_UNAME_061h PAE32_16
1135%define BS3_MODE_UNAME_068h PAEV86
1136%define BS3_MODE_UNAME_071h LM16
1137%define BS3_MODE_UNAME_072h LM32
1138%define BS3_MODE_UNAME_074h LM64
1139
1140%define BS3_MODE_UNDERSCORE_001h _
1141%define BS3_MODE_UNDERSCORE_011h _
1142%define BS3_MODE_UNDERSCORE_012h _
1143%define BS3_MODE_UNDERSCORE_018h _
1144%define BS3_MODE_UNDERSCORE_022h _
1145%define BS3_MODE_UNDERSCORE_021h _
1146%define BS3_MODE_UNDERSCORE_028h _
1147%define BS3_MODE_UNDERSCORE_031h _
1148%define BS3_MODE_UNDERSCORE_032h _
1149%define BS3_MODE_UNDERSCORE_038h _
1150%define BS3_MODE_UNDERSCORE_042h _
1151%define BS3_MODE_UNDERSCORE_041h _
1152%define BS3_MODE_UNDERSCORE_048h _
1153%define BS3_MODE_UNDERSCORE_051h _
1154%define BS3_MODE_UNDERSCORE_052h _
1155%define BS3_MODE_UNDERSCORE_058h _
1156%define BS3_MODE_UNDERSCORE_062h _
1157%define BS3_MODE_UNDERSCORE_061h _
1158%define BS3_MODE_UNDERSCORE_068h _
1159%define BS3_MODE_UNDERSCORE_071h _
1160%define BS3_MODE_UNDERSCORE_072h _
1161%define BS3_MODE_UNDERSCORE_074h _
1162
1163%define BS3_MODE_CNAME_001h c16
1164%define BS3_MODE_CNAME_011h c16
1165%define BS3_MODE_CNAME_012h c32
1166%define BS3_MODE_CNAME_018h c16
1167%define BS3_MODE_CNAME_022h c32
1168%define BS3_MODE_CNAME_021h c16
1169%define BS3_MODE_CNAME_028h c16
1170%define BS3_MODE_CNAME_031h c16
1171%define BS3_MODE_CNAME_032h c32
1172%define BS3_MODE_CNAME_038h c16
1173%define BS3_MODE_CNAME_042h c32
1174%define BS3_MODE_CNAME_041h c16
1175%define BS3_MODE_CNAME_048h c16
1176%define BS3_MODE_CNAME_051h c16
1177%define BS3_MODE_CNAME_052h c32
1178%define BS3_MODE_CNAME_058h c16
1179%define BS3_MODE_CNAME_062h c32
1180%define BS3_MODE_CNAME_061h c16
1181%define BS3_MODE_CNAME_068h c16
1182%define BS3_MODE_CNAME_071h c16
1183%define BS3_MODE_CNAME_072h c32
1184%define BS3_MODE_CNAME_074h c64
1185;; @}
1186
1187;; @name For getting the ring-0 mode for v86 modes: %[BS3_MODE_R0_NM_001h %+ TMPL_MODE](Bs3SwitchToRM)
1188;; @{
1189%define BS3_MODE_R0_NM_001h(a_Name) _ %+ a_Name %+ _rm
1190%define BS3_MODE_R0_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1191%define BS3_MODE_R0_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1192%define BS3_MODE_R0_NM_018h(a_Name) _ %+ a_Name %+ _pe16
1193%define BS3_MODE_R0_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1194%define BS3_MODE_R0_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1195%define BS3_MODE_R0_NM_028h(a_Name) _ %+ a_Name %+ _pe32_16
1196%define BS3_MODE_R0_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1197%define BS3_MODE_R0_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1198%define BS3_MODE_R0_NM_038h(a_Name) _ %+ a_Name %+ _pp16
1199%define BS3_MODE_R0_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1200%define BS3_MODE_R0_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1201%define BS3_MODE_R0_NM_048h(a_Name) _ %+ a_Name %+ _pp32_16
1202%define BS3_MODE_R0_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1203%define BS3_MODE_R0_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1204%define BS3_MODE_R0_NM_058h(a_Name) _ %+ a_Name %+ _pae16
1205%define BS3_MODE_R0_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1206%define BS3_MODE_R0_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1207%define BS3_MODE_R0_NM_068h(a_Name) _ %+ a_Name %+ _pae32_16
1208%define BS3_MODE_R0_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1209%define BS3_MODE_R0_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1210%define BS3_MODE_R0_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1211;; @}
1212
1213
1214;;
1215; Includes the file %1 with TMPL_MODE set to all possible value.
1216; @param 1 Double quoted include file name.
1217%macro BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES 1
1218 %define BS3_INSTANTIATING_MODE
1219 %define BS3_INSTANTIATING_ALL_MODES
1220
1221 %define TMPL_MODE BS3_MODE_RM
1222 %include %1
1223
1224 %define TMPL_MODE BS3_MODE_PE16
1225 %include %1
1226 %define TMPL_MODE BS3_MODE_PE16_32
1227 %include %1
1228 %define TMPL_MODE BS3_MODE_PE16_V86
1229 %include %1
1230
1231 %define TMPL_MODE BS3_MODE_PE32
1232 %include %1
1233 %define TMPL_MODE BS3_MODE_PE32_16
1234 %include %1
1235 %define TMPL_MODE BS3_MODE_PEV86
1236 %include %1
1237
1238 %define TMPL_MODE BS3_MODE_PP16
1239 %include %1
1240 %define TMPL_MODE BS3_MODE_PP16_32
1241 %include %1
1242 %define TMPL_MODE BS3_MODE_PP16_V86
1243 %include %1
1244
1245 %define TMPL_MODE BS3_MODE_PP32
1246 %include %1
1247 %define TMPL_MODE BS3_MODE_PP32_16
1248 %include %1
1249 %define TMPL_MODE BS3_MODE_PPV86
1250 %include %1
1251
1252 %define TMPL_MODE BS3_MODE_PAE16
1253 %include %1
1254 %define TMPL_MODE BS3_MODE_PAE16_32
1255 %include %1
1256 %define TMPL_MODE BS3_MODE_PAE16_V86
1257 %include %1
1258
1259 %define TMPL_MODE BS3_MODE_PAE32
1260 %include %1
1261 %define TMPL_MODE BS3_MODE_PAE32_16
1262 %include %1
1263 %define TMPL_MODE BS3_MODE_PAEV86
1264 %include %1
1265
1266 %define TMPL_MODE BS3_MODE_LM16
1267 %include %1
1268 %define TMPL_MODE BS3_MODE_LM32
1269 %include %1
1270 %define TMPL_MODE BS3_MODE_LM64
1271 %include %1
1272
1273 %undef BS3_INSTANTIATING_MODE
1274 %undef BS3_INSTANTIATING_ALL_MODES
1275%endmacro
1276
1277
1278;;
1279; Includes the file %1 with TMPL_MODE set to all but the "weird" value.
1280; @param 1 Double quoted include file name.
1281%macro BS3_INSTANTIATE_TEMPLATE_ESSENTIALS 1
1282 %define BS3_INSTANTIATING_MODE
1283 %define BS3_INSTANTIATING_ESSENTIAL_MODES
1284
1285 %define TMPL_MODE BS3_MODE_RM
1286 %include %1
1287
1288 %define TMPL_MODE BS3_MODE_PE16
1289 %include %1
1290
1291 %define TMPL_MODE BS3_MODE_PE32
1292 %include %1
1293 %define TMPL_MODE BS3_MODE_PEV86
1294 %include %1
1295
1296 %define TMPL_MODE BS3_MODE_PP16
1297 %include %1
1298
1299 %define TMPL_MODE BS3_MODE_PP32
1300 %include %1
1301 %define TMPL_MODE BS3_MODE_PPV86
1302 %include %1
1303
1304 %define TMPL_MODE BS3_MODE_PAE16
1305 %include %1
1306
1307 %define TMPL_MODE BS3_MODE_PAE32
1308 %include %1
1309 %define TMPL_MODE BS3_MODE_PAEV86
1310 %include %1
1311
1312 %define TMPL_MODE BS3_MODE_LM16
1313 %include %1
1314 %define TMPL_MODE BS3_MODE_LM32
1315 %include %1
1316 %define TMPL_MODE BS3_MODE_LM64
1317 %include %1
1318
1319 %undef BS3_INSTANTIATING_MODE
1320 %undef BS3_INSTANTIATING_ESSENTIAL_MODES
1321%endmacro
1322
1323;;
1324; Includes the file %1 with TMPL_MODE set to a 16-bit, a 32-bit and a 64-bit value.
1325; @param 1 Double quoted include file name.
1326%macro BS3_INSTANTIATE_COMMON_TEMPLATE 1
1327 %define BS3_INSTANTIATING_CMN
1328
1329 %define TMPL_MODE BS3_MODE_RM
1330 %include %1
1331 %define TMPL_MODE BS3_MODE_PE32
1332 %include %1
1333 %define TMPL_MODE BS3_MODE_LM64
1334 %include %1
1335
1336 %undef BS3_INSTANTIATING_CMN
1337%endmacro
1338
1339
1340;; @name Static Memory Allocation
1341; @{
1342;; The flat load address for the code after the bootsector.
1343%define BS3_ADDR_LOAD 010000h
1344;; Where we save the boot registers during init.
1345; Located right before the code.
1346%define BS3_ADDR_REG_SAVE (BS3_ADDR_LOAD - BS3REGCTX_size - 8)
1347;; Where the stack starts (initial RSP value).
1348; Located 16 bytes (assumed by boot sector) before the saved registers. SS.BASE=0.
1349%define BS3_ADDR_STACK (BS3_ADDR_REG_SAVE - 16)
1350;; The ring-0 stack (8KB) for ring transitions.
1351%define BS3_ADDR_STACK_R0 006000h
1352;; The ring-1 stack (8KB) for ring transitions.
1353%define BS3_ADDR_STACK_R1 004000h
1354;; The ring-2 stack (8KB) for ring transitions.
1355%define BS3_ADDR_STACK_R2 002000h
1356;; IST1 ring-0 stack for long mode (4KB), used for double faults elsewhere.
1357%define BS3_ADDR_STACK_R0_IST1 009000h
1358;; IST2 ring-0 stack for long mode (3KB), used for spare 0 stack elsewhere.
1359%define BS3_ADDR_STACK_R0_IST2 008000h
1360;; IST3 ring-0 stack for long mode (1KB).
1361%define BS3_ADDR_STACK_R0_IST3 007400h
1362;; IST4 ring-0 stack for long mode (1KB), used for spare 1 stack elsewhere.
1363%define BS3_ADDR_STACK_R0_IST4 007000h
1364;; IST5 ring-0 stack for long mode (1KB).
1365%define BS3_ADDR_STACK_R0_IST5 006c00h
1366;; IST6 ring-0 stack for long mode (1KB).
1367%define BS3_ADDR_STACK_R0_IST6 006800h
1368;; IST7 ring-0 stack for long mode (1KB).
1369%define BS3_ADDR_STACK_R0_IST7 006400h
1370
1371;; The base address of the BS3TEXT16 segment (same as BS3_LOAD_ADDR).
1372;; @sa BS3_SEL_TEXT16
1373%define BS3_ADDR_BS3TEXT16 010000h
1374;; The base address of the BS3SYSTEM16 segment.
1375;; @sa BS3_SEL_SYSTEM16
1376%define BS3_ADDR_BS3SYSTEM16 020000h
1377;; The base address of the BS3DATA16/BS3KIT_GRPNM_DATA16 segment.
1378;; @sa BS3_SEL_DATA16
1379%define BS3_ADDR_BS3DATA16 029000h
1380;; @}
1381
1382
1383;;
1384; BS3 register context. Used by traps and such.
1385;
1386struc BS3REGCTX
1387 .rax resq 1 ; BS3REG rax; /**< 0x00 */
1388 .rcx resq 1 ; BS3REG rcx; /**< 0x08 */
1389 .rdx resq 1 ; BS3REG rdx; /**< 0x10 */
1390 .rbx resq 1 ; BS3REG rbx; /**< 0x18 */
1391 .rsp resq 1 ; BS3REG rsp; /**< 0x20 */
1392 .rbp resq 1 ; BS3REG rbp; /**< 0x28 */
1393 .rsi resq 1 ; BS3REG rsi; /**< 0x30 */
1394 .rdi resq 1 ; BS3REG rdi; /**< 0x38 */
1395 .r8 resq 1 ; BS3REG r8; /**< 0x40 */
1396 .r9 resq 1 ; BS3REG r9; /**< 0x48 */
1397 .r10 resq 1 ; BS3REG r10; /**< 0x50 */
1398 .r11 resq 1 ; BS3REG r11; /**< 0x58 */
1399 .r12 resq 1 ; BS3REG r12; /**< 0x60 */
1400 .r13 resq 1 ; BS3REG r13; /**< 0x68 */
1401 .r14 resq 1 ; BS3REG r14; /**< 0x70 */
1402 .r15 resq 1 ; BS3REG r15; /**< 0x78 */
1403 .rflags resq 1 ; BS3REG rflags; /**< 0x80 */
1404 .rip resq 1 ; BS3REG rip; /**< 0x88 */
1405 .cs resw 1 ; uint16_t cs; /**< 0x90 */
1406 .ds resw 1 ; uint16_t ds; /**< 0x92 */
1407 .es resw 1 ; uint16_t es; /**< 0x94 */
1408 .fs resw 1 ; uint16_t fs; /**< 0x96 */
1409 .gs resw 1 ; uint16_t gs; /**< 0x98 */
1410 .ss resw 1 ; uint16_t ss; /**< 0x9a */
1411 .tr resw 1 ; uint16_t tr; /**< 0x9c */
1412 .ldtr resw 1 ; uint16_t ldtr; /**< 0x9e */
1413 .bMode resb 1 ; uint8_t bMode; /**< 0xa0: BS3_MODE_XXX. */
1414 .bCpl resb 1 ; uint8_t bCpl; /**< 0xa1: 0-3, 0 is used for real mode. */
1415 .fbFlags resb 1 ; uint8_t fbFlags; /**< 0xa2: BS3REG_CTX_F_XXX */
1416 .abPadding resb 5 ; uint8_t abPadding[5]; /**< 0xa4 */
1417 .cr0 resq 1 ; BS3REG cr0; /**< 0xa8 */
1418 .cr2 resq 1 ; BS3REG cr2; /**< 0xb0 */
1419 .cr3 resq 1 ; BS3REG cr3; /**< 0xb8 */
1420 .cr4 resq 1 ; BS3REG cr4; /**< 0xc0 */
1421 .uUnused resq 1 ; BS3REG uUnused; /**< 0xc8 */
1422endstruc
1423AssertCompileSize(BS3REGCTX, 0xd0)
1424
1425;; @name BS3REG_CTX_F_XXX - BS3REGCTX::fbFlags masks.
1426; @{
1427;; The CR0 is MSW (only low 16-bit). */
1428%define BS3REG_CTX_F_NO_CR0_IS_MSW 0x01
1429;; No CR2 and CR3 values. Not in CPL 0 or CPU too old for CR2 & CR3.
1430%define BS3REG_CTX_F_NO_CR2_CR3 0x02
1431;; No CR4 value. The CPU is too old for CR4.
1432%define BS3REG_CTX_F_NO_CR4 0x04
1433;; No TR and LDTR values. Context gathered in real mode or v8086 mode.
1434%define BS3REG_CTX_F_NO_TR_LDTR 0x08
1435;; The context doesn't have valid values for AMD64 GPR extensions.
1436%define BS3REG_CTX_F_NO_AMD64 0x10
1437;; @}
1438
1439
1440;; @name Flags for Bs3RegCtxRestore
1441; @{
1442;; Skip restoring the CRx registers.
1443%define BS3REGCTXRESTORE_F_SKIP_CRX 1
1444;; Sets g_fBs3TrapNoV86Assist.
1445%define BS3REGCTXRESTORE_F_NO_V86_ASSIST 2
1446;; @}
1447
1448
1449;;
1450; BS3 extended register context (FPU, SSE, AVX, ++)
1451;
1452struc BS3EXTCTX
1453 .u16Magic resw 1 ; uint16_t u16Magic;
1454 .cb resw 1 ; uint16_t cb;
1455 .enmMethod resb 1 ; uint8_t enmMethod;
1456 alignb 8
1457 .fXcr0Nominal resq 1 ; uint64_t fXcr0Nominal;
1458 .fXcr0Saved resq 1 ; uint64_t fXcr0Saved;
1459 alignb 64
1460 .Ctx resb 512
1461endstruc
1462%define BS3EXTCTXMETHOD_ANCIENT 1
1463%define BS3EXTCTXMETHOD_FXSAVE 2
1464%define BS3EXTCTXMETHOD_XSAVE 3
1465
1466;;
1467; BS3 Trap Frame.
1468;
1469struc BS3TRAPFRAME
1470 .bXcpt resb 1
1471 .cbIretFrame resb 1
1472 .uHandlerCs resw 1
1473 .uHandlerSs resw 1
1474 .usAlignment resw 1
1475 .uHandlerRsp resq 1
1476 .fHandlerRfl resq 1
1477 .uErrCd resq 1
1478 .Ctx resb BS3REGCTX_size
1479endstruc
1480AssertCompileSize(BS3TRAPFRAME, 0x20 + 0xd0)
1481
1482;;
1483; Trap record.
1484;
1485struc BS3TRAPREC
1486 ;; The trap location relative to the base address given at
1487 ; registration time.
1488 .offWhere resd 1
1489 ;; What to add to .offWhere to calculate the resume address.
1490 .offResumeAddend resb 1
1491 ;; The trap number.
1492 .u8TrapNo resb 1
1493 ;; The error code if the trap takes one.
1494 .u16ErrCd resw 1
1495endstruc
1496
1497;; The size shift.
1498%define BS3TRAPREC_SIZE_SHIFT 3
1499
1500
1501;; The system call vector.
1502%define BS3_TRAP_SYSCALL 20h
1503
1504;; @name System call numbers (ax)
1505;; @note Pointers are always passed in cx:xDI.
1506;; @{
1507;; Print char (cl).
1508%define BS3_SYSCALL_PRINT_CHR 0001h
1509;; Print string (pointer in cx:xDI, length in xDX).
1510%define BS3_SYSCALL_PRINT_STR 0002h
1511;; Switch to ring-0.
1512%define BS3_SYSCALL_TO_RING0 0003h
1513;; Switch to ring-1.
1514%define BS3_SYSCALL_TO_RING1 0004h
1515;; Switch to ring-2.
1516%define BS3_SYSCALL_TO_RING2 0005h
1517;; Switch to ring-3.
1518%define BS3_SYSCALL_TO_RING3 0006h
1519;; Restore context (pointer in cx:xDI, flags in dx).
1520%define BS3_SYSCALL_RESTORE_CTX 0007h
1521;; Set DRx register (value in ESI, register number in dl).
1522%define BS3_SYSCALL_SET_DRX 0008h
1523;; GET DRx register (register number in dl, value returned in ax:dx).
1524%define BS3_SYSCALL_GET_DRX 0009h
1525;; Set CRx register (value in ESI, register number in dl).
1526%define BS3_SYSCALL_SET_CRX 000ah
1527;; Get CRx register (register number in dl, value returned in ax:dx).
1528%define BS3_SYSCALL_GET_CRX 000bh
1529;; Set the task register (value in dx). */
1530%define BS3_SYSCALL_SET_TR 000ch
1531;; Get the task register (value returned in ax).
1532%define BS3_SYSCALL_GET_TR 000dh
1533;; Set the LDT register (value in dx).
1534%define BS3_SYSCALL_SET_LDTR 000eh
1535;; Get the LDT register (value returned in ax).
1536%define BS3_SYSCALL_GET_LDTR 000fh
1537;; Set XCR0 register (value in edx:esi).
1538%define BS3_SYSCALL_SET_XCR0 0010h
1539;; Get XCR0 register (value returned in edx:eax).
1540%define BS3_SYSCALL_GET_XCR0 0011h
1541;; The last system call value.
1542%define BS3_SYSCALL_LAST BS3_SYSCALL_GET_XCR0
1543;; @}
1544
1545
1546
1547;; @name BS3_SEL_XXX - GDT selectors
1548;; @{
1549
1550%define BS3_SEL_LDT 0010h ;;< The LDT selector (requires setting up).
1551%define BS3_SEL_TSS16 0020h ;;< The 16-bit TSS selector.
1552%define BS3_SEL_TSS16_DF 0028h ;;< The 16-bit TSS selector for double faults.
1553%define BS3_SEL_TSS16_SPARE0 0030h ;;< The 16-bit TSS selector for testing.
1554%define BS3_SEL_TSS16_SPARE1 0038h ;;< The 16-bit TSS selector for testing.
1555%define BS3_SEL_TSS32 0040h ;;< The 32-bit TSS selector.
1556%define BS3_SEL_TSS32_DF 0048h ;;< The 32-bit TSS selector for double faults.
1557%define BS3_SEL_TSS32_SPARE0 0050h ;;< The 32-bit TSS selector for testing.
1558%define BS3_SEL_TSS32_SPARE1 0058h ;;< The 32-bit TSS selector for testing.
1559%define BS3_SEL_TSS32_IOBP_IRB 0060h ;;< The 32-bit TSS selector with I/O permission and interrupt redirection bitmaps.
1560%define BS3_SEL_TSS32_IRB 0068h ;;< The 32-bit TSS selector with only interrupt redirection bitmap (IOPB stripped by limit).
1561%define BS3_SEL_TSS64 0070h ;;< The 64-bit TSS selector.
1562%define BS3_SEL_TSS64_SPARE0 0080h ;;< The 64-bit TSS selector.
1563%define BS3_SEL_TSS64_SPARE1 0090h ;;< The 64-bit TSS selector.
1564%define BS3_SEL_TSS64_IOBP 00a0h ;;< The 64-bit TSS selector.
1565
1566%define BS3_SEL_RMTEXT16_CS 00e0h ;;< Conforming code selector for accessing the BS3RMTEXT16 segment. Runtime config.
1567%define BS3_SEL_X0TEXT16_CS 00e8h ;;< Conforming code selector for accessing the BS3X0TEXT16 segment. Runtime config.
1568%define BS3_SEL_X1TEXT16_CS 00f0h ;;< Conforming code selector for accessing the BS3X1TEXT16 segment. Runtime config.
1569%define BS3_SEL_VMMDEV_MMIO16 00f8h ;;< Selector for accessing the VMMDev MMIO segment at 0100000h from 16-bit code.
1570
1571%define BS3_SEL_RING_SHIFT 8 ;;< For the formula: BS3_SEL_R0_XXX + ((cs & 3) << BS3_SEL_RING_SHIFT)
1572
1573%define BS3_SEL_R0_FIRST 0100h ;;< The first selector in the ring-0 block.
1574%define BS3_SEL_R0_CS16 0100h ;;< ring-0: 16-bit code selector, base 0x10000.
1575%define BS3_SEL_R0_DS16 0108h ;;< ring-0: 16-bit data selector, base 0x23000.
1576%define BS3_SEL_R0_SS16 0110h ;;< ring-0: 16-bit stack selector, base 0x00000.
1577%define BS3_SEL_R0_CS32 0118h ;;< ring-0: 32-bit flat code selector.
1578%define BS3_SEL_R0_DS32 0120h ;;< ring-0: 32-bit flat data selector.
1579%define BS3_SEL_R0_SS32 0128h ;;< ring-0: 32-bit flat stack selector.
1580%define BS3_SEL_R0_CS64 0130h ;;< ring-0: 64-bit flat code selector.
1581%define BS3_SEL_R0_DS64 0138h ;;< ring-0: 64-bit flat data & stack selector.
1582%define BS3_SEL_R0_CS16_EO 0140h ;;< ring-0: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1583%define BS3_SEL_R0_CS16_CNF 0148h ;;< ring-0: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1584%define BS3_SEL_R0_CS16_CNF_EO 0150h ;;< ring-0: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1585%define BS3_SEL_R0_CS32_EO 0158h ;;< ring-0: 32-bit execute-only code selector, not accessed, flat.
1586%define BS3_SEL_R0_CS32_CNF 0160h ;;< ring-0: 32-bit conforming code selector, not accessed, flat.
1587%define BS3_SEL_R0_CS32_CNF_EO 0168h ;;< ring-0: 32-bit execute-only conforming code selector, not accessed, flat.
1588%define BS3_SEL_R0_CS64_EO 0170h ;;< ring-0: 64-bit execute-only code selector, not accessed, flat.
1589%define BS3_SEL_R0_CS64_CNF 0178h ;;< ring-0: 64-bit conforming code selector, not accessed, flat.
1590%define BS3_SEL_R0_CS64_CNF_EO 0180h ;;< ring-0: 64-bit execute-only conforming code selector, not accessed, flat.
1591
1592%define BS3_SEL_R1_FIRST 0200h ;;< The first selector in the ring-1 block.
1593%define BS3_SEL_R1_CS16 0200h ;;< ring-1: 16-bit code selector, base 0x10000.
1594%define BS3_SEL_R1_DS16 0208h ;;< ring-1: 16-bit data selector, base 0x23000.
1595%define BS3_SEL_R1_SS16 0210h ;;< ring-1: 16-bit stack selector, base 0x00000.
1596%define BS3_SEL_R1_CS32 0218h ;;< ring-1: 32-bit flat code selector.
1597%define BS3_SEL_R1_DS32 0220h ;;< ring-1: 32-bit flat data selector.
1598%define BS3_SEL_R1_SS32 0228h ;;< ring-1: 32-bit flat stack selector.
1599%define BS3_SEL_R1_CS64 0230h ;;< ring-1: 64-bit flat code selector.
1600%define BS3_SEL_R1_DS64 0238h ;;< ring-1: 64-bit flat data & stack selector.
1601%define BS3_SEL_R1_CS16_EO 0240h ;;< ring-1: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1602%define BS3_SEL_R1_CS16_CNF 0248h ;;< ring-1: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1603%define BS3_SEL_R1_CS16_CNF_EO 0250h ;;< ring-1: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1604%define BS3_SEL_R1_CS32_EO 0258h ;;< ring-1: 32-bit execute-only code selector, not accessed, flat.
1605%define BS3_SEL_R1_CS32_CNF 0260h ;;< ring-1: 32-bit conforming code selector, not accessed, flat.
1606%define BS3_SEL_R1_CS32_CNF_EO 0268h ;;< ring-1: 32-bit execute-only conforming code selector, not accessed, flat.
1607%define BS3_SEL_R1_CS64_EO 0270h ;;< ring-1: 64-bit execute-only code selector, not accessed, flat.
1608%define BS3_SEL_R1_CS64_CNF 0278h ;;< ring-1: 64-bit conforming code selector, not accessed, flat.
1609%define BS3_SEL_R1_CS64_CNF_EO 0280h ;;< ring-1: 64-bit execute-only conforming code selector, not accessed, flat.
1610
1611%define BS3_SEL_R2_FIRST 0300h ;;< The first selector in the ring-2 block.
1612%define BS3_SEL_R2_CS16 0300h ;;< ring-2: 16-bit code selector, base 0x10000.
1613%define BS3_SEL_R2_DS16 0308h ;;< ring-2: 16-bit data selector, base 0x23000.
1614%define BS3_SEL_R2_SS16 0310h ;;< ring-2: 16-bit stack selector, base 0x00000.
1615%define BS3_SEL_R2_CS32 0318h ;;< ring-2: 32-bit flat code selector.
1616%define BS3_SEL_R2_DS32 0320h ;;< ring-2: 32-bit flat data selector.
1617%define BS3_SEL_R2_SS32 0328h ;;< ring-2: 32-bit flat stack selector.
1618%define BS3_SEL_R2_CS64 0330h ;;< ring-2: 64-bit flat code selector.
1619%define BS3_SEL_R2_DS64 0338h ;;< ring-2: 64-bit flat data & stack selector.
1620%define BS3_SEL_R2_CS16_EO 0340h ;;< ring-2: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1621%define BS3_SEL_R2_CS16_CNF 0348h ;;< ring-2: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1622%define BS3_SEL_R2_CS16_CNF_EO 0350h ;;< ring-2: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1623%define BS3_SEL_R2_CS32_EO 0358h ;;< ring-2: 32-bit execute-only code selector, not accessed, flat.
1624%define BS3_SEL_R2_CS32_CNF 0360h ;;< ring-2: 32-bit conforming code selector, not accessed, flat.
1625%define BS3_SEL_R2_CS32_CNF_EO 0368h ;;< ring-2: 32-bit execute-only conforming code selector, not accessed, flat.
1626%define BS3_SEL_R2_CS64_EO 0370h ;;< ring-2: 64-bit execute-only code selector, not accessed, flat.
1627%define BS3_SEL_R2_CS64_CNF 0378h ;;< ring-2: 64-bit conforming code selector, not accessed, flat.
1628%define BS3_SEL_R2_CS64_CNF_EO 0380h ;;< ring-2: 64-bit execute-only conforming code selector, not accessed, flat.
1629
1630%define BS3_SEL_R3_FIRST 0400h ;;< The first selector in the ring-3 block.
1631%define BS3_SEL_R3_CS16 0400h ;;< ring-3: 16-bit code selector, base 0x10000.
1632%define BS3_SEL_R3_DS16 0408h ;;< ring-3: 16-bit data selector, base 0x23000.
1633%define BS3_SEL_R3_SS16 0410h ;;< ring-3: 16-bit stack selector, base 0x00000.
1634%define BS3_SEL_R3_CS32 0418h ;;< ring-3: 32-bit flat code selector.
1635%define BS3_SEL_R3_DS32 0420h ;;< ring-3: 32-bit flat data selector.
1636%define BS3_SEL_R3_SS32 0428h ;;< ring-3: 32-bit flat stack selector.
1637%define BS3_SEL_R3_CS64 0430h ;;< ring-3: 64-bit flat code selector.
1638%define BS3_SEL_R3_DS64 0438h ;;< ring-3: 64-bit flat data & stack selector.
1639%define BS3_SEL_R3_CS16_EO 0440h ;;< ring-3: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1640%define BS3_SEL_R3_CS16_CNF 0448h ;;< ring-3: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1641%define BS3_SEL_R3_CS16_CNF_EO 0450h ;;< ring-3: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1642%define BS3_SEL_R3_CS32_EO 0458h ;;< ring-3: 32-bit execute-only code selector, not accessed, flat.
1643%define BS3_SEL_R3_CS32_CNF 0460h ;;< ring-3: 32-bit conforming code selector, not accessed, flat.
1644%define BS3_SEL_R3_CS32_CNF_EO 0468h ;;< ring-3: 32-bit execute-only conforming code selector, not accessed, flat.
1645%define BS3_SEL_R3_CS64_EO 0470h ;;< ring-3: 64-bit execute-only code selector, not accessed, flat.
1646%define BS3_SEL_R3_CS64_CNF 0478h ;;< ring-3: 64-bit conforming code selector, not accessed, flat.
1647%define BS3_SEL_R3_CS64_CNF_EO 0480h ;;< ring-3: 64-bit execute-only conforming code selector, not accessed, flat.
1648
1649%define BS3_SEL_SPARE_FIRST 0500h ;;< The first selector in the spare block
1650%define BS3_SEL_SPARE_00 0500h ;;< Spare selector number 00h.
1651%define BS3_SEL_SPARE_01 0508h ;;< Spare selector number 01h.
1652%define BS3_SEL_SPARE_02 0510h ;;< Spare selector number 02h.
1653%define BS3_SEL_SPARE_03 0518h ;;< Spare selector number 03h.
1654%define BS3_SEL_SPARE_04 0520h ;;< Spare selector number 04h.
1655%define BS3_SEL_SPARE_05 0528h ;;< Spare selector number 05h.
1656%define BS3_SEL_SPARE_06 0530h ;;< Spare selector number 06h.
1657%define BS3_SEL_SPARE_07 0538h ;;< Spare selector number 07h.
1658%define BS3_SEL_SPARE_08 0540h ;;< Spare selector number 08h.
1659%define BS3_SEL_SPARE_09 0548h ;;< Spare selector number 09h.
1660%define BS3_SEL_SPARE_0a 0550h ;;< Spare selector number 0ah.
1661%define BS3_SEL_SPARE_0b 0558h ;;< Spare selector number 0bh.
1662%define BS3_SEL_SPARE_0c 0560h ;;< Spare selector number 0ch.
1663%define BS3_SEL_SPARE_0d 0568h ;;< Spare selector number 0dh.
1664%define BS3_SEL_SPARE_0e 0570h ;;< Spare selector number 0eh.
1665%define BS3_SEL_SPARE_0f 0578h ;;< Spare selector number 0fh.
1666%define BS3_SEL_SPARE_10 0580h ;;< Spare selector number 10h.
1667%define BS3_SEL_SPARE_11 0588h ;;< Spare selector number 11h.
1668%define BS3_SEL_SPARE_12 0590h ;;< Spare selector number 12h.
1669%define BS3_SEL_SPARE_13 0598h ;;< Spare selector number 13h.
1670%define BS3_SEL_SPARE_14 05a0h ;;< Spare selector number 14h.
1671%define BS3_SEL_SPARE_15 05a8h ;;< Spare selector number 15h.
1672%define BS3_SEL_SPARE_16 05b0h ;;< Spare selector number 16h.
1673%define BS3_SEL_SPARE_17 05b8h ;;< Spare selector number 17h.
1674%define BS3_SEL_SPARE_18 05c0h ;;< Spare selector number 18h.
1675%define BS3_SEL_SPARE_19 05c8h ;;< Spare selector number 19h.
1676%define BS3_SEL_SPARE_1a 05d0h ;;< Spare selector number 1ah.
1677%define BS3_SEL_SPARE_1b 05d8h ;;< Spare selector number 1bh.
1678%define BS3_SEL_SPARE_1c 05e0h ;;< Spare selector number 1ch.
1679%define BS3_SEL_SPARE_1d 05e8h ;;< Spare selector number 1dh.
1680%define BS3_SEL_SPARE_1e 05f0h ;;< Spare selector number 1eh.
1681%define BS3_SEL_SPARE_1f 05f8h ;;< Spare selector number 1fh.
1682
1683%define BS3_SEL_TILED 0600h ;;< 16-bit data tiling: First - base=0x00000000, limit=64KB, DPL=3.
1684%define BS3_SEL_TILED_LAST 0df8h ;;< 16-bit data tiling: Last - base=0x00ff0000, limit=64KB, DPL=3.
1685%define BS3_SEL_TILED_AREA_SIZE 001000000h ;;< 16-bit data tiling: Size of addressable area, in bytes. (16 MB)
1686
1687%define BS3_SEL_FREE_PART1 0e00h ;;< Free selector space - part \%1.
1688%define BS3_SEL_FREE_PART1_LAST 0ff8h ;;< Free selector space - part \%1, last entry.
1689
1690%define BS3_SEL_TEXT16 1000h ;;< The BS3TEXT16 selector.
1691
1692%define BS3_SEL_FREE_PART2 1008h ;;< Free selector space - part \#2.
1693%define BS3_SEL_FREE_PART2_LAST 17f8h ;;< Free selector space - part \#2, last entry.
1694
1695%define BS3_SEL_TILED_R0 1800h ;;< 16-bit data/stack tiling: First - base=0x00000000, limit=64KB, DPL=0.
1696%define BS3_SEL_TILED_R0_LAST 1ff8h ;;< 16-bit data/stack tiling: Last - base=0x00ff0000, limit=64KB, DPL=0.
1697
1698%define BS3_SEL_SYSTEM16 2000h ;;< The BS3SYSTEM16 selector.
1699
1700%define BS3_SEL_FREE_PART3 2008h ;;< Free selector space - part \%3.
1701%define BS3_SEL_FREE_PART3_LAST 28f8h ;;< Free selector space - part \%3, last entry.
1702
1703%define BS3_SEL_DATA16 2900h ;;< The BS3DATA16/BS3KIT_GRPNM_DATA16 selector.
1704
1705%define BS3_SEL_FREE_PART4 2908h ;;< Free selector space - part \#4.
1706%define BS3_SEL_FREE_PART4_LAST 2f98h ;;< Free selector space - part \#4, last entry.
1707
1708%define BS3_SEL_PRE_TEST_PAGE_08 2fa0h ;;< Selector located 8 selectors before the test page.
1709%define BS3_SEL_PRE_TEST_PAGE_07 2fa8h ;;< Selector located 7 selectors before the test page.
1710%define BS3_SEL_PRE_TEST_PAGE_06 2fb0h ;;< Selector located 6 selectors before the test page.
1711%define BS3_SEL_PRE_TEST_PAGE_05 2fb8h ;;< Selector located 5 selectors before the test page.
1712%define BS3_SEL_PRE_TEST_PAGE_04 2fc0h ;;< Selector located 4 selectors before the test page.
1713%define BS3_SEL_PRE_TEST_PAGE_03 2fc8h ;;< Selector located 3 selectors before the test page.
1714%define BS3_SEL_PRE_TEST_PAGE_02 2fd0h ;;< Selector located 2 selectors before the test page.
1715%define BS3_SEL_PRE_TEST_PAGE_01 2fd8h ;;< Selector located 1 selector before the test page.
1716%define BS3_SEL_TEST_PAGE 2fe0h ;;< Start of the test page intended for playing around with paging and GDT.
1717%define BS3_SEL_TEST_PAGE_00 2fe0h ;;< Test page selector number 00h (convenience).
1718%define BS3_SEL_TEST_PAGE_01 2fe8h ;;< Test page selector number 01h (convenience).
1719%define BS3_SEL_TEST_PAGE_02 2ff0h ;;< Test page selector number 02h (convenience).
1720%define BS3_SEL_TEST_PAGE_03 2ff8h ;;< Test page selector number 03h (convenience).
1721%define BS3_SEL_TEST_PAGE_04 3000h ;;< Test page selector number 04h (convenience).
1722%define BS3_SEL_TEST_PAGE_05 3008h ;;< Test page selector number 05h (convenience).
1723%define BS3_SEL_TEST_PAGE_06 3010h ;;< Test page selector number 06h (convenience).
1724%define BS3_SEL_TEST_PAGE_07 3018h ;;< Test page selector number 07h (convenience).
1725%define BS3_SEL_TEST_PAGE_LAST 3fd0h ;;< The last selector in the spare page.
1726
1727%define BS3_SEL_GDT_LIMIT 3fd8h ;;< The GDT limit.
1728
1729;; @}
1730
1731
1732;
1733; Sanity checks.
1734;
1735%if BS3_ADDR_BS3TEXT16 != BS3_ADDR_LOAD
1736 %error "BS3_ADDR_BS3TEXT16 and BS3_ADDR_LOAD are out of sync"
1737%endif
1738%if (BS3_ADDR_BS3TEXT16 / 16) != BS3_SEL_TEXT16
1739 %error "BS3_ADDR_BS3TEXT16 and BS3_SEL_TEXT16 are out of sync"
1740%endif
1741%if (BS3_ADDR_BS3DATA16 / 16) != BS3_SEL_DATA16
1742 %error "BS3_ADDR_BS3DATA16 and BS3_SEL_DATA16 are out of sync"
1743%endif
1744%if (BS3_ADDR_BS3SYSTEM16 / 16) != BS3_SEL_SYSTEM16
1745 %error "BS3_ADDR_BS3SYSTEM16 and BS3_SEL_SYSTEM16 are out of sync"
1746%endif
1747
1748
1749;; @name BS3CPU_XXX - Bs3CpuDetect_mmm return value and g_bBs3CpuDetected.
1750;; @{
1751%define BS3CPU_8086 0x0001
1752%define BS3CPU_V20 0x0002
1753%define BS3CPU_80186 0x0003
1754%define BS3CPU_80286 0x0004
1755%define BS3CPU_80386 0x0005
1756%define BS3CPU_80486 0x0006
1757%define BS3CPU_Pentium 0x0007
1758%define BS3CPU_PPro 0x0008
1759%define BS3CPU_PProOrNewer 0x0009
1760%define BS3CPU_TYPE_MASK 0x00ff
1761%define BS3CPU_F_CPUID 0x0100
1762%define BS3CPU_F_CPUID_EXT_LEAVES 0x0200
1763%define BS3CPU_F_PAE 0x0400
1764%define BS3CPU_F_PAE_BIT 10
1765%define BS3CPU_F_PSE 0x0800
1766%define BS3CPU_F_PSE_BIT 11
1767%define BS3CPU_F_LONG_MODE 0x1000
1768%define BS3CPU_F_LONG_MODE_BIT 12
1769%define BS3CPU_F_NX 0x2000
1770%define BS3CPU_F_NX_BIT 13
1771;; @}
1772
1773%endif
1774
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