bs3-system-data.asm@ 102157

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1	; $Id: bs3-system-data.asm 98103 2023-01-17 14:15:46Z vboxsync $
2	;; @file
3	; BS3Kit - GDT
4	;
5
6	;
7	; Copyright (C) 2007-2023 Oracle and/or its affiliates.
8	;
9	; This file is part of VirtualBox base platform packages, as
10	; available from https://www.virtualbox.org.
11	;
12	; This program is free software; you can redistribute it and/or
13	; modify it under the terms of the GNU General Public License
14	; as published by the Free Software Foundation, in version 3 of the
15	; License.
16	;
17	; This program is distributed in the hope that it will be useful, but
18	; WITHOUT ANY WARRANTY; without even the implied warranty of
19	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	; General Public License for more details.
21	;
22	; You should have received a copy of the GNU General Public License
23	; along with this program; if not, see <https://www.gnu.org/licenses>.
24	;
25	; The contents of this file may alternatively be used under the terms
26	; of the Common Development and Distribution License Version 1.0
27	; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28	; in the VirtualBox distribution, in which case the provisions of the
29	; CDDL are applicable instead of those of the GPL.
30	;
31	; You may elect to license modified versions of this file under the
32	; terms and conditions of either the GPL or the CDDL or both.
33	;
34	; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35	;
36
37	%include "bs3kit.mac"
38
39	%define BS3_SYSTEM16_BASE_16_23 ((BS3_ADDR_BS3SYSTEM16 >> 16) & 0xff)
40	%define BS3_SYSTEM16_BASE_LOW(a_DataSym) ((BS3_DATA_NM(a_DataSym) - StartSystem16) & 0xffff)
41
42	;;
43	; The GDT (X86DESCGENERIC).
44	;
45	BS3_BEGIN_SYSTEM16
46	StartSystem16:
47	db 10, 13, 'eye-catcher: SYSTEM16.......', 10, 13 ; 32 bytes long
48	BS3_GLOBAL_DATA Bs3Gdt, 4000h - 20h
49
50	;; Macro for checking GDT offsets as we go along.
51	;; @param %1 The expected current offset.
52	%macro BS3GdtAssertOffset 1
53	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
54	%if ($ - BS3_DATA_NM(Bs3Gdt)) != %1
55	%assign offActual ($ - BS3_DATA_NM(Bs3Gdt))
56	%error "BS3GdtAssertOffset: Bad offset: " %+ offActual %+ ", expected " %+ %1
57	%endif
58	%endif
59	%endmacro
60
61	dw 00000h, 00000h, 00000h, 00000h ; null selector
62	BS3GdtAssertOffset 8
63
64	;
65	; 008h..0f8h - System selectors and other stuff
66	;
67	dw 00000h, 00000h, 00000h, 00000h ; Entry 008h - currently unused
68
69	BS3_GLOBAL_DATA Bs3Gdte_Ldt, 16 ; Entry 010h
70	dw BS3_DATA_NM(Bs3LdtEnd) - BS3_DATA_NM(Bs3Ldt) - 1
71	dw BS3_SYSTEM16_BASE_LOW(Bs3Ldt)
72	db BS3_SYSTEM16_BASE_16_23
73	db X86_SEL_TYPE_SYS_LDT \| 0x80
74	dw 00000h
75	dw 00000h, 00000h, 00000h, 00000h ; zero for 64-bit mode.
76
77	BS3_GLOBAL_DATA Bs3Gdte_Tss16, 8 ; Entry 020h
78	dw 0002bh ; 16-bit TSS.
79	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16)
80	db BS3_SYSTEM16_BASE_16_23
81	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
82	dw 0
83
84	BS3_GLOBAL_DATA Bs3Gdte_Tss16DoubleFault, 8 ; Entry 028h
85	dw 0002bh ; 16-bit TSS, double fault.
86	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16DoubleFault)
87	db BS3_SYSTEM16_BASE_16_23
88	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
89	dw 0
90
91	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare0, 8 ; Entry 030h
92	dw 0002bh ; 16-bit TSS, spare 0.
93	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare0)
94	db BS3_SYSTEM16_BASE_16_23
95	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
96	dw 0
97
98	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare1, 8 ; Entry 038h
99	dw 0002bh ; 16-bit TSS, spare 0.
100	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare1)
101	db BS3_SYSTEM16_BASE_16_23
102	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
103	dw 0
104
105	BS3_GLOBAL_DATA Bs3Gdte_Tss32, 8 ; Entry 040h
106	dw 00067h ; 32-bit TSS.
107	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32)
108	db BS3_SYSTEM16_BASE_16_23
109	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
110	dw 0
111
112	BS3_GLOBAL_DATA Bs3Gdte_Tss32DoubleFault, 8 ; Entry 048h
113	dw 00067h ; 32-bit TSS, double fault.
114	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32DoubleFault)
115	db BS3_SYSTEM16_BASE_16_23
116	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
117	dw 0
118
119	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare0, 8 ; Entry 050h
120	dw 00067h ; 32-bit TSS, spare 0.
121	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare0)
122	db BS3_SYSTEM16_BASE_16_23
123	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
124	dw 0
125
126	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare1, 8 ; Entry 058h
127	dw 00067h ; 32-bit TSS, spare 1.
128	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare1)
129	db BS3_SYSTEM16_BASE_16_23
130	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
131	dw 0
132
133	BS3_GLOBAL_DATA Bs3Gdte_Tss32IobpIntRedirBm, 8 ; Entry 060h
134	; 32-bit TSS, with I/O permission & interrupt redirection bitmaps.
135	dw BS3_DATA_NM(Bs3SharedIobpEnd) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
136	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
137	db BS3_SYSTEM16_BASE_16_23
138	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
139	dw 0
140
141	BS3_GLOBAL_DATA Bs3Gdte_Tss32IntRedirBm, 8 ; Entry 068h
142	; 32-bit TSS, with interrupt redirection bitmap (IOBP stripped by limit).
143	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
144	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
145	db BS3_SYSTEM16_BASE_16_23
146	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
147	dw 0
148
149	BS3_GLOBAL_DATA Bs3Gdte_Tss64, 8 ; Entry 070h
150	dw 00067h ; 64-bit TSS.
151	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64)
152	db BS3_SYSTEM16_BASE_16_23
153	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
154	dw 0
155	dw 00000h, 00000h, 00000h, 00000h
156
157	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare0, 8 ; Entry 080h
158	dw 00067h ; 64-bit TSS, spare 0.
159	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare0)
160	db BS3_SYSTEM16_BASE_16_23
161	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
162	dw 0
163	dw 00000h, 00000h, 00000h, 00000h
164
165	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare1, 8 ; Entry 090h
166	dw 00067h ; 64-bit TSS, spare 1.
167	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare1)
168	db BS3_SYSTEM16_BASE_16_23
169	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
170	dw 0
171	dw 00000h, 00000h, 00000h, 00000h
172
173	BS3_GLOBAL_DATA Bs3Gdte_Tss64Iobp, 8 ; Entry 0a0h
174	; 64-bit TSS, with I/O permission bitmap
175	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb) - 1
176	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64WithIopb)
177	db BS3_SYSTEM16_BASE_16_23
178	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
179	dw 0
180	dw 00000h, 00000h, 00000h, 00000h
181
182	BS3GdtAssertOffset 0b0h
183	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b0h - currently unused
184	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b8h - currently unused
185	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c0h - currently unused
186	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c8h - currently unused
187	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d0h - currently unused
188	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d8h - currently unused
189
190	; Misc selectors.
191	BS3_GLOBAL_DATA Bs3Gdte_RMTEXT16_CS, 8 ; Entry 0e0h
192	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
193	dw 09f00h, 00000h
194	BS3_GLOBAL_DATA Bs3Gdte_X0TEXT16_CS, 8 ; Entry 0e8h
195	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
196	dw 09f00h, 00000h
197	BS3_GLOBAL_DATA Bs3Gdte_X1TEXT16_CS, 8 ; Entry 0f0h
198	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
199	dw 09f00h, 00000h
200	BS3_GLOBAL_DATA Bs3Gdte_R0_MMIO16, 8 ; Entry 0f8h
201	dw 0ffffh, 0f000h, 0930dh, 00000h ; 16-bit VMMDev MMIO segment with base 0df000h.
202	BS3GdtAssertOffset 0100h
203
204
205	;;
206	; Macro that defines the selectors for ring-%1.
207	;
208	%macro BS3_GDT_RING_X_SELECTORS 1
209	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _First, 80h
210	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16, 8 ; Entry 100h
211	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 010000h.
212	dw 09b01h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
213
214	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS16, 8 ; Entry 108h
215	dw 0ffffh, (0xffff & BS3_ADDR_BS3DATA16) ; 16-bit data segment with base 029000h.
216	dw 09300h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3DATA16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3DATA16 >> 16))
217
218	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS16, 8 ; Entry 110h
219	dw 0ffffh, 00000h ; 16-bit stack segment with base 0.
220	dw 09300h \| (%1 << 0dh), 00000h
221
222	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32, 8 ; Entry 118h
223	dw 0ffffh, 00000h ; 32-bit flat code segment.
224	dw 09b00h \| (%1 << 0dh), 000cfh
225
226	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS32, 8 ; Entry 120h
227	dw 0ffffh, 00000h ; 32-bit flat data segment.
228	dw 09300h \| (%1 << 0dh), 000cfh
229
230	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS32, 8 ; Entry 128h
231	dw 0ffffh, 00000h ; 32-bit flat stack segment.
232	dw 09300h \| (%1 << 0dh), 000cfh
233
234	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64, 8 ; Entry 130h
235	dw 0ffffh, 00000h ; 64-bit code segment.
236	dw 09a00h \| (%1 << 0dh), 000afh
237
238	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS64, 8 ; Entry 138h (also SS64)
239	dw 0ffffh, 00000h ; 64-bit stack and data segment.
240	dw 09300h \| (%1 << 0dh), 000afh
241
242	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_EO, 8 ; Entry 140h
243	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
244	dw 09800h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
245
246	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CNF, 8 ; Entry 148h
247	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
248	dw 09e00h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
249
250	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CND_EO, 8 ; Entry 150h
251	dw 0fffeh, 00000h ; 16-bit conforming code segment with base 0, not accessed, execute only, short limit.
252	dw 09c00h \| (%1 << 0dh), 000cfh
253
254	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_EO, 8 ; Entry 158h
255	dw 0ffffh, 00000h ; 32-bit flat code segment, not accessed, execute only.
256	dw 09800h \| (%1 << 0dh), 000cfh
257
258	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF, 8 ; Entry 160h
259	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed.
260	dw 09e00h \| (%1 << 0dh), 000cfh
261
262	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF_EO, 8 ; Entry 168h
263	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed, execute only.
264	dw 09c00h \| (%1 << 0dh), 000cfh
265
266	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_EO, 8 ; Entry 170h
267	dw 0ffffh, 00000h ; 64-bit code segment, not accessed, execute only.
268	dw 09800h \| (%1 << 0dh), 000afh
269
270	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF, 8 ; Entry 178h
271	dw 0ffffh, 00000h ; 64-bit conforming code segment, not accessed.
272	dw 09e00h \| (%1 << 0dh), 000afh
273
274	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF_EO, 8 ; Entry 180h
275	dw 0ffffh, 00000h ; 64-bit conforming code segment, execute only, not accessed.
276	dw 09c00h \| (%1 << 0dh), 000afh
277
278	;; @todo expand down segments.
279	dw 00000h, 00000h, 00000h, 00000h ; Entry 188h - unused.
280	dw 00000h, 00000h, 00000h, 00000h ; Entry 190h - unused.
281	dw 00000h, 00000h, 00000h, 00000h ; Entry 198h - unused.
282	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a0h - unused.
283	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a8h - unused.
284	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b0h - unused.
285	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b8h - unused.
286	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c0h - unused.
287	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c8h - unused.
288	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d0h - unused.
289	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d8h - unused.
290	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e0h - unused.
291	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e8h - unused.
292	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f0h - unused.
293	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f8h - unused.
294	%endmacro
295
296	;
297	; 100h..1f8h - Ring-0 selectors.
298	;
299	BS3_GDT_RING_X_SELECTORS 0
300
301	;
302	; 200h..2f8h - Ring-1 selectors.
303	;
304	BS3_GDT_RING_X_SELECTORS 1
305
306	;
307	; 300h..3f8h - Ring-2 selectors.
308	;
309	BS3_GDT_RING_X_SELECTORS 2
310
311	;
312	; 400h..4f8h - Ring-3 selectors.
313	;
314	BS3_GDT_RING_X_SELECTORS 3
315
316	;
317	; 500..5f8h - Named spare GDT entries.
318	;
319	BS3GdtAssertOffset 0500h
320	BS3_GLOBAL_DATA Bs3GdteSpare00, 8 ; Entry 500h
321	dq 0
322	BS3_GLOBAL_DATA Bs3GdteSpare01, 8 ; Entry 508h
323	dq 0
324	BS3_GLOBAL_DATA Bs3GdteSpare02, 8 ; Entry 510h
325	dq 0
326	BS3_GLOBAL_DATA Bs3GdteSpare03, 8 ; Entry 518h
327	dq 0
328	BS3_GLOBAL_DATA Bs3GdteSpare04, 8 ; Entry 520h
329	dq 0
330	BS3_GLOBAL_DATA Bs3GdteSpare05, 8 ; Entry 528h
331	dq 0
332	BS3_GLOBAL_DATA Bs3GdteSpare06, 8 ; Entry 530h
333	dq 0
334	BS3_GLOBAL_DATA Bs3GdteSpare07, 8 ; Entry 538h
335	dq 0
336	BS3_GLOBAL_DATA Bs3GdteSpare08, 8 ; Entry 540h
337	dq 0
338	BS3_GLOBAL_DATA Bs3GdteSpare09, 8 ; Entry 548h
339	dq 0
340	BS3_GLOBAL_DATA Bs3GdteSpare0a, 8 ; Entry 550h
341	dq 0
342	BS3_GLOBAL_DATA Bs3GdteSpare0b, 8 ; Entry 558h
343	dq 0
344	BS3_GLOBAL_DATA Bs3GdteSpare0c, 8 ; Entry 560h
345	dq 0
346	BS3_GLOBAL_DATA Bs3GdteSpare0d, 8 ; Entry 568h
347	dq 0
348	BS3_GLOBAL_DATA Bs3GdteSpare0e, 8 ; Entry 570h
349	dq 0
350	BS3_GLOBAL_DATA Bs3GdteSpare0f, 8 ; Entry 578h
351	dq 0
352	BS3_GLOBAL_DATA Bs3GdteSpare10, 8 ; Entry 580h
353	dq 0
354	BS3_GLOBAL_DATA Bs3GdteSpare11, 8 ; Entry 588h
355	dq 0
356	BS3_GLOBAL_DATA Bs3GdteSpare12, 8 ; Entry 590h
357	dq 0
358	BS3_GLOBAL_DATA Bs3GdteSpare13, 8 ; Entry 598h
359	dq 0
360	BS3_GLOBAL_DATA Bs3GdteSpare14, 8 ; Entry 5a0h
361	dq 0
362	BS3_GLOBAL_DATA Bs3GdteSpare15, 8 ; Entry 5a8h
363	dq 0
364	BS3_GLOBAL_DATA Bs3GdteSpare16, 8 ; Entry 5b0h
365	dq 0
366	BS3_GLOBAL_DATA Bs3GdteSpare17, 8 ; Entry 5b8h
367	dq 0
368	BS3_GLOBAL_DATA Bs3GdteSpare18, 8 ; Entry 5c0h
369	dq 0
370	BS3_GLOBAL_DATA Bs3GdteSpare19, 8 ; Entry 5c8h
371	dq 0
372	BS3_GLOBAL_DATA Bs3GdteSpare1a, 8 ; Entry 5d0h
373	dq 0
374	BS3_GLOBAL_DATA Bs3GdteSpare1b, 8 ; Entry 5d8h
375	dq 0
376	BS3_GLOBAL_DATA Bs3GdteSpare1c, 8 ; Entry 5e0h
377	dq 0
378	BS3_GLOBAL_DATA Bs3GdteSpare1d, 8 ; Entry 5e8h
379	dq 0
380	BS3_GLOBAL_DATA Bs3GdteSpare1e, 8 ; Entry 5f0h
381	dq 0
382	BS3_GLOBAL_DATA Bs3GdteSpare1f, 8 ; Entry 5f8h
383	dq 0
384
385	;
386	; 600..df8h - 16-bit DPL=3 data segments covering the first 16MB of memory.
387	;
388	BS3_GLOBAL_DATA Bs3GdteTiled, 8 ; Entry 600h
389	%assign u8HighBase 0
390	%rep 256
391	dw 0ffffh, 00000h, 0f300h \| u8HighBase, 00000h
392	%assign u8HighBase u8HighBase + 1
393	%endrep
394	;
395	; e00..ff8h - Free GDTEs.
396	;
397	BS3GdtAssertOffset 0e00h
398	BS3_GLOBAL_DATA Bs3GdteFreePart1, 200h
399	times 200h db 0
400
401	;
402	; 1000h - the real mode segment number for BS3TEXT16. DPL=0, BASE=0x10000h, conforming, exec, read.
403	;
404	BS3GdtAssertOffset 01000h
405	BS3_GLOBAL_DATA Bs3Gdte_CODE16, 8h
406	dw 0ffffh, 00000h, 09f01h, 00000h
407
408	;
409	; 1008..17f8h - Free GDTEs.
410	;
411	BS3GdtAssertOffset 01008h
412	BS3_GLOBAL_DATA Bs3GdteFreePart2, 07f8h
413	times 07f8h db 0
414
415	;
416	; 1800..1ff8h - 16-bit DPL=0 data/stack segments covering the first 16MB of memory.
417	;
418	BS3GdtAssertOffset 01800h
419	BS3_GLOBAL_DATA Bs3GdteTiledR0, 8 ; Entry 1800h
420	%assign u8HighBase 0
421	%rep 256
422	dw 0ffffh, 00000h, 09300h \| u8HighBase, 00000h
423	%assign u8HighBase u8HighBase + 1
424	%endrep
425
426	;
427	; 2000h - the real mode segment number for BS3SYSTEM. DPL=3. BASE=0x20000h
428	;
429	BS3GdtAssertOffset 02000h
430	BS3_GLOBAL_DATA Bs3Gdte_SYSTEM16, 8h
431	dw 0ffffh, 00000h, 0f302h, 00000h
432
433	;
434	; 2008..28f8h - Free GDTEs.
435	;
436	BS3_GLOBAL_DATA Bs3GdteFreePart3, 08f8h
437	times 08f8h db 0
438
439	;
440	; 2900h - the real mode segment number for BS3KIT_GRPNM_DATA16. DPL=3. BASE=0x29000h
441	;
442	BS3GdtAssertOffset 02900h
443	BS3_GLOBAL_DATA Bs3Gdte_DATA16, 8h
444	dw 0ffffh, 09000h, 0f302h, 00000h
445
446	;
447	; 2908..2f98h - Free GDTEs.
448	;
449	BS3GdtAssertOffset 02908h
450	BS3_GLOBAL_DATA Bs3GdteFreePart4, 698h
451	times 698h db 0
452
453	;
454	; 2be0..2fe0h - 8 spare entries preceeding the test page which we're free
455	; to mess with page table protection.
456	;
457	BS3GdtAssertOffset 02fa0h
458	BS3_GLOBAL_DATA Bs3GdtePreTestPage08, 8
459	dq 0
460	BS3_GLOBAL_DATA Bs3GdtePreTestPage07, 8
461	dq 0
462	BS3_GLOBAL_DATA Bs3GdtePreTestPage06, 8
463	dq 0
464	BS3_GLOBAL_DATA Bs3GdtePreTestPage05, 8
465	dq 0
466	BS3_GLOBAL_DATA Bs3GdtePreTestPage04, 8
467	dq 0
468	BS3_GLOBAL_DATA Bs3GdtePreTestPage03, 8
469	dq 0
470	BS3_GLOBAL_DATA Bs3GdtePreTestPage02, 8
471	dq 0
472	BS3_GLOBAL_DATA Bs3GdtePreTestPage01, 8
473	dq 0
474
475	;
476	; 2fe0..3fd8h - 16 Test entries at the start of the page where we're free
477	; to mess with page table protection.
478	;
479	BS3GdtAssertOffset 02fe0h
480	AssertCompile(($ - $$) == 0x3000)
481	BS3_GLOBAL_DATA Bs3GdteTestPage, 0
482	BS3_GLOBAL_DATA Bs3GdteTestPage00, 8
483	dq 0
484	BS3_GLOBAL_DATA Bs3GdteTestPage01, 8
485	dq 0
486	BS3_GLOBAL_DATA Bs3GdteTestPage02, 8
487	dq 0
488	BS3_GLOBAL_DATA Bs3GdteTestPage03, 8
489	dq 0
490	BS3_GLOBAL_DATA Bs3GdteTestPage04, 8
491	dq 0
492	BS3_GLOBAL_DATA Bs3GdteTestPage05, 8
493	dq 0
494	BS3_GLOBAL_DATA Bs3GdteTestPage06, 8
495	dq 0
496	BS3_GLOBAL_DATA Bs3GdteTestPage07, 8
497	dq 0
498	BS3GdtAssertOffset 3020h
499	times 0fb8h db 0
500	BS3GdtAssertOffset 3fd8h
501	BS3_GLOBAL_DATA Bs3GdtEnd, 0
502	db 10, 13, 'GDTE', 10, 13 ; alignment padding (next address on 16 byte boundrary).
503	BS3GdtAssertOffset 4000h - 20h ; We're at a page boundrary here! Only GDT and eyecatchers on page starting at 3000h!
504	AssertCompile(($ - $$) == 0x4000)
505
506
507
508	;;
509	; The 16-bit TSS.
510	;
511	BS3_GLOBAL_DATA Bs3Tss16, X86TSS16_size
512	istruc X86TSS16
513	at X86TSS16.selPrev, dw 0
514	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
515	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
516	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
517	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
518	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
519	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
520	at X86TSS16.ip, dw 0
521	at X86TSS16.flags, dw 0
522	at X86TSS16.ax, dw 0
523	at X86TSS16.cx, dw 0
524	at X86TSS16.dx, dw 0
525	at X86TSS16.bx, dw 0
526	at X86TSS16.sp, dw 0
527	at X86TSS16.bp, dw 0
528	at X86TSS16.si, dw 0
529	at X86TSS16.di, dw 0
530	at X86TSS16.es, dw 0
531	at X86TSS16.cs, dw 0
532	at X86TSS16.ss, dw 0
533	at X86TSS16.ds, dw 0
534	at X86TSS16.selLdt, dw 0
535	iend
536
537	;;
538	; 16-bit TSS for (trying to) handle double faults.
539	BS3_GLOBAL_DATA Bs3Tss16DoubleFault, X86TSS16_size
540	istruc X86TSS16
541	at X86TSS16.selPrev, dw 0
542	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
543	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
544	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
545	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
546	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
547	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
548	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
549	at X86TSS16.flags, dw X86_EFL_1
550	at X86TSS16.ax, dw 0
551	at X86TSS16.cx, dw 0
552	at X86TSS16.dx, dw 0
553	at X86TSS16.bx, dw 0
554	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST1
555	at X86TSS16.bp, dw 0
556	at X86TSS16.si, dw 0
557	at X86TSS16.di, dw 0
558	at X86TSS16.es, dw BS3_SEL_R0_DS16
559	at X86TSS16.cs, dw BS3_SEL_R0_CS16
560	at X86TSS16.ss, dw BS3_SEL_R0_SS16
561	at X86TSS16.ds, dw BS3_SEL_R0_DS16
562	at X86TSS16.selLdt, dw 0
563	iend
564
565	;;
566	; A spare 16-bit TSS for testcases to play around with.
567	BS3_GLOBAL_DATA Bs3Tss16Spare0, X86TSS16_size
568	istruc X86TSS16
569	at X86TSS16.selPrev, dw 0
570	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
571	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
572	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
573	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
574	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
575	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
576	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
577	at X86TSS16.flags, dw X86_EFL_1
578	at X86TSS16.ax, dw 0
579	at X86TSS16.cx, dw 0
580	at X86TSS16.dx, dw 0
581	at X86TSS16.bx, dw 0
582	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST2
583	at X86TSS16.bp, dw 0
584	at X86TSS16.si, dw 0
585	at X86TSS16.di, dw 0
586	at X86TSS16.es, dw BS3_SEL_R0_DS16
587	at X86TSS16.cs, dw BS3_SEL_R0_CS16
588	at X86TSS16.ss, dw BS3_SEL_R0_SS16
589	at X86TSS16.ds, dw BS3_SEL_R0_DS16
590	at X86TSS16.selLdt, dw 0
591	iend
592
593	;;
594	; A spare 16-bit TSS for testcases to play around with.
595	BS3_GLOBAL_DATA Bs3Tss16Spare1, X86TSS16_size
596	istruc X86TSS16
597	at X86TSS16.selPrev, dw 0
598	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
599	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
600	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
601	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
602	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
603	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
604	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
605	at X86TSS16.flags, dw X86_EFL_1
606	at X86TSS16.ax, dw 0
607	at X86TSS16.cx, dw 0
608	at X86TSS16.dx, dw 0
609	at X86TSS16.bx, dw 0
610	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST4
611	at X86TSS16.bp, dw 0
612	at X86TSS16.si, dw 0
613	at X86TSS16.di, dw 0
614	at X86TSS16.es, dw BS3_SEL_R0_DS16
615	at X86TSS16.cs, dw BS3_SEL_R0_CS16
616	at X86TSS16.ss, dw BS3_SEL_R0_SS16
617	at X86TSS16.ds, dw BS3_SEL_R0_DS16
618	at X86TSS16.selLdt, dw 0
619	iend
620
621
622	;;
623	; The 32-bit TSS.
624	;
625	BS3_GLOBAL_DATA Bs3Tss32, X86TSS32_size
626	istruc X86TSS32
627	at X86TSS32.selPrev, dw 0
628	at X86TSS32.padding1, dw 0
629	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
630	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
631	at X86TSS32.padding_ss0, dw 1
632	at X86TSS32.esp1, dd 1
633	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
634	at X86TSS32.padding_ss1, dw 1
635	at X86TSS32.esp2, dd 1
636	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
637	at X86TSS32.padding_ss2, dw 1
638	at X86TSS32.cr3, dd 0
639	at X86TSS32.eip, dd 0
640	at X86TSS32.eflags, dd X86_EFL_1
641	at X86TSS32.eax, dd 0
642	at X86TSS32.ecx, dd 0
643	at X86TSS32.edx, dd 0
644	at X86TSS32.ebx, dd 0
645	at X86TSS32.esp, dd 0
646	at X86TSS32.ebp, dd 0
647	at X86TSS32.esi, dd 0
648	at X86TSS32.edi, dd 0
649	at X86TSS32.es, dw 0
650	at X86TSS32.padding_es, dw 0
651	at X86TSS32.cs, dw 0
652	at X86TSS32.padding_cs, dw 0
653	at X86TSS32.ss, dw 0
654	at X86TSS32.padding_ss, dw 0
655	at X86TSS32.ds, dw 0
656	at X86TSS32.padding_ds, dw 0
657	at X86TSS32.fs, dw 0
658	at X86TSS32.padding_fs, dw 0
659	at X86TSS32.gs, dw 0
660	at X86TSS32.padding_gs, dw 0
661	at X86TSS32.selLdt, dw 0
662	at X86TSS32.padding_ldt, dw 0
663	at X86TSS32.fDebugTrap, dw 0
664	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
665	iend
666
667	;;
668	; The 32-bit TSS for handling double faults.
669	BS3_GLOBAL_DATA Bs3Tss32DoubleFault, X86TSS32_size
670	istruc X86TSS32
671	at X86TSS32.selPrev, dw 0
672	at X86TSS32.padding1, dw 0
673	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
674	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
675	at X86TSS32.padding_ss0, dw 1
676	at X86TSS32.esp1, dd 1
677	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
678	at X86TSS32.padding_ss1, dw 1
679	at X86TSS32.esp2, dd 1
680	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
681	at X86TSS32.padding_ss2, dw 1
682	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
683	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
684	at X86TSS32.eflags, dd X86_EFL_1
685	at X86TSS32.eax, dd 0
686	at X86TSS32.ecx, dd 0
687	at X86TSS32.edx, dd 0
688	at X86TSS32.ebx, dd 0
689	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST1
690	at X86TSS32.ebp, dd 0
691	at X86TSS32.esi, dd 0
692	at X86TSS32.edi, dd 0
693	at X86TSS32.es, dw BS3_SEL_R0_DS32
694	at X86TSS32.padding_es, dw 0
695	at X86TSS32.cs, dw BS3_SEL_R0_CS32
696	at X86TSS32.padding_cs, dw 0
697	at X86TSS32.ss, dw BS3_SEL_R0_SS32
698	at X86TSS32.padding_ss, dw 0
699	at X86TSS32.ds, dw BS3_SEL_R0_DS32
700	at X86TSS32.padding_ds, dw 0
701	at X86TSS32.fs, dw BS3_SEL_R0_DS32
702	at X86TSS32.padding_fs, dw 0
703	at X86TSS32.gs, dw BS3_SEL_R0_DS32
704	at X86TSS32.padding_gs, dw 0
705	at X86TSS32.selLdt, dw 0
706	at X86TSS32.padding_ldt, dw 0
707	at X86TSS32.fDebugTrap, dw 0
708	at X86TSS32.offIoBitmap, dw 0
709	iend
710
711	;;
712	; A spare 32-bit TSS testcases to play around with.
713	BS3_GLOBAL_DATA Bs3Tss32Spare0, X86TSS32_size
714	istruc X86TSS32
715	at X86TSS32.selPrev, dw 0
716	at X86TSS32.padding1, dw 0
717	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
718	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
719	at X86TSS32.padding_ss0, dw 1
720	at X86TSS32.esp1, dd 1
721	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
722	at X86TSS32.padding_ss1, dw 1
723	at X86TSS32.esp2, dd 1
724	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
725	at X86TSS32.padding_ss2, dw 1
726	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
727	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
728	at X86TSS32.eflags, dd X86_EFL_1
729	at X86TSS32.eax, dd 0
730	at X86TSS32.ecx, dd 0
731	at X86TSS32.edx, dd 0
732	at X86TSS32.ebx, dd 0
733	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST2
734	at X86TSS32.ebp, dd 0
735	at X86TSS32.esi, dd 0
736	at X86TSS32.edi, dd 0
737	at X86TSS32.es, dw BS3_SEL_R0_DS32
738	at X86TSS32.padding_es, dw 0
739	at X86TSS32.cs, dw BS3_SEL_R0_CS32
740	at X86TSS32.padding_cs, dw 0
741	at X86TSS32.ss, dw BS3_SEL_R0_SS32
742	at X86TSS32.padding_ss, dw 0
743	at X86TSS32.ds, dw BS3_SEL_R0_DS32
744	at X86TSS32.padding_ds, dw 0
745	at X86TSS32.fs, dw BS3_SEL_R0_DS32
746	at X86TSS32.padding_fs, dw 0
747	at X86TSS32.gs, dw BS3_SEL_R0_DS32
748	at X86TSS32.padding_gs, dw 0
749	at X86TSS32.selLdt, dw 0
750	at X86TSS32.padding_ldt, dw 0
751	at X86TSS32.fDebugTrap, dw 0
752	at X86TSS32.offIoBitmap, dw 0
753	iend
754
755	;;
756	; A spare 32-bit TSS testcases to play around with.
757	BS3_GLOBAL_DATA Bs3Tss32Spare1, X86TSS32_size
758	istruc X86TSS32
759	at X86TSS32.selPrev, dw 0
760	at X86TSS32.padding1, dw 0
761	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
762	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
763	at X86TSS32.padding_ss0, dw 1
764	at X86TSS32.esp1, dd 1
765	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
766	at X86TSS32.padding_ss1, dw 1
767	at X86TSS32.esp2, dd 1
768	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
769	at X86TSS32.padding_ss2, dw 1
770	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
771	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
772	at X86TSS32.eflags, dd X86_EFL_1
773	at X86TSS32.eax, dd 0
774	at X86TSS32.ecx, dd 0
775	at X86TSS32.edx, dd 0
776	at X86TSS32.ebx, dd 0
777	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST4
778	at X86TSS32.ebp, dd 0
779	at X86TSS32.esi, dd 0
780	at X86TSS32.edi, dd 0
781	at X86TSS32.es, dw BS3_SEL_R0_DS32
782	at X86TSS32.padding_es, dw 0
783	at X86TSS32.cs, dw BS3_SEL_R0_CS32
784	at X86TSS32.padding_cs, dw 0
785	at X86TSS32.ss, dw BS3_SEL_R0_SS32
786	at X86TSS32.padding_ss, dw 0
787	at X86TSS32.ds, dw BS3_SEL_R0_DS32
788	at X86TSS32.padding_ds, dw 0
789	at X86TSS32.fs, dw BS3_SEL_R0_DS32
790	at X86TSS32.padding_fs, dw 0
791	at X86TSS32.gs, dw BS3_SEL_R0_DS32
792	at X86TSS32.padding_gs, dw 0
793	at X86TSS32.selLdt, dw 0
794	at X86TSS32.padding_ldt, dw 0
795	at X86TSS32.fDebugTrap, dw 0
796	at X86TSS32.offIoBitmap, dw 0
797	iend
798
799
800
801	;;
802	; 64-bit TSS
803	BS3_GLOBAL_DATA Bs3Tss64, X86TSS64_size
804	istruc X86TSS64
805	at X86TSS64.u32Reserved, dd 0
806	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
807	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
808	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
809	at X86TSS64.u32Reserved2, dd 0
810	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
811	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
812	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
813	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
814	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
815	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
816	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
817	at X86TSS64.u16Reserved, dw 0
818	at X86TSS64.offIoBitmap, dw 0
819	iend
820
821	;;
822	; A spare TSS for testcases to play around with.
823	BS3_GLOBAL_DATA Bs3Tss64Spare0, X86TSS64_size
824	istruc X86TSS64
825	at X86TSS64.u32Reserved, dd 0
826	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
827	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
828	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
829	at X86TSS64.u32Reserved2, dd 0
830	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
831	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
832	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
833	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
834	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
835	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
836	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
837	at X86TSS64.u16Reserved, dw 0
838	at X86TSS64.offIoBitmap, dw 0
839	iend
840
841	;;
842	; A spare TSS for testcases to play around with.
843	BS3_GLOBAL_DATA Bs3Tss64Spare1, X86TSS64_size
844	istruc X86TSS64
845	at X86TSS64.u32Reserved, dd 0
846	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
847	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
848	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
849	at X86TSS64.u32Reserved2, dd 0
850	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
851	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
852	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
853	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
854	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
855	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
856	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
857	at X86TSS64.u16Reserved, dw 0
858	at X86TSS64.offIoBitmap, dw 0
859	iend
860
861
862
863	;;
864	; 64-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 32-bit TSS.
865	;
866	BS3_GLOBAL_DATA Bs3Tss64WithIopb, X86TSS64_size
867	istruc X86TSS64
868	at X86TSS64.u32Reserved, dd 0
869	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
870	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
871	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
872	at X86TSS64.u32Reserved2, dd 0
873	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
874	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
875	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
876	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
877	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
878	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
879	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
880	at X86TSS64.u16Reserved, dw 0
881	at X86TSS64.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb))
882	iend
883
884	;;
885	; 32-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 64-bit TSS,
886	; and sporting an interrupt redirection bitmap (Bs3SharedIntRedirBm).
887	BS3_GLOBAL_DATA Bs3Tss32WithIopb, X86TSS32_size
888	istruc X86TSS32
889	at X86TSS32.selPrev, dw 0
890	at X86TSS32.padding1, dw 0
891	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
892	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
893	at X86TSS32.padding_ss0, dw 1
894	at X86TSS32.esp1, dd 1
895	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
896	at X86TSS32.padding_ss1, dw 1
897	at X86TSS32.esp2, dd 1
898	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
899	at X86TSS32.padding_ss2, dw 1
900	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
901	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
902	at X86TSS32.eflags, dd X86_EFL_1
903	at X86TSS32.eax, dd 0
904	at X86TSS32.ecx, dd 0
905	at X86TSS32.edx, dd 0
906	at X86TSS32.ebx, dd 0
907	at X86TSS32.esp, dd 0
908	at X86TSS32.ebp, dd 0
909	at X86TSS32.esi, dd 0
910	at X86TSS32.edi, dd 0
911	at X86TSS32.es, dw 0
912	at X86TSS32.padding_es, dw 0
913	at X86TSS32.cs, dw 0
914	at X86TSS32.padding_cs, dw 0
915	at X86TSS32.ss, dw 0
916	at X86TSS32.padding_ss, dw 0
917	at X86TSS32.ds, dw 0
918	at X86TSS32.padding_ds, dw 0
919	at X86TSS32.fs, dw 0
920	at X86TSS32.padding_fs, dw 0
921	at X86TSS32.gs, dw 0
922	at X86TSS32.padding_gs, dw 0
923	at X86TSS32.selLdt, dw 0
924	at X86TSS32.padding_ldt, dw 0
925	at X86TSS32.fDebugTrap, dw 0
926	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
927	iend
928
929	;
930	; We insert 6 bytes before the interrupt redirection bitmap just to make sure
931	; we've all got the same idea about where it starts (i.e. 32 bytes before IOBP).
932	;
933	times 6 db 0ffh
934
935	;;
936	; Interrupt redirection bitmap (used by 32-bit TSS).
937	BS3_GLOBAL_DATA Bs3SharedIntRedirBm, 32
938	times 32 db 00h
939
940	;;
941	; Shared I/O permission bitmap used both by Bs3Tss64WithIopb and Bs3Tss32WithIopb.
942	BS3_GLOBAL_DATA Bs3SharedIobp, 8192+2
943	times 8192+2 db 0ffh
944	BS3_GLOBAL_DATA Bs3SharedIobpEnd, 0
945
946
947	align 128
948
949	;;
950	; 16-bit IDT.
951	; This requires manual setup by code fielding traps, so we'll just reserve the
952	; memory here.
953	;
954	BS3_GLOBAL_DATA Bs3Idt16, 256*8
955	times 256 dq 0
956
957	;;
958	; 32-bit IDT.
959	; This requires manual setup by code fielding traps, so we'll just reserve the
960	; memory here.
961	;
962	BS3_GLOBAL_DATA Bs3Idt32, 256*8
963	times 256 dq 0
964
965	;;
966	; 64-bit IDT.
967	; This requires manual setup by code fielding traps, so we'll just reserve the
968	; memory here.
969	;
970	BS3_GLOBAL_DATA Bs3Idt64, 256*16
971	times 256 dq 0, 0
972
973
974	times 6 db 0 ; Pad the first LIDT correctly.
975
976	;;
977	; LIDT structure for the 16-bit IDT (8-byte aligned on offset).
978	BS3_GLOBAL_DATA Bs3Lidt_Idt16, 2+8
979	dw 256*8 - 1 ; limit
980	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt16) ; low offset
981	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
982	dd 0 ; top32 offset
983
984	times 4 db 0 ; padding the start of the next
985
986	;;
987	; LIDT structure for the 32-bit IDT (8-byte aligned on offset).
988	BS3_GLOBAL_DATA Bs3Lidt_Idt32, 2+8
989	dw 256*8 - 1 ; limit
990	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt32) ; low offset
991	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
992	dd 0 ; top32 offset
993
994	times 4 db 0 ; padding the start of the next
995
996	;;
997	; LIDT structure for the 64-bit IDT (8-byte aligned on offset).
998	BS3_GLOBAL_DATA Bs3Lidt_Idt64, 2+8
999	dw 256*16 - 1 ; limit
1000	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt64) ; low offset
1001	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1002	dd 0 ; top32 offset
1003
1004	times 4 db 0 ; padding the start of the next
1005
1006	;;
1007	; LIDT structure for the real mode IVT at address 0x00000000 (8-byte aligned on offset).
1008	BS3_GLOBAL_DATA Bs3Lidt_Ivt, 2+8
1009	dw 0ffffh ; limit
1010	dw 0 ; low offset
1011	dw 0 ; high offset
1012	dd 0 ; top32 offset
1013
1014	times 4 db 0 ; padding the start of the next
1015
1016	;;
1017	; LGDT structure for the current GDT (8-byte aligned on offset).
1018	BS3_GLOBAL_DATA Bs3Lgdt_Gdt, 2+8
1019	dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
1020	dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
1021	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1022	dd 0 ; top32 offset
1023
1024	;;
1025	; LGDT structure for the default GDT (8-byte aligned on offset).
1026	; This must not be modified, whereas Bs3Lgdt_Gdt can be modified by the user.
1027	BS3_GLOBAL_DATA Bs3LgdtDef_Gdt, 2+8
1028	dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
1029	dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
1030	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1031	dd 0 ; top32 offset
1032
1033
1034
1035	align 16
1036	;;
1037	; LDT filling up the rest of the segment.
1038	;
1039	; Currently this starts at 0x84e0, which leaves us with 0xb20 bytes. We'll use
1040	; the last 32 of those for an eye catcher.
1041	;
1042	BS3_GLOBAL_DATA Bs3Ldt, 0b20h - 32
1043	times (0b20h - 32) db 0
1044	BS3_GLOBAL_DATA Bs3LdtEnd, 0
1045	db 10, 13, 'eye-catcher: SYSTEM16 END', 10, 13, 0, 0, 0 ; 32 bytes long
1046
1047	;
1048	; Check the segment size.
1049	;
1050	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
1051	%if ($ - $$) != 09000h
1052	%assign offActual ($ - $$)
1053	%error "Bad BS3SYSTEM16 segment size: " %+ offActual %+ ", expected 0x9000 (36864)"
1054	%endif
1055	%endif
1056

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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-system-data.asm@ 102157

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