1 | /* $Id: bs3-rm-InitMemory.c 106061 2024-09-16 14:03:52Z vboxsync $ */
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2 | /** @file
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3 | * BS3Kit - Bs3InitMemory
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2024 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * The contents of this file may alternatively be used under the terms
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26 | * of the Common Development and Distribution License Version 1.0
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27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | * in the VirtualBox distribution, in which case the provisions of the
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29 | * CDDL are applicable instead of those of the GPL.
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30 | *
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31 | * You may elect to license modified versions of this file under the
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32 | * terms and conditions of either the GPL or the CDDL or both.
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33 | *
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34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | */
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36 |
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37 |
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38 | /*********************************************************************************************************************************
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39 | * Header Files *
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40 | *********************************************************************************************************************************/
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41 | #define BS3_USE_RM_TEXT_SEG 1
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42 | #define BS3_BIOS_INLINE_RM
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43 | #include "bs3kit-template-header.h"
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44 | #include <iprt/asm-mem.h> /* This sucks */
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45 | #include "bs3-cmn-memory.h"
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46 | #include <iprt/asm.h>
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47 | #include <VBox/VMMDevTesting.h>
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48 |
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49 |
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50 |
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51 | /*********************************************************************************************************************************
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52 | * Global Variables *
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53 | *********************************************************************************************************************************/
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54 | /** Slab control structure for the 4K management of low memory (< 1MB). */
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55 | BS3SLABCTLLOW g_Bs3Mem4KLow;
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56 | /** Slab control structure for the 4K management of tiled upper memory,
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57 | * between 1 MB and 16MB. */
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58 | BS3SLABCTLUPPERTILED g_Bs3Mem4KUpperTiled;
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59 |
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60 |
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61 | /** Translates a power of two request size to an slab list index. */
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62 | uint8_t const g_aiBs3SlabListsByPowerOfTwo[12] =
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63 | {
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64 | /* 2^0 = 1 */ 0,
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65 | /* 2^1 = 2 */ 0,
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66 | /* 2^2 = 4 */ 0,
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67 | /* 2^3 = 8 */ 0,
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68 | /* 2^4 = 16 */ 0,
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69 | /* 2^5 = 32 */ 1,
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70 | /* 2^6 = 64 */ 2,
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71 | /* 2^7 = 128 */ 3,
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72 | /* 2^8 = 256 */ 4,
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73 | /* 2^9 = 512 */ 5,
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74 | /* 2^10 = 1024 */ -1
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75 | /* 2^11 = 2048 */ -1
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76 | };
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77 |
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78 | /** The slab list chunk sizes. */
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79 | uint16_t const g_acbBs3SlabLists[BS3_MEM_SLAB_LIST_COUNT] =
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80 | {
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81 | 16,
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82 | 32,
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83 | 64,
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84 | 128,
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85 | 256,
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86 | 512,
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87 | };
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88 |
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89 | /** Low memory slab lists, sizes given by g_acbBs3SlabLists. */
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90 | BS3SLABHEAD g_aBs3LowSlabLists[BS3_MEM_SLAB_LIST_COUNT];
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91 | /** Upper tiled memory slab lists, sizes given by g_acbBs3SlabLists. */
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92 | BS3SLABHEAD g_aBs3UpperTiledSlabLists[BS3_MEM_SLAB_LIST_COUNT];
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93 |
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94 | /** Slab control structure sizes for the slab lists.
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95 | * This is to help the allocator when growing a list. */
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96 | uint16_t const g_cbBs3SlabCtlSizesforLists[BS3_MEM_SLAB_LIST_COUNT] =
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97 | {
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98 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 16 / 8 /*=32*/), 16),
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99 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 32 / 8 /*=16*/), 32),
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100 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 64 / 8 /*=8*/), 64),
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101 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 128 / 8 /*=4*/), 128),
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102 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 256 / 8 /*=2*/), 256),
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103 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 512 / 8 /*=1*/), 512),
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104 | };
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105 |
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106 |
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107 | /** The end RAM address below 4GB (approximately). */
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108 | uint32_t g_uBs3EndOfRamBelow4G = 0;
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109 | /** The end RAM address above 4GB, zero if no memory above 4GB. */
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110 | uint64_t g_uBs3EndOfRamAbove4G = 0;
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111 |
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112 |
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113 | /**
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114 | * Adds a range of memory to the tiled slabs.
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115 | *
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116 | * @param uRange Start of range.
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117 | * @param cbRange Size of range.
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118 | */
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119 | static void bs3InitMemoryAddRange32(uint32_t uRange, uint32_t cbRange)
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120 | {
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121 | uint32_t uRangeEnd = uRange + cbRange;
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122 | if (uRangeEnd < uRange)
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123 | uRangeEnd = UINT32_MAX;
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124 |
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125 | /* Raise the end-of-ram-below-4GB marker? */
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126 | if (uRangeEnd > g_uBs3EndOfRamBelow4G)
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127 | g_uBs3EndOfRamBelow4G = uRangeEnd;
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128 |
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129 | /* Applicable to tiled memory? */
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130 | if ( uRange < BS3_SEL_TILED_AREA_SIZE
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131 | && ( uRange >= _1M
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132 | || uRangeEnd >= _1M))
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133 | {
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134 | uint16_t cPages;
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135 |
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136 | /* Adjust the start of the range such that it's at or above 1MB and page aligned. */
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137 | if (uRange < _1M)
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138 | {
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139 | cbRange -= _1M - uRange;
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140 | uRange = _1M;
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141 | }
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142 | else if (uRange & (_4K - 1U))
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143 | {
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144 | cbRange -= uRange & (_4K - 1U);
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145 | uRange = RT_ALIGN_32(uRange, _4K);
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146 | }
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147 |
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148 | /* Adjust the end/size of the range such that it's page aligned and not beyond the tiled area. */
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149 | if (uRangeEnd > BS3_SEL_TILED_AREA_SIZE)
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150 | {
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151 | cbRange -= uRangeEnd - BS3_SEL_TILED_AREA_SIZE;
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152 | uRangeEnd = BS3_SEL_TILED_AREA_SIZE;
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153 | }
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154 | else if (uRangeEnd & (_4K - 1U))
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155 | {
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156 | cbRange -= uRangeEnd & (_4K - 1U);
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157 | uRangeEnd &= ~(uint32_t)(_4K - 1U);
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158 | }
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159 |
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160 | /* If there is still something, enable it.
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161 | (We're a bit paranoid here don't trust the BIOS to only report a page once.) */
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162 | cPages = cbRange >> 12; /*div 4K*/
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163 | if (cPages)
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164 | {
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165 | unsigned i;
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166 | uRange -= _1M;
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167 | i = uRange >> 12; /*div _4K*/
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168 | while (cPages-- > 0)
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169 | {
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170 | uint16_t uLineToLong = ASMBitTestAndClear(g_Bs3Mem4KUpperTiled.Core.bmAllocated, i);
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171 | g_Bs3Mem4KUpperTiled.Core.cFreeChunks += uLineToLong;
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172 | i++;
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173 | }
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174 | }
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175 | }
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176 | }
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177 |
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178 |
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179 | BS3_DECL(void) BS3_FAR_CODE Bs3InitMemory_rm_far(void)
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180 | {
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181 | INT15E820ENTRY Entry = { 0, 0, 0, 0 };
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182 | uint32_t cbEntry = sizeof(Entry);
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183 | uint32_t uCont = 0;
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184 | uint16_t i;
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185 | uint16_t cPages;
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186 | uint32_t u32;
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187 | uint32_t BS3_FAR *pu32Mmio;
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188 |
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189 | /*
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190 | * Enable the A20 gate.
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191 | */
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192 | Bs3A20Enable();
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193 |
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194 | /*
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195 | * Low memory (4K chunks).
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196 | * - 0x00000 to 0x004ff - Interrupt Vector table, BIOS data area.
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197 | * - 0x01000 to 0x0ffff - Stacks.
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198 | * - 0x10000 to 0x1yyyy - BS3TEXT16
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199 | * - 0x20000 to 0x26fff - BS3SYSTEM16
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200 | * - 0x29000 to 0xzzzzz - BS3DATA16, BS3TEXT32, BS3TEXT64, BS3DATA32, BS3DATA64 (in that order).
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201 | * - 0xzzzzZ to 0x9fdff - Free conventional memory.
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202 | * - 0x9fc00 to 0x9ffff - Extended BIOS data area (exact start may vary).
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203 | * - 0xa0000 to 0xbffff - VGA MMIO
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204 | * - 0xc0000 to 0xc7fff - VGA BIOS
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205 | * - 0xc8000 to 0xeffff - ROMs, tables, unusable.
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206 | * - 0xf0000 to 0xfffff - PC BIOS.
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207 | */
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208 | Bs3SlabInit(&g_Bs3Mem4KLow.Core, sizeof(g_Bs3Mem4KLow), 0 /*uFlatSlabPtr*/, 0xA0000 /* 640 KB*/, _4K);
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209 |
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210 | /* Mark the stacks and whole image as allocated. */
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211 | cPages = (Bs3TotalImageSize + _4K - 1U) >> 12;
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212 | ASMBitSetRange(g_Bs3Mem4KLow.Core.bmAllocated, 0, 0x10 + cPages);
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213 |
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214 | /* Mark any unused pages between BS3TEXT16 and BS3SYSTEM16 as free. */
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215 | cPages = (Bs3Text16_Size + (uint32_t)_4K - 1U) >> 12;
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216 | ASMBitClearRange(g_Bs3Mem4KLow.Core.bmAllocated, 0x10U + cPages, 0x20U);
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217 |
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218 | /* In case the system has less than 640KB of memory, check the BDA variable for it. */
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219 | cPages = *(uint16_t BS3_FAR *)BS3_FP_MAKE(0x0000, 0x0413); /* KB of low memory */
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220 | if (cPages < 640)
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221 | {
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222 | cPages = 640 - cPages;
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223 | cPages = RT_ALIGN(cPages, 4);
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224 | cPages >>= 2;
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225 | ASMBitSetRange(g_Bs3Mem4KLow.Core.bmAllocated, 0xA0 - cPages, 0xA0);
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226 | }
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227 | else
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228 | ASMBitSet(g_Bs3Mem4KLow.Core.bmAllocated, 0x9F);
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229 |
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230 | /* Recalc free pages. */
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231 | cPages = 0;
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232 | i = g_Bs3Mem4KLow.Core.cChunks;
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233 | while (i-- > 0)
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234 | cPages += !ASMBitTest(g_Bs3Mem4KLow.Core.bmAllocated, i);
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235 | g_Bs3Mem4KLow.Core.cFreeChunks = cPages;
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236 |
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237 | /*
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238 | * First 16 MB of memory above 1MB. We start out by marking it all allocated.
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239 | */
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240 | Bs3SlabInit(&g_Bs3Mem4KUpperTiled.Core, sizeof(g_Bs3Mem4KUpperTiled), _1M, BS3_SEL_TILED_AREA_SIZE - _1M, _4K);
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241 |
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242 | ASMBitSetRange(g_Bs3Mem4KUpperTiled.Core.bmAllocated, 0, g_Bs3Mem4KUpperTiled.Core.cChunks);
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243 | g_Bs3Mem4KUpperTiled.Core.cFreeChunks = 0;
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244 |
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245 | /* Ask the BIOS about where there's memory, and make pages in between 1MB
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246 | and BS3_SEL_TILED_AREA_SIZE present. This means we're only interested
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247 | in entries describing usable memory, ASSUMING of course no overlaps. */
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248 | if ( (g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80386
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249 | && Bs3BiosInt15hE820_rm_far(&Entry, &cbEntry, &uCont))
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250 | {
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251 | unsigned i = 0;
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252 | do
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253 | {
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254 | if (Entry.uType == INT15E820_TYPE_USABLE)
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255 | {
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256 | if (!(Entry.uBaseAddr >> 32))
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257 | /* Convert from 64-bit to 32-bit value and record it. */
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258 | bs3InitMemoryAddRange32((uint32_t)Entry.uBaseAddr,
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259 | (Entry.cbRange >> 32) ? UINT32_C(0xfffff000) : (uint32_t)Entry.cbRange);
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260 | else
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261 | {
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262 | uint64_t uEnd = Entry.uBaseAddr + Entry.cbRange;
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263 | if (uEnd > g_uBs3EndOfRamAbove4G)
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264 | g_uBs3EndOfRamAbove4G = uEnd;
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265 | }
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266 | }
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267 |
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268 | /* next */
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269 | Entry.uType = 0;
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270 | cbEntry = sizeof(Entry);
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271 | i++;
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272 | } while ( uCont != 0
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273 | && i < 2048
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274 | && Bs3BiosInt15hE820_rm_far(&Entry, &cbEntry, &uCont));
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275 | }
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276 | /* Try the 286+ API for getting memory above 1MB and (usually) below 16MB. */
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277 | else if ( (g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80286
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278 | && (u32 = Bs3BiosInt15h88()) != UINT32_MAX
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279 | && u32 > 0)
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280 | bs3InitMemoryAddRange32(_1M, u32 * _1K);
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281 |
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282 | /*
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283 | * Check if we've got the VMMDev MMIO testing memory mapped above 1MB.
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284 | */
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285 | pu32Mmio = (uint32_t BS3_FAR *)BS3_FP_MAKE(VMMDEV_TESTING_MMIO_RM_SEL,
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286 | VMMDEV_TESTING_MMIO_RM_OFF2(VMMDEV_TESTING_MMIO_OFF_NOP));
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287 | if (*pu32Mmio == VMMDEV_TESTING_NOP_RET)
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288 | {
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289 | Bs3Printf("Memory: Found VMMDev MMIO testing region\n");
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290 | if (!ASMBitTestAndSet(g_Bs3Mem4KUpperTiled.Core.bmAllocated, 1))
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291 | g_Bs3Mem4KUpperTiled.Core.cFreeChunks--;
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292 |
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293 | }
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294 |
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295 | /*
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296 | * Initialize the slab lists.
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297 | */
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298 | for (i = 0; i < BS3_MEM_SLAB_LIST_COUNT; i++)
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299 | {
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300 | Bs3SlabListInit(&g_aBs3LowSlabLists[i], g_acbBs3SlabLists[i]);
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301 | Bs3SlabListInit(&g_aBs3UpperTiledSlabLists[i], g_acbBs3SlabLists[i]);
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302 | }
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303 |
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304 | #if 0
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305 | /*
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306 | * For debugging.
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307 | */
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308 | Bs3Printf("Memory-low: %u/%u chunks bmAllocated[]=", g_Bs3Mem4KLow.Core.cFreeChunks, g_Bs3Mem4KLow.Core.cChunks);
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309 | for (i = 0; i < 20; i++)
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310 | Bs3Printf("%02x ", g_Bs3Mem4KLow.Core.bmAllocated[i]);
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311 | Bs3Printf("\n");
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312 | Bs3Printf("Memory-upt: %u/%u chunks bmAllocated[]=", g_Bs3Mem4KUpperTiled.Core.cFreeChunks, g_Bs3Mem4KUpperTiled.Core.cChunks);
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313 | for (i = 0; i < 32; i++)
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314 | Bs3Printf("%02x ", g_Bs3Mem4KUpperTiled.Core.bmAllocated[i]);
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315 | Bs3Printf("...\n");
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316 | #endif
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317 | }
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318 |
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