VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-pit.c@ 96407

Last change on this file since 96407 was 96407, checked in by vboxsync, 2 years ago

scm copyright and license note update

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1/* $Id: bs3-cmn-pit.c 96407 2022-08-22 17:43:14Z vboxsync $ */
2/** @file
3 * BS3Kit - PIT Setup and Disable code.
4 */
5
6/*
7 * Copyright (C) 2007-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * The contents of this file may alternatively be used under the terms
26 * of the Common Development and Distribution License Version 1.0
27 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28 * in the VirtualBox distribution, in which case the provisions of the
29 * CDDL are applicable instead of those of the GPL.
30 *
31 * You may elect to license modified versions of this file under the
32 * terms and conditions of either the GPL or the CDDL or both.
33 *
34 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35 */
36
37
38/*********************************************************************************************************************************
39* Header Files *
40*********************************************************************************************************************************/
41#include "bs3kit-template-header.h"
42#include <iprt/asm-amd64-x86.h>
43
44
45/*********************************************************************************************************************************
46* Defined Constants And Macros *
47*********************************************************************************************************************************/
48#define BS3_PIT_PORT_CMD 0x43
49#define BS3_PIT_PORT_CH0_DATA 0x40
50#define BS3_PIT_HZ UINT32_C(1193182)
51
52
53/*********************************************************************************************************************************
54* External Symbols *
55*********************************************************************************************************************************/
56extern FNBS3TRAPHANDLER16 bs3PitIrqHandler_c16;
57extern FNBS3TRAPHANDLER32 bs3PitIrqHandler_c32;
58extern FNBS3TRAPHANDLER64 bs3PitIrqHandler_c64;
59
60
61#undef Bs3PitSetupAndEnablePeriodTimer
62BS3_CMN_DEF(void, Bs3PitSetupAndEnablePeriodTimer,(uint16_t cHzDesired))
63{
64 RTCCUINTREG fSaved;
65 uint16_t cCount;
66 uint16_t cMsInterval;
67 uint32_t cNsInterval;
68
69 /*
70 * Disable the PIT and make sure we've configured the IRQ handlers.
71 */
72 Bs3PitDisable();
73 Bs3PicSetup(false /*fForcedReInit*/);
74 Bs3TrapSetHandlerEx(0x70, bs3PitIrqHandler_c16, bs3PitIrqHandler_c32, bs3PitIrqHandler_c64);
75
76 /*
77 * Reset the counters.
78 */
79 g_cBs3PitNs = 0;
80 g_cBs3PitMs = 0;
81 g_cBs3PitTicks = 0;
82
83 /*
84 * Calculate an interval.
85 */
86 if (cHzDesired <= 18)
87 {
88 cCount = 0; /* 1193182 / 65536 = 18.206512451171875 Hz */
89 cHzDesired = 18;
90 cNsInterval = UINT32_C(54925401); /* 65536 / 1193182 = 0.054925401154224586022920225078823 seconds */
91 cMsInterval = 55;
92 }
93 else
94 {
95 cCount = BS3_PIT_HZ / cHzDesired;
96 cHzDesired = BS3_PIT_HZ / cCount;
97 /* 1s/1193182 = 0.000 000 838 095 110 38550698887512550474278 */
98#if ARCH_BITS == 64
99 cNsInterval = cCount * UINT64_C(838095110) / 1000000;
100#elif ARCH_BITS == 32
101 cNsInterval = cCount * UINT32_C(8381) / 10;
102#else
103 cNsInterval = cCount * 838;
104#endif
105 if (cCount <= 1194)
106 cMsInterval = 1; /* Must not be zero! */
107 else
108 cMsInterval = cCount / 1194;
109 }
110
111
112 /*
113 * Do the reprogramming.
114 */
115 fSaved = ASMIntDisableFlags();
116 ASMOutU8(BS3_PIT_PORT_CMD,
117 (0 << 6) /* select: channel 0 */
118 | (3 << 4) /* access mode: lobyte/hibyte */
119 | (2 << 1) /* operation: Mode 2 */
120 | 0 /* binary mode */
121 );
122 ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)cCount);
123 ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)(cCount >> 8));
124
125 g_cBs3PitIntervalNs = cNsInterval;
126 g_cBs3PitIntervalHz = cHzDesired;
127 g_cBs3PitIntervalMs = cMsInterval;
128
129 Bs3PicUpdateMask(UINT16_C(0xfffe), 0);
130
131 ASMSetFlags(fSaved);
132}
133
134
135#undef Bs3PitDisable
136BS3_CMN_DEF(void, Bs3PitDisable,(void))
137{
138 if (g_cBs3PitIntervalHz != 0)
139 {
140 RTCCUINTREG fSaved = ASMIntDisableFlags();
141
142 /*
143 * Not entirely sure what's the best way to do this, but let's try reprogram
144 * it to a no-reload mode like 0 and set the count to 1.
145 */
146 g_cBs3PitIntervalMs = 0;
147 ASMOutU8(BS3_PIT_PORT_CMD,
148 (0 << 6) /* select: channel 0 */
149 | (1 << 4) /* access mode: lobyte */
150 | (0 << 1) /* operation: Mode 0 */
151 | 0 /* binary mode */
152 );
153 ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)1);
154
155 /*
156 * Then mask the PIT IRQ on the PIC.
157 */
158 Bs3PicUpdateMask(UINT16_C(0xffff), 1);
159
160 ASMSetFlags(fSaved);
161 }
162
163 /*
164 * Reset the interval values (leave the ticks and elapsed ns/ms values as-is).
165 */
166 g_cBs3PitIntervalNs = 0;
167 g_cBs3PitIntervalMs = 0;
168 g_cBs3PitIntervalHz = 0;
169}
170
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