1 | /* $Id: bs3-cmn-pit.c 100782 2023-08-03 01:15:55Z vboxsync $ */
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2 | /** @file
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3 | * BS3Kit - PIT Setup and Disable code.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * The contents of this file may alternatively be used under the terms
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26 | * of the Common Development and Distribution License Version 1.0
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27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | * in the VirtualBox distribution, in which case the provisions of the
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29 | * CDDL are applicable instead of those of the GPL.
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30 | *
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31 | * You may elect to license modified versions of this file under the
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32 | * terms and conditions of either the GPL or the CDDL or both.
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33 | *
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34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | */
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36 |
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37 |
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38 | /*********************************************************************************************************************************
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39 | * Header Files *
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40 | *********************************************************************************************************************************/
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41 | #include "bs3kit-template-header.h"
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42 | #include <iprt/asm-amd64-x86.h>
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43 |
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44 |
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45 | /*********************************************************************************************************************************
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46 | * Defined Constants And Macros *
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47 | *********************************************************************************************************************************/
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48 | #define BS3_PIT_PORT_CMD 0x43
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49 | #define BS3_PIT_PORT_CH0_DATA 0x40
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50 | #define BS3_PIT_HZ UINT32_C(1193182)
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51 |
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52 |
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53 | /*********************************************************************************************************************************
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54 | * External Symbols *
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55 | *********************************************************************************************************************************/
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56 | extern FNBS3TRAPHANDLER16 bs3PitIrqHandler_c16;
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57 | extern FNBS3TRAPHANDLER32 bs3PitIrqHandler_c32;
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58 | extern FNBS3TRAPHANDLER64 bs3PitIrqHandler_c64;
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59 |
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60 |
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61 | #undef Bs3PitSetupAndEnablePeriodTimer
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62 | BS3_CMN_DEF(void, Bs3PitSetupAndEnablePeriodTimer,(uint16_t cHzDesired))
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63 | {
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64 | RTCCUINTREG fSaved;
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65 | uint16_t cCount;
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66 | uint16_t cMsInterval;
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67 | uint32_t cNsInterval;
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68 |
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69 | /*
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70 | * Disable the PIT and make sure we've configured the IRQ handlers.
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71 | */
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72 | Bs3PitDisable();
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73 | Bs3PicSetup(false /*fForcedReInit*/);
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74 | Bs3TrapSetHandlerEx(0x70, bs3PitIrqHandler_c16, bs3PitIrqHandler_c32, bs3PitIrqHandler_c64);
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75 |
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76 | /*
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77 | * Reset the counters and IRQ PC.
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78 | */
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79 | g_cBs3PitNs = 0;
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80 | g_cBs3PitMs = 0;
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81 | g_cBs3PitTicks = 0;
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82 | g_Bs3PitIrqRip.u = 0;
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83 |
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84 | /*
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85 | * Calculate an interval.
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86 | */
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87 | if (cHzDesired <= 18)
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88 | {
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89 | cCount = 0; /* 1193182 / 65536 = 18.206512451171875 Hz */
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90 | cHzDesired = 18;
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91 | cNsInterval = UINT32_C(54925401); /* 65536 / 1193182 = 0.054925401154224586022920225078823 seconds */
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92 | cMsInterval = 55;
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93 | }
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94 | else
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95 | {
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96 | cCount = BS3_PIT_HZ / cHzDesired;
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97 | cHzDesired = BS3_PIT_HZ / cCount;
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98 | /* 1s/1193182 = 0.000 000 838 095 110 38550698887512550474278 */
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99 | #if ARCH_BITS == 64
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100 | cNsInterval = cCount * UINT64_C(838095110) / 1000000;
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101 | #elif ARCH_BITS == 32
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102 | cNsInterval = cCount * UINT32_C(8381) / 10;
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103 | #else
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104 | cNsInterval = cCount * 838;
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105 | #endif
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106 | if (cCount <= 1194)
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107 | cMsInterval = 1; /* Must not be zero! */
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108 | else
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109 | cMsInterval = cCount / 1194;
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110 | }
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111 |
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112 |
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113 | /*
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114 | * Do the reprogramming.
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115 | */
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116 | fSaved = ASMIntDisableFlags();
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117 | ASMOutU8(BS3_PIT_PORT_CMD,
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118 | (0 << 6) /* select: channel 0 */
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119 | | (3 << 4) /* access mode: lobyte/hibyte */
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120 | | (2 << 1) /* operation: Mode 2 */
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121 | | 0 /* binary mode */
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122 | );
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123 | ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)cCount);
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124 | ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)(cCount >> 8));
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125 |
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126 | g_cBs3PitIntervalNs = cNsInterval;
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127 | g_cBs3PitIntervalHz = cHzDesired;
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128 | g_cBs3PitIntervalMs = cMsInterval;
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129 |
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130 | Bs3PicUpdateMask(UINT16_C(0xfffe), 0);
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131 |
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132 | ASMSetFlags(fSaved);
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133 | }
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134 |
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135 |
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136 | #undef Bs3PitDisable
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137 | BS3_CMN_DEF(void, Bs3PitDisable,(void))
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138 | {
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139 | if (g_cBs3PitIntervalHz != 0)
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140 | {
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141 | RTCCUINTREG fSaved = ASMIntDisableFlags();
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142 |
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143 | /*
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144 | * Not entirely sure what's the best way to do this, but let's try reprogram
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145 | * it to a no-reload mode like 0 and set the count to 1.
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146 | */
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147 | g_cBs3PitIntervalMs = 0;
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148 | ASMOutU8(BS3_PIT_PORT_CMD,
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149 | (0 << 6) /* select: channel 0 */
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150 | | (1 << 4) /* access mode: lobyte */
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151 | | (0 << 1) /* operation: Mode 0 */
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152 | | 0 /* binary mode */
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153 | );
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154 | ASMOutU8(BS3_PIT_PORT_CH0_DATA, (uint8_t)1);
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155 |
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156 | /*
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157 | * Then mask the PIT IRQ on the PIC.
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158 | */
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159 | Bs3PicUpdateMask(UINT16_C(0xffff), 1);
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160 |
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161 | ASMSetFlags(fSaved);
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162 | }
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163 |
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164 | /*
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165 | * Reset the interval values (leave the ticks and elapsed ns/ms values as-is).
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166 | */
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167 | g_cBs3PitIntervalNs = 0;
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168 | g_cBs3PitIntervalMs = 0;
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169 | g_cBs3PitIntervalHz = 0;
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170 | }
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171 |
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