bs3-fpustate-1-template.mac@ 65314

Last change on this file since 65314 was 61385, checked in by vboxsync, 9 years ago
bs3-fpustate-1: Extended the tests to force the ring-0 and raw-mode VMM code to do interesting things.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 9.5 KB

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1	; $Id: bs3-fpustate-1-template.mac 61385 2016-06-01 18:34:57Z vboxsync $
2	;; @file
3	; BS3Kit - bs3-fpustate-1, assembly template.
4	;
5
6	;
7	; Copyright (C) 2007-2016 Oracle Corporation
8	;
9	; This file is part of VirtualBox Open Source Edition (OSE), as
10	; available from http://www.virtualbox.org. This file is free software;
11	; you can redistribute it and/or modify it under the terms of the GNU
12	; General Public License (GPL) as published by the Free Software
13	; Foundation, in version 2 as it comes in the "COPYING" file of the
14	; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	;
17	; The contents of this file may alternatively be used under the terms
18	; of the Common Development and Distribution License Version 1.0
19	; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	; VirtualBox OSE distribution, in which case the provisions of the
21	; CDDL are applicable instead of those of the GPL.
22	;
23	; You may elect to license modified versions of this file under the
24	; terms and conditions of either the GPL or the CDDL or both.
25	;
26
27
28	;*********************************************************************************************************************************
29	;* Header Files *
30	;*********************************************************************************************************************************
31	%include "bs3kit-template-header.mac" ; setup environment
32
33
34	;*********************************************************************************************************************************
35	;* External Symbols *
36	;*********************************************************************************************************************************
37	TMPL_BEGIN_TEXT
38
39
40	;;
41	; Initializes the FPU state and saves it to pFxState.
42	;
43	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR pFxState, void pvMmioReg);
44	;
45	BS3_PROC_BEGIN_MODE bs3FpuState1_InitState, BS3_PBC_NEAR
46	BS3_CALL_CONV_PROLOG 2
47	push xBP
48	mov xBP, xSP
49	push xBX
50	TONLY16 push ds
51	pushf
52	TONLY64 sub xSP, 20h
53
54	;
55	; x87 state.
56	;
57	fninit
58	fld dword [TMPL_DATA16_WRT(g_r32V1)]
59	fld qword [TMPL_DATA16_WRT(g_r64V1)]
60	fld tword [TMPL_DATA16_WRT(g_r80V1)]
61	fld qword [TMPL_DATA16_WRT(g_r64V1)]
62	fld dword [TMPL_DATA16_WRT(g_r32V2)]
63	fld dword [TMPL_DATA16_WRT(g_r80_QNaNMax)]
64	fld tword [TMPL_DATA16_WRT(g_r80_SNaNMax)]
65	fld tword [TMPL_DATA16_WRT(g_r80_ThirtyTwo)]
66
67	;
68	; We'll later be using FMUL to test actually using the FPU in RC & R0,
69	; so for everything to line up correctly with FPU CS:IP and FPU DS:DP,
70	; we'll call the function here too. This has the benefitial side effect
71	; of loading correct FPU DS/DS values so we can check that they don't
72	; get lost either. Also, we now don't have to guess whether the CPU
73	; emulation sets CS/DS or not.
74	;
75	TONLY16 push xPRE [xBP + xCB + cbCurRetAddr + sCB + 2]
76	push xPRE [xBP + xCB + cbCurRetAddr + sCB]
77	BS3_CALL TMPL_NM(bs3FpuState1_FMul), 1
78	add xSP, sCB
79
80	;
81	; SSE state
82	;
83	movdqu xmm0, [TMPL_DATA16_WRT(g_r32_0dot1)]
84	movdqu xmm1, [TMPL_DATA16_WRT(g_r32_Two)]
85	movdqu xmm2, [TMPL_DATA16_WRT(g_r32_ThirtyTwo)]
86	movdqu xmm3, [TMPL_DATA16_WRT(g_r32_ThirtyTwo)]
87	movdqu xmm4, [TMPL_DATA16_WRT(g_r32_SNaN)]
88	movdqu xmm5, [TMPL_DATA16_WRT(g_r32_NegQNaN)]
89	movdqu xmm6, [TMPL_DATA16_WRT(g_r64_Zero)]
90	movdqu xmm7, [TMPL_DATA16_WRT(g_r64_Two)]
91	%if TMPL_BITS == 64
92	movdqu xmm8, [TMPL_DATA16_WRT(g_r64_Ten)]
93	movdqu xmm9, [TMPL_DATA16_WRT(g_r64_ThirtyTwo)]
94	movdqu xmm10, [TMPL_DATA16_WRT(g_r64_Max)]
95	movdqu xmm11, [TMPL_DATA16_WRT(g_r64_SNaN)]
96	movdqu xmm12, [TMPL_DATA16_WRT(g_r64_NegQNaN)]
97	movdqu xmm13, [TMPL_DATA16_WRT(g_r64_QNaNMax)]
98	movdqu xmm14, [TMPL_DATA16_WRT(g_r64_DnMax)]
99	movdqu xmm15, [TMPL_DATA16_WRT(g_r80_Eleven)]
100	%endif
101
102	;; @todo status regs
103
104	;
105	; Save it. Note that DS is no longer valid in 16-bit code.
106	; To be on the safe side, we load and save the state once again.
107	;
108	TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
109	mov xBX, [xBP + xCB + cbCurRetAddr]
110	cli
111	%if TMPL_BITS == 64
112	o64 fxsave [xBX]
113	fninit
114	o64 fxrstor [xBX]
115	o64 fxsave [xBX]
116	%else
117	fxsave [xBX]
118	fninit
119	fxrstor [xBX]
120	fxsave [xBX]
121	%endif
122
123	.return:
124	TONLY64 add xSP, 20h
125	popf
126	TONLY16 pop ds
127	pop xBX
128	mov xSP, xBP
129	pop xBP
130	BS3_CALL_CONV_EPILOG 2
131	BS3_HYBRID_RET
132	BS3_PROC_END_MODE bs3FpuState1_InitState
133
134
135	;;
136	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
137	;
138	BS3_PROC_BEGIN_MODE bs3FpuState1_Restore, BS3_PBC_NEAR
139	push xBP
140	mov xBP, xSP
141
142	%if TMPL_BITS == 64
143	o64 fxrstor [rcx]
144
145	%elif TMPL_BITS == 32
146	mov eax, [xBP + xCB*2]
147	fxrstor [eax]
148
149	%elif TMPL_BITS == 16
150	mov ax, ds
151	mov ds, [xBP + xCB + cbCurRetAddr + 2]
152	mov xBX, [xBP + xCB + cbCurRetAddr]
153	fxrstor [bx]
154	mov ds, ax
155	%else
156	%error TMPL_BITS
157	%endif
158
159	mov xSP, xBP
160	pop xBP
161	BS3_HYBRID_RET
162	BS3_PROC_END_MODE bs3FpuState1_Restore
163
164	;;
165	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
166	;
167	BS3_PROC_BEGIN_MODE bs3FpuState1_Save, BS3_PBC_NEAR
168	push xBP
169	mov xBP, xSP
170
171	%if TMPL_BITS == 64
172	o64 fxsave [rcx]
173
174	%elif TMPL_BITS == 32
175	mov eax, [xBP + xCB*2]
176	fxsave [eax]
177
178	%elif TMPL_BITS == 16
179	push bx
180	push ds
181	mov ds, [xBP + xCB + cbCurRetAddr + 2]
182	mov bx, [xBP + xCB + cbCurRetAddr]
183	fxsave [bx]
184	pop ds
185	pop bx
186	%else
187	%error TMPL_BITS
188	%endif
189
190	mov xSP, xBP
191	pop xBP
192	BS3_HYBRID_RET
193	BS3_PROC_END_MODE bs3FpuState1_Save
194
195
196	;;
197	; Performs a MOVDQU write on the specified memory.
198	;
199	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void *pvMmioReg);
200	;
201	BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Write, BS3_PBC_NEAR
202	BS3_CALL_CONV_PROLOG 1
203	push xBP
204	mov xBP, xSP
205	push xBX
206	TONLY16 push ds
207
208	; Load the register pointer.
209	mov xBX, [xBP + xCB + cbCurRetAddr]
210	TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
211
212	; Do read.
213	movdqu [xBX], xmm3
214
215	TONLY16 pop ds
216	pop xBX
217	leave
218	BS3_CALL_CONV_EPILOG 1
219	BS3_HYBRID_RET
220	BS3_PROC_END_MODE bs3FpuState1_MovDQU_Write
221
222
223	;;
224	; Performs a MOVDQU write to the specified memory.
225	;
226	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void *pvMmioReg);
227	;
228	BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Read, BS3_PBC_NEAR
229	BS3_CALL_CONV_PROLOG 1
230	push xBP
231	mov xBP, xSP
232	push xBX
233	TONLY16 push ds
234	sub xSP, 20h
235	%if TMPL_BITS == 16
236	movdqu [xBP - xCB - xCB - 2 - 18h], xmm2
237	%else
238	movdqu [xSP], xmm2
239	%endif
240
241	; Load the register pointer.
242	mov xBX, [xBP + xCB + cbCurRetAddr]
243	TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
244
245
246	; Do read.
247	movdqu xmm2, [xBX]
248
249	%if TMPL_BITS == 16
250	movdqu xmm2, [xBP - xCB - xCB - 2 - 18h]
251	%else
252	movdqu xmm2, [xSP]
253	%endif
254	add xSP, 20h
255	TONLY16 pop ds
256	pop xBX
257	mov xSP, xBP
258	pop xBP
259	BS3_CALL_CONV_EPILOG 1
260	BS3_HYBRID_RET
261	BS3_PROC_END_MODE bs3FpuState1_MovDQU_Read
262
263
264	;;
265	; Performs a FNSTENV write on the specified memory.
266	;
267	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void *pvMmioReg);
268	;
269	BS3_PROC_BEGIN_MODE bs3FpuState1_FNStEnv, BS3_PBC_NEAR
270	BS3_CALL_CONV_PROLOG 1
271	push xBP
272	mov xBP, xSP
273	push xBX
274	TONLY16 push ds
275
276	; Load the register pointer.
277	mov xBX, [xBP + xCB + cbCurRetAddr]
278	TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
279
280	; Just write.
281	fnstenv [xBX]
282
283	TONLY16 pop ds
284	pop xBX
285	mov xSP, xBP
286	pop xBP
287	BS3_CALL_CONV_EPILOG 1
288	BS3_HYBRID_RET
289	BS3_PROC_END_MODE bs3FpuState1_FNStEnv
290
291
292	;;
293	; Performs a FMUL on the specified memory, after writing a 64-bit value to it first.
294	;
295	; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void *pvMmioReg);
296	;
297	BS3_PROC_BEGIN_MODE bs3FpuState1_FMul, BS3_PBC_NEAR
298	BS3_CALL_CONV_PROLOG 1
299	push xBP
300	mov xBP, xSP
301	push xBX
302	TONLY16 push ds
303
304	; Load the value we'll be multiplying with into register(s) while ds is DATA16.
305	mov sAX, [TMPL_DATA16_WRT(g_r64_One)]
306	TNOT64 mov edx, [4 + TMPL_DATA16_WRT(g_r64_One)]
307
308	; Load the register pointer.
309	mov xBX, [xBP + xCB + cbCurRetAddr]
310	TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
311
312	; Just write.
313	mov [xBX], sAX
314	TNOT64 mov [xBX + 4], edx
315	call .do_it
316
317	TONLY16 pop ds
318	pop xBX
319	mov xSP, xBP
320	pop xBP
321	BS3_CALL_CONV_EPILOG 1
322	BS3_HYBRID_RET
323	.do_it:
324	fmul qword [xBX]
325	ret
326	BS3_PROC_END_MODE bs3FpuState1_FMul
327
328
329	%include "bs3kit-template-footer.mac" ; reset environment
330

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