VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.c@ 90780

Last change on this file since 90780 was 83329, checked in by vboxsync, 5 years ago

ValKit/bs3-fpustate-1: amd adjustments.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 14.0 KB
Line 
1/* $Id: bs3-fpustate-1-template.c 83329 2020-03-19 13:08:23Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-fpustate-1, C code template.
4 */
5
6/*
7 * Copyright (C) 2007-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27
28/*********************************************************************************************************************************
29* Header Files *
30*********************************************************************************************************************************/
31#include <iprt/asm.h>
32#include <iprt/asm-amd64-x86.h>
33#include <VBox/VMMDevTesting.h>
34
35
36/*********************************************************************************************************************************
37* Defined Constants And Macros *
38*********************************************************************************************************************************/
39
40
41#ifdef BS3_INSTANTIATING_CMN
42
43/**
44 * Displays the differences between the two states.
45 */
46# define bs3FpuState1_Diff BS3_CMN_NM(bs3FpuState1_Diff)
47BS3_DECL_NEAR(void) bs3FpuState1_Diff(X86FXSTATE const BS3_FAR *pExpected, X86FXSTATE const BS3_FAR *pChecking)
48{
49 unsigned i;
50
51# define CHECK(a_Member, a_Fmt) \
52 if (pExpected->a_Member != pChecking->a_Member) \
53 Bs3TestPrintf(" " #a_Member ": " a_Fmt ", expected " a_Fmt "\n", pChecking->a_Member, pExpected->a_Member); \
54 else do { } while (0)
55 CHECK(FCW, "%#RX16");
56 CHECK(FSW, "%#RX16");
57 CHECK(FTW, "%#RX16");
58 CHECK(FOP, "%#RX16");
59 CHECK(FPUIP, "%#RX32");
60 CHECK(CS, "%#RX16");
61 CHECK(Rsrvd1, "%#RX16");
62 CHECK(FPUDP, "%#RX32");
63 CHECK(DS, "%#RX16");
64 CHECK(Rsrvd2, "%#RX16");
65 CHECK(MXCSR, "%#RX32");
66 CHECK(MXCSR_MASK, "%#RX32");
67# undef CHECK
68 for (i = 0; i < RT_ELEMENTS(pExpected->aRegs); i++)
69 if ( pChecking->aRegs[i].au64[0] != pExpected->aRegs[i].au64[0]
70 || pChecking->aRegs[i].au64[1] != pExpected->aRegs[i].au64[1])
71 Bs3TestPrintf("st%u: %.16Rhxs\n"
72 "exp: %.16Rhxs\n",
73 i, &pChecking->aRegs[i], &pExpected->aRegs[i]);
74 for (i = 0; i < RT_ELEMENTS(pExpected->aXMM); i++)
75 if ( pChecking->aXMM[i].au64[0] != pExpected->aXMM[i].au64[0]
76 || pChecking->aXMM[i].au64[1] != pExpected->aXMM[i].au64[1])
77 Bs3TestPrintf("xmm%u: %.16Rhxs\n"
78 " %sexp: %.16Rhxs\n",
79 i, &pChecking->aRegs[i], &pExpected->aRegs[i], i >= 10 ? " " : "");
80}
81
82
83#endif /* BS3_INSTANTIATING_CMN */
84
85
86/*
87 * Mode specific code.
88 * Mode specific code.
89 * Mode specific code.
90 */
91#ifdef BS3_INSTANTIATING_MODE
92# if TMPL_MODE == BS3_MODE_PE32 \
93 || TMPL_MODE == BS3_MODE_PP32 \
94 || TMPL_MODE == BS3_MODE_PAE32 \
95 || TMPL_MODE == BS3_MODE_LM64 \
96 || TMPL_MODE == BS3_MODE_RM
97
98/* Assembly helpers: */
99BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void BS3_FAR *pvMmioReg);
100BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
101BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
102
103BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void BS3_FAR *pvMmioReg);
104BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvResult);
105BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void BS3_FAR *pvMmioReg);
106BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Read)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvResult);
107BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Write)(void BS3_FAR *pvMmioReg);
108BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvNoResult);
109
110
111/**
112 * Tests for FPU state corruption.
113 *
114 * First we don't do anything to quit guest context for a while.
115 * Then we start testing weird MMIO accesses, some which amonger other things
116 * forces the use of the FPU state or host FPU to do the emulation. Both are a
117 * little complicated in raw-mode and ring-0 contexts.
118 *
119 * We ASSUME FXSAVE/FXRSTOR support here.
120 */
121BS3_DECL_FAR(uint8_t) TMPL_NM(bs3FpuState1_Corruption)(uint8_t bMode)
122{
123 /* We don't need to test that many modes, probably. */
124
125 uint8_t abBuf[sizeof(X86FXSTATE)*2 + 32];
126 uint8_t BS3_FAR *pbTmp = &abBuf[0x10 - (((uintptr_t)abBuf) & 0x0f)];
127 X86FXSTATE BS3_FAR *pExpected = (X86FXSTATE BS3_FAR *)pbTmp;
128 X86FXSTATE BS3_FAR *pChecking = pExpected + 1;
129 uint32_t iLoop;
130 uint32_t uStartTick;
131 bool fMmioReadback;
132 bool fReadBackError = false;
133 bool fReadError = false;
134 BS3PTRUNION MmioReg;
135 BS3CPUVENDOR const enmCpuVendor = Bs3GetCpuVendor();
136 bool const fFastFxSaveRestore = RT_BOOL(ASMCpuId_EDX(0x80000001) & X86_CPUID_AMD_FEATURE_EDX_FFXSR);
137 //bool const fFdpXcptOnly = (ASMCpuIdEx_EBX(7, 0) & X86_CPUID_STEXT_FEATURE_EBX_FDP_EXCPTN_ONLY)
138 // && ASMCpuId_EAX(0) >= 7;
139
140# undef CHECK_STATE
141# define CHECK_STATE(a_Instr) \
142 do { \
143 TMPL_NM(bs3FpuState1_Save)(pChecking); \
144 if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0) \
145 { \
146 Bs3TestFailedF("State differs after " #a_Instr " (write) in loop #%RU32\n", iLoop); \
147 bs3FpuState1_Diff(pExpected, pChecking); \
148 Bs3PitDisable(); \
149 return 1; \
150 } \
151 } while (0)
152
153 /*
154 * Setup the test.
155 */
156
157 /* Make this code executable in raw-mode. A bit tricky. */
158 ASMSetCR0(ASMGetCR0() | X86_CR0_WP);
159 Bs3PitSetupAndEnablePeriodTimer(20);
160 ASMIntEnable();
161# if ARCH_BITS != 64
162 ASMHalt();
163# endif
164
165 /* Figure out which MMIO region we'll be using so we can correctly initialize FPUDS. */
166# if BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
167 MmioReg.pv = BS3_FP_MAKE(0xffff, VMMDEV_TESTING_MMIO_BASE - _1M + 16);
168# elif BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
169 MmioReg.pv = BS3_FP_MAKE(BS3_SEL_VMMDEV_MMIO16, VMMDEV_TESTING_MMIO_BASE - _1M);
170# else
171 MmioReg.pv = (uint8_t *)VMMDEV_TESTING_MMIO_BASE;
172# endif
173 if (MmioReg.pu32[VMMDEV_TESTING_MMIO_OFF_NOP / sizeof(uint32_t)] == VMMDEV_TESTING_NOP_RET)
174 {
175 fMmioReadback = true;
176 MmioReg.pb += VMMDEV_TESTING_MMIO_OFF_READBACK;
177 }
178 else
179 {
180 Bs3TestPrintf("VMMDev MMIO not found, using VGA instead\n");
181 fMmioReadback = false;
182 MmioReg.pv = Bs3XptrFlatToCurrent(0xa7800);
183 }
184
185 /* Make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
186 g_usBs3TestStep = 1;
187 ASMSetCR0((ASMGetCR0() & ~(X86_CR0_TS | X86_CR0_EM)) | X86_CR0_MP);
188 ASMSetCR4(ASMGetCR4() | X86_CR4_OSFXSR /*| X86_CR4_OSXMMEEXCPT*/);
189
190 /* Come up with a distinct state. We do that from assembly (will do FPU in R0/RC). */
191 g_usBs3TestStep = 2;
192 Bs3MemSet(abBuf, 0x42, sizeof(abBuf));
193 TMPL_NM(bs3FpuState1_InitState)(pExpected, MmioReg.pb);
194
195
196 /*
197 * Test #1: Check that we can keep it consistent for a while.
198 */
199 g_usBs3TestStep = 3;
200 uStartTick = g_cBs3PitTicks;
201 for (iLoop = 0; iLoop < _16M; iLoop++)
202 {
203 CHECK_STATE(nop);
204 if ( (iLoop & 0xffff) == 0xffff
205 && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
206 break;
207 }
208
209 /*
210 * Test #2: Use various FPU, SSE and weird instructions to do MMIO writes.
211 *
212 * We'll use the VMMDev readback register if possible, but make do
213 * with VGA if not configured.
214 */
215 g_usBs3TestStep = 4;
216 uStartTick = g_cBs3PitTicks;
217 for (iLoop = 0; iLoop < _1M; iLoop++)
218 {
219 unsigned off;
220 uint8_t abCompare[64];
221 uint8_t abReadback[64];
222
223 /* Macros */
224# undef CHECK_READBACK_WRITE_RUN
225# define CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type) \
226 do { \
227 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
228 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
229 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
230 a_Worker((a_Type *)&MmioReg.pb[off]); \
231 if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
232 { \
233 a_Worker((a_Type *)&abCompare[0]); \
234 Bs3MemCpy(abReadback, &MmioReg.pb[off], sizeof(a_Type)); \
235 if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
236 { \
237 Bs3TestFailedF("Read back error for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
238 iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
239 fReadBackError = true; \
240 } \
241 } \
242 } while (0)
243
244# undef CHECK_READBACK_WRITE
245# define CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type) \
246 CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type); \
247 CHECK_STATE(a_Instr)
248# undef CHECK_READBACK_WRITE_Z
249# define CHECK_READBACK_WRITE_Z(a_Instr, a_Worker, a_Type) \
250 do { \
251 if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
252 { \
253 Bs3MemZero(&abCompare[0], sizeof(a_Type)); \
254 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
255 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
256 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
257 Bs3MemZero(&MmioReg.pb[off], sizeof(a_Type)); \
258 } \
259 CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type); \
260 } while (0)
261
262# undef CHECK_READBACK_READ_RUN
263#define CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type) \
264 do { \
265 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
266 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
267 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
268 a_Worker((a_Type *)&MmioReg.pb[off], (a_Type *)&abReadback[0]); \
269 TMPL_NM(bs3FpuState1_Save)(pChecking); \
270 } while (0)
271# undef CHECK_READBACK_READ
272# define CHECK_READBACK_READ(a_Instr, a_Worker, a_Type) \
273 do { \
274 Bs3MemSet(&abReadback[0], 0xcc, sizeof(abReadback)); \
275 CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type); \
276 CHECK_STATE(a_Instr); \
277 if (!fReadError || iLoop == 0) \
278 { \
279 Bs3MemZero(&abCompare[0], sizeof(abCompare)); \
280 Bs3MemCpy(&abCompare[0], &MmioReg.pb[off], sizeof(a_Type)); \
281 if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
282 { \
283 Bs3TestFailedF("Read result check for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
284 iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
285 fReadError = true; \
286 } \
287 } \
288 } while (0)
289
290 /* The tests. */
291 CHECK_READBACK_WRITE_Z(SIDT, ASMGetIDTR, RTIDTR);
292 CHECK_READBACK_WRITE_Z(FNSTENV, TMPL_NM(bs3FpuState1_FNStEnv), X86FSTENV32P); /** @todo x86.h is missing types */
293 CHECK_READBACK_WRITE( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Write), X86XMMREG);
294 CHECK_READBACK_READ( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Read), X86XMMREG);
295 CHECK_READBACK_WRITE( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Write), X86XMMREG);
296 CHECK_READBACK_READ( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Read), X86XMMREG);
297
298 /* Using the FPU is a little complicated, but we really need to check these things. */
299 CHECK_READBACK_READ_RUN(FMUL, TMPL_NM(bs3FpuState1_FMul), uint64_t);
300 if (enmCpuVendor == BS3CPUVENDOR_INTEL)
301# if BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
302 pExpected->FOP = 0x040f; // skylake 6700k
303# else
304 pExpected->FOP = 0x040b; // skylake 6700k
305# endif
306 else if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
307 pExpected->FOP = 0x0000; // Zen2 (3990x)
308 else
309 pExpected->FOP = 0x07dc; // dunno where we got this.
310# if ARCH_BITS == 64
311 pExpected->FPUDP = (uint32_t) (uintptr_t)&MmioReg.pb[off];
312 pExpected->DS = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 32);
313 pExpected->Rsrvd2 = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 48);
314# elif BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
315 pExpected->FPUDP = Bs3SelPtrToFlat(&MmioReg.pb[off]);
316# else
317 pExpected->FPUDP = BS3_FP_OFF(&MmioReg.pb[off]);
318# endif
319 if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
320 pExpected->FPUDP = 0; // Zen2 (3990x)
321 CHECK_STATE(FMUL);
322
323 /* check for timeout every now an then. */
324 if ( (iLoop & 0xfff) == 0xfff
325 && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
326 break;
327 }
328
329 Bs3PitDisable();
330 return 0;
331}
332# endif
333#endif /* BS3_INSTANTIATING_MODE */
334
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette