1 | /* $Id: bs3-fpustate-1-template.c 61394 2016-06-02 00:49:44Z vboxsync $ */
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2 | /** @file
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3 | * BS3Kit - bs3-fpustate-1, C code template.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2016 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | */
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26 |
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27 |
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28 | /*********************************************************************************************************************************
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29 | * Header Files *
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30 | *********************************************************************************************************************************/
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31 | #include <iprt/asm.h>
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32 | #include <iprt/asm-amd64-x86.h>
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33 | #include <VBox/VMMDevTesting.h>
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34 |
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35 |
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36 | /*********************************************************************************************************************************
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37 | * Defined Constants And Macros *
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38 | *********************************************************************************************************************************/
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39 |
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40 |
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41 | #ifdef BS3_INSTANTIATING_CMN
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42 |
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43 | /**
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44 | * Displays the differences between the two states.
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45 | */
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46 | # define bs3FpuState1_Diff BS3_CMN_NM(bs3FpuState1_Diff)
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47 | BS3_DECL_NEAR(void) bs3FpuState1_Diff(X86FXSTATE const BS3_FAR *pExpected, X86FXSTATE const BS3_FAR *pChecking)
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48 | {
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49 | unsigned i;
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50 |
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51 | # define CHECK(a_Member, a_Fmt) \
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52 | if (pExpected->a_Member != pChecking->a_Member) \
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53 | Bs3TestPrintf(" " #a_Member ": " a_Fmt ", expected " a_Fmt "\n", pChecking->a_Member, pExpected->a_Member); \
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54 | else do { } while (0)
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55 | CHECK(FCW, "%#RX16");
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56 | CHECK(FSW, "%#RX16");
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57 | CHECK(FTW, "%#RX16");
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58 | CHECK(FOP, "%#RX16");
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59 | CHECK(FPUIP, "%#RX32");
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60 | CHECK(CS, "%#RX16");
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61 | CHECK(Rsrvd1, "%#RX16");
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62 | CHECK(FPUDP, "%#RX32");
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63 | CHECK(DS, "%#RX16");
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64 | CHECK(Rsrvd2, "%#RX16");
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65 | CHECK(MXCSR, "%#RX32");
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66 | CHECK(MXCSR_MASK, "%#RX32");
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67 | # undef CHECK
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68 | for (i = 0; i < RT_ELEMENTS(pExpected->aRegs); i++)
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69 | if ( pChecking->aRegs[i].au64[0] != pExpected->aRegs[i].au64[0]
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70 | || pChecking->aRegs[i].au64[1] != pExpected->aRegs[i].au64[1])
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71 | Bs3TestPrintf("st%u: %.16Rhxs\n"
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72 | "exp: %.16Rhxs\n",
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73 | i, &pChecking->aRegs[i], &pExpected->aRegs[i]);
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74 | for (i = 0; i < RT_ELEMENTS(pExpected->aXMM); i++)
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75 | if ( pChecking->aXMM[i].au64[0] != pExpected->aXMM[i].au64[0]
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76 | || pChecking->aXMM[i].au64[1] != pExpected->aXMM[i].au64[1])
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77 | Bs3TestPrintf("xmm%u: %.16Rhxs\n"
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78 | " %sexp: %.16Rhxs\n",
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79 | i, &pChecking->aRegs[i], &pExpected->aRegs[i], i >= 10 ? " " : "");
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80 | }
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81 |
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82 |
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83 | #endif /* BS3_INSTANTIATING_CMN */
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84 |
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85 |
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86 | /*
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87 | * Mode specific code.
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88 | * Mode specific code.
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89 | * Mode specific code.
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90 | */
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91 | #ifdef BS3_INSTANTIATING_MODE
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92 | # if TMPL_MODE == BS3_MODE_PE32 \
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93 | || TMPL_MODE == BS3_MODE_PP32 \
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94 | || TMPL_MODE == BS3_MODE_PAE32 \
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95 | || TMPL_MODE == BS3_MODE_LM64 \
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96 | || TMPL_MODE == BS3_MODE_RM
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97 |
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98 | /* Assembly helpers: */
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99 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void BS3_FAR *pvMmioReg);
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100 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
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101 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
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102 |
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103 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void BS3_FAR *pvMmioReg);
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104 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void BS3_FAR *pvMmioReg);
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105 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void BS3_FAR *pvMmioReg);
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106 | BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void BS3_FAR *pvMmioReg);
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107 |
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108 |
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109 | /**
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110 | * Tests for FPU state corruption.
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111 | *
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112 | * First we don't do anything to quit guest context for a while.
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113 | * Then we start testing weird MMIO accesses, some which amonger other things
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114 | * forces the use of the FPU state or host FPU to do the emulation. Both are a
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115 | * little complicated in raw-mode and ring-0 contexts.
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116 | *
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117 | * We ASSUME FXSAVE/FXRSTOR support here.
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118 | */
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119 | BS3_DECL_FAR(uint8_t) TMPL_NM(bs3FpuState1_Corruption)(uint8_t bMode)
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120 | {
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121 | /* We don't need to test that many modes, probably. */
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122 |
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123 | uint8_t abBuf[sizeof(X86FXSTATE)*2 + 32];
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124 | uint8_t BS3_FAR *pbTmp = &abBuf[0x10 - (((uintptr_t)abBuf) & 0x0f)];
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125 | X86FXSTATE BS3_FAR *pExpected = (X86FXSTATE BS3_FAR *)pbTmp;
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126 | X86FXSTATE BS3_FAR *pChecking = pExpected + 1;
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127 | uint32_t iLoop;
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128 | uint32_t uStartTick;
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129 | bool fMmioReadback;
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130 | bool fReadBackError = false;
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131 | BS3PTRUNION MmioReg;
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132 |
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133 |
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134 | # undef CHECK_STATE
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135 | # define CHECK_STATE(a_Instr) \
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136 | do { \
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137 | TMPL_NM(bs3FpuState1_Save)(pChecking); \
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138 | if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0) \
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139 | { \
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140 | Bs3TestFailedF("State differs after " #a_Instr " (write) in loop #%RU32\n", iLoop); \
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141 | bs3FpuState1_Diff(pExpected, pChecking); \
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142 | Bs3PitDisable(); \
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143 | return 1; \
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144 | } \
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145 | } while (0)
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146 |
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147 | /*
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148 | * Setup the test.
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149 | */
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150 |
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151 | /* Make this code executable in raw-mode. A bit tricky. */
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152 | ASMSetCR0(ASMGetCR0() | X86_CR0_WP);
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153 | Bs3PitSetupAndEnablePeriodTimer(20);
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154 | ASMIntEnable();
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155 | # if ARCH_BITS != 64
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156 | ASMHalt();
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157 | # endif
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158 |
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159 | /* Figure out which MMIO region we'll be using so we can correctly initialize FPUDS. */
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160 | # if BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
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161 | MmioReg.pv = BS3_FP_MAKE(0xffff, VMMDEV_TESTING_MMIO_BASE - _1M + 16);
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162 | # elif BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
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163 | MmioReg.pv = BS3_FP_MAKE(BS3_SEL_VMMDEV_MMIO16, VMMDEV_TESTING_MMIO_BASE - _1M);
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164 | # else
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165 | MmioReg.pv = (uint8_t *)VMMDEV_TESTING_MMIO_BASE;
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166 | # endif
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167 | if (MmioReg.pu32[VMMDEV_TESTING_MMIO_OFF_NOP / sizeof(uint32_t)] == VMMDEV_TESTING_NOP_RET)
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168 | {
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169 | fMmioReadback = true;
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170 | MmioReg.pb += VMMDEV_TESTING_MMIO_OFF_READBACK;
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171 | }
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172 | else
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173 | {
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174 | Bs3TestPrintf("VMMDev MMIO not found, using VGA instead\n");
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175 | fMmioReadback = false;
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176 | MmioReg.pv = Bs3XptrFlatToCurrent(0xa7800);
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177 | }
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178 |
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179 | /* Make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
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180 | g_usBs3TestStep = 1;
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181 | ASMSetCR0((ASMGetCR0() & ~(X86_CR0_TS | X86_CR0_EM)) | X86_CR0_MP);
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182 | ASMSetCR4(ASMGetCR4() | X86_CR4_OSFXSR /*| X86_CR4_OSXMMEEXCPT*/);
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183 |
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184 | /* Come up with a distinct state. We do that from assembly (will do FPU in R0/RC). */
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185 | g_usBs3TestStep = 2;
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186 | Bs3MemSet(abBuf, 0x42, sizeof(abBuf));
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187 | TMPL_NM(bs3FpuState1_InitState)(pExpected, MmioReg.pb);
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188 |
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189 |
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190 | /*
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191 | * Test #1: Check that we can keep it consistent for a while.
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192 | */
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193 | g_usBs3TestStep = 3;
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194 | uStartTick = g_cBs3PitTicks;
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195 | for (iLoop = 0; iLoop < _16M; iLoop++)
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196 | {
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197 | CHECK_STATE(nop);
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198 | if ( (iLoop & 0xffff) == 0xffff
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199 | && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
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200 | break;
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201 | }
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202 |
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203 | /*
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204 | * Test #2: Use various FPU, SSE and weird instructions to do MMIO writes.
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205 | *
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206 | * We'll use the VMMDev readback register if possible, but make do
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207 | * with VGA if not configured.
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208 | */
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209 | g_usBs3TestStep = 4;
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210 | uStartTick = g_cBs3PitTicks;
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211 | for (iLoop = 0; iLoop < _1M; iLoop++)
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212 | {
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213 | unsigned off;
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214 | uint8_t abCompare[64];
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215 | uint8_t abReadback[64];
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216 |
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217 | /* Macros */
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218 | # undef CHECK_READBACK_WRITE_RUN
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219 | # define CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type) \
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220 | do { \
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221 | off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
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222 | if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
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223 | off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
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224 | a_Worker((a_Type *)&MmioReg.pb[off]); \
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225 | if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
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226 | { \
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227 | a_Worker((a_Type *)&abCompare[0]); \
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228 | Bs3MemCpy(abReadback, &MmioReg.pb[off], sizeof(a_Type)); \
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229 | if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
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230 | { \
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231 | Bs3TestFailedF("Read back error for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
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232 | iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
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233 | fReadBackError = true; \
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234 | } \
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235 | } \
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236 | } while (0)
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237 |
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238 | # undef CHECK_READBACK_WRITE
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239 | # define CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type) \
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240 | CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type); \
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241 | CHECK_STATE(a_Instr)
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242 | # undef CHECK_READBACK_WRITE_Z
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243 | # define CHECK_READBACK_WRITE_Z(a_Instr, a_Worker, a_Type) \
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244 | do { \
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245 | if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
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246 | { \
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247 | Bs3MemZero(&abCompare[0], sizeof(a_Type)); \
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248 | off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
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249 | if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
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250 | off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
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251 | Bs3MemZero(&MmioReg.pb[off], sizeof(a_Type)); \
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252 | } \
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253 | CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type); \
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254 | } while (0)
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255 |
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256 | # undef CHECK_READBACK_READ_RUN
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257 | # define CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type) \
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258 | do { \
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259 | off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
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260 | if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
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261 | off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
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262 | a_Worker((a_Type *)&MmioReg.pb[off]); \
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263 | TMPL_NM(bs3FpuState1_Save)(pChecking); \
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264 | } while (0)
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265 | # undef CHECK_READBACK_READ
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266 | # define CHECK_READBACK_READ(a_Instr, a_Worker, a_Type) \
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267 | CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type); \
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268 | CHECK_STATE(a_Instr)
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269 |
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270 |
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271 | /* The tests. */
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272 | CHECK_READBACK_WRITE_Z(SIDT, ASMGetIDTR, RTIDTR);
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273 | CHECK_READBACK_WRITE_Z(FNSTENV, TMPL_NM(bs3FpuState1_FNStEnv), X86FSTENV32P); /** @todo x86.h is missing types */
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274 | CHECK_READBACK_WRITE( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Write), X86XMMREG);
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275 | CHECK_READBACK_READ( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Read), X86XMMREG);
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276 |
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277 | /* Using the FPU is a little complicated, but we really need to check these things. */
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278 | CHECK_READBACK_READ_RUN(FMUL, TMPL_NM(bs3FpuState1_FMul), uint64_t);
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279 | pExpected->FOP = 0x7dc;
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280 | # if ARCH_BITS == 64
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281 | pExpected->FPUDP = (uint32_t) (uintptr_t)&MmioReg.pb[off];
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282 | pExpected->DS = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 32);
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283 | pExpected->Rsrvd2 = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 48);
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284 | # elif BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
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285 | pExpected->FPUDP = Bs3SelPtrToFlat(&MmioReg.pb[off]);
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286 | # else
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287 | pExpected->FPUDP = BS3_FP_OFF(&MmioReg.pb[off]);
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288 | # endif
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289 | CHECK_STATE(FMUL);
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290 |
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291 | /* check for timeout every now an then. */
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292 | if ( (iLoop & 0xfff) == 0xfff
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293 | && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
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294 | break;
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295 | }
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296 |
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297 | Bs3PitDisable();
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298 | return 0;
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299 | }
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300 | # endif
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301 | #endif /* BS3_INSTANTIATING_MODE */
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302 |
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