1 | ; $Id: bs3-cpu-weird-1-template.mac 72176 2018-05-09 15:28:30Z vboxsync $
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2 | ;; @file
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3 | ; BS3Kit - bs3-cpu-weird-1 assembly template.
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2007-2018 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 | ; The contents of this file may alternatively be used under the terms
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18 | ; of the Common Development and Distribution License Version 1.0
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19 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | ; VirtualBox OSE distribution, in which case the provisions of the
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21 | ; CDDL are applicable instead of those of the GPL.
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22 | ;
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23 | ; You may elect to license modified versions of this file under the
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24 | ; terms and conditions of either the GPL or the CDDL or both.
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25 | ;
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26 |
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27 |
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28 | ;*********************************************************************************************************************************
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29 | ;* Header Files *
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30 | ;*********************************************************************************************************************************
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31 | %include "bs3kit-template-header.mac" ; setup environment
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32 |
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33 |
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34 | ;*********************************************************************************************************************************
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35 | ;* External Symbols *
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36 | ;*********************************************************************************************************************************
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37 | TMPL_BEGIN_TEXT
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38 |
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39 |
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40 | ;
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41 | ; Test code snippets containing code which differs between 16-bit, 32-bit
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42 | ; and 64-bit CPUs modes.
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43 | ;
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44 | %ifdef BS3_INSTANTIATING_CMN
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45 |
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46 |
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47 | ;
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48 | ; Inhibited int 80h.
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49 | ;
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50 | BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt80, BS3_PBC_NEAR
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51 | ; Load SS from stack. This instruction causes fusing.
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52 | %if TMPL_BITS != 64
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53 | pop ss
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54 | %else
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55 | mov ss, [rsp]
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56 | %endif
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57 | ; The ring transition instruction.
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58 | BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt80_int80), , 0
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59 | int 80h
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60 | ; We shouldn't get here!
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61 | .ud2_again:
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62 | ud2
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63 | jmp .ud2_again
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64 | BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt80
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65 |
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66 | ;
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67 | ; Inhibited int 3.
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68 | ;
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69 | BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt3, BS3_PBC_NEAR
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70 | ; Load SS from stack. This instruction causes fusing.
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71 | %if TMPL_BITS != 64
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72 | pop ss
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73 | %else
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74 | mov ss, [rsp]
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75 | %endif
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76 | ; The ring transition instruction.
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77 | BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3), , 0
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78 | int 3
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79 | ; We shouldn't get here!
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80 | .ud2_again:
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81 | ud2
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82 | jmp .ud2_again
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83 | AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3) == 2)
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84 | BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt3
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85 |
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86 |
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87 | ;
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88 | ; Inhibited int3.
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89 | ;
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90 | BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedBp, BS3_PBC_NEAR
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91 | ; Load SS from stack. This instruction causes fusing.
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92 | %if TMPL_BITS != 64
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93 | pop ss
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94 | %else
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95 | mov ss, [rsp]
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96 | %endif
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97 | ; The ring transition instruction.
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98 | BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3), , 0
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99 | int3
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100 | ; We shouldn't get here!
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101 | .ud2_again:
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102 | ud2
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103 | jmp .ud2_again
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104 | AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3) == 1)
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105 | BS3_PROC_END_CMN bs3CpuWeird1_InhibitedBp
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106 |
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107 |
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108 | %endif ; BS3_INSTANTIATING_CMN
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109 |
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110 | %include "bs3kit-template-footer.mac" ; reset environment
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111 |
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