| 1 | /* $Id: bs3-cpu-state64-1.c64 98103 2023-01-17 14:15:46Z vboxsync $ */
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| 2 | /** @file
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| 3 | * BS3Kit - bs3-cpu-state64-1, 64-bit C code.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2007-2023 Oracle and/or its affiliates.
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| 8 | *
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| 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * The contents of this file may alternatively be used under the terms
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| 26 | * of the Common Development and Distribution License Version 1.0
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| 27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 28 | * in the VirtualBox distribution, in which case the provisions of the
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| 29 | * CDDL are applicable instead of those of the GPL.
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| 30 | *
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| 31 | * You may elect to license modified versions of this file under the
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| 32 | * terms and conditions of either the GPL or the CDDL or both.
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| 33 | *
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| 34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 35 | */
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| 36 |
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| 37 |
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| 38 | /*********************************************************************************************************************************
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| 39 | * Header Files *
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| 40 | *********************************************************************************************************************************/
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| 41 | #include <bs3kit.h>
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| 42 | #include <iprt/asm-amd64-x86.h>
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| 43 |
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| 44 |
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| 45 | /*********************************************************************************************************************************
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| 46 | * Internal Functions *
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| 47 | *********************************************************************************************************************************/
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| 48 | BS3_DECL(void) bs3CpuState64Worker_Nop(void);
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| 49 | BS3_DECL(void) bs3CpuState64Worker_ModAll32BitGrps(void);
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| 50 | BS3_DECL(void) bs3CpuState64Worker_ModAll16BitGrps(void);
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| 51 | BS3_DECL(void) bs3CpuState64Worker_ModAll8BitGrps(void);
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| 52 | BS3_DECL(void) bs3CpuState64Worker_ModCr2(void);
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| 53 | BS3_DECL(void) bs3CpuState64Worker(PFNBS3NEAR pfnWorker);
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| 54 |
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| 55 |
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| 56 | /*********************************************************************************************************************************
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| 57 | * Global Variables *
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| 58 | *********************************************************************************************************************************/
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| 59 | extern BS3REGCTX g_bs3CpuState64CtxToLoad;
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| 60 | extern BS3REGCTX const g_bs3CpuState64CtxSaved;
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| 61 |
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| 62 |
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| 63 | static void bs3CpuState64InitCtx(uint64_t uTweak)
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| 64 | {
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| 65 | Bs3RegCtxSave(&g_bs3CpuState64CtxToLoad);
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| 66 | g_bs3CpuState64CtxToLoad.rax.u = UINT64_C(0x8877f055443322e0) ^ uTweak;
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| 67 | g_bs3CpuState64CtxToLoad.rcx.u = UINT64_C(0x8877f155443322e1) ^ uTweak;
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| 68 | g_bs3CpuState64CtxToLoad.rdx.u = UINT64_C(0x8877f255443322e2) ^ uTweak;
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| 69 | g_bs3CpuState64CtxToLoad.rbx.u = UINT64_C(0x8877f355443322e3) ^ uTweak;
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| 70 | g_bs3CpuState64CtxToLoad.rsp.u = UINT64_C(0x8877f455443322e4) ^ uTweak;
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| 71 | g_bs3CpuState64CtxToLoad.rbp.u = UINT64_C(0x8877f555443322e5) ^ uTweak;
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| 72 | g_bs3CpuState64CtxToLoad.rsi.u = UINT64_C(0x8877f655443322e6) ^ uTweak;
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| 73 | g_bs3CpuState64CtxToLoad.rdi.u = UINT64_C(0x8877f755443322e7) ^ uTweak;
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| 74 | g_bs3CpuState64CtxToLoad.r8.u = UINT64_C(0x8877f855443322e8) ^ uTweak;
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| 75 | g_bs3CpuState64CtxToLoad.r9.u = UINT64_C(0x8877f955443322e9) ^ uTweak;
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| 76 | g_bs3CpuState64CtxToLoad.r10.u = UINT64_C(0x8877fa55443322ea) ^ uTweak;
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| 77 | g_bs3CpuState64CtxToLoad.r11.u = UINT64_C(0x8877fb55443322eb) ^ uTweak;
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| 78 | g_bs3CpuState64CtxToLoad.r12.u = UINT64_C(0x8877fc55443322ec) ^ uTweak;
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| 79 | g_bs3CpuState64CtxToLoad.r13.u = UINT64_C(0x8877fd55443322ed) ^ uTweak;
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| 80 | g_bs3CpuState64CtxToLoad.r14.u = UINT64_C(0x8877fe55443322ee) ^ uTweak;
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| 81 | g_bs3CpuState64CtxToLoad.r15.u = UINT64_C(0x8877ff55443322ef) ^ uTweak;
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| 82 | g_bs3CpuState64CtxToLoad.cr2.u = UINT64_C(0x89abcdef76543210) ^ uTweak;
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| 83 | //Bs3TestPrintf("** Input:\n");
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| 84 | //Bs3RegCtxPrint(&g_bs3CpuState64CtxToLoad);
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| 85 | }
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| 86 |
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| 87 |
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| 88 | static void bs3CpuState64Comp(bool fModRbx)
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| 89 | {
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| 90 | //Bs3TestPrintf("** Result:\n");
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| 91 | //Bs3RegCtxPrint(&g_bs3CpuState64CtxSaved);
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| 92 | g_bs3CpuState64CtxToLoad.rax = g_bs3CpuState64CtxSaved.rax;
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| 93 | g_bs3CpuState64CtxToLoad.rip = g_bs3CpuState64CtxSaved.rip;
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| 94 | g_bs3CpuState64CtxToLoad.rflags = g_bs3CpuState64CtxSaved.rflags;
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| 95 | g_bs3CpuState64CtxToLoad.rsp = g_bs3CpuState64CtxSaved.rsp;
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| 96 | if (!fModRbx)
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| 97 | g_bs3CpuState64CtxToLoad.rbx.au16[0] = g_bs3CpuState64CtxSaved.rbx.au16[0];
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| 98 | if (1)
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| 99 | g_bs3CpuState64CtxToLoad.ds = g_bs3CpuState64CtxSaved.ds;
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| 100 |
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| 101 | Bs3TestCheckRegCtxEx(&g_bs3CpuState64CtxSaved, &g_bs3CpuState64CtxToLoad, 0 /*cbPcAdjust*/, 0 /*cbSpAdjust*/,
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| 102 | 0 /*fExtraEfl*/, "lm64", 0 /*idTestStep*/);
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| 103 | }
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| 104 |
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| 105 | BS3_DECL(void) Main_lm64()
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| 106 | {
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| 107 | Bs3TestInit("bs3-cpu-state64-1");
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| 108 | /*
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| 109 | * Switch to 64-bit mode and back to rm.
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| 110 | */
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| 111 | Bs3TestSub("noop");
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| 112 | bs3CpuState64InitCtx(0);
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| 113 | bs3CpuState64Worker(bs3CpuState64Worker_Nop);
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| 114 | bs3CpuState64Comp(false /*fModRbx*/);
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| 115 |
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| 116 | Bs3TestSub("Modify all 32-bit GPRs");
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| 117 | bs3CpuState64InitCtx(0);
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| 118 | bs3CpuState64Worker(bs3CpuState64Worker_ModAll32BitGrps);
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| 119 | g_bs3CpuState64CtxToLoad.rax.u = UINT64_C(0xc0ffee0d);
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| 120 | g_bs3CpuState64CtxToLoad.rcx.u = UINT64_C(0xc0ffee1d);
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| 121 | g_bs3CpuState64CtxToLoad.rdx.u = UINT64_C(0xc0ffee2d);
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| 122 | g_bs3CpuState64CtxToLoad.rbx.u = UINT64_C(0xc0ffee3d);
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| 123 | g_bs3CpuState64CtxToLoad.rsp.u = UINT64_C(0xc0ffee4d);
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| 124 | g_bs3CpuState64CtxToLoad.rbp.u = UINT64_C(0xc0ffee5d);
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| 125 | g_bs3CpuState64CtxToLoad.rsi.u = UINT64_C(0xc0ffee6d);
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| 126 | g_bs3CpuState64CtxToLoad.rdi.u = UINT64_C(0xc0ffee7d);
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| 127 | bs3CpuState64Comp(true /*fModRbx*/);
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| 128 |
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| 129 | Bs3TestSub("Modify all 16-bit GPRs");
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| 130 | bs3CpuState64InitCtx(0);
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| 131 | bs3CpuState64Worker(bs3CpuState64Worker_ModAll16BitGrps);
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| 132 | g_bs3CpuState64CtxToLoad.rax.au16[0] = UINT16_C(0xfad0);
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| 133 | g_bs3CpuState64CtxToLoad.rcx.au16[0] = UINT16_C(0xfad1);
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| 134 | g_bs3CpuState64CtxToLoad.rdx.au16[0] = UINT16_C(0xfad2);
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| 135 | g_bs3CpuState64CtxToLoad.rbx.au16[0] = UINT16_C(0xfad3);
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| 136 | g_bs3CpuState64CtxToLoad.rsp.au16[0] = UINT16_C(0xfad4);
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| 137 | g_bs3CpuState64CtxToLoad.rbp.au16[0] = UINT16_C(0xfad5);
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| 138 | g_bs3CpuState64CtxToLoad.rsi.au16[0] = UINT16_C(0xfad6);
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| 139 | g_bs3CpuState64CtxToLoad.rdi.au16[0] = UINT16_C(0xfad7);
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| 140 | bs3CpuState64Comp(true /*fModRbx*/);
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| 141 |
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| 142 | Bs3TestSub("Modify all 8-bit GPRs");
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| 143 | bs3CpuState64InitCtx(0);
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| 144 | bs3CpuState64Worker(bs3CpuState64Worker_ModAll8BitGrps);
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| 145 | g_bs3CpuState64CtxToLoad.rax.au8[0] = 0x10;
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| 146 | g_bs3CpuState64CtxToLoad.rax.au8[1] = 0x11;
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| 147 | g_bs3CpuState64CtxToLoad.rcx.au8[0] = 0x20;
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| 148 | g_bs3CpuState64CtxToLoad.rcx.au8[1] = 0x21;
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| 149 | g_bs3CpuState64CtxToLoad.rdx.au8[0] = 0x30;
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| 150 | g_bs3CpuState64CtxToLoad.rdx.au8[1] = 0x31;
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| 151 | g_bs3CpuState64CtxToLoad.rbx.au8[0] = 0x40;
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| 152 | g_bs3CpuState64CtxToLoad.rbx.au8[1] = 0x41;
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| 153 | bs3CpuState64Comp(true /*fModRbx*/);
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| 154 |
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| 155 | Bs3TestSub("Modify CR2");
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| 156 | bs3CpuState64InitCtx(0);
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| 157 | bs3CpuState64Worker(bs3CpuState64Worker_ModCr2);
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| 158 | g_bs3CpuState64CtxToLoad.cr2.u = 0xf00dface;
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| 159 | bs3CpuState64Comp(true /*fModRbx*/);
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| 160 |
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| 161 | /** @todo DRx */
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| 162 | Bs3TestTerm();
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| 163 | for (;;)
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| 164 | ASMHalt();
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| 165 | }
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| 166 |
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