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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4-template.mac@ 107044

Last change on this file since 107044 was 106974, checked in by vboxsync, 10 days ago

ValidationKit/bootsectors: Implement SIMD FP testcases for [v]roundp[ds], [v]rounds[ds] -- initial framework & zero cases; bugref:10658; jiraref:VBP-1205
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File size: 64.7 KB
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1; $Id: bs3-cpu-instr-4-template.mac 106974 2024-11-13 03:41:56Z vboxsync $
2;; @file
3; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions, assembly template.
4;
5
6;
7; Copyright (C) 2024 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37
38;*********************************************************************************************************************************
39;* Header Files *
40;*********************************************************************************************************************************
41%include "bs3kit-template-header.mac" ; setup environment
42
43
44;*********************************************************************************************************************************
45;* External Symbols *
46;*********************************************************************************************************************************
47TMPL_BEGIN_TEXT
48
49
50;
51; Test code snippets containing code which differs between 16-bit, 32-bit
52; and 64-bit CPUs modes.
53;
54%ifdef BS3_INSTANTIATING_CMN
55
56
57;;
58; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
59; with an instruction length byte.
60;
61; ASSUMES the length is between the start of the function and the .again label.
62;
63 %ifndef BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
64 %define BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
65 %macro BS3CPUINSTR4_PROC_BEGIN_CMN 1
66 align 8, db 0cch
67 db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
68BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
69 %endmacro
70 %endif ; !BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
71
72;;
73; FSxBX and its variants allow a memory reference to be embedded into a test
74; instruction. `xBX' adjusts automatically to the addressing model: BX, EBX,
75; or RBX depending on the number of address bits. FSxBX_D and so on allow to
76; force a particular memory reference size; this is necessary for some AVX
77; instructions where the mentioned XMM/YMM/ZMM register size doesn't fully
78; control the memory size to be used. Macros are repeatedly redefined in
79; order to pick up the current address-model-specific `xBX' value. (Other
80; sizes could be defined: B=byte=1, W=word=2, T=tword=10(x87), z=zword=32)
81;
82 %ifndef BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
83 %define BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
84 %macro BS3CPUINSTR4_DEFINE_FSxBX 0
85 %define FSxBX [fs:xBX] ; natural size of the instruction
86 %define FSxBX_D dword [fs:xBX] ; dword = 32 bits = 4 bytes = 2 words
87 %define FSxBX_Q qword [fs:xBX] ; qword = 64 bits = 8 bytes = 4 words
88 %define FSxBX_O oword [fs:xBX] ; oword = 128 bits = 16 bytes = 8 words
89 %define FSxBX_Y yword [fs:xBX] ; yword = 256 bits = 32 bytes = 16 words
90 %endmacro
91 %macro BS3CPUINSTR4_UNDEF_FSxBX 0
92 %undef FSxBX
93 %undef FSxBX_D
94 %undef FSxBX_Q
95 %undef FSxBX_O
96 %undef FSxBX_Y
97 %endmacro
98 %endif ; !BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
99
100;;
101; The EMIT_INSTR_PLUS_ICEBP macros is for creating a common function for and
102; named after a single instruction & args, followed by a looping ICEBP.
103;
104 %ifndef EMIT_INSTR_PLUS_ICEBP_DEFINED
105 %define EMIT_INSTR_PLUS_ICEBP_DEFINED
106
107 %macro EMIT_INSTR_PLUS_ICEBP 2
108BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
109 BS3CPUINSTR4_DEFINE_FSxBX
110 %1 %2
111 BS3CPUINSTR4_UNDEF_FSxBX
112.again:
113 icebp
114 jmp .again
115BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
116 %endmacro
117
118 %macro EMIT_INSTR_PLUS_ICEBP 3
119BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
120 BS3CPUINSTR4_DEFINE_FSxBX
121 %1 %2, %3
122 BS3CPUINSTR4_UNDEF_FSxBX
123.again:
124 icebp
125 jmp .again
126BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
127 %endmacro
128
129 %macro EMIT_INSTR_PLUS_ICEBP 4
130BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
131 BS3CPUINSTR4_DEFINE_FSxBX
132 %1 %2, %3, %4
133 BS3CPUINSTR4_UNDEF_FSxBX
134.again:
135 icebp
136 jmp .again
137BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
138 %endmacro
139
140 %macro EMIT_INSTR_PLUS_ICEBP 5
141BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
142 BS3CPUINSTR4_DEFINE_FSxBX
143 %1 %2, %3, %4, %5
144 BS3CPUINSTR4_UNDEF_FSxBX
145.again:
146 icebp
147 jmp .again
148BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
149 %endmacro
150
151 %macro EMIT_INSTR_PLUS_ICEBP_C64 2
152 %if TMPL_BITS == 64
153 EMIT_INSTR_PLUS_ICEBP %1, %2
154 %endif
155 %endmacro
156
157 %macro EMIT_INSTR_PLUS_ICEBP_C64 3
158 %if TMPL_BITS == 64
159 EMIT_INSTR_PLUS_ICEBP %1, %2, %3
160 %endif
161 %endmacro
162
163 %macro EMIT_INSTR_PLUS_ICEBP_C64 4
164 %if TMPL_BITS == 64
165 EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4
166 %endif
167 %endmacro
168
169 %macro EMIT_INSTR_PLUS_ICEBP_C64 5
170 %if TMPL_BITS == 64
171 EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4, %5
172 %endif
173 %endmacro
174
175 %endif ; !EMIT_INSTR_PLUS_ICEBP_DEFINED
176
177;
178;; [v]addps
179;
180EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM2
181EMIT_INSTR_PLUS_ICEBP addps, XMM1, FSxBX
182EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM9
183EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, FSxBX
184
185EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, XMM3
186EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, FSxBX
187EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, XMM10
188EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, FSxBX
189
190EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, YMM3
191EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, FSxBX
192EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, YMM10
193EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, FSxBX
194
195EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM1
196EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM8
197EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, YMM1
198EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, YMM2
199EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM8, YMM8
200EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, FSxBX
201
202;
203;; [v]addpd
204;
205EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM2
206EMIT_INSTR_PLUS_ICEBP addpd, XMM1, FSxBX
207EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM9
208EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, FSxBX
209
210EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, XMM3
211EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, FSxBX
212EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, XMM10
213EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, FSxBX
214
215EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, YMM3
216EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, FSxBX
217EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, YMM10
218EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, FSxBX
219
220EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM1
221EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM8
222EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, YMM1
223EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, YMM2
224EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM8, YMM8
225EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, FSxBX
226
227;
228;; [v]addss
229;
230EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM2
231EMIT_INSTR_PLUS_ICEBP addss, XMM1, FSxBX
232EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM9
233EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, FSxBX
234
235EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, XMM3
236EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, FSxBX
237EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, XMM10
238EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, FSxBX
239
240EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM1
241EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM8
242EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, XMM1
243EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, XMM2
244EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM8, XMM8
245EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, FSxBX
246
247;
248;; [v]addsd
249;
250EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM2
251EMIT_INSTR_PLUS_ICEBP addsd, XMM1, FSxBX
252EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM9
253EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, FSxBX
254
255EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, XMM3
256EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, FSxBX
257EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, XMM10
258EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, FSxBX
259
260EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM1
261EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM8
262EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, XMM1
263EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, XMM2
264EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM8, XMM8
265EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, FSxBX
266
267;
268;; [v]haddps
269;
270EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM2
271EMIT_INSTR_PLUS_ICEBP haddps, XMM1, FSxBX
272EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM9
273EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, FSxBX
274
275EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, XMM3
276EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, FSxBX
277EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, XMM10
278EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, FSxBX
279
280EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, YMM3
281EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, FSxBX
282EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, YMM10
283EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, FSxBX
284
285EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM1
286EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM8
287EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, YMM1
288EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, YMM2
289EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM8, YMM8
290EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, FSxBX
291
292;
293;; [v]haddpd
294;
295EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM2
296EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, FSxBX
297EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM9
298EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, FSxBX
299
300EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, XMM3
301EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, FSxBX
302EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, XMM10
303EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, FSxBX
304
305EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, YMM3
306EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, FSxBX
307EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, YMM10
308EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, FSxBX
309
310EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM1
311EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM8
312EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, YMM1
313EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, YMM2
314EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM8, YMM8
315EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, FSxBX
316
317;
318;; [v]subps
319;
320EMIT_INSTR_PLUS_ICEBP subps, XMM1, XMM2
321EMIT_INSTR_PLUS_ICEBP subps, XMM1, FSxBX
322EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, XMM9
323EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, FSxBX
324
325EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, XMM3
326EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, FSxBX
327EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, XMM10
328EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, FSxBX
329
330EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, YMM3
331EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, FSxBX
332EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, YMM10
333EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, FSxBX
334
335;
336;; [v]subpd
337;
338EMIT_INSTR_PLUS_ICEBP subpd, XMM1, XMM2
339EMIT_INSTR_PLUS_ICEBP subpd, XMM1, FSxBX
340EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, XMM9
341EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, FSxBX
342
343EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, XMM3
344EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, FSxBX
345EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, XMM10
346EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, FSxBX
347
348EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, YMM3
349EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, FSxBX
350EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, YMM10
351EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, FSxBX
352
353;
354;; [v]subss
355;
356EMIT_INSTR_PLUS_ICEBP subss, XMM1, XMM2
357EMIT_INSTR_PLUS_ICEBP subss, XMM1, FSxBX
358EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, XMM9
359EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, FSxBX
360
361EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, XMM3
362EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, FSxBX
363EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, XMM10
364EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, FSxBX
365
366;
367;; [v]subsd
368;
369EMIT_INSTR_PLUS_ICEBP subsd, XMM1, XMM2
370EMIT_INSTR_PLUS_ICEBP subsd, XMM1, FSxBX
371EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, XMM9
372EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, FSxBX
373
374EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, XMM3
375EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, FSxBX
376EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, XMM10
377EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, FSxBX
378
379;
380;; [v]hsubps
381;
382EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, XMM2
383EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, FSxBX
384EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, XMM9
385EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, FSxBX
386
387EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, XMM3
388EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, FSxBX
389EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, XMM10
390EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, FSxBX
391
392EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, YMM3
393EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, FSxBX
394EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, YMM10
395EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, FSxBX
396
397;
398;; [v]hsubpd
399;
400EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, XMM2
401EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, FSxBX
402EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, XMM9
403EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, FSxBX
404
405EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, XMM3
406EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, FSxBX
407EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, XMM10
408EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, FSxBX
409
410EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, YMM3
411EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, FSxBX
412EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, YMM10
413EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, FSxBX
414
415;
416;; [v]mulps
417;
418EMIT_INSTR_PLUS_ICEBP mulps, XMM1, XMM2
419EMIT_INSTR_PLUS_ICEBP mulps, XMM1, FSxBX
420EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, XMM9
421EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, FSxBX
422
423EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, XMM3
424EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, FSxBX
425EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, XMM10
426EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, FSxBX
427
428EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, YMM3
429EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, FSxBX
430EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, YMM10
431EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, FSxBX
432
433;
434;; [v]mulpd
435;
436EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, XMM2
437EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, FSxBX
438EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, XMM9
439EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, FSxBX
440
441EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, XMM3
442EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, FSxBX
443EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, XMM10
444EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, FSxBX
445
446EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, YMM3
447EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, FSxBX
448EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, YMM10
449EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, FSxBX
450
451;
452;; [v]mulss
453;
454EMIT_INSTR_PLUS_ICEBP mulss, XMM1, XMM2
455EMIT_INSTR_PLUS_ICEBP mulss, XMM1, FSxBX
456EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, XMM9
457EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, FSxBX
458
459EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, XMM3
460EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, FSxBX
461EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, XMM10
462EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, FSxBX
463
464;
465;; [v]mulsd
466;
467EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, XMM2
468EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, FSxBX
469EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, XMM9
470EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, FSxBX
471
472EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, XMM3
473EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, FSxBX
474EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, XMM10
475EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, FSxBX
476
477;
478;; [v]divps
479;
480EMIT_INSTR_PLUS_ICEBP divps, XMM1, XMM2
481EMIT_INSTR_PLUS_ICEBP divps, XMM1, FSxBX
482EMIT_INSTR_PLUS_ICEBP_C64 divps, XMM8, XMM9
483EMIT_INSTR_PLUS_ICEBP_C64 divps, XMM8, FSxBX
484
485EMIT_INSTR_PLUS_ICEBP vdivps, XMM1, XMM2, XMM3
486EMIT_INSTR_PLUS_ICEBP vdivps, XMM1, XMM2, FSxBX
487EMIT_INSTR_PLUS_ICEBP_C64 vdivps, XMM8, XMM9, XMM10
488EMIT_INSTR_PLUS_ICEBP_C64 vdivps, XMM8, XMM9, FSxBX
489
490EMIT_INSTR_PLUS_ICEBP vdivps, YMM1, YMM2, YMM3
491EMIT_INSTR_PLUS_ICEBP vdivps, YMM1, YMM2, FSxBX
492EMIT_INSTR_PLUS_ICEBP_C64 vdivps, YMM8, YMM9, YMM10
493EMIT_INSTR_PLUS_ICEBP_C64 vdivps, YMM8, YMM9, FSxBX
494
495;
496;; [v]divpd
497;
498EMIT_INSTR_PLUS_ICEBP divpd, XMM1, XMM2
499EMIT_INSTR_PLUS_ICEBP divpd, XMM1, FSxBX
500EMIT_INSTR_PLUS_ICEBP_C64 divpd, XMM8, XMM9
501EMIT_INSTR_PLUS_ICEBP_C64 divpd, XMM8, FSxBX
502
503EMIT_INSTR_PLUS_ICEBP vdivpd, XMM1, XMM2, XMM3
504EMIT_INSTR_PLUS_ICEBP vdivpd, XMM1, XMM2, FSxBX
505EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, XMM8, XMM9, XMM10
506EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, XMM8, XMM9, FSxBX
507
508EMIT_INSTR_PLUS_ICEBP vdivpd, YMM1, YMM2, YMM3
509EMIT_INSTR_PLUS_ICEBP vdivpd, YMM1, YMM2, FSxBX
510EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, YMM8, YMM9, YMM10
511EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, YMM8, YMM9, FSxBX
512
513;
514;; [v]divss
515;
516EMIT_INSTR_PLUS_ICEBP divss, XMM1, XMM2
517EMIT_INSTR_PLUS_ICEBP divss, XMM1, FSxBX
518EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, XMM9
519EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, FSxBX
520
521EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, XMM3
522EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, FSxBX
523EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, XMM10
524EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, FSxBX
525
526;
527;; [v]divsd
528;
529EMIT_INSTR_PLUS_ICEBP divsd, XMM1, XMM2
530EMIT_INSTR_PLUS_ICEBP divsd, XMM1, FSxBX
531EMIT_INSTR_PLUS_ICEBP_C64 divsd, XMM8, XMM9
532EMIT_INSTR_PLUS_ICEBP_C64 divsd, XMM8, FSxBX
533
534EMIT_INSTR_PLUS_ICEBP vdivsd, XMM1, XMM2, XMM3
535EMIT_INSTR_PLUS_ICEBP vdivsd, XMM1, XMM2, FSxBX
536EMIT_INSTR_PLUS_ICEBP_C64 vdivsd, XMM8, XMM9, XMM10
537EMIT_INSTR_PLUS_ICEBP_C64 vdivsd, XMM8, XMM9, FSxBX
538
539;
540;; [v]addsubps
541;
542EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, XMM2
543EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, FSxBX
544EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, XMM9
545EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, FSxBX
546
547EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, XMM3
548EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, FSxBX
549EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, XMM10
550EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, FSxBX
551
552EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, YMM3
553EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, FSxBX
554EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, YMM15
555EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, FSxBX
556
557;
558;; [v]addsubpd
559;
560EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, XMM2
561EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, FSxBX
562EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, XMM9
563EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, FSxBX
564
565EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, XMM3
566EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, FSxBX
567EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, XMM10
568EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, FSxBX
569
570EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, YMM3
571EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, FSxBX
572EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, YMM15
573EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, FSxBX
574
575;
576;; [v]maxps
577;
578EMIT_INSTR_PLUS_ICEBP maxps, XMM1, XMM2
579EMIT_INSTR_PLUS_ICEBP maxps, XMM1, FSxBX
580EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, XMM9
581EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, FSxBX
582
583EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, XMM3
584EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, FSxBX
585EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, XMM10
586EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, FSxBX
587
588EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, YMM3
589EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, FSxBX
590EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, YMM10
591EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, FSxBX
592
593;
594;; [v]maxpd
595;
596EMIT_INSTR_PLUS_ICEBP maxpd, XMM1, XMM2
597EMIT_INSTR_PLUS_ICEBP maxpd, XMM1, FSxBX
598EMIT_INSTR_PLUS_ICEBP_C64 maxpd, XMM8, XMM9
599EMIT_INSTR_PLUS_ICEBP_C64 maxpd, XMM8, FSxBX
600
601EMIT_INSTR_PLUS_ICEBP vmaxpd, XMM1, XMM2, XMM3
602EMIT_INSTR_PLUS_ICEBP vmaxpd, XMM1, XMM2, FSxBX
603EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, XMM8, XMM9, XMM10
604EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, XMM8, XMM9, FSxBX
605
606EMIT_INSTR_PLUS_ICEBP vmaxpd, YMM1, YMM2, YMM3
607EMIT_INSTR_PLUS_ICEBP vmaxpd, YMM1, YMM2, FSxBX
608EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, YMM8, YMM9, YMM10
609EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, YMM8, YMM9, FSxBX
610
611;
612;; [v]maxss
613;
614EMIT_INSTR_PLUS_ICEBP maxss, XMM3, XMM4
615EMIT_INSTR_PLUS_ICEBP maxss, XMM3, FSxBX
616EMIT_INSTR_PLUS_ICEBP_C64 maxss, XMM8, XMM9
617EMIT_INSTR_PLUS_ICEBP_C64 maxss, XMM8, FSxBX
618
619EMIT_INSTR_PLUS_ICEBP vmaxss, XMM1, XMM6, XMM7
620EMIT_INSTR_PLUS_ICEBP vmaxss, XMM1, XMM6, FSxBX
621EMIT_INSTR_PLUS_ICEBP_C64 vmaxss, XMM8, XMM9, XMM10
622EMIT_INSTR_PLUS_ICEBP_C64 vmaxss, XMM8, XMM9, FSxBX
623
624;
625;; [v]maxsd
626;
627EMIT_INSTR_PLUS_ICEBP maxsd, XMM3, XMM4
628EMIT_INSTR_PLUS_ICEBP maxsd, XMM3, FSxBX
629EMIT_INSTR_PLUS_ICEBP_C64 maxsd, XMM8, XMM9
630EMIT_INSTR_PLUS_ICEBP_C64 maxsd, XMM8, FSxBX
631
632EMIT_INSTR_PLUS_ICEBP vmaxsd, XMM1, XMM6, XMM7
633EMIT_INSTR_PLUS_ICEBP vmaxsd, XMM1, XMM6, FSxBX
634EMIT_INSTR_PLUS_ICEBP_C64 vmaxsd, XMM8, XMM9, XMM10
635EMIT_INSTR_PLUS_ICEBP_C64 vmaxsd, XMM8, XMM9, FSxBX
636
637;
638;; [v]minps
639;
640EMIT_INSTR_PLUS_ICEBP minps, XMM1, XMM2
641EMIT_INSTR_PLUS_ICEBP minps, XMM1, FSxBX
642EMIT_INSTR_PLUS_ICEBP_C64 minps, XMM8, XMM9
643EMIT_INSTR_PLUS_ICEBP_C64 minps, XMM8, FSxBX
644
645EMIT_INSTR_PLUS_ICEBP vminps, XMM1, XMM2, XMM3
646EMIT_INSTR_PLUS_ICEBP vminps, XMM1, XMM2, FSxBX
647EMIT_INSTR_PLUS_ICEBP_C64 vminps, XMM8, XMM9, XMM10
648EMIT_INSTR_PLUS_ICEBP_C64 vminps, XMM8, XMM9, FSxBX
649
650EMIT_INSTR_PLUS_ICEBP vminps, YMM1, YMM2, YMM3
651EMIT_INSTR_PLUS_ICEBP vminps, YMM1, YMM2, FSxBX
652EMIT_INSTR_PLUS_ICEBP_C64 vminps, YMM8, YMM9, YMM10
653EMIT_INSTR_PLUS_ICEBP_C64 vminps, YMM8, YMM9, FSxBX
654
655;
656;; [v]minpd
657;
658EMIT_INSTR_PLUS_ICEBP minpd, XMM1, XMM2
659EMIT_INSTR_PLUS_ICEBP minpd, XMM1, FSxBX
660EMIT_INSTR_PLUS_ICEBP_C64 minpd, XMM8, XMM9
661EMIT_INSTR_PLUS_ICEBP_C64 minpd, XMM8, FSxBX
662
663EMIT_INSTR_PLUS_ICEBP vminpd, XMM1, XMM2, XMM3
664EMIT_INSTR_PLUS_ICEBP vminpd, XMM1, XMM2, FSxBX
665EMIT_INSTR_PLUS_ICEBP_C64 vminpd, XMM8, XMM9, XMM10
666EMIT_INSTR_PLUS_ICEBP_C64 vminpd, XMM8, XMM9, FSxBX
667
668EMIT_INSTR_PLUS_ICEBP vminpd, YMM1, YMM2, YMM3
669EMIT_INSTR_PLUS_ICEBP vminpd, YMM1, YMM2, FSxBX
670EMIT_INSTR_PLUS_ICEBP_C64 vminpd, YMM8, YMM9, YMM10
671EMIT_INSTR_PLUS_ICEBP_C64 vminpd, YMM8, YMM9, FSxBX
672
673;
674;; [v]minss
675;
676EMIT_INSTR_PLUS_ICEBP minss, XMM3, XMM4
677EMIT_INSTR_PLUS_ICEBP minss, XMM3, FSxBX
678EMIT_INSTR_PLUS_ICEBP_C64 minss, XMM8, XMM9
679EMIT_INSTR_PLUS_ICEBP_C64 minss, XMM8, FSxBX
680
681EMIT_INSTR_PLUS_ICEBP vminss, XMM1, XMM6, XMM7
682EMIT_INSTR_PLUS_ICEBP vminss, XMM1, XMM6, FSxBX
683EMIT_INSTR_PLUS_ICEBP_C64 vminss, XMM8, XMM9, XMM10
684EMIT_INSTR_PLUS_ICEBP_C64 vminss, XMM8, XMM9, FSxBX
685
686;
687;; [v]minsd
688;
689EMIT_INSTR_PLUS_ICEBP minsd, XMM3, XMM4
690EMIT_INSTR_PLUS_ICEBP minsd, XMM3, FSxBX
691EMIT_INSTR_PLUS_ICEBP_C64 minsd, XMM8, XMM9
692EMIT_INSTR_PLUS_ICEBP_C64 minsd, XMM8, FSxBX
693
694EMIT_INSTR_PLUS_ICEBP vminsd, XMM1, XMM6, XMM7
695EMIT_INSTR_PLUS_ICEBP vminsd, XMM1, XMM6, FSxBX
696EMIT_INSTR_PLUS_ICEBP_C64 vminsd, XMM8, XMM9, XMM10
697EMIT_INSTR_PLUS_ICEBP_C64 vminsd, XMM8, XMM9, FSxBX
698
699;
700;; [v]rcpps
701;
702EMIT_INSTR_PLUS_ICEBP rcpps, XMM1, XMM2
703EMIT_INSTR_PLUS_ICEBP rcpps, XMM1, FSxBX
704EMIT_INSTR_PLUS_ICEBP_C64 rcpps, XMM8, XMM9
705EMIT_INSTR_PLUS_ICEBP_C64 rcpps, XMM8, FSxBX
706
707EMIT_INSTR_PLUS_ICEBP vrcpps, XMM1, XMM2
708EMIT_INSTR_PLUS_ICEBP vrcpps, XMM1, FSxBX
709EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, XMM8, XMM9
710EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, XMM8, FSxBX
711
712EMIT_INSTR_PLUS_ICEBP vrcpps, YMM1, YMM2
713EMIT_INSTR_PLUS_ICEBP vrcpps, YMM1, FSxBX
714EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, YMM8, YMM9
715EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, YMM8, FSxBX
716
717;
718;; [v]rcpss
719;
720EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, XMM2
721EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, FSxBX
722EMIT_INSTR_PLUS_ICEBP_C64 rcpss, XMM8, XMM9
723EMIT_INSTR_PLUS_ICEBP_C64 rcpss, XMM8, FSxBX
724
725EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, XMM3
726EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, FSxBX
727EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, XMM15
728EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, FSxBX
729
730EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, XMM1
731EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, XMM1
732EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, XMM2
733EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, XMM2
734EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, FSxBX
735EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM15, XMM15, XMM15
736EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM15, XMM15, XMM13
737EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, XMM14
738
739;
740;; [v]sqrtps
741;
742EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, XMM2
743EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, FSxBX
744EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, XMM9
745EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, FSxBX
746
747EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, XMM2
748EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, FSxBX
749EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, XMM8, XMM9
750EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, XMM8, FSxBX
751
752EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, YMM2
753EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, FSxBX
754EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, YMM9
755EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, FSxBX
756
757EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, XMM1
758EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, XMM8
759EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, XMM1
760EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, YMM1
761EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, YMM8
762
763;
764;; [v]sqrtpd
765;
766EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, XMM2
767EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, FSxBX
768EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, XMM9
769EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, FSxBX
770
771EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, XMM2
772EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, FSxBX
773EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, XMM8, XMM9
774EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, XMM8, FSxBX
775
776EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, YMM2
777EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, FSxBX
778EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, YMM9
779EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, FSxBX
780
781EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, XMM1
782EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, XMM8
783EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, XMM1
784EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, YMM1
785EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, YMM8
786
787;
788;; [v]sqrtss
789;
790EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, XMM2
791EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, FSxBX
792EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, XMM9
793EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, FSxBX
794
795EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, XMM3
796EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, FSxBX
797EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM9, XMM10
798EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM9, FSxBX
799
800EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, XMM1
801EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, XMM8
802EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, XMM1
803EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, XMM2
804EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, XMM2
805EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM8, XMM8
806EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, FSxBX
807
808;
809;; [v]sqrtsd
810;
811EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, XMM2
812EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, FSxBX
813EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, XMM9
814EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, FSxBX
815
816EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, XMM3
817EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, FSxBX
818EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM9, XMM10
819EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM9, FSxBX
820
821EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, XMM1
822EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, XMM8
823EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, XMM1
824EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, XMM2
825EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, XMM2
826EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM8, XMM8
827EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, FSxBX
828
829;
830;; [v]rsqrtps
831;
832EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, XMM2
833EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, FSxBX
834EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, XMM9
835EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, FSxBX
836
837EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, XMM2
838EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, FSxBX
839EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, XMM8, XMM9
840EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, XMM8, FSxBX
841
842EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, YMM2
843EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, FSxBX
844EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, YMM9
845EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, FSxBX
846
847EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, XMM1
848EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, XMM8
849EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, XMM1
850EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, YMM1
851EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, YMM8
852
853;
854;; [v]rsqrtss
855;
856EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, XMM2
857EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, FSxBX
858EMIT_INSTR_PLUS_ICEBP_C64 rsqrtss, XMM8, XMM9
859EMIT_INSTR_PLUS_ICEBP_C64 rsqrtss, XMM8, FSxBX
860
861EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, XMM3
862EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, FSxBX
863EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM9, XMM10
864EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM9, FSxBX
865
866EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, XMM1
867EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, XMM1
868EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, XMM2
869EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, XMM2
870EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, FSxBX
871EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM8, XMM8
872
873;
874;; dpps
875;
876EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 000h
877EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 0FFh
878EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 0E1h
879EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 000h
880EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 0FFh
881EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 0E1h
882EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, XMM9, 0E1h
883EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, FSxBX, 0E1h
884
885EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 000h
886EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 0FFh
887EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 0E1h
888EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 000h
889EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 0FFh
890EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 0E1h
891EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM9, XMM10, 0E1h
892EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM9, FSxBX, 0E1h
893
894EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 000h
895EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 0FFh
896EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 0E1h
897EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 000h
898EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 0FFh
899EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 0E1h
900EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM9, YMM10, 0E1h
901EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM9, FSxBX, 0E1h
902
903EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM1, 0E1h
904EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, XMM8, 0E1h
905
906EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, XMM1, 0E1h
907EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM1, 0E1h
908EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, XMM2, 0E1h
909EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM2, 0E1h
910EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, FSxBX, 0E1h
911EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM8, XMM8, 0E1h
912EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM8, FSxBX, 0E1h
913
914EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, YMM1, 0E1h
915EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM1, 0E1h
916EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, YMM2, 0E1h
917EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM2, 0E1h
918EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, FSxBX, 0E1h
919EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM8, YMM8, 0E1h
920EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM8, FSxBX, 0E1h
921
922;
923;; dppd
924;
925EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 000h
926EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 0FFh
927EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 022h
928EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 000h
929EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 0FFh
930EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 022h
931EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, XMM9, 022h
932EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, FSxBX, 022h
933
934EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 000h
935EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 0FFh
936EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 022h
937EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 000h
938EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 0FFh
939EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 022h
940EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM9, XMM10, 022h
941EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM9, FSxBX, 022h
942
943EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM1, 022h
944EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, XMM8, 022h
945
946EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, XMM1, 022h
947EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM1, 022h
948EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, XMM2, 022h
949EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM2, 022h
950EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, FSxBX, 022h
951EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM8, XMM8, 022h
952EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM8, FSxBX, 022h
953
954;
955;; roundpd
956;
957EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM1, 008h
958EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 000h
959EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 008h
960EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 009h
961EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00ah
962EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00bh
963EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00ch
964EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00dh
965EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00eh
966EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00fh
967EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 0ffh
968EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, FSxBX, 008h
969EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, XMM8, 008h
970EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, XMM9, 008h
971EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, FSxBX, 008h
972
973EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM1, 008h
974EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 000h
975EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 008h
976EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 009h
977EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00ah
978EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00bh
979EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00ch
980EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00dh
981EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00eh
982EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00fh
983EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 0ffh
984EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, FSxBX, 008h
985EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, XMM8, 008h
986EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, XMM9, 008h
987EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, FSxBX, 008h
988
989EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM1, 008h
990EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 000h
991EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 008h
992EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 009h
993EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00ah
994EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00bh
995EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00ch
996EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00dh
997EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00eh
998EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00fh
999EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 0ffh
1000EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, FSxBX, 008h
1001EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, YMM8, 008h
1002EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, YMM9, 008h
1003EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, FSxBX, 008h
1004
1005;
1006;; roundps
1007;
1008EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM1, 008h
1009EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 000h
1010EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 008h
1011EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 009h
1012EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00ah
1013EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00bh
1014EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00ch
1015EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00dh
1016EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00eh
1017EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00fh
1018EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 0ffh
1019EMIT_INSTR_PLUS_ICEBP roundps, XMM1, FSxBX, 008h
1020EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, XMM8, 008h
1021EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, XMM9, 008h
1022EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, FSxBX, 008h
1023
1024EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM1, 008h
1025EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 000h
1026EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 008h
1027EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 009h
1028EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00ah
1029EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00bh
1030EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00ch
1031EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00dh
1032EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00eh
1033EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00fh
1034EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 0ffh
1035EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, FSxBX, 008h
1036EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM8, 008h
1037EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM9, 008h
1038EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, FSxBX, 008h
1039
1040EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM1, 008h
1041EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 000h
1042EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 008h
1043EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 009h
1044EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00ah
1045EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00bh
1046EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00ch
1047EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00dh
1048EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00eh
1049EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00fh
1050EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 0ffh
1051EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, FSxBX, 008h
1052EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM8, 008h
1053EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM9, 008h
1054EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, FSxBX, 008h
1055
1056;
1057;; roundsd
1058;
1059EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 000h
1060EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 008h
1061EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 009h
1062EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00ah
1063EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00bh
1064EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00ch
1065EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00dh
1066EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00eh
1067EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00fh
1068EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 0ffh
1069EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, FSxBX, 008h
1070EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, XMM9, 008h
1071EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, FSxBX, 008h
1072
1073EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, XMM2, 008h
1074EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, FSxBX, 008h
1075EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM1, 008h
1076EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 000h
1077EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 008h
1078EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 009h
1079EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00ah
1080EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00bh
1081EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00ch
1082EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00dh
1083EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00eh
1084EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00fh
1085EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 0ffh
1086EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, FSxBX, 008h
1087EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM8, FSxBX, 008h
1088EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM9, XMM10, 008h
1089EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM9, FSxBX, 008h
1090
1091EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM1, 008h
1092EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, XMM8, 008h
1093EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, XMM1, 008h
1094EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM2, 008h
1095EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM8, XMM8, 008h
1096
1097;
1098;; roundss
1099;
1100EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 000h
1101EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 008h
1102EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 009h
1103EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00ah
1104EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00bh
1105EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00ch
1106EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00dh
1107EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00eh
1108EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00fh
1109EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 0ffh
1110EMIT_INSTR_PLUS_ICEBP roundss, XMM1, FSxBX, 008h
1111EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, XMM9, 008h
1112EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, FSxBX, 008h
1113
1114EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, XMM2, 008h
1115EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, FSxBX, 008h
1116EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM1, 008h
1117EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 000h
1118EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 008h
1119EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 009h
1120EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00ah
1121EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00bh
1122EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00ch
1123EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00dh
1124EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00eh
1125EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00fh
1126EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 0ffh
1127EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, FSxBX, 008h
1128EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8, FSxBX, 008h
1129EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9, XMM10, 008h
1130EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9, FSxBX, 008h
1131
1132EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM1, 008h
1133EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, XMM8, 008h
1134EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, XMM1, 008h
1135EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM2, 008h
1136EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8, XMM8, 008h
1137
1138;
1139;; cvtpi2ps
1140;
1141; SSE-128, fp32 <- int32 (packed:2; from MMX register)
1142EMIT_INSTR_PLUS_ICEBP cvtpi2ps, XMM1, MM1
1143EMIT_INSTR_PLUS_ICEBP cvtpi2ps, XMM1, FSxBX
1144EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2ps, XMM8, MM1
1145EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2ps, XMM8, FSxBX
1146
1147;
1148;; cvtps2pi
1149;
1150; SSE-128, int32 <- fp32 (packed:2; to MMX register)
1151EMIT_INSTR_PLUS_ICEBP cvtps2pi, MM1, XMM1
1152EMIT_INSTR_PLUS_ICEBP cvtps2pi, MM1, FSxBX
1153EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pi, MM1, XMM8
1154
1155;
1156;; cvttps2pi
1157;
1158; SSE-128, int32 <- fp32 (packed:2; truncated; to MMX register)
1159EMIT_INSTR_PLUS_ICEBP cvttps2pi, MM1, XMM1
1160EMIT_INSTR_PLUS_ICEBP cvttps2pi, MM1, FSxBX
1161EMIT_INSTR_PLUS_ICEBP_C64 cvttps2pi, MM1, XMM8
1162
1163;
1164;; cvtsi2ss
1165;
1166; SSE-128, fp32 <- int32 (single)
1167EMIT_INSTR_PLUS_ICEBP cvtsi2ss, XMM1, EAX
1168EMIT_INSTR_PLUS_ICEBP cvtsi2ss, XMM1, FSxBX_D
1169EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, R8D
1170EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, FSxBX_D
1171; SSE-128, fp32 <- int64 (single)
1172EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM1, RAX
1173EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM1, FSxBX_Q
1174EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, R8
1175EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, FSxBX_Q
1176; AVX-128, fp32 <- int32 (single)
1177EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, EAX
1178EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, FSxBX_D
1179EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, R8D
1180EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, FSxBX_D
1181; AVX-128, fp32 <- int64 (single)
1182EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, RAX ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1183EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, FSxBX_Q ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1184EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, R8
1185EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, FSxBX_Q
1186; AVX-128, fp32 <- int32, same-reg (single)
1187EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, EAX
1188EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, FSxBX_D
1189EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, R8D
1190EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, FSxBX_D
1191; AVX-128, fp32 <- int64, same-reg (single)
1192EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, RAX ;; @todo this assembles in 16/32 mode, but should it...?
1193EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, FSxBX_Q ;; @todo this assembles in 16/32 mode, but should it...?
1194EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, R8
1195EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, FSxBX_Q
1196; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1197; @todo same-reg fp32 <- int32 (SDM says W1 ignored in 32-bit modes) (see above)
1198
1199;
1200;; cvtss2si
1201;
1202; SSE-128, int32 <- fp32
1203EMIT_INSTR_PLUS_ICEBP cvtss2si, EAX, XMM1
1204EMIT_INSTR_PLUS_ICEBP cvtss2si, EAX, FSxBX
1205EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8D, XMM8
1206EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8D, FSxBX
1207; SSE-128, int64 <- fp32
1208EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, RAX, XMM1
1209EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, RAX, FSxBX
1210EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8, XMM8
1211EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8, FSxBX
1212; AVX-128, int32 <- fp32
1213EMIT_INSTR_PLUS_ICEBP vcvtss2si, EAX, XMM1
1214EMIT_INSTR_PLUS_ICEBP vcvtss2si, EAX, FSxBX
1215EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8D, XMM8
1216EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8D, FSxBX
1217; AVX-128, int64 <- fp32
1218EMIT_INSTR_PLUS_ICEBP vcvtss2si, RAX, XMM1
1219EMIT_INSTR_PLUS_ICEBP vcvtss2si, RAX, FSxBX
1220EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8, XMM8
1221EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8, FSxBX
1222; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1223; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1224
1225;
1226;; cvttss2si
1227;
1228; SSE-128, int32 <- fp32 (single; truncated)
1229EMIT_INSTR_PLUS_ICEBP cvttss2si, EAX, XMM1
1230EMIT_INSTR_PLUS_ICEBP cvttss2si, EAX, FSxBX
1231EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8D, XMM8
1232EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8D, FSxBX
1233; SSE-128, int64 <- fp32 (single; truncated)
1234EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, RAX, XMM1
1235EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, RAX, FSxBX
1236EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8, XMM8
1237EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8, FSxBX
1238; AVX-128, int32 <- fp32 (single; truncated)
1239EMIT_INSTR_PLUS_ICEBP vcvttss2si, EAX, XMM1
1240EMIT_INSTR_PLUS_ICEBP vcvttss2si, EAX, FSxBX
1241EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8D, XMM8
1242EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8D, FSxBX
1243; AVX-128, int64 <- fp32 (single; truncated)
1244EMIT_INSTR_PLUS_ICEBP vcvttss2si, RAX, XMM1
1245EMIT_INSTR_PLUS_ICEBP vcvttss2si, RAX, FSxBX
1246EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8, XMM8
1247EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8, FSxBX
1248; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1249; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1250
1251;
1252;; cvtpi2pd
1253;
1254; SSE-128, fp64 <- int32 (packed:2; from MMX register)
1255EMIT_INSTR_PLUS_ICEBP cvtpi2pd, XMM1, MM1
1256EMIT_INSTR_PLUS_ICEBP cvtpi2pd, XMM1, FSxBX
1257EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2pd, XMM8, MM1
1258EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2pd, XMM8, FSxBX
1259; note: transition from x87 FPU to MMX; takes FPU exceptions (MM forms only)
1260
1261;
1262;; cvtpd2pi
1263;
1264; SSE-128, int32 <- fp64 (packed:2; to MMX register)
1265EMIT_INSTR_PLUS_ICEBP cvtpd2pi, MM1, XMM1
1266EMIT_INSTR_PLUS_ICEBP cvtpd2pi, MM1, FSxBX
1267EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2pi, MM1, XMM8
1268; note: transition from x87 FPU to MMX; takes FPU exceptions
1269
1270;
1271;; cvttpd2pi
1272;
1273; SSE-128, int32 <- fp64 (packed:2; truncated; to MMX register)
1274EMIT_INSTR_PLUS_ICEBP cvttpd2pi, MM1, XMM1
1275EMIT_INSTR_PLUS_ICEBP cvttpd2pi, MM1, FSxBX
1276EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2pi, MM1, XMM8
1277; note: transition from x87 FPU to MMX; takes FPU exceptions
1278
1279;
1280;; cvtsi2sd
1281;
1282; SSE-128, fp64 <- int32 (single)
1283EMIT_INSTR_PLUS_ICEBP cvtsi2sd, XMM1, EAX
1284EMIT_INSTR_PLUS_ICEBP cvtsi2sd, XMM1, FSxBX_D
1285EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, R8D
1286EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, FSxBX_D
1287; SSE-128, fp64 <- int64 (single)
1288EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM1, RAX
1289EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM1, FSxBX_Q
1290EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, R8
1291EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, FSxBX_Q
1292; AVX-128, fp64 <- int32 (single)
1293EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, EAX
1294EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, FSxBX_D
1295EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, R8D
1296EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, FSxBX_D
1297; AVX-128, fp64 <- int64 (single)
1298EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, RAX
1299EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, FSxBX_Q
1300EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, R8
1301EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, FSxBX_Q
1302; AVX-128, fp64 <- int32, same-reg (single)
1303EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, EAX
1304EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, FSxBX_D
1305EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, R8D
1306EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, FSxBX_D
1307; AVX-128, fp64 <- int64, same-reg (single)
1308EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, RAX
1309EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, FSxBX_Q
1310EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, R8
1311EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, FSxBX_Q
1312; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1313; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1314
1315;
1316;; cvtsd2si
1317;
1318; SSE-128, int32 <- fp64 (single)
1319EMIT_INSTR_PLUS_ICEBP cvtsd2si, EAX, XMM1
1320EMIT_INSTR_PLUS_ICEBP cvtsd2si, EAX, FSxBX
1321EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8D, XMM8
1322EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8D, FSxBX
1323; SSE-128, int64 <- fp64 (single)
1324EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, RAX, XMM1
1325EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, RAX, FSxBX
1326EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8, XMM8
1327EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8, FSxBX
1328; AVX-128, int32 <- fp64 (single)
1329EMIT_INSTR_PLUS_ICEBP vcvtsd2si, EAX, XMM1
1330EMIT_INSTR_PLUS_ICEBP vcvtsd2si, EAX, FSxBX
1331EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8D, XMM8
1332EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8D, FSxBX
1333; AVX-128, int64 <- fp64 (single)
1334EMIT_INSTR_PLUS_ICEBP vcvtsd2si, RAX, XMM1 ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1335EMIT_INSTR_PLUS_ICEBP vcvtsd2si, RAX, FSxBX ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1336EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8, XMM8
1337EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8, FSxBX
1338; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1339; @todo same-reg fp32 <- int32 (SDM says W1 ignored in 32-bit modes) (see above)
1340
1341;
1342;; cvttsd2si
1343;
1344; SSE-128, int32 <- fp64 (single; truncated)
1345EMIT_INSTR_PLUS_ICEBP cvttsd2si, EAX, XMM1
1346EMIT_INSTR_PLUS_ICEBP cvttsd2si, EAX, FSxBX
1347EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8D, XMM8
1348EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8D, FSxBX
1349; SSE-128, int64 <- fp64 (single; truncated)
1350EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, RAX, XMM1
1351EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, RAX, FSxBX
1352EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8, XMM8
1353EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8, FSxBX
1354; AVX-128, int32 <- fp64 (single; truncated)
1355EMIT_INSTR_PLUS_ICEBP vcvttsd2si, EAX, XMM1
1356EMIT_INSTR_PLUS_ICEBP vcvttsd2si, EAX, FSxBX
1357EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8D, XMM8
1358EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8D, FSxBX
1359; AVX-128, int64 <- fp64 (single; truncated)
1360EMIT_INSTR_PLUS_ICEBP vcvttsd2si, RAX, XMM1
1361EMIT_INSTR_PLUS_ICEBP vcvttsd2si, RAX, FSxBX
1362EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8, XMM8
1363EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8, FSxBX
1364; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1365; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1366
1367;
1368;; cvtdq2ps
1369;
1370; SSE-128, fp32 <- int32 (packed:4)
1371EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, XMM2
1372EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, FSxBX
1373EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, XMM9
1374EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, FSxBX
1375; AVX-128, fp32 <- int32 (packed:4)
1376EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, XMM2
1377EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, FSxBX
1378EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, XMM9
1379EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, FSxBX
1380; AVX-256, fp32 <- int32 (packed:8)
1381EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, YMM2
1382EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, FSxBX
1383EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, YMM9
1384EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, FSxBX
1385; SSE-128, fp32 <- int32, same-reg (packed:4)
1386EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, XMM1
1387EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, XMM8
1388; AVX-128, fp32 <- int32, same-reg (packed:4)
1389EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, XMM1
1390EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, XMM8
1391; AVX-256, fp32 <- int32, same-reg (packed:8)
1392EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, YMM1
1393EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, YMM8
1394
1395;
1396;; cvtps2dq
1397;
1398; SSE-128, int32 <- fp32 (packed:4)
1399EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, XMM2
1400EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, FSxBX
1401EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, XMM9
1402EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, FSxBX
1403; AVX-128, int32 <- fp32 (packed:4)
1404EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, XMM2
1405EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, FSxBX
1406EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, XMM9
1407EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, FSxBX
1408; AVX-256, int32 <- fp32 (packed:8)
1409EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, YMM2
1410EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, FSxBX
1411EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, YMM9
1412EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, FSxBX
1413; SSE-128, int32 <- fp32, same-reg (packed:4)
1414EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, XMM1
1415EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, XMM8
1416; AVX-128, int32 <- fp32, same-reg (packed:4)
1417EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, XMM1
1418EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, XMM8
1419; AVX-256, int32 <- fp32, same-reg (packed:8)
1420EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, YMM1
1421EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, YMM8
1422
1423;
1424;; cvttps2dq
1425;
1426; SSE-128, int32 <- fp32 (packed:4; truncated)
1427EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, XMM2
1428EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, FSxBX
1429EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, XMM9
1430EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, FSxBX
1431; AVX-128, int32 <- fp32 (packed:4; truncated)
1432EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, XMM2
1433EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, FSxBX
1434EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, XMM9
1435EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, FSxBX
1436; AVX-256, int32 <- fp32 (packed:8; truncated)
1437EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, YMM2
1438EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, FSxBX
1439EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, YMM9
1440EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, FSxBX
1441; AVX-128, int32 <- fp32, same-reg (packed:4; truncated)
1442EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, XMM1
1443EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, XMM8
1444; AVX-128, int32 <- fp32, same-reg (packed:4; truncated)
1445EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, XMM1
1446EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, XMM8
1447; AVX-256, int32 <- fp32, same-reg (packed:8; truncated)
1448EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, YMM1
1449EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, YMM8
1450
1451;
1452;; cvtdq2pd
1453;
1454; SSE-128, fp64 <- int32 (packed:2)
1455EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, XMM2
1456EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, FSxBX
1457EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, XMM9
1458EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, FSxBX
1459; AVX-128, fp64 <- int32 (packed:2)
1460EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, XMM2
1461EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, FSxBX
1462EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, XMM9
1463EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, FSxBX
1464; AVX-256, fp64 <- int32 (packed:4)
1465EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, XMM2
1466EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, FSxBX
1467EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, XMM9
1468EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, FSxBX
1469; SSE-128, fp64 <- int32, same-reg (packed:2)
1470EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, XMM1
1471EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, XMM8
1472; AVX-128, fp64 <- int32, same-reg (packed:2)
1473EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, XMM1
1474EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, XMM8
1475; AVX-256, fp64 <- int32, same-reg (packed:4)
1476EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, XMM1
1477EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, XMM8
1478
1479;
1480;; cvtpd2dq
1481;
1482; SSE-128, int32 <- fp64 (packed:2)
1483EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, XMM2
1484EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, FSxBX
1485EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, XMM9
1486EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, FSxBX
1487; AVX-128, int32 <- fp64 (packed:2)
1488EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, XMM2
1489EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, FSxBX
1490EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, XMM9
1491EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, FSxBX
1492; AVX-256, int32 <- fp64 (packed:4)
1493EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, YMM2
1494EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, FSxBX_Y
1495EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, YMM9
1496EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, FSxBX_Y
1497; SSE-128, int32 <- fp64, same-reg (packed:2)
1498EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, XMM1
1499EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, XMM8
1500; AVX-128, int32 <- fp64, same-reg (packed:2)
1501EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, XMM1
1502EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, XMM8
1503; AVX-256, int32 <- fp64, same-reg (packed:4)
1504EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, YMM1
1505EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, YMM8
1506
1507;
1508;; cvttpd2dq
1509;
1510; SSE-128, int32 <- fp64 (packed:2; truncated)
1511EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, XMM2
1512EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, FSxBX
1513EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, XMM9
1514EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, FSxBX
1515; AVX-128, int32 <- fp64 (packed:2; truncated)
1516EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, XMM2
1517EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, FSxBX
1518EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, XMM9
1519EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, FSxBX
1520; AVX-256, int32 <- fp64 (packed:4; truncated)
1521EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, YMM2
1522EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, FSxBX_Y
1523EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, YMM9
1524EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, FSxBX_Y
1525; AVX-128, int32 <- fp64, same-reg (packed:2; truncated)
1526EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, XMM1
1527EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, XMM8
1528; AVX-128, int32 <- fp64, same-reg (packed:2; truncated)
1529EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, XMM1
1530EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, XMM8
1531; AVX-256, int32 <- fp64, same-reg (packed:4; truncated)
1532EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, YMM1
1533EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, YMM8
1534
1535;
1536;; cvtpd2ps
1537;
1538; SSE-128, fp32 <- fp64 (packed:2)
1539EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, XMM2
1540EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, FSxBX
1541EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, XMM9
1542EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, FSxBX
1543; AVX-128, fp32 <- fp64 (packed:2)
1544EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, XMM2
1545EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, FSxBX_O
1546EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, XMM9
1547EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, FSxBX_O
1548; AVX-256, fp32 <- fp64 (packed:4)
1549EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, YMM2
1550EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, FSxBX_Y
1551EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, YMM9
1552EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, FSxBX_Y
1553; SSE-128, fp32 <- fp64, same-reg (packed:2)
1554EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, XMM1
1555EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, XMM8
1556; AVX-128, fp32 <- fp64, same-reg (packed:2)
1557EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, XMM1
1558EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, XMM8
1559; AVX-256, fp32 <- fp64, same-reg (packed:4)
1560EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, YMM1
1561EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, YMM8
1562
1563;
1564;; cvtps2pd
1565;
1566; SSE-128, fp64 <- fp32 (packed:2)
1567EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, XMM2
1568EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, FSxBX
1569EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, XMM9
1570EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, FSxBX
1571; AVX-128, fp64 <- fp32 (packed:2)
1572EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, XMM2
1573EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, FSxBX
1574EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, XMM9
1575EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, FSxBX
1576; AVX-256, fp64 <- fp32 (packed:4)
1577EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, XMM2
1578EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, FSxBX
1579EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, XMM9
1580EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, FSxBX
1581; SSE-128, fp64 <- fp32, same-reg (packed:2)
1582EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, XMM1
1583EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, XMM8
1584; AVX-128, fp64 <- fp32, same-reg (packed:2)
1585EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, XMM1
1586EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, XMM8
1587; AVX-256, fp64 <- fp32, same-reg (packed:4)
1588EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, XMM1
1589EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, XMM8
1590
1591;
1592;; cvtsd2ss
1593;
1594; SSE-128, fp32 <- fp64 (single)
1595EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, XMM2
1596EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, FSxBX
1597EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, XMM9
1598EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, FSxBX
1599; AVX-128, fp32 <- fp64 (single)
1600EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM3
1601EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, FSxBX
1602EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM10
1603EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, FSxBX
1604; SSE-128, fp32 <- fp64, same-reg (single)
1605EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, XMM1
1606EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, XMM8
1607; AVX-128, fp32 <- fp64, same-reg (single)
1608EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, XMM1
1609EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, XMM2
1610EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM1
1611EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM2
1612EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, FSxBX
1613EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, XMM8
1614EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, XMM9
1615EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM8
1616EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM9
1617EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, FSxBX
1618; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1619
1620;
1621;; cvtss2sd
1622;
1623; SSE-128, fp64 <- fp32 (single)
1624EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, XMM2
1625EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, FSxBX
1626EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, XMM9
1627EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, FSxBX
1628; AVX-128, fp64 <- fp32 (single)
1629EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM3
1630EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, FSxBX
1631EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM10
1632EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, FSxBX
1633; SSE-128, fp64 <- fp32, same-reg (single)
1634EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, XMM1
1635EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, XMM8
1636; AVX-128, fp64 <- fp32, same-reg (single)
1637EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, XMM1
1638EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, XMM2
1639EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM1
1640EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM2
1641EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, FSxBX
1642EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, XMM8
1643EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, XMM9
1644EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM8
1645EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM9
1646EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, FSxBX
1647; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1648
1649%endif ; BS3_INSTANTIATING_CMN
1650
1651%include "bs3kit-template-footer.mac" ; reset environment
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