bs3-cpu-instr-3-template.mac@ 98103

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1	; $Id: bs3-cpu-instr-3-template.mac 98103 2023-01-17 14:15:46Z vboxsync $
2	;; @file
3	; BS3Kit - bs3-cpu-instr-3 - MMX, SSE and AVX instructions, assembly template.
4	;
5
6	;
7	; Copyright (C) 2007-2023 Oracle and/or its affiliates.
8	;
9	; This file is part of VirtualBox base platform packages, as
10	; available from https://www.virtualbox.org.
11	;
12	; This program is free software; you can redistribute it and/or
13	; modify it under the terms of the GNU General Public License
14	; as published by the Free Software Foundation, in version 3 of the
15	; License.
16	;
17	; This program is distributed in the hope that it will be useful, but
18	; WITHOUT ANY WARRANTY; without even the implied warranty of
19	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	; General Public License for more details.
21	;
22	; You should have received a copy of the GNU General Public License
23	; along with this program; if not, see <https://www.gnu.org/licenses>.
24	;
25	; The contents of this file may alternatively be used under the terms
26	; of the Common Development and Distribution License Version 1.0
27	; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28	; in the VirtualBox distribution, in which case the provisions of the
29	; CDDL are applicable instead of those of the GPL.
30	;
31	; You may elect to license modified versions of this file under the
32	; terms and conditions of either the GPL or the CDDL or both.
33	;
34	; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35	;
36
37
38	;*********************************************************************************************************************************
39	;* Header Files *
40	;*********************************************************************************************************************************
41	%include "bs3kit-template-header.mac" ; setup environment
42
43
44	;*********************************************************************************************************************************
45	;* External Symbols *
46	;*********************************************************************************************************************************
47	TMPL_BEGIN_TEXT
48
49
50	;
51	; Test code snippets containing code which differs between 16-bit, 32-bit
52	; and 64-bit CPUs modes.
53	;
54	%ifdef BS3_INSTANTIATING_CMN
55
56
57	;;
58	; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
59	; with an instruction length byte.
60	;
61	; ASSUMES the length is between the start of the function and the .again label.
62	;
63	%ifndef BS3CPUINSTR3_PROC_BEGIN_CMN_DEFINED
64	%define BS3CPUINSTR3_PROC_BEGIN_CMN_DEFINED
65	%macro BS3CPUINSTR3_PROC_BEGIN_CMN 1
66	align 8, db 0cch
67	db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
68	BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
69	%endmacro
70	%endif
71
72	;;
73	; The EMIT_INSTR_PLUS_ICEBP macros is for creating a common function for and
74	; named after a single instruction, followed by a looping ICEBP.
75	;
76	; This works like a prefix to the instruction invocation, only exception is that
77	; instead of [fs:xBX] you write FSxBS as that's what is wanted in the name.
78	;
79	%ifndef EMIT_INSTR_PLUS_ICEBP_DEFINED
80	%define EMIT_INSTR_PLUS_ICEBP_DEFINED
81
82	%macro EMIT_INSTR_PLUS_ICEBP 2
83	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _icebp
84	%define FSxBX [fs:xBX]
85	%1 %2
86	%undef FSxBX
87	.again:
88	icebp
89	jmp .again
90	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _icebp
91	%endmacro
92
93	%macro EMIT_INSTR_PLUS_ICEBP 3
94	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
95	%define FSxBX [fs:xBX]
96	%1 %2, %3
97	%undef FSxBX
98	.again:
99	icebp
100	jmp .again
101	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
102	%endmacro
103
104	%macro EMIT_INSTR_PLUS_ICEBP 4
105	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
106	%define FSxBX [fs:xBX]
107	%1 %2, %3, %4
108	%undef FSxBX
109	.again:
110	icebp
111	jmp .again
112	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
113	%endmacro
114
115	%macro EMIT_INSTR_PLUS_ICEBP 5
116	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
117	%define FSxBX [fs:xBX]
118	%1 %2, %3, %4, %5
119	%undef FSxBX
120	.again:
121	icebp
122	jmp .again
123	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
124	%endmacro
125
126	%endif
127
128	;;
129	; Companion to EMIT_INSTR_PLUS_ICEBP for dealing stuff that the assmbler does
130	; not want to emit.
131	;
132	; @param 1 The function name (omitting bs3CpuInstr3_ and _icebp).
133	; @param 2+ The opcode bytes. FSxBX_PFX and FSxBX_MODRM are defined locally.
134	;
135	%ifndef EMIT_INSTR_PLUS_ICEBP_BYTES_DEFINED
136	%define EMIT_INSTR_PLUS_ICEBP_BYTES_DEFINED
137
138	%macro EMIT_INSTR_PLUS_ICEBP_BYTES 2+
139	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _icebp
140	%define FSxBX_PFX 64h
141	%if TMPL_BITS == 16
142	%define FSxBX_MODRM 07h
143	%else
144	%define FSxBX_MODRM 03h
145	%endif
146	db %2
147	%undef FSxBX_MODRM
148	%undef FSxBX_PFX
149	.again:
150	icebp
151	jmp .again
152	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _icebp
153	%endmacro
154	%endif
155
156
157
158	%ifndef EMIT_TYPE1_INSTR_DEFINED
159	%define EMIT_TYPE1_INSTR_DEFINED
160	;; @param 7 Indicates whether the 2nd and 3rd pair has MMX variants.
161	%macro EMIT_TYPE1_INSTR 7
162	;
163	; PXOR (SSE2) & VPXOR (AVX2)
164	;
165	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_MM2_icebp
166	%1 mm1, mm2
167	.again:
168	icebp
169	jmp .again
170	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_MM2_icebp
171
172	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_FSxBX_icebp
173	%1 mm1, [fs:xBX]
174	.again:
175	icebp
176	jmp .again
177	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_FSxBX_icebp
178
179	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_XMM2_icebp
180	%1 xmm1, xmm2
181	.again:
182	icebp
183	jmp .again
184	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_XMM2_icebp
185
186	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_FSxBX_icebp
187	%1 xmm1, [fs:xBX]
188	.again:
189	icebp
190	jmp .again
191	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_FSxBX_icebp
192
193	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _XMM1_XMM1_XMM2_icebp
194	%2 xmm1, xmm1, xmm2
195	.again:
196	icebp
197	jmp .again
198	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _XMM1_XMM1_XMM2_icebp
199
200	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _XMM1_XMM1_FSxBX_icebp
201	%2 xmm1, xmm1, [fs:xBX]
202	.again:
203	icebp
204	jmp .again
205	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _XMM1_XMM1_FSxBX_icebp
206
207	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _YMM7_YMM2_YMM3_icebp
208	%2 ymm7, ymm2, ymm3
209	.again:
210	icebp
211	jmp .again
212	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _YMM7_YMM2_YMM3_icebp
213
214	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _YMM7_YMM2_FSxBX_icebp
215	%2 ymm7, ymm2, [fs:xBX]
216	.again:
217	icebp
218	jmp .again
219	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _YMM7_YMM2_FSxBX_icebp
220
221
222	;
223	; XORPS (SSE2) & VXORPS (AVX)
224	;
225	%if %7 != 0
226	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %3 %+ _MM1_MM2_icebp
227	%3 mm1, mm2
228	.again:
229	icebp
230	jmp .again
231	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %3 %+ _MM1_MM2_icebp
232
233	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %3 %+ _MM1_FSxBX_icebp
234	%3 mm1, [fs:xBX]
235	.again:
236	icebp
237	jmp .again
238	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %3 %+ _MM1_FSxBX_icebp
239	%endif
240
241	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %3 %+ _XMM1_XMM2_icebp
242	%3 xmm1, xmm2
243	.again:
244	icebp
245	jmp .again
246	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %3 %+ _XMM1_XMM2_icebp
247
248	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %3 %+ _XMM1_FSxBX_icebp
249	%3 xmm1, [fs:xBX]
250	.again:
251	icebp
252	jmp .again
253	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %3 %+ _XMM1_FSxBX_icebp
254
255	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %4 %+ _XMM1_XMM1_XMM2_icebp
256	%4 xmm1, xmm1, xmm2
257	.again:
258	icebp
259	jmp .again
260	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %4 %+ _XMM1_XMM1_XMM2_icebp
261
262	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %4 %+ _XMM1_XMM1_FSxBX_icebp
263	%4 xmm1, xmm1, [fs:xBX]
264	.again:
265	icebp
266	jmp .again
267	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %4 %+ _XMM1_XMM1_FSxBX_icebp
268
269	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %4 %+ _YMM1_YMM1_YMM2_icebp
270	%4 ymm1, ymm1, ymm2
271	.again:
272	icebp
273	jmp .again
274	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %4 %+ _YMM1_YMM1_YMM2_icebp
275
276	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %4 %+ _YMM1_YMM1_FSxBX_icebp
277	%4 ymm1, ymm1, [fs:xBX]
278	.again:
279	icebp
280	jmp .again
281	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %4 %+ _YMM1_YMM1_FSxBX_icebp
282
283
284
285	;
286	; XORPD (SSE2) & VXORPD (AVX)
287	;
288	%if %7 != 0
289	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %5 %+ _MM1_MM2_icebp
290	%5 mm1, mm2
291	.again:
292	icebp
293	jmp .again
294	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %5 %+ _MM1_MM2_icebp
295
296	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %5 %+ _MM1_FSxBX_icebp
297	%5 mm1, [fs:xBX]
298	.again:
299	icebp
300	jmp .again
301	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %5 %+ _MM1_FSxBX_icebp
302	%endif
303
304	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %5 %+ _XMM1_XMM2_icebp
305	%5 xmm1, xmm2
306	.again:
307	icebp
308	jmp .again
309	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %5 %+ _XMM1_XMM2_icebp
310
311	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %5 %+ _XMM1_FSxBX_icebp
312	%5 xmm1, [fs:xBX]
313	.again:
314	icebp
315	jmp .again
316	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %5 %+ _XMM1_FSxBX_icebp
317
318	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %6 %+ _XMM2_XMM1_XMM0_icebp
319	%6 xmm2, xmm1, xmm0
320	.again:
321	icebp
322	jmp .again
323	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %6 %+ _XMM2_XMM1_XMM0_icebp
324
325	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %6 %+ _XMM2_XMM1_FSxBX_icebp
326	%6 xmm2, xmm1, [fs:xBX]
327	.again:
328	icebp
329	jmp .again
330	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %6 %+ _XMM2_XMM1_FSxBX_icebp
331
332	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %6 %+ _YMM2_YMM1_YMM0_icebp
333	%6 ymm2, ymm1, ymm0
334	.again:
335	icebp
336	jmp .again
337	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %6 %+ _YMM2_YMM1_YMM0_icebp
338
339	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %6 %+ _YMM2_YMM1_FSxBX_icebp
340	%6 ymm2, ymm1, [fs:xBX]
341	.again:
342	icebp
343	jmp .again
344	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %6 %+ _YMM2_YMM1_FSxBX_icebp
345
346	%if TMPL_BITS == 64
347	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %6 %+ _YMM10_YMM8_YMM15_icebp
348	%6 ymm10, ymm8, ymm15
349	.again:
350	icebp
351	jmp .again
352	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %6 %+ _YMM10_YMM8_YMM15_icebp
353	%endif
354
355	%endmacro ; EMIT_TYPE1_INSTR
356
357	%macro EMIT_TYPE1_ONE_INSTR 3
358	%if %3 != 0
359	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_MM2_icebp
360	%1 mm1, mm2
361	.again:
362	icebp
363	jmp .again
364	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_MM2_icebp
365
366	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_FSxBX_icebp
367	%1 mm1, [fs:xBX]
368	.again:
369	icebp
370	jmp .again
371	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _MM1_FSxBX_icebp
372	%endif
373
374	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_XMM2_icebp
375	%1 xmm1, xmm2
376	.again:
377	icebp
378	jmp .again
379	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_XMM2_icebp
380
381	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_FSxBX_icebp
382	%1 xmm1, [fs:xBX]
383	.again:
384	icebp
385	jmp .again
386	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _XMM1_FSxBX_icebp
387
388	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _XMM2_XMM1_XMM0_icebp
389	%2 xmm2, xmm1, xmm0
390	.again:
391	icebp
392	jmp .again
393	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _XMM2_XMM1_XMM0_icebp
394
395	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _XMM2_XMM1_FSxBX_icebp
396	%2 xmm2, xmm1, [fs:xBX]
397	.again:
398	icebp
399	jmp .again
400	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _XMM2_XMM1_FSxBX_icebp
401
402	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _YMM2_YMM1_YMM0_icebp
403	%2 ymm2, ymm1, ymm0
404	.again:
405	icebp
406	jmp .again
407	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _YMM2_YMM1_YMM0_icebp
408
409	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _YMM2_YMM1_FSxBX_icebp
410	%2 ymm2, ymm1, [fs:xBX]
411	.again:
412	icebp
413	jmp .again
414	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _YMM2_YMM1_FSxBX_icebp
415
416	%if TMPL_BITS == 64
417	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _YMM10_YMM8_YMM15_icebp
418	%2 ymm10, ymm8, ymm15
419	.again:
420	icebp
421	jmp .again
422	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _YMM10_YMM8_YMM15_icebp
423	%endif
424	%endmacro ; EMIT_TYPE1_ONE_INSTR
425
426	%endif
427
428	EMIT_TYPE1_INSTR pand, vpand, andps, vandps, andpd, vandpd, 0
429	EMIT_TYPE1_INSTR pandn, vpandn, andnps, vandnps, andnpd, vandnpd, 0
430	EMIT_TYPE1_INSTR por, vpor, orps, vorps, orpd, vorpd, 0
431	EMIT_TYPE1_INSTR pxor, vpxor, xorps, vxorps, xorpd, vxorpd, 0
432
433	EMIT_TYPE1_INSTR pcmpgtb, vpcmpgtb, pcmpgtw, vpcmpgtw, pcmpgtd, vpcmpgtd, 1
434	EMIT_TYPE1_ONE_INSTR pcmpgtq, vpcmpgtq, 0
435	EMIT_TYPE1_INSTR pcmpeqb, vpcmpeqb, pcmpeqw, vpcmpeqw, pcmpeqd, vpcmpeqd, 1
436	EMIT_TYPE1_ONE_INSTR pcmpeqq, vpcmpeqq, 0
437
438	EMIT_TYPE1_INSTR paddb, vpaddb, paddw, vpaddw, paddd, vpaddd, 1
439	EMIT_TYPE1_ONE_INSTR paddq, vpaddq, 1
440
441	EMIT_TYPE1_INSTR psubb, vpsubb, psubw, vpsubw, psubd, vpsubd, 1
442	EMIT_TYPE1_ONE_INSTR psubq, vpsubq, 1
443
444
445	;
446	; Type 2 instructions. On the form: pxxxx sAX, [zy]mm0
447	;
448	%ifndef EMIT_TYPE2_ONE_INSTR_DEFINED
449	%define EMIT_TYPE2_ONE_INSTR_DEFINED
450	;; @param 1 MMX/SSE instruction name
451	;; @param 2 AVX instruction name
452	;; @param 3 Whether to emit MMX function
453	;; @param 4 The opcode byte. (assuming two byte / vex map 1)
454	%macro EMIT_TYPE2_ONE_INSTR 4
455	%if %3 != 0
456	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_MM2_icebp
457	%1 eax, mm2
458	.again:
459	icebp
460	jmp .again
461	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_MM2_icebp
462
463	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_qword_FSxBX_icebp
464	%if TMPL_BITS == 16
465	db 64h, 0fh, %4, 7 ; %1 eax, qword [fs:xBX]
466	%else
467	db 64h, 0fh, %4, 3 ; %1 eax, qword [fs:xBX]
468	%endif
469	.again:
470	icebp
471	jmp .again
472	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_qword_FSxBX_icebp
473	%endif
474
475	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_XMM2_icebp
476	%1 eax, xmm2
477	.again:
478	icebp
479	jmp .again
480	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_XMM2_icebp
481
482	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_dqword_FSxBX_icebp
483	%if TMPL_BITS == 16
484	db 64h, 66h, 0fh, %4, 7 ; %1 eax, dqword [fs:xBX]
485	%else
486	db 64h, 66h, 0fh, %4, 3 ; %1 eax, dqword [fs:xBX]
487	%endif
488	.again:
489	icebp
490	jmp .again
491	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %1 %+ _EAX_dqword_FSxBX_icebp
492
493	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_XMM2_icebp
494	%2 eax, xmm2
495	.again:
496	icebp
497	jmp .again
498	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_XMM2_icebp
499
500	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_dqword_FSxBX_icebp
501	%if TMPL_BITS == 16
502	db 64h, 0c4h, 0e0h, 071h, %4, 7 ; %2 eax, dqword [fs:xBX]
503	%else
504	db 64h, 0c4h, 0e0h, 071h, %4, 3 ; %2 eax, dqword [fs:xBX]
505	%endif
506	.again:
507	icebp
508	jmp .again
509	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_dqword_FSxBX_icebp
510
511	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_YMM2_icebp
512	%2 eax, ymm2
513	.again:
514	icebp
515	jmp .again
516	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_YMM2_icebp
517
518	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_qqword_FSxBX_icebp
519	%if TMPL_BITS == 16
520	db 64h, 0c4h, 0e0h, 075h, %4, 7 ; %2 eax, qqword [fs:xBX]
521	%else
522	db 64h, 0c4h, 0e0h, 075h, %4, 3 ; %2 eax, qqword [fs:xBX]
523	%endif
524	.again:
525	icebp
526	jmp .again
527	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _EAX_qqword_FSxBX_icebp
528
529	%if TMPL_BITS == 64
530	BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_ %+ %2 %+ _RAX_YMM9_icebp
531	%2 rax, ymm9
532	.again:
533	icebp
534	jmp .again
535	BS3_PROC_END_CMN bs3CpuInstr3_ %+ %2 %+ _RAX_YMM9_icebp
536	%endif
537	%endmacro ; EMIT_TYPE2_ONE_INSTR
538	%endif
539
540	EMIT_TYPE2_ONE_INSTR pmovmskb, vpmovmskb, 1, 0d7h
541
542	;
543	; [V]PMULLW
544	;
545	EMIT_INSTR_PLUS_ICEBP pmullw, MM1, MM2
546	EMIT_INSTR_PLUS_ICEBP pmullw, MM1, FSxBX
547
548	EMIT_INSTR_PLUS_ICEBP pmullw, XMM1, XMM2
549	EMIT_INSTR_PLUS_ICEBP pmullw, XMM1, FSxBX
550	%if TMPL_BITS == 64
551	EMIT_INSTR_PLUS_ICEBP pmullw, XMM8, XMM9
552	EMIT_INSTR_PLUS_ICEBP pmullw, XMM8, FSxBX
553	%endif
554
555	EMIT_INSTR_PLUS_ICEBP vpmullw, XMM1, XMM1, XMM2
556	EMIT_INSTR_PLUS_ICEBP vpmullw, XMM1, XMM1, FSxBX
557	%if TMPL_BITS == 64
558	EMIT_INSTR_PLUS_ICEBP vpmullw, XMM8, XMM9, XMM10
559	EMIT_INSTR_PLUS_ICEBP vpmullw, XMM8, XMM9, FSxBX
560	%endif
561
562	EMIT_INSTR_PLUS_ICEBP vpmullw, YMM1, YMM1, YMM2
563	EMIT_INSTR_PLUS_ICEBP vpmullw, YMM1, YMM1, FSxBX
564	%if TMPL_BITS == 64
565	EMIT_INSTR_PLUS_ICEBP vpmullw, YMM8, YMM9, YMM10
566	EMIT_INSTR_PLUS_ICEBP vpmullw, YMM8, YMM9, FSxBX
567	%endif
568
569	;
570	; [V]PMULLD
571	;
572	EMIT_INSTR_PLUS_ICEBP pmulld, XMM1, XMM2
573	EMIT_INSTR_PLUS_ICEBP pmulld, XMM1, FSxBX
574	%if TMPL_BITS == 64
575	EMIT_INSTR_PLUS_ICEBP pmulld, XMM8, XMM9
576	EMIT_INSTR_PLUS_ICEBP pmulld, XMM8, FSxBX
577	%endif
578
579	EMIT_INSTR_PLUS_ICEBP vpmulld, XMM2, XMM1, XMM0
580	EMIT_INSTR_PLUS_ICEBP vpmulld, XMM2, XMM1, FSxBX
581	%if TMPL_BITS == 64
582	EMIT_INSTR_PLUS_ICEBP vpmulld, XMM8, XMM9, XMM10
583	EMIT_INSTR_PLUS_ICEBP vpmulld, XMM8, XMM9, FSxBX
584	%endif
585
586	EMIT_INSTR_PLUS_ICEBP vpmulld, YMM2, YMM1, YMM0
587	EMIT_INSTR_PLUS_ICEBP vpmulld, YMM2, YMM1, FSxBX
588	%if TMPL_BITS == 64
589	EMIT_INSTR_PLUS_ICEBP vpmulld, YMM10, YMM8, YMM15
590	EMIT_INSTR_PLUS_ICEBP vpmulld, YMM10, YMM8, FSxBX
591	%endif
592
593	;
594	; [V]PMULHW
595	;
596	EMIT_INSTR_PLUS_ICEBP pmulhw, MM1, MM2
597	EMIT_INSTR_PLUS_ICEBP pmulhw, MM1, FSxBX
598
599	EMIT_INSTR_PLUS_ICEBP pmulhw, XMM1, XMM2
600	EMIT_INSTR_PLUS_ICEBP pmulhw, XMM1, FSxBX
601	%if TMPL_BITS == 64
602	EMIT_INSTR_PLUS_ICEBP pmulhw, XMM8, XMM9
603	EMIT_INSTR_PLUS_ICEBP pmulhw, XMM8, FSxBX
604	%endif
605
606	EMIT_INSTR_PLUS_ICEBP vpmulhw, XMM1, XMM1, XMM2
607	EMIT_INSTR_PLUS_ICEBP vpmulhw, XMM1, XMM1, FSxBX
608	%if TMPL_BITS == 64
609	EMIT_INSTR_PLUS_ICEBP vpmulhw, XMM8, XMM9, XMM10
610	EMIT_INSTR_PLUS_ICEBP vpmulhw, XMM8, XMM9, FSxBX
611	%endif
612
613	EMIT_INSTR_PLUS_ICEBP vpmulhw, YMM1, YMM1, YMM2
614	EMIT_INSTR_PLUS_ICEBP vpmulhw, YMM1, YMM1, FSxBX
615	%if TMPL_BITS == 64
616	EMIT_INSTR_PLUS_ICEBP vpmulhw, YMM8, YMM9, YMM10
617	EMIT_INSTR_PLUS_ICEBP vpmulhw, YMM8, YMM9, FSxBX
618	%endif
619
620	;
621	; [V]PMULHUW
622	;
623	EMIT_INSTR_PLUS_ICEBP pmulhuw, MM1, MM2
624	EMIT_INSTR_PLUS_ICEBP pmulhuw, MM1, FSxBX
625
626	EMIT_INSTR_PLUS_ICEBP pmulhuw, XMM1, XMM2
627	EMIT_INSTR_PLUS_ICEBP pmulhuw, XMM1, FSxBX
628	%if TMPL_BITS == 64
629	EMIT_INSTR_PLUS_ICEBP pmulhuw, XMM8, XMM9
630	EMIT_INSTR_PLUS_ICEBP pmulhuw, XMM8, FSxBX
631	%endif
632
633	EMIT_INSTR_PLUS_ICEBP vpmulhuw, XMM1, XMM1, XMM2
634	EMIT_INSTR_PLUS_ICEBP vpmulhuw, XMM1, XMM1, FSxBX
635	%if TMPL_BITS == 64
636	EMIT_INSTR_PLUS_ICEBP vpmulhuw, XMM8, XMM9, XMM10
637	EMIT_INSTR_PLUS_ICEBP vpmulhuw, XMM8, XMM9, FSxBX
638	%endif
639
640	EMIT_INSTR_PLUS_ICEBP vpmulhuw, YMM1, YMM1, YMM2
641	EMIT_INSTR_PLUS_ICEBP vpmulhuw, YMM1, YMM1, FSxBX
642	%if TMPL_BITS == 64
643	EMIT_INSTR_PLUS_ICEBP vpmulhuw, YMM8, YMM9, YMM10
644	EMIT_INSTR_PLUS_ICEBP vpmulhuw, YMM8, YMM9, FSxBX
645	%endif
646
647	;
648	; [V]PSHUFB
649	;
650	EMIT_INSTR_PLUS_ICEBP pshufb, MM1, MM2
651	EMIT_INSTR_PLUS_ICEBP pshufb, MM1, FSxBX
652
653	EMIT_INSTR_PLUS_ICEBP pshufb, XMM1, XMM2
654	EMIT_INSTR_PLUS_ICEBP pshufb, XMM1, FSxBX
655	%if TMPL_BITS == 64
656	EMIT_INSTR_PLUS_ICEBP pshufb, XMM8, XMM9
657	EMIT_INSTR_PLUS_ICEBP pshufb, XMM8, FSxBX
658	%endif
659
660	EMIT_INSTR_PLUS_ICEBP vpshufb, XMM1, XMM2, XMM3
661	EMIT_INSTR_PLUS_ICEBP vpshufb, XMM1, XMM2, FSxBX
662	%if TMPL_BITS == 64
663	EMIT_INSTR_PLUS_ICEBP vpshufb, XMM8, XMM9, XMM10
664	EMIT_INSTR_PLUS_ICEBP vpshufb, XMM8, XMM9, FSxBX
665	%endif
666
667	EMIT_INSTR_PLUS_ICEBP vpshufb, YMM1, YMM2, YMM3
668	EMIT_INSTR_PLUS_ICEBP vpshufb, YMM1, YMM2, FSxBX
669	%if TMPL_BITS == 64
670	EMIT_INSTR_PLUS_ICEBP vpshufb, YMM8, YMM9, YMM10
671	EMIT_INSTR_PLUS_ICEBP vpshufb, YMM8, YMM9, FSxBX
672	%endif
673
674	;
675	; PSHUFW
676	;
677	EMIT_INSTR_PLUS_ICEBP pshufw, MM1, MM2, 0FFh ; FF = top src word in all destination words
678	EMIT_INSTR_PLUS_ICEBP pshufw, MM1, FSxBX, 0FFh
679	EMIT_INSTR_PLUS_ICEBP pshufw, MM1, MM2, 01Bh ; 1B = word swap (like bswap but for words)
680	EMIT_INSTR_PLUS_ICEBP pshufw, MM1, FSxBX, 01Bh
681
682	;
683	; [V]PSHUFHW
684	;
685	EMIT_INSTR_PLUS_ICEBP pshufhw, XMM1, XMM2, 0FFh
686	EMIT_INSTR_PLUS_ICEBP pshufhw, XMM1, FSxBX, 0FFh
687	EMIT_INSTR_PLUS_ICEBP pshufhw, XMM1, XMM2, 01Bh
688	EMIT_INSTR_PLUS_ICEBP pshufhw, XMM1, FSxBX, 01Bh
689
690	EMIT_INSTR_PLUS_ICEBP vpshufhw, XMM1, XMM2, 0FFh
691	EMIT_INSTR_PLUS_ICEBP vpshufhw, XMM1, FSxBX, 0FFh
692	EMIT_INSTR_PLUS_ICEBP vpshufhw, XMM1, XMM2, 01Bh
693	EMIT_INSTR_PLUS_ICEBP vpshufhw, XMM1, FSxBX, 01Bh
694
695	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM1, YMM2, 0FFh
696	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM1, FSxBX, 0FFh
697	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM1, YMM2, 01Bh
698	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM1, FSxBX, 01Bh
699
700	%if TMPL_BITS == 64
701	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM12, YMM7, 0FFh
702	EMIT_INSTR_PLUS_ICEBP vpshufhw, YMM9, YMM12, 01Bh
703	%endif
704
705	;
706	; [V]PSHUFLW
707	;
708	EMIT_INSTR_PLUS_ICEBP pshuflw, XMM1, XMM2, 0FFh
709	EMIT_INSTR_PLUS_ICEBP pshuflw, XMM1, FSxBX, 0FFh
710	EMIT_INSTR_PLUS_ICEBP pshuflw, XMM1, XMM2, 01Bh
711	EMIT_INSTR_PLUS_ICEBP pshuflw, XMM1, FSxBX, 01Bh
712
713	EMIT_INSTR_PLUS_ICEBP vpshuflw, XMM1, XMM2, 0FFh
714	EMIT_INSTR_PLUS_ICEBP vpshuflw, XMM1, FSxBX, 0FFh
715	EMIT_INSTR_PLUS_ICEBP vpshuflw, XMM1, XMM2, 01Bh
716	EMIT_INSTR_PLUS_ICEBP vpshuflw, XMM1, FSxBX, 01Bh
717
718	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM1, YMM2, 0FFh
719	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM1, FSxBX, 0FFh
720	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM1, YMM2, 01Bh
721	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM1, FSxBX, 01Bh
722
723	%if TMPL_BITS == 64
724	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM12, YMM7, 0FFh
725	EMIT_INSTR_PLUS_ICEBP vpshuflw, YMM9, YMM12, 01Bh
726	%endif
727
728	;
729	; [V]PSHUFD
730	;
731	EMIT_INSTR_PLUS_ICEBP pshufd, XMM1, XMM2, 0FFh
732	EMIT_INSTR_PLUS_ICEBP pshufd, XMM1, FSxBX, 0FFh
733	EMIT_INSTR_PLUS_ICEBP pshufd, XMM1, XMM2, 01Bh
734	EMIT_INSTR_PLUS_ICEBP pshufd, XMM1, FSxBX, 01Bh
735
736	EMIT_INSTR_PLUS_ICEBP vpshufd, XMM1, XMM2, 0FFh
737	EMIT_INSTR_PLUS_ICEBP vpshufd, XMM1, FSxBX, 0FFh
738	EMIT_INSTR_PLUS_ICEBP vpshufd, XMM1, XMM2, 01Bh
739	EMIT_INSTR_PLUS_ICEBP vpshufd, XMM1, FSxBX, 01Bh
740
741	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM1, YMM2, 0FFh
742	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM1, FSxBX, 0FFh
743	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM1, YMM2, 01Bh
744	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM1, FSxBX, 01Bh
745
746	%if TMPL_BITS == 64
747	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM12, YMM7, 0FFh
748	EMIT_INSTR_PLUS_ICEBP vpshufd, YMM9, YMM12, 01Bh
749	%endif
750
751	;
752	; [V]PUNPCKHBW
753	;
754	EMIT_INSTR_PLUS_ICEBP punpckhbw, MM1, MM2
755	EMIT_INSTR_PLUS_ICEBP punpckhbw, MM1, FSxBX
756
757	EMIT_INSTR_PLUS_ICEBP punpckhbw, XMM1, XMM2
758	EMIT_INSTR_PLUS_ICEBP punpckhbw, XMM1, FSxBX
759	%if TMPL_BITS == 64
760	EMIT_INSTR_PLUS_ICEBP punpckhbw, XMM8, XMM9
761	EMIT_INSTR_PLUS_ICEBP punpckhbw, XMM8, FSxBX
762	%endif
763
764	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, XMM1, XMM2, XMM3
765	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, XMM1, XMM2, FSxBX
766	%if TMPL_BITS == 64
767	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, XMM8, XMM9, XMM10
768	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, XMM8, XMM9, FSxBX
769	%endif
770
771	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, YMM1, YMM2, YMM3
772	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, YMM1, YMM2, FSxBX
773	%if TMPL_BITS == 64
774	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, YMM8, YMM9, YMM10
775	EMIT_INSTR_PLUS_ICEBP vpunpckhbw, YMM8, YMM9, FSxBX
776	%endif
777
778	;
779	; [V]PUNPCKHWD
780	;
781	EMIT_INSTR_PLUS_ICEBP punpckhwd, MM1, MM2
782	EMIT_INSTR_PLUS_ICEBP punpckhwd, MM1, FSxBX
783
784	EMIT_INSTR_PLUS_ICEBP punpckhwd, XMM1, XMM2
785	EMIT_INSTR_PLUS_ICEBP punpckhwd, XMM1, FSxBX
786	%if TMPL_BITS == 64
787	EMIT_INSTR_PLUS_ICEBP punpckhwd, XMM8, XMM9
788	EMIT_INSTR_PLUS_ICEBP punpckhwd, XMM8, FSxBX
789	%endif
790
791	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, XMM1, XMM2, XMM3
792	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, XMM1, XMM2, FSxBX
793	%if TMPL_BITS == 64
794	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, XMM8, XMM9, XMM10
795	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, XMM8, XMM9, FSxBX
796	%endif
797
798	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, YMM1, YMM2, YMM3
799	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, YMM1, YMM2, FSxBX
800	%if TMPL_BITS == 64
801	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, YMM8, YMM9, YMM10
802	EMIT_INSTR_PLUS_ICEBP vpunpckhwd, YMM8, YMM9, FSxBX
803	%endif
804
805	;
806	; [V]PUNPCKHDQ
807	;
808	EMIT_INSTR_PLUS_ICEBP punpckhdq, MM1, MM2
809	EMIT_INSTR_PLUS_ICEBP punpckhdq, MM1, FSxBX
810
811	EMIT_INSTR_PLUS_ICEBP punpckhdq, XMM1, XMM2
812	EMIT_INSTR_PLUS_ICEBP punpckhdq, XMM1, FSxBX
813	%if TMPL_BITS == 64
814	EMIT_INSTR_PLUS_ICEBP punpckhdq, XMM8, XMM9
815	EMIT_INSTR_PLUS_ICEBP punpckhdq, XMM8, FSxBX
816	%endif
817
818	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, XMM1, XMM2, XMM3
819	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, XMM1, XMM2, FSxBX
820	%if TMPL_BITS == 64
821	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, XMM8, XMM9, XMM10
822	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, XMM8, XMM9, FSxBX
823	%endif
824
825	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, YMM1, YMM2, YMM3
826	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, YMM1, YMM2, FSxBX
827	%if TMPL_BITS == 64
828	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, YMM8, YMM9, YMM10
829	EMIT_INSTR_PLUS_ICEBP vpunpckhdq, YMM8, YMM9, FSxBX
830	%endif
831
832	;
833	; [V]PUNPCKHQDQ (no MMX)
834	;
835	EMIT_INSTR_PLUS_ICEBP punpckhqdq, XMM1, XMM2
836	EMIT_INSTR_PLUS_ICEBP punpckhqdq, XMM1, FSxBX
837	%if TMPL_BITS == 64
838	EMIT_INSTR_PLUS_ICEBP punpckhqdq, XMM8, XMM9
839	EMIT_INSTR_PLUS_ICEBP punpckhqdq, XMM8, FSxBX
840	%endif
841
842	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, XMM1, XMM2, XMM3
843	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, XMM1, XMM2, FSxBX
844	%if TMPL_BITS == 64
845	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, XMM8, XMM9, XMM10
846	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, XMM8, XMM9, FSxBX
847	%endif
848
849	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, YMM1, YMM2, YMM3
850	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, YMM1, YMM2, FSxBX
851	%if TMPL_BITS == 64
852	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, YMM8, YMM9, YMM10
853	EMIT_INSTR_PLUS_ICEBP vpunpckhqdq, YMM8, YMM9, FSxBX
854	%endif
855
856	;
857	; [V]PUNPCKLBW
858	;
859	EMIT_INSTR_PLUS_ICEBP punpcklbw, MM1, MM2
860	EMIT_INSTR_PLUS_ICEBP punpcklbw, MM1, FSxBX
861
862	EMIT_INSTR_PLUS_ICEBP punpcklbw, XMM1, XMM2
863	EMIT_INSTR_PLUS_ICEBP punpcklbw, XMM1, FSxBX
864	%if TMPL_BITS == 64
865	EMIT_INSTR_PLUS_ICEBP punpcklbw, XMM8, XMM9
866	EMIT_INSTR_PLUS_ICEBP punpcklbw, XMM8, FSxBX
867	%endif
868
869	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, XMM1, XMM2, XMM3
870	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, XMM1, XMM2, FSxBX
871	%if TMPL_BITS == 64
872	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, XMM8, XMM9, XMM10
873	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, XMM8, XMM9, FSxBX
874	%endif
875
876	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, YMM1, YMM2, YMM3
877	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, YMM1, YMM2, FSxBX
878	%if TMPL_BITS == 64
879	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, YMM8, YMM9, YMM10
880	EMIT_INSTR_PLUS_ICEBP vpunpcklbw, YMM8, YMM9, FSxBX
881	%endif
882
883	;
884	; [V]PUNPCKLWD
885	;
886	EMIT_INSTR_PLUS_ICEBP punpcklwd, MM1, MM2
887	EMIT_INSTR_PLUS_ICEBP punpcklwd, MM1, FSxBX
888
889	EMIT_INSTR_PLUS_ICEBP punpcklwd, XMM1, XMM2
890	EMIT_INSTR_PLUS_ICEBP punpcklwd, XMM1, FSxBX
891	%if TMPL_BITS == 64
892	EMIT_INSTR_PLUS_ICEBP punpcklwd, XMM8, XMM9
893	EMIT_INSTR_PLUS_ICEBP punpcklwd, XMM8, FSxBX
894	%endif
895
896	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, XMM1, XMM2, XMM3
897	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, XMM1, XMM2, FSxBX
898	%if TMPL_BITS == 64
899	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, XMM8, XMM9, XMM10
900	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, XMM8, XMM9, FSxBX
901	%endif
902
903	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, YMM1, YMM2, YMM3
904	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, YMM1, YMM2, FSxBX
905	%if TMPL_BITS == 64
906	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, YMM8, YMM9, YMM10
907	EMIT_INSTR_PLUS_ICEBP vpunpcklwd, YMM8, YMM9, FSxBX
908	%endif
909
910	;
911	; [V]PUNPCKLDQ
912	;
913	EMIT_INSTR_PLUS_ICEBP punpckldq, MM1, MM2
914	EMIT_INSTR_PLUS_ICEBP punpckldq, MM1, FSxBX
915
916	EMIT_INSTR_PLUS_ICEBP punpckldq, XMM1, XMM2
917	EMIT_INSTR_PLUS_ICEBP punpckldq, XMM1, FSxBX
918	%if TMPL_BITS == 64
919	EMIT_INSTR_PLUS_ICEBP punpckldq, XMM8, XMM9
920	EMIT_INSTR_PLUS_ICEBP punpckldq, XMM8, FSxBX
921	%endif
922
923	EMIT_INSTR_PLUS_ICEBP vpunpckldq, XMM1, XMM2, XMM3
924	EMIT_INSTR_PLUS_ICEBP vpunpckldq, XMM1, XMM2, FSxBX
925	%if TMPL_BITS == 64
926	EMIT_INSTR_PLUS_ICEBP vpunpckldq, XMM8, XMM9, XMM10
927	EMIT_INSTR_PLUS_ICEBP vpunpckldq, XMM8, XMM9, FSxBX
928	%endif
929
930	EMIT_INSTR_PLUS_ICEBP vpunpckldq, YMM1, YMM2, YMM3
931	EMIT_INSTR_PLUS_ICEBP vpunpckldq, YMM1, YMM2, FSxBX
932	%if TMPL_BITS == 64
933	EMIT_INSTR_PLUS_ICEBP vpunpckldq, YMM8, YMM9, YMM10
934	EMIT_INSTR_PLUS_ICEBP vpunpckldq, YMM8, YMM9, FSxBX
935	%endif
936
937	;
938	; [V]PUNPCKLQDQ (no MMX)
939	;
940	EMIT_INSTR_PLUS_ICEBP punpcklqdq, XMM1, XMM2
941	EMIT_INSTR_PLUS_ICEBP punpcklqdq, XMM1, FSxBX
942	%if TMPL_BITS == 64
943	EMIT_INSTR_PLUS_ICEBP punpcklqdq, XMM8, XMM9
944	EMIT_INSTR_PLUS_ICEBP punpcklqdq, XMM8, FSxBX
945	%endif
946
947	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, XMM1, XMM2, XMM3
948	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, XMM1, XMM2, FSxBX
949	%if TMPL_BITS == 64
950	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, XMM8, XMM9, XMM10
951	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, XMM8, XMM9, FSxBX
952	%endif
953
954	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, YMM1, YMM2, YMM3
955	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, YMM1, YMM2, FSxBX
956	%if TMPL_BITS == 64
957	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, YMM8, YMM9, YMM10
958	EMIT_INSTR_PLUS_ICEBP vpunpcklqdq, YMM8, YMM9, FSxBX
959	%endif
960
961	;
962	; [V]PACKSSWB
963	;
964	EMIT_INSTR_PLUS_ICEBP packsswb, MM1, MM2
965	EMIT_INSTR_PLUS_ICEBP packsswb, MM1, FSxBX
966
967	EMIT_INSTR_PLUS_ICEBP packsswb, XMM1, XMM2
968	EMIT_INSTR_PLUS_ICEBP packsswb, XMM1, FSxBX
969	%if TMPL_BITS == 64
970	EMIT_INSTR_PLUS_ICEBP packsswb, XMM8, XMM9
971	EMIT_INSTR_PLUS_ICEBP packsswb, XMM8, FSxBX
972	%endif
973
974	EMIT_INSTR_PLUS_ICEBP vpacksswb, XMM1, XMM2, XMM3
975	EMIT_INSTR_PLUS_ICEBP vpacksswb, XMM1, XMM2, FSxBX
976	%if TMPL_BITS == 64
977	EMIT_INSTR_PLUS_ICEBP vpacksswb, XMM8, XMM9, XMM10
978	EMIT_INSTR_PLUS_ICEBP vpacksswb, XMM8, XMM9, FSxBX
979	%endif
980
981	EMIT_INSTR_PLUS_ICEBP vpacksswb, YMM1, YMM2, YMM3
982	EMIT_INSTR_PLUS_ICEBP vpacksswb, YMM1, YMM2, FSxBX
983	%if TMPL_BITS == 64
984	EMIT_INSTR_PLUS_ICEBP vpacksswb, YMM8, YMM9, YMM10
985	EMIT_INSTR_PLUS_ICEBP vpacksswb, YMM8, YMM9, FSxBX
986	%endif
987
988	;
989	; [V]PACKSSWD
990	;
991	EMIT_INSTR_PLUS_ICEBP packssdw, MM1, MM2
992	EMIT_INSTR_PLUS_ICEBP packssdw, MM1, FSxBX
993
994	EMIT_INSTR_PLUS_ICEBP packssdw, XMM1, XMM2
995	EMIT_INSTR_PLUS_ICEBP packssdw, XMM1, FSxBX
996	%if TMPL_BITS == 64
997	EMIT_INSTR_PLUS_ICEBP packssdw, XMM8, XMM9
998	EMIT_INSTR_PLUS_ICEBP packssdw, XMM8, FSxBX
999	%endif
1000
1001	EMIT_INSTR_PLUS_ICEBP vpackssdw, XMM1, XMM2, XMM3
1002	EMIT_INSTR_PLUS_ICEBP vpackssdw, XMM1, XMM2, FSxBX
1003	%if TMPL_BITS == 64
1004	EMIT_INSTR_PLUS_ICEBP vpackssdw, XMM8, XMM9, XMM10
1005	EMIT_INSTR_PLUS_ICEBP vpackssdw, XMM8, XMM9, FSxBX
1006	%endif
1007
1008	EMIT_INSTR_PLUS_ICEBP vpackssdw, YMM1, YMM2, YMM3
1009	EMIT_INSTR_PLUS_ICEBP vpackssdw, YMM1, YMM2, FSxBX
1010	%if TMPL_BITS == 64
1011	EMIT_INSTR_PLUS_ICEBP vpackssdw, YMM8, YMM9, YMM10
1012	EMIT_INSTR_PLUS_ICEBP vpackssdw, YMM8, YMM9, FSxBX
1013	%endif
1014
1015	;
1016	; [V]PACKUSWB
1017	;
1018	EMIT_INSTR_PLUS_ICEBP packuswb, MM1, MM2
1019	EMIT_INSTR_PLUS_ICEBP packuswb, MM1, FSxBX
1020
1021	EMIT_INSTR_PLUS_ICEBP packuswb, XMM1, XMM2
1022	EMIT_INSTR_PLUS_ICEBP packuswb, XMM1, FSxBX
1023	%if TMPL_BITS == 64
1024	EMIT_INSTR_PLUS_ICEBP packuswb, XMM8, XMM9
1025	EMIT_INSTR_PLUS_ICEBP packuswb, XMM8, FSxBX
1026	%endif
1027
1028	EMIT_INSTR_PLUS_ICEBP vpackuswb, XMM1, XMM2, XMM3
1029	EMIT_INSTR_PLUS_ICEBP vpackuswb, XMM1, XMM2, FSxBX
1030	%if TMPL_BITS == 64
1031	EMIT_INSTR_PLUS_ICEBP vpackuswb, XMM8, XMM9, XMM10
1032	EMIT_INSTR_PLUS_ICEBP vpackuswb, XMM8, XMM9, FSxBX
1033	%endif
1034
1035	EMIT_INSTR_PLUS_ICEBP vpackuswb, YMM1, YMM2, YMM3
1036	EMIT_INSTR_PLUS_ICEBP vpackuswb, YMM1, YMM2, FSxBX
1037	%if TMPL_BITS == 64
1038	EMIT_INSTR_PLUS_ICEBP vpackuswb, YMM8, YMM9, YMM10
1039	EMIT_INSTR_PLUS_ICEBP vpackuswb, YMM8, YMM9, FSxBX
1040	%endif
1041
1042	;
1043	; [V]PACKUSWD (no MMX)
1044	;
1045	EMIT_INSTR_PLUS_ICEBP packusdw, XMM1, XMM2
1046	EMIT_INSTR_PLUS_ICEBP packusdw, XMM1, FSxBX
1047	%if TMPL_BITS == 64
1048	EMIT_INSTR_PLUS_ICEBP packusdw, XMM8, XMM9
1049	EMIT_INSTR_PLUS_ICEBP packusdw, XMM8, FSxBX
1050	%endif
1051
1052	EMIT_INSTR_PLUS_ICEBP vpackusdw, XMM1, XMM2, XMM3
1053	EMIT_INSTR_PLUS_ICEBP vpackusdw, XMM1, XMM2, FSxBX
1054	%if TMPL_BITS == 64
1055	EMIT_INSTR_PLUS_ICEBP vpackusdw, XMM8, XMM9, XMM10
1056	EMIT_INSTR_PLUS_ICEBP vpackusdw, XMM8, XMM9, FSxBX
1057	%endif
1058
1059	EMIT_INSTR_PLUS_ICEBP vpackusdw, YMM1, YMM2, YMM3
1060	EMIT_INSTR_PLUS_ICEBP vpackusdw, YMM1, YMM2, FSxBX
1061	%if TMPL_BITS == 64
1062	EMIT_INSTR_PLUS_ICEBP vpackusdw, YMM8, YMM9, YMM10
1063	EMIT_INSTR_PLUS_ICEBP vpackusdw, YMM8, YMM9, FSxBX
1064	%endif
1065
1066	;
1067	; [V]PMAXUB
1068	;
1069	EMIT_INSTR_PLUS_ICEBP pmaxub, MM1, MM2
1070	EMIT_INSTR_PLUS_ICEBP pmaxub, MM1, FSxBX
1071
1072	EMIT_INSTR_PLUS_ICEBP pmaxub, XMM1, XMM2
1073	EMIT_INSTR_PLUS_ICEBP pmaxub, XMM1, FSxBX
1074	%if TMPL_BITS == 64
1075	EMIT_INSTR_PLUS_ICEBP pmaxub, XMM8, XMM9
1076	EMIT_INSTR_PLUS_ICEBP pmaxub, XMM8, FSxBX
1077	%endif
1078
1079	EMIT_INSTR_PLUS_ICEBP vpmaxub, XMM1, XMM2, XMM3
1080	EMIT_INSTR_PLUS_ICEBP vpmaxub, XMM1, XMM2, FSxBX
1081	%if TMPL_BITS == 64
1082	EMIT_INSTR_PLUS_ICEBP vpmaxub, XMM8, XMM9, XMM10
1083	EMIT_INSTR_PLUS_ICEBP vpmaxub, XMM8, XMM9, FSxBX
1084	%endif
1085
1086	EMIT_INSTR_PLUS_ICEBP vpmaxub, YMM1, YMM2, YMM3
1087	EMIT_INSTR_PLUS_ICEBP vpmaxub, YMM1, YMM2, FSxBX
1088	%if TMPL_BITS == 64
1089	EMIT_INSTR_PLUS_ICEBP vpmaxub, YMM8, YMM9, YMM10
1090	EMIT_INSTR_PLUS_ICEBP vpmaxub, YMM8, YMM9, FSxBX
1091	%endif
1092
1093	;
1094	; [V]PMAXUW
1095	;
1096	EMIT_INSTR_PLUS_ICEBP pmaxuw, XMM1, XMM2
1097	EMIT_INSTR_PLUS_ICEBP pmaxuw, XMM1, FSxBX
1098	%if TMPL_BITS == 64
1099	EMIT_INSTR_PLUS_ICEBP pmaxuw, XMM8, XMM9
1100	EMIT_INSTR_PLUS_ICEBP pmaxuw, XMM8, FSxBX
1101	%endif
1102
1103	EMIT_INSTR_PLUS_ICEBP vpmaxuw, XMM1, XMM2, XMM3
1104	EMIT_INSTR_PLUS_ICEBP vpmaxuw, XMM1, XMM2, FSxBX
1105	%if TMPL_BITS == 64
1106	EMIT_INSTR_PLUS_ICEBP vpmaxuw, XMM8, XMM9, XMM10
1107	EMIT_INSTR_PLUS_ICEBP vpmaxuw, XMM8, XMM9, FSxBX
1108	%endif
1109
1110	EMIT_INSTR_PLUS_ICEBP vpmaxuw, YMM1, YMM2, YMM3
1111	EMIT_INSTR_PLUS_ICEBP vpmaxuw, YMM1, YMM2, FSxBX
1112	%if TMPL_BITS == 64
1113	EMIT_INSTR_PLUS_ICEBP vpmaxuw, YMM8, YMM9, YMM10
1114	EMIT_INSTR_PLUS_ICEBP vpmaxuw, YMM8, YMM9, FSxBX
1115	%endif
1116
1117	;
1118	; [V]PMAXUD
1119	;
1120	EMIT_INSTR_PLUS_ICEBP pmaxud, XMM1, XMM2
1121	EMIT_INSTR_PLUS_ICEBP pmaxud, XMM1, FSxBX
1122	%if TMPL_BITS == 64
1123	EMIT_INSTR_PLUS_ICEBP pmaxud, XMM8, XMM9
1124	EMIT_INSTR_PLUS_ICEBP pmaxud, XMM8, FSxBX
1125	%endif
1126
1127	EMIT_INSTR_PLUS_ICEBP vpmaxud, XMM1, XMM2, XMM3
1128	EMIT_INSTR_PLUS_ICEBP vpmaxud, XMM1, XMM2, FSxBX
1129	%if TMPL_BITS == 64
1130	EMIT_INSTR_PLUS_ICEBP vpmaxud, XMM8, XMM9, XMM10
1131	EMIT_INSTR_PLUS_ICEBP vpmaxud, XMM8, XMM9, FSxBX
1132	%endif
1133
1134	EMIT_INSTR_PLUS_ICEBP vpmaxud, YMM1, YMM2, YMM3
1135	EMIT_INSTR_PLUS_ICEBP vpmaxud, YMM1, YMM2, FSxBX
1136	%if TMPL_BITS == 64
1137	EMIT_INSTR_PLUS_ICEBP vpmaxud, YMM8, YMM9, YMM10
1138	EMIT_INSTR_PLUS_ICEBP vpmaxud, YMM8, YMM9, FSxBX
1139	%endif
1140
1141	;
1142	; [V]PMAXSB
1143	;
1144	EMIT_INSTR_PLUS_ICEBP pmaxsb, XMM1, XMM2
1145	EMIT_INSTR_PLUS_ICEBP pmaxsb, XMM1, FSxBX
1146	%if TMPL_BITS == 64
1147	EMIT_INSTR_PLUS_ICEBP pmaxsb, XMM8, XMM9
1148	EMIT_INSTR_PLUS_ICEBP pmaxsb, XMM8, FSxBX
1149	%endif
1150
1151	EMIT_INSTR_PLUS_ICEBP vpmaxsb, XMM1, XMM2, XMM3
1152	EMIT_INSTR_PLUS_ICEBP vpmaxsb, XMM1, XMM2, FSxBX
1153	%if TMPL_BITS == 64
1154	EMIT_INSTR_PLUS_ICEBP vpmaxsb, XMM8, XMM9, XMM10
1155	EMIT_INSTR_PLUS_ICEBP vpmaxsb, XMM8, XMM9, FSxBX
1156	%endif
1157
1158	EMIT_INSTR_PLUS_ICEBP vpmaxsb, YMM1, YMM2, YMM3
1159	EMIT_INSTR_PLUS_ICEBP vpmaxsb, YMM1, YMM2, FSxBX
1160	%if TMPL_BITS == 64
1161	EMIT_INSTR_PLUS_ICEBP vpmaxsb, YMM8, YMM9, YMM10
1162	EMIT_INSTR_PLUS_ICEBP vpmaxsb, YMM8, YMM9, FSxBX
1163	%endif
1164
1165	;
1166	; [V]PMAXSW
1167	;
1168	EMIT_INSTR_PLUS_ICEBP pmaxsw, MM1, MM2
1169	EMIT_INSTR_PLUS_ICEBP pmaxsw, MM1, FSxBX
1170
1171	EMIT_INSTR_PLUS_ICEBP pmaxsw, XMM1, XMM2
1172	EMIT_INSTR_PLUS_ICEBP pmaxsw, XMM1, FSxBX
1173	%if TMPL_BITS == 64
1174	EMIT_INSTR_PLUS_ICEBP pmaxsw, XMM8, XMM9
1175	EMIT_INSTR_PLUS_ICEBP pmaxsw, XMM8, FSxBX
1176	%endif
1177
1178	EMIT_INSTR_PLUS_ICEBP vpmaxsw, XMM1, XMM2, XMM3
1179	EMIT_INSTR_PLUS_ICEBP vpmaxsw, XMM1, XMM2, FSxBX
1180	%if TMPL_BITS == 64
1181	EMIT_INSTR_PLUS_ICEBP vpmaxsw, XMM8, XMM9, XMM10
1182	EMIT_INSTR_PLUS_ICEBP vpmaxsw, XMM8, XMM9, FSxBX
1183	%endif
1184
1185	EMIT_INSTR_PLUS_ICEBP vpmaxsw, YMM1, YMM2, YMM3
1186	EMIT_INSTR_PLUS_ICEBP vpmaxsw, YMM1, YMM2, FSxBX
1187	%if TMPL_BITS == 64
1188	EMIT_INSTR_PLUS_ICEBP vpmaxsw, YMM8, YMM9, YMM10
1189	EMIT_INSTR_PLUS_ICEBP vpmaxsw, YMM8, YMM9, FSxBX
1190	%endif
1191
1192	;
1193	; [V]PMAXSD
1194	;
1195	EMIT_INSTR_PLUS_ICEBP pmaxsd, XMM1, XMM2
1196	EMIT_INSTR_PLUS_ICEBP pmaxsd, XMM1, FSxBX
1197	%if TMPL_BITS == 64
1198	EMIT_INSTR_PLUS_ICEBP pmaxsd, XMM8, XMM9
1199	EMIT_INSTR_PLUS_ICEBP pmaxsd, XMM8, FSxBX
1200	%endif
1201
1202	EMIT_INSTR_PLUS_ICEBP vpmaxsd, XMM1, XMM2, XMM3
1203	EMIT_INSTR_PLUS_ICEBP vpmaxsd, XMM1, XMM2, FSxBX
1204	%if TMPL_BITS == 64
1205	EMIT_INSTR_PLUS_ICEBP vpmaxsd, XMM8, XMM9, XMM10
1206	EMIT_INSTR_PLUS_ICEBP vpmaxsd, XMM8, XMM9, FSxBX
1207	%endif
1208
1209	EMIT_INSTR_PLUS_ICEBP vpmaxsd, YMM1, YMM2, YMM3
1210	EMIT_INSTR_PLUS_ICEBP vpmaxsd, YMM1, YMM2, FSxBX
1211	%if TMPL_BITS == 64
1212	EMIT_INSTR_PLUS_ICEBP vpmaxsd, YMM8, YMM9, YMM10
1213	EMIT_INSTR_PLUS_ICEBP vpmaxsd, YMM8, YMM9, FSxBX
1214	%endif
1215
1216	;
1217	; [V]PMINUB
1218	;
1219	EMIT_INSTR_PLUS_ICEBP pminub, MM1, MM2
1220	EMIT_INSTR_PLUS_ICEBP pminub, MM1, FSxBX
1221
1222	EMIT_INSTR_PLUS_ICEBP pminub, XMM1, XMM2
1223	EMIT_INSTR_PLUS_ICEBP pminub, XMM1, FSxBX
1224	%if TMPL_BITS == 64
1225	EMIT_INSTR_PLUS_ICEBP pminub, XMM8, XMM9
1226	EMIT_INSTR_PLUS_ICEBP pminub, XMM8, FSxBX
1227	%endif
1228
1229	EMIT_INSTR_PLUS_ICEBP vpminub, XMM1, XMM2, XMM3
1230	EMIT_INSTR_PLUS_ICEBP vpminub, XMM1, XMM2, FSxBX
1231	%if TMPL_BITS == 64
1232	EMIT_INSTR_PLUS_ICEBP vpminub, XMM8, XMM9, XMM10
1233	EMIT_INSTR_PLUS_ICEBP vpminub, XMM8, XMM9, FSxBX
1234	%endif
1235
1236	EMIT_INSTR_PLUS_ICEBP vpminub, YMM1, YMM2, YMM3
1237	EMIT_INSTR_PLUS_ICEBP vpminub, YMM1, YMM2, FSxBX
1238	%if TMPL_BITS == 64
1239	EMIT_INSTR_PLUS_ICEBP vpminub, YMM8, YMM9, YMM10
1240	EMIT_INSTR_PLUS_ICEBP vpminub, YMM8, YMM9, FSxBX
1241	%endif
1242
1243	;
1244	; [V]PMINUW
1245	;
1246	EMIT_INSTR_PLUS_ICEBP pminuw, XMM1, XMM2
1247	EMIT_INSTR_PLUS_ICEBP pminuw, XMM1, FSxBX
1248	%if TMPL_BITS == 64
1249	EMIT_INSTR_PLUS_ICEBP pminuw, XMM8, XMM9
1250	EMIT_INSTR_PLUS_ICEBP pminuw, XMM8, FSxBX
1251	%endif
1252
1253	EMIT_INSTR_PLUS_ICEBP vpminuw, XMM1, XMM2, XMM3
1254	EMIT_INSTR_PLUS_ICEBP vpminuw, XMM1, XMM2, FSxBX
1255	%if TMPL_BITS == 64
1256	EMIT_INSTR_PLUS_ICEBP vpminuw, XMM8, XMM9, XMM10
1257	EMIT_INSTR_PLUS_ICEBP vpminuw, XMM8, XMM9, FSxBX
1258	%endif
1259
1260	EMIT_INSTR_PLUS_ICEBP vpminuw, YMM1, YMM2, YMM3
1261	EMIT_INSTR_PLUS_ICEBP vpminuw, YMM1, YMM2, FSxBX
1262	%if TMPL_BITS == 64
1263	EMIT_INSTR_PLUS_ICEBP vpminuw, YMM8, YMM9, YMM10
1264	EMIT_INSTR_PLUS_ICEBP vpminuw, YMM8, YMM9, FSxBX
1265	%endif
1266
1267	;
1268	; [V]PMINUD
1269	;
1270	EMIT_INSTR_PLUS_ICEBP pminud, XMM1, XMM2
1271	EMIT_INSTR_PLUS_ICEBP pminud, XMM1, FSxBX
1272	%if TMPL_BITS == 64
1273	EMIT_INSTR_PLUS_ICEBP pminud, XMM8, XMM9
1274	EMIT_INSTR_PLUS_ICEBP pminud, XMM8, FSxBX
1275	%endif
1276
1277	EMIT_INSTR_PLUS_ICEBP vpminud, XMM1, XMM2, XMM3
1278	EMIT_INSTR_PLUS_ICEBP vpminud, XMM1, XMM2, FSxBX
1279	%if TMPL_BITS == 64
1280	EMIT_INSTR_PLUS_ICEBP vpminud, XMM8, XMM9, XMM10
1281	EMIT_INSTR_PLUS_ICEBP vpminud, XMM8, XMM9, FSxBX
1282	%endif
1283
1284	EMIT_INSTR_PLUS_ICEBP vpminud, YMM1, YMM2, YMM3
1285	EMIT_INSTR_PLUS_ICEBP vpminud, YMM1, YMM2, FSxBX
1286	%if TMPL_BITS == 64
1287	EMIT_INSTR_PLUS_ICEBP vpminud, YMM8, YMM9, YMM10
1288	EMIT_INSTR_PLUS_ICEBP vpminud, YMM8, YMM9, FSxBX
1289	%endif
1290
1291	;
1292	; [V]PMINSB
1293	;
1294	EMIT_INSTR_PLUS_ICEBP pminsb, XMM1, XMM2
1295	EMIT_INSTR_PLUS_ICEBP pminsb, XMM1, FSxBX
1296	%if TMPL_BITS == 64
1297	EMIT_INSTR_PLUS_ICEBP pminsb, XMM8, XMM9
1298	EMIT_INSTR_PLUS_ICEBP pminsb, XMM8, FSxBX
1299	%endif
1300
1301	EMIT_INSTR_PLUS_ICEBP vpminsb, XMM1, XMM2, XMM3
1302	EMIT_INSTR_PLUS_ICEBP vpminsb, XMM1, XMM2, FSxBX
1303	%if TMPL_BITS == 64
1304	EMIT_INSTR_PLUS_ICEBP vpminsb, XMM8, XMM9, XMM10
1305	EMIT_INSTR_PLUS_ICEBP vpminsb, XMM8, XMM9, FSxBX
1306	%endif
1307
1308	EMIT_INSTR_PLUS_ICEBP vpminsb, YMM1, YMM2, YMM3
1309	EMIT_INSTR_PLUS_ICEBP vpminsb, YMM1, YMM2, FSxBX
1310	%if TMPL_BITS == 64
1311	EMIT_INSTR_PLUS_ICEBP vpminsb, YMM8, YMM9, YMM10
1312	EMIT_INSTR_PLUS_ICEBP vpminsb, YMM8, YMM9, FSxBX
1313	%endif
1314
1315	;
1316	; [V]PMINSW
1317	;
1318	EMIT_INSTR_PLUS_ICEBP pminsw, MM1, MM2
1319	EMIT_INSTR_PLUS_ICEBP pminsw, MM1, FSxBX
1320
1321	EMIT_INSTR_PLUS_ICEBP pminsw, XMM1, XMM2
1322	EMIT_INSTR_PLUS_ICEBP pminsw, XMM1, FSxBX
1323	%if TMPL_BITS == 64
1324	EMIT_INSTR_PLUS_ICEBP pminsw, XMM8, XMM9
1325	EMIT_INSTR_PLUS_ICEBP pminsw, XMM8, FSxBX
1326	%endif
1327
1328	EMIT_INSTR_PLUS_ICEBP vpminsw, XMM1, XMM2, XMM3
1329	EMIT_INSTR_PLUS_ICEBP vpminsw, XMM1, XMM2, FSxBX
1330	%if TMPL_BITS == 64
1331	EMIT_INSTR_PLUS_ICEBP vpminsw, XMM8, XMM9, XMM10
1332	EMIT_INSTR_PLUS_ICEBP vpminsw, XMM8, XMM9, FSxBX
1333	%endif
1334
1335	EMIT_INSTR_PLUS_ICEBP vpminsw, YMM1, YMM2, YMM3
1336	EMIT_INSTR_PLUS_ICEBP vpminsw, YMM1, YMM2, FSxBX
1337	%if TMPL_BITS == 64
1338	EMIT_INSTR_PLUS_ICEBP vpminsw, YMM8, YMM9, YMM10
1339	EMIT_INSTR_PLUS_ICEBP vpminsw, YMM8, YMM9, FSxBX
1340	%endif
1341
1342	;
1343	; [V]PMINSD
1344	;
1345	EMIT_INSTR_PLUS_ICEBP pminsd, XMM1, XMM2
1346	EMIT_INSTR_PLUS_ICEBP pminsd, XMM1, FSxBX
1347	%if TMPL_BITS == 64
1348	EMIT_INSTR_PLUS_ICEBP pminsd, XMM8, XMM9
1349	EMIT_INSTR_PLUS_ICEBP pminsd, XMM8, FSxBX
1350	%endif
1351
1352	EMIT_INSTR_PLUS_ICEBP vpminsd, XMM1, XMM2, XMM3
1353	EMIT_INSTR_PLUS_ICEBP vpminsd, XMM1, XMM2, FSxBX
1354	%if TMPL_BITS == 64
1355	EMIT_INSTR_PLUS_ICEBP vpminsd, XMM8, XMM9, XMM10
1356	EMIT_INSTR_PLUS_ICEBP vpminsd, XMM8, XMM9, FSxBX
1357	%endif
1358
1359	EMIT_INSTR_PLUS_ICEBP vpminsd, YMM1, YMM2, YMM3
1360	EMIT_INSTR_PLUS_ICEBP vpminsd, YMM1, YMM2, FSxBX
1361	%if TMPL_BITS == 64
1362	EMIT_INSTR_PLUS_ICEBP vpminsd, YMM8, YMM9, YMM10
1363	EMIT_INSTR_PLUS_ICEBP vpminsd, YMM8, YMM9, FSxBX
1364	%endif
1365
1366	;
1367	; [V]MOVNTDQA
1368	;
1369	EMIT_INSTR_PLUS_ICEBP movntdqa, XMM1, FSxBX
1370	EMIT_INSTR_PLUS_ICEBP vmovntdqa, XMM1, FSxBX
1371	EMIT_INSTR_PLUS_ICEBP vmovntdqa, YMM1, FSxBX
1372	%if TMPL_BITS == 64
1373	EMIT_INSTR_PLUS_ICEBP movntdqa, XMM10, FSxBX
1374	EMIT_INSTR_PLUS_ICEBP vmovntdqa, XMM11, FSxBX
1375	EMIT_INSTR_PLUS_ICEBP vmovntdqa, YMM12, FSxBX
1376	%endif
1377
1378	;
1379	; [V]MOVNTDQ
1380	;
1381	EMIT_INSTR_PLUS_ICEBP movntdq, FSxBX, XMM1
1382	EMIT_INSTR_PLUS_ICEBP vmovntdq, FSxBX, XMM1
1383	EMIT_INSTR_PLUS_ICEBP vmovntdq, FSxBX, YMM1
1384	%if TMPL_BITS == 64
1385	EMIT_INSTR_PLUS_ICEBP movntdq, FSxBX, XMM10
1386	EMIT_INSTR_PLUS_ICEBP vmovntdq, FSxBX, XMM10
1387	EMIT_INSTR_PLUS_ICEBP vmovntdq, FSxBX, YMM10
1388	%endif
1389
1390
1391	;
1392	; [V]MOVNTPS
1393	;
1394	EMIT_INSTR_PLUS_ICEBP movntps, FSxBX, XMM1
1395	EMIT_INSTR_PLUS_ICEBP vmovntps, FSxBX, XMM1
1396	EMIT_INSTR_PLUS_ICEBP vmovntps, FSxBX, YMM1
1397	%if TMPL_BITS == 64
1398	EMIT_INSTR_PLUS_ICEBP movntps, FSxBX, XMM10
1399	EMIT_INSTR_PLUS_ICEBP vmovntps, FSxBX, XMM11
1400	EMIT_INSTR_PLUS_ICEBP vmovntps, FSxBX, YMM12
1401	%endif
1402
1403	;
1404	; [V]MOVNTPD
1405	;
1406	EMIT_INSTR_PLUS_ICEBP movntpd, FSxBX, XMM1
1407	EMIT_INSTR_PLUS_ICEBP vmovntpd, FSxBX, XMM1
1408	EMIT_INSTR_PLUS_ICEBP vmovntpd, FSxBX, YMM1
1409	%if TMPL_BITS == 64
1410	EMIT_INSTR_PLUS_ICEBP movntpd, FSxBX, XMM10
1411	EMIT_INSTR_PLUS_ICEBP vmovntpd, FSxBX, XMM11
1412	EMIT_INSTR_PLUS_ICEBP vmovntpd, FSxBX, YMM12
1413	%endif
1414
1415	;
1416	; [V]MOVUPS - not testing the 2nd register variant.
1417	;
1418	EMIT_INSTR_PLUS_ICEBP movups, XMM1, XMM2
1419	EMIT_INSTR_PLUS_ICEBP movups, XMM1, FSxBX
1420	EMIT_INSTR_PLUS_ICEBP movups, FSxBX, XMM1
1421	EMIT_INSTR_PLUS_ICEBP vmovups, XMM1, XMM2
1422	EMIT_INSTR_PLUS_ICEBP vmovups, XMM1, FSxBX
1423	EMIT_INSTR_PLUS_ICEBP vmovups, FSxBX, XMM1
1424	EMIT_INSTR_PLUS_ICEBP vmovups, YMM1, YMM2
1425	EMIT_INSTR_PLUS_ICEBP vmovups, YMM1, FSxBX
1426	EMIT_INSTR_PLUS_ICEBP vmovups, FSxBX, YMM1
1427	%if TMPL_BITS == 64
1428	EMIT_INSTR_PLUS_ICEBP movups, XMM8, XMM12
1429	EMIT_INSTR_PLUS_ICEBP movups, XMM10, FSxBX
1430	EMIT_INSTR_PLUS_ICEBP movups, FSxBX, XMM10
1431	EMIT_INSTR_PLUS_ICEBP vmovups, XMM7, XMM14
1432	EMIT_INSTR_PLUS_ICEBP vmovups, XMM11, FSxBX
1433	EMIT_INSTR_PLUS_ICEBP vmovups, FSxBX, XMM11
1434	EMIT_INSTR_PLUS_ICEBP vmovups, YMM12, YMM8
1435	EMIT_INSTR_PLUS_ICEBP vmovups, YMM12, FSxBX
1436	EMIT_INSTR_PLUS_ICEBP vmovups, FSxBX, YMM12
1437	%endif
1438
1439	;
1440	; [V]MOVUPD - not testing the 2nd register variant.
1441	;
1442	EMIT_INSTR_PLUS_ICEBP movupd, XMM1, XMM2
1443	EMIT_INSTR_PLUS_ICEBP movupd, XMM1, FSxBX
1444	EMIT_INSTR_PLUS_ICEBP movupd, FSxBX, XMM1
1445	EMIT_INSTR_PLUS_ICEBP vmovupd, XMM1, XMM2
1446	EMIT_INSTR_PLUS_ICEBP vmovupd, XMM1, FSxBX
1447	EMIT_INSTR_PLUS_ICEBP vmovupd, FSxBX, XMM1
1448	EMIT_INSTR_PLUS_ICEBP vmovupd, YMM1, YMM2
1449	EMIT_INSTR_PLUS_ICEBP vmovupd, YMM1, FSxBX
1450	EMIT_INSTR_PLUS_ICEBP vmovupd, FSxBX, YMM1
1451	%if TMPL_BITS == 64
1452	EMIT_INSTR_PLUS_ICEBP movupd, XMM8, XMM12
1453	EMIT_INSTR_PLUS_ICEBP movupd, XMM10, FSxBX
1454	EMIT_INSTR_PLUS_ICEBP movupd, FSxBX, XMM10
1455	EMIT_INSTR_PLUS_ICEBP vmovupd, XMM7, XMM14
1456	EMIT_INSTR_PLUS_ICEBP vmovupd, XMM11, FSxBX
1457	EMIT_INSTR_PLUS_ICEBP vmovupd, FSxBX, XMM11
1458	EMIT_INSTR_PLUS_ICEBP vmovupd, YMM12, YMM8
1459	EMIT_INSTR_PLUS_ICEBP vmovupd, YMM12, FSxBX
1460	EMIT_INSTR_PLUS_ICEBP vmovupd, FSxBX, YMM12
1461	%endif
1462
1463	;
1464	; [V]MOVSS - not testing the 2nd register variant.
1465	;
1466	EMIT_INSTR_PLUS_ICEBP movss, XMM1, XMM2
1467	EMIT_INSTR_PLUS_ICEBP movss, XMM1, FSxBX
1468	EMIT_INSTR_PLUS_ICEBP movss, FSxBX, XMM1
1469	EMIT_INSTR_PLUS_ICEBP vmovss, XMM1, XMM2
1470	EMIT_INSTR_PLUS_ICEBP vmovss, XMM1, FSxBX
1471	EMIT_INSTR_PLUS_ICEBP vmovss, FSxBX, XMM1
1472	%if TMPL_BITS == 64
1473	EMIT_INSTR_PLUS_ICEBP movss, XMM11, XMM8
1474	EMIT_INSTR_PLUS_ICEBP movss, XMM8, FSxBX
1475	EMIT_INSTR_PLUS_ICEBP movss, FSxBX, XMM11
1476	EMIT_INSTR_PLUS_ICEBP vmovss, XMM9, XMM10
1477	EMIT_INSTR_PLUS_ICEBP vmovss, XMM10, FSxBX
1478	EMIT_INSTR_PLUS_ICEBP vmovss, FSxBX, XMM9
1479	%endif
1480
1481	;
1482	; [V]MOVSD - not testing the 2nd register variant.
1483	;
1484	EMIT_INSTR_PLUS_ICEBP movsd, XMM1, XMM2
1485	EMIT_INSTR_PLUS_ICEBP movsd, XMM1, FSxBX
1486	EMIT_INSTR_PLUS_ICEBP movsd, FSxBX, XMM1
1487	EMIT_INSTR_PLUS_ICEBP vmovsd, XMM1, XMM2
1488	EMIT_INSTR_PLUS_ICEBP vmovsd, XMM1, FSxBX
1489	EMIT_INSTR_PLUS_ICEBP vmovsd, FSxBX, XMM1
1490	%if TMPL_BITS == 64
1491	EMIT_INSTR_PLUS_ICEBP movsd, XMM11, XMM8
1492	EMIT_INSTR_PLUS_ICEBP movsd, XMM8, FSxBX
1493	EMIT_INSTR_PLUS_ICEBP movsd, FSxBX, XMM11
1494	EMIT_INSTR_PLUS_ICEBP vmovsd, XMM9, XMM10
1495	EMIT_INSTR_PLUS_ICEBP vmovsd, XMM10, FSxBX
1496	EMIT_INSTR_PLUS_ICEBP vmovsd, FSxBX, XMM9
1497	%endif
1498
1499	;
1500	; [V]MOVLPS
1501	;
1502	EMIT_INSTR_PLUS_ICEBP movlps, XMM1, FSxBX
1503	EMIT_INSTR_PLUS_ICEBP movlps, FSxBX, XMM1
1504	EMIT_INSTR_PLUS_ICEBP vmovlps, XMM1, XMM2, FSxBX
1505	EMIT_INSTR_PLUS_ICEBP vmovlps, FSxBX, XMM1
1506	%if TMPL_BITS == 64
1507	EMIT_INSTR_PLUS_ICEBP movlps, XMM8, FSxBX
1508	EMIT_INSTR_PLUS_ICEBP movlps, FSxBX, XMM11
1509	EMIT_INSTR_PLUS_ICEBP vmovlps, XMM10, XMM14, FSxBX
1510	EMIT_INSTR_PLUS_ICEBP vmovlps, FSxBX, XMM9
1511	%endif
1512
1513	;
1514	; [V]MOVLPD
1515	;
1516	EMIT_INSTR_PLUS_ICEBP movlpd, XMM1, FSxBX
1517	EMIT_INSTR_PLUS_ICEBP movlpd, FSxBX, XMM1
1518	EMIT_INSTR_PLUS_ICEBP vmovlpd, XMM1, XMM2, FSxBX
1519	EMIT_INSTR_PLUS_ICEBP vmovlpd, FSxBX, XMM1
1520	%if TMPL_BITS == 64
1521	EMIT_INSTR_PLUS_ICEBP movlpd, XMM8, FSxBX
1522	EMIT_INSTR_PLUS_ICEBP movlpd, FSxBX, XMM11
1523	EMIT_INSTR_PLUS_ICEBP vmovlpd, XMM10, XMM14, FSxBX
1524	EMIT_INSTR_PLUS_ICEBP vmovlpd, FSxBX, XMM9
1525	%endif
1526
1527	;
1528	; [V]MOVHPS
1529	;
1530	EMIT_INSTR_PLUS_ICEBP movhps, XMM1, FSxBX
1531	EMIT_INSTR_PLUS_ICEBP movhps, FSxBX, XMM1
1532	EMIT_INSTR_PLUS_ICEBP vmovhps, XMM1, XMM2, FSxBX
1533	EMIT_INSTR_PLUS_ICEBP vmovhps, FSxBX, XMM1
1534	%if TMPL_BITS == 64
1535	EMIT_INSTR_PLUS_ICEBP movhps, XMM8, FSxBX
1536	EMIT_INSTR_PLUS_ICEBP movhps, FSxBX, XMM11
1537	EMIT_INSTR_PLUS_ICEBP vmovhps, XMM10, XMM14, FSxBX
1538	EMIT_INSTR_PLUS_ICEBP vmovhps, FSxBX, XMM9
1539	%endif
1540
1541	;
1542	; [V]MOVHPD
1543	;
1544	EMIT_INSTR_PLUS_ICEBP movhpd, XMM1, FSxBX
1545	EMIT_INSTR_PLUS_ICEBP movhpd, FSxBX, XMM1
1546	EMIT_INSTR_PLUS_ICEBP vmovhpd, XMM1, XMM2, FSxBX
1547	EMIT_INSTR_PLUS_ICEBP vmovhpd, FSxBX, XMM1
1548	%if TMPL_BITS == 64
1549	EMIT_INSTR_PLUS_ICEBP movhpd, XMM8, FSxBX
1550	EMIT_INSTR_PLUS_ICEBP movhpd, FSxBX, XMM11
1551	EMIT_INSTR_PLUS_ICEBP vmovhpd, XMM10, XMM14, FSxBX
1552	EMIT_INSTR_PLUS_ICEBP vmovhpd, FSxBX, XMM9
1553	%endif
1554
1555	;
1556	; [V]MOVHLPS
1557	;
1558	EMIT_INSTR_PLUS_ICEBP movhlps, XMM1, XMM2
1559	EMIT_INSTR_PLUS_ICEBP vmovhlps, XMM1, XMM2, XMM3
1560	%if TMPL_BITS == 64
1561	EMIT_INSTR_PLUS_ICEBP movhlps, XMM8, XMM12
1562	EMIT_INSTR_PLUS_ICEBP vmovhlps, XMM10, XMM14, XMM12
1563	%endif
1564
1565	;
1566	; [V]MOVSLDUP
1567	;
1568	EMIT_INSTR_PLUS_ICEBP movsldup, XMM1, XMM2
1569	EMIT_INSTR_PLUS_ICEBP movsldup, XMM1, FSxBX
1570	EMIT_INSTR_PLUS_ICEBP vmovsldup, XMM1, XMM2
1571	EMIT_INSTR_PLUS_ICEBP vmovsldup, XMM1, FSxBX
1572	EMIT_INSTR_PLUS_ICEBP vmovsldup, YMM1, YMM2
1573	EMIT_INSTR_PLUS_ICEBP vmovsldup, YMM1, FSxBX
1574	%if TMPL_BITS == 64
1575	EMIT_INSTR_PLUS_ICEBP movsldup, XMM8, XMM12
1576	EMIT_INSTR_PLUS_ICEBP movsldup, XMM10, FSxBX
1577	EMIT_INSTR_PLUS_ICEBP vmovsldup, XMM7, XMM14
1578	EMIT_INSTR_PLUS_ICEBP vmovsldup, XMM11, FSxBX
1579	EMIT_INSTR_PLUS_ICEBP vmovsldup, YMM12, YMM8
1580	EMIT_INSTR_PLUS_ICEBP vmovsldup, YMM12, FSxBX
1581	%endif
1582
1583	;
1584	; [V]MOVSHDUP
1585	;
1586	EMIT_INSTR_PLUS_ICEBP movshdup, XMM1, XMM2
1587	EMIT_INSTR_PLUS_ICEBP movshdup, XMM1, FSxBX
1588	EMIT_INSTR_PLUS_ICEBP vmovshdup, XMM1, XMM2
1589	EMIT_INSTR_PLUS_ICEBP vmovshdup, XMM1, FSxBX
1590	EMIT_INSTR_PLUS_ICEBP vmovshdup, YMM1, YMM2
1591	EMIT_INSTR_PLUS_ICEBP vmovshdup, YMM1, FSxBX
1592	%if TMPL_BITS == 64
1593	EMIT_INSTR_PLUS_ICEBP movshdup, XMM8, XMM12
1594	EMIT_INSTR_PLUS_ICEBP movshdup, XMM10, FSxBX
1595	EMIT_INSTR_PLUS_ICEBP vmovshdup, XMM7, XMM14
1596	EMIT_INSTR_PLUS_ICEBP vmovshdup, XMM11, FSxBX
1597	EMIT_INSTR_PLUS_ICEBP vmovshdup, YMM12, YMM8
1598	EMIT_INSTR_PLUS_ICEBP vmovshdup, YMM12, FSxBX
1599	%endif
1600
1601	;
1602	; [V]MOVDDUP
1603	;
1604	EMIT_INSTR_PLUS_ICEBP movddup, XMM1, XMM2
1605	EMIT_INSTR_PLUS_ICEBP movddup, XMM1, FSxBX
1606	EMIT_INSTR_PLUS_ICEBP vmovddup, XMM1, XMM2
1607	EMIT_INSTR_PLUS_ICEBP vmovddup, XMM1, FSxBX
1608	EMIT_INSTR_PLUS_ICEBP vmovddup, YMM1, YMM2
1609	EMIT_INSTR_PLUS_ICEBP vmovddup, YMM1, FSxBX
1610	%if TMPL_BITS == 64
1611	EMIT_INSTR_PLUS_ICEBP movddup, XMM8, XMM12
1612	EMIT_INSTR_PLUS_ICEBP movddup, XMM10, FSxBX
1613	EMIT_INSTR_PLUS_ICEBP vmovddup, XMM7, XMM14
1614	EMIT_INSTR_PLUS_ICEBP vmovddup, XMM11, FSxBX
1615	EMIT_INSTR_PLUS_ICEBP vmovddup, YMM12, YMM8
1616	EMIT_INSTR_PLUS_ICEBP vmovddup, YMM12, FSxBX
1617	%endif
1618
1619	;
1620	; [V]MOVAPS
1621	;
1622	EMIT_INSTR_PLUS_ICEBP movaps, XMM1, XMM2
1623	EMIT_INSTR_PLUS_ICEBP movaps, XMM1, FSxBX
1624	EMIT_INSTR_PLUS_ICEBP vmovaps, XMM1, XMM2
1625	EMIT_INSTR_PLUS_ICEBP vmovaps, XMM1, FSxBX
1626	EMIT_INSTR_PLUS_ICEBP vmovaps, YMM1, YMM2
1627	EMIT_INSTR_PLUS_ICEBP vmovaps, YMM1, FSxBX
1628	%if TMPL_BITS == 64
1629	EMIT_INSTR_PLUS_ICEBP movaps, XMM8, XMM12
1630	EMIT_INSTR_PLUS_ICEBP movaps, XMM10, FSxBX
1631	EMIT_INSTR_PLUS_ICEBP vmovaps, XMM7, XMM14
1632	EMIT_INSTR_PLUS_ICEBP vmovaps, XMM11, FSxBX
1633	EMIT_INSTR_PLUS_ICEBP vmovaps, YMM12, YMM8
1634	EMIT_INSTR_PLUS_ICEBP vmovaps, YMM12, FSxBX
1635	%endif
1636
1637	EMIT_INSTR_PLUS_ICEBP movapd, XMM1, XMM2
1638	EMIT_INSTR_PLUS_ICEBP movapd, XMM1, FSxBX
1639	EMIT_INSTR_PLUS_ICEBP vmovapd, XMM1, XMM2
1640	EMIT_INSTR_PLUS_ICEBP vmovapd, XMM1, FSxBX
1641	EMIT_INSTR_PLUS_ICEBP vmovapd, YMM1, YMM2
1642	EMIT_INSTR_PLUS_ICEBP vmovapd, YMM1, FSxBX
1643	%if TMPL_BITS == 64
1644	EMIT_INSTR_PLUS_ICEBP movapd, XMM8, XMM12
1645	EMIT_INSTR_PLUS_ICEBP movapd, XMM10, FSxBX
1646	EMIT_INSTR_PLUS_ICEBP vmovapd, XMM7, XMM14
1647	EMIT_INSTR_PLUS_ICEBP vmovapd, XMM11, FSxBX
1648	EMIT_INSTR_PLUS_ICEBP vmovapd, YMM12, YMM8
1649	EMIT_INSTR_PLUS_ICEBP vmovapd, YMM12, FSxBX
1650	%endif
1651
1652	;
1653	; [V]MOVD
1654	;
1655	EMIT_INSTR_PLUS_ICEBP movd, MM1, EDX
1656	EMIT_INSTR_PLUS_ICEBP movd, MM1, FSxBX
1657	EMIT_INSTR_PLUS_ICEBP movd, EAX, MM1
1658	EMIT_INSTR_PLUS_ICEBP movd, FSxBX, MM1
1659	%if TMPL_BITS == 64
1660	EMIT_INSTR_PLUS_ICEBP movd, MM1, R9D
1661	EMIT_INSTR_PLUS_ICEBP movd, R10D, MM0
1662	%endif
1663
1664	EMIT_INSTR_PLUS_ICEBP movd, XMM1, EAX
1665	EMIT_INSTR_PLUS_ICEBP movd, XMM1, FSxBX
1666	EMIT_INSTR_PLUS_ICEBP movd, FSxBX, XMM1
1667	EMIT_INSTR_PLUS_ICEBP movd, EAX, XMM1
1668	%if TMPL_BITS == 64
1669	EMIT_INSTR_PLUS_ICEBP movd, XMM9, R8D
1670	EMIT_INSTR_PLUS_ICEBP movd, R8D, XMM9
1671	EMIT_INSTR_PLUS_ICEBP movd, XMM9, FSxBX
1672	EMIT_INSTR_PLUS_ICEBP movd, FSxBX, XMM9
1673	%endif
1674
1675	EMIT_INSTR_PLUS_ICEBP vmovd, XMM1, EAX
1676	EMIT_INSTR_PLUS_ICEBP vmovd, XMM1, FSxBX
1677	EMIT_INSTR_PLUS_ICEBP vmovd, FSxBX, XMM1
1678	EMIT_INSTR_PLUS_ICEBP vmovd, EDX, XMM1
1679	%if TMPL_BITS == 64
1680	EMIT_INSTR_PLUS_ICEBP vmovd, XMM9, R9D
1681	EMIT_INSTR_PLUS_ICEBP vmovd, R8D, XMM9
1682	EMIT_INSTR_PLUS_ICEBP vmovd, XMM9, FSxBX
1683	EMIT_INSTR_PLUS_ICEBP vmovd, FSxBX, XMM9
1684	%endif
1685
1686	;
1687	; [V]MOVQ - some hand coded stuff here as the assembler prefers the 7f/6f variants.
1688	;
1689	EMIT_INSTR_PLUS_ICEBP movq, MM1, MM2
1690	EMIT_INSTR_PLUS_ICEBP movq, MM1, FSxBX
1691	EMIT_INSTR_PLUS_ICEBP movq, FSxBX, MM1
1692	%if TMPL_BITS == 64
1693	EMIT_INSTR_PLUS_ICEBP movq, R9, MM1
1694	EMIT_INSTR_PLUS_ICEBP movq, MM1, R9
1695	EMIT_INSTR_PLUS_ICEBP_BYTES 06e_movq_MM1_FSxBX, FSxBX_PFX, 48h, 0fh, 06eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1696	EMIT_INSTR_PLUS_ICEBP_BYTES 07e_movq_FSxBX_MM1, FSxBX_PFX, 48h, 0fh, 07eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1697	%endif
1698
1699	EMIT_INSTR_PLUS_ICEBP movq, XMM1, XMM2
1700	EMIT_INSTR_PLUS_ICEBP movq, XMM1, FSxBX
1701	EMIT_INSTR_PLUS_ICEBP movq, FSxBX, XMM1
1702	%if TMPL_BITS == 64
1703	EMIT_INSTR_PLUS_ICEBP movq, XMM9, R8
1704	EMIT_INSTR_PLUS_ICEBP movq, R8, XMM9
1705	EMIT_INSTR_PLUS_ICEBP movq, XMM9, FSxBX
1706	EMIT_INSTR_PLUS_ICEBP movq, FSxBX, XMM9
1707	EMIT_INSTR_PLUS_ICEBP_BYTES 06e_movq_XMM1_FSxBX, FSxBX_PFX, 66h, 48h, 0fh, 06eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1708	EMIT_INSTR_PLUS_ICEBP_BYTES 06e_movq_XMM9_FSxBX, FSxBX_PFX, 66h, 4ch, 0fh, 06eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1709	EMIT_INSTR_PLUS_ICEBP_BYTES 07e_movq_FSxBX_XMM1, FSxBX_PFX, 66h, 48h, 0fh, 07eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1710	EMIT_INSTR_PLUS_ICEBP_BYTES 07e_movq_FSxBX_XMM9, FSxBX_PFX, 66h, 4ch, 0fh, 07eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1711	%endif
1712
1713	EMIT_INSTR_PLUS_ICEBP vmovq, XMM1, XMM2
1714	EMIT_INSTR_PLUS_ICEBP vmovq, XMM1, FSxBX
1715	EMIT_INSTR_PLUS_ICEBP_BYTES 06e_vmovq_XMM1_FSxBX, FSxBX_PFX, 0c4h, 0e1h, 0f9h, 06eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1716	EMIT_INSTR_PLUS_ICEBP vmovq, FSxBX, XMM1
1717	EMIT_INSTR_PLUS_ICEBP_BYTES 07e_vmovq_FSxBX_XMM1, FSxBX_PFX, 0c4h, 0e1h, 0f9h, 07eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1718	%if TMPL_BITS == 64
1719	EMIT_INSTR_PLUS_ICEBP vmovq, XMM9, R8
1720	EMIT_INSTR_PLUS_ICEBP vmovq, R8, XMM9
1721	EMIT_INSTR_PLUS_ICEBP vmovq, XMM9, FSxBX
1722	EMIT_INSTR_PLUS_ICEBP vmovq, FSxBX, XMM9
1723	EMIT_INSTR_PLUS_ICEBP_BYTES 06e_vmovq_XMM9_FSxBX, FSxBX_PFX, 0c4h, 061h, 0f9h, 06eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1724	EMIT_INSTR_PLUS_ICEBP_BYTES 07e_vmovq_FSxBX_XMM9, FSxBX_PFX, 0c4h, 061h, 0f9h, 07eh, FSxBX_MODRM \| (1 << X86_MODRM_REG_SHIFT)
1725	%endif
1726
1727	;
1728	; [V]MOVDQU - not testing the 2nd register variant.
1729	;
1730	EMIT_INSTR_PLUS_ICEBP movdqu, XMM1, XMM2
1731	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_movdqu_XMM1_XMM2, 0f3h, 00fh, 07fh, X86_MODRM_MAKE(3, 2, 1)
1732	EMIT_INSTR_PLUS_ICEBP movdqu, XMM1, FSxBX
1733	EMIT_INSTR_PLUS_ICEBP movdqu, FSxBX, XMM1
1734	EMIT_INSTR_PLUS_ICEBP vmovdqu, XMM1, XMM2 ; C5 FA 6F CA
1735	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqu_XMM1_XMM2, 0c5h, 0fah, 07fh, X86_MODRM_MAKE(3, 2, 1)
1736	EMIT_INSTR_PLUS_ICEBP vmovdqu, XMM1, FSxBX
1737	EMIT_INSTR_PLUS_ICEBP vmovdqu, FSxBX, XMM1
1738	EMIT_INSTR_PLUS_ICEBP vmovdqu, YMM1, YMM2 ; C5 FE 6F CA
1739	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqu_YMM1_YMM2, 0c5h, 0feh, 07fh, X86_MODRM_MAKE(3, 2, 1)
1740	EMIT_INSTR_PLUS_ICEBP vmovdqu, YMM1, FSxBX
1741	EMIT_INSTR_PLUS_ICEBP vmovdqu, FSxBX, YMM1
1742	%if TMPL_BITS == 64
1743	EMIT_INSTR_PLUS_ICEBP movdqu, XMM8, XMM12 ; F3 45 0F 6F C4
1744	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_movdqu_XMM8_XMM12, 0f3h, 045h, 00fh, 07fh, X86_MODRM_MAKE(3, 4, 0)
1745	EMIT_INSTR_PLUS_ICEBP movdqu, XMM10, FSxBX
1746	EMIT_INSTR_PLUS_ICEBP movdqu, FSxBX, XMM10
1747	EMIT_INSTR_PLUS_ICEBP vmovdqu, XMM7, XMM14
1748	EMIT_INSTR_PLUS_ICEBP vmovdqu, XMM11, FSxBX
1749	EMIT_INSTR_PLUS_ICEBP vmovdqu, FSxBX, XMM11
1750	EMIT_INSTR_PLUS_ICEBP vmovdqu, YMM12, YMM8
1751	EMIT_INSTR_PLUS_ICEBP vmovdqu, YMM12, FSxBX
1752	EMIT_INSTR_PLUS_ICEBP vmovdqu, FSxBX, YMM12
1753	%endif
1754
1755	;
1756	; [V]MOVDQA - not testing the 2nd register variant.
1757	;
1758	EMIT_INSTR_PLUS_ICEBP movdqa, XMM1, XMM2
1759	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_movdqa_XMM1_XMM2, 066h, 00fh, 07fh, X86_MODRM_MAKE(3, 2, 1)
1760	EMIT_INSTR_PLUS_ICEBP movdqa, XMM1, FSxBX
1761	EMIT_INSTR_PLUS_ICEBP movdqa, FSxBX, XMM1
1762	EMIT_INSTR_PLUS_ICEBP vmovdqa, XMM1, XMM2
1763	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqa_XMM1_XMM2, 0c5h, 0f9h, 07fh, X86_MODRM_MAKE(3, 2, 1)
1764	EMIT_INSTR_PLUS_ICEBP vmovdqa, XMM1, FSxBX
1765	EMIT_INSTR_PLUS_ICEBP vmovdqa, FSxBX, XMM1
1766	EMIT_INSTR_PLUS_ICEBP vmovdqa, YMM1, YMM2
1767	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqa_YMM1_YMM2, 0c5h, 0fdh, 07fh, X86_MODRM_MAKE(3, 2, 1)
1768	EMIT_INSTR_PLUS_ICEBP vmovdqa, YMM1, FSxBX
1769	EMIT_INSTR_PLUS_ICEBP vmovdqa, FSxBX, YMM1
1770	%if TMPL_BITS == 64
1771	EMIT_INSTR_PLUS_ICEBP movdqa, XMM8, XMM12 ; 66 45 0F 6F C4
1772	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_movdqa_XMM8_XMM12, 066h, 045h, 00fh, 07fh, X86_MODRM_MAKE(3, 4, 0)
1773	EMIT_INSTR_PLUS_ICEBP movdqa, XMM10, FSxBX
1774	EMIT_INSTR_PLUS_ICEBP movdqa, FSxBX, XMM10
1775	EMIT_INSTR_PLUS_ICEBP vmovdqa, XMM8, XMM14 ; C4 C1 79 6F FE
1776	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqa_XMM8_XMM14, 0c4h, 041h, 79h, 07fh, X86_MODRM_MAKE(3, 6, 0)
1777	EMIT_INSTR_PLUS_ICEBP vmovdqa, XMM11, FSxBX
1778	EMIT_INSTR_PLUS_ICEBP vmovdqa, FSxBX, XMM11
1779	EMIT_INSTR_PLUS_ICEBP vmovdqa, YMM12, YMM8
1780	EMIT_INSTR_PLUS_ICEBP_BYTES 07f_vmovdqa_YMM12_YMM8, 0c4h, 041h, 7dh, 07fh, X86_MODRM_MAKE(3, 0, 4)
1781	EMIT_INSTR_PLUS_ICEBP vmovdqa, YMM12, FSxBX
1782	EMIT_INSTR_PLUS_ICEBP vmovdqa, FSxBX, YMM12
1783	%endif
1784
1785	;
1786	; [V]PTEST
1787	;
1788	EMIT_INSTR_PLUS_ICEBP ptest, XMM1, XMM2
1789	EMIT_INSTR_PLUS_ICEBP ptest, XMM1, FSxBX
1790	EMIT_INSTR_PLUS_ICEBP vptest, XMM1, XMM2
1791	EMIT_INSTR_PLUS_ICEBP vptest, XMM1, FSxBX
1792	EMIT_INSTR_PLUS_ICEBP vptest, YMM1, YMM2
1793	EMIT_INSTR_PLUS_ICEBP vptest, YMM1, FSxBX
1794	%if TMPL_BITS == 64
1795	EMIT_INSTR_PLUS_ICEBP ptest, XMM9, XMM8
1796	EMIT_INSTR_PLUS_ICEBP ptest, XMM9, FSxBX
1797	EMIT_INSTR_PLUS_ICEBP vptest, XMM9, XMM8
1798	EMIT_INSTR_PLUS_ICEBP vptest, XMM9, FSxBX
1799	EMIT_INSTR_PLUS_ICEBP vptest, YMM9, YMM8
1800	EMIT_INSTR_PLUS_ICEBP vptest, YMM9, FSxBX
1801	%endif
1802
1803	;
1804	; [V]PAVGB
1805	;
1806	EMIT_INSTR_PLUS_ICEBP pavgb, MM1, MM2
1807	EMIT_INSTR_PLUS_ICEBP pavgb, MM1, FSxBX
1808
1809	EMIT_INSTR_PLUS_ICEBP pavgb, XMM1, XMM2
1810	EMIT_INSTR_PLUS_ICEBP pavgb, XMM1, FSxBX
1811	%if TMPL_BITS == 64
1812	EMIT_INSTR_PLUS_ICEBP pavgb, XMM8, XMM9
1813	EMIT_INSTR_PLUS_ICEBP pavgb, XMM8, FSxBX
1814	%endif
1815
1816	EMIT_INSTR_PLUS_ICEBP vpavgb, XMM1, XMM2, XMM3
1817	EMIT_INSTR_PLUS_ICEBP vpavgb, XMM1, XMM2, FSxBX
1818	%if TMPL_BITS == 64
1819	EMIT_INSTR_PLUS_ICEBP vpavgb, XMM8, XMM9, XMM10
1820	EMIT_INSTR_PLUS_ICEBP vpavgb, XMM8, XMM9, FSxBX
1821	%endif
1822
1823	EMIT_INSTR_PLUS_ICEBP vpavgb, YMM1, YMM2, YMM3
1824	EMIT_INSTR_PLUS_ICEBP vpavgb, YMM1, YMM2, FSxBX
1825	%if TMPL_BITS == 64
1826	EMIT_INSTR_PLUS_ICEBP vpavgb, YMM8, YMM9, YMM10
1827	EMIT_INSTR_PLUS_ICEBP vpavgb, YMM8, YMM9, FSxBX
1828	%endif
1829
1830	;
1831	; [V]PAVGW
1832	;
1833	EMIT_INSTR_PLUS_ICEBP pavgw, MM1, MM2
1834	EMIT_INSTR_PLUS_ICEBP pavgw, MM1, FSxBX
1835
1836	EMIT_INSTR_PLUS_ICEBP pavgw, XMM1, XMM2
1837	EMIT_INSTR_PLUS_ICEBP pavgw, XMM1, FSxBX
1838	%if TMPL_BITS == 64
1839	EMIT_INSTR_PLUS_ICEBP pavgw, XMM8, XMM9
1840	EMIT_INSTR_PLUS_ICEBP pavgw, XMM8, FSxBX
1841	%endif
1842
1843	EMIT_INSTR_PLUS_ICEBP vpavgw, XMM1, XMM2, XMM3
1844	EMIT_INSTR_PLUS_ICEBP vpavgw, XMM1, XMM2, FSxBX
1845	%if TMPL_BITS == 64
1846	EMIT_INSTR_PLUS_ICEBP vpavgw, XMM8, XMM9, XMM10
1847	EMIT_INSTR_PLUS_ICEBP vpavgw, XMM8, XMM9, FSxBX
1848	%endif
1849
1850	EMIT_INSTR_PLUS_ICEBP vpavgw, YMM1, YMM2, YMM3
1851	EMIT_INSTR_PLUS_ICEBP vpavgw, YMM1, YMM2, FSxBX
1852	%if TMPL_BITS == 64
1853	EMIT_INSTR_PLUS_ICEBP vpavgw, YMM8, YMM9, YMM10
1854	EMIT_INSTR_PLUS_ICEBP vpavgw, YMM8, YMM9, FSxBX
1855	%endif
1856
1857	;
1858	; [V]PSIGNB
1859	;
1860	EMIT_INSTR_PLUS_ICEBP psignb, MM1, MM2
1861	EMIT_INSTR_PLUS_ICEBP psignb, MM1, FSxBX
1862
1863	EMIT_INSTR_PLUS_ICEBP psignb, XMM1, XMM2
1864	EMIT_INSTR_PLUS_ICEBP psignb, XMM1, FSxBX
1865	%if TMPL_BITS == 64
1866	EMIT_INSTR_PLUS_ICEBP psignb, XMM8, XMM9
1867	EMIT_INSTR_PLUS_ICEBP psignb, XMM8, FSxBX
1868	%endif
1869
1870	EMIT_INSTR_PLUS_ICEBP vpsignb, XMM1, XMM2, XMM3
1871	EMIT_INSTR_PLUS_ICEBP vpsignb, XMM1, XMM2, FSxBX
1872	%if TMPL_BITS == 64
1873	EMIT_INSTR_PLUS_ICEBP vpsignb, XMM8, XMM9, XMM10
1874	EMIT_INSTR_PLUS_ICEBP vpsignb, XMM8, XMM9, FSxBX
1875	%endif
1876
1877	EMIT_INSTR_PLUS_ICEBP vpsignb, YMM1, YMM2, YMM3
1878	EMIT_INSTR_PLUS_ICEBP vpsignb, YMM1, YMM2, FSxBX
1879	%if TMPL_BITS == 64
1880	EMIT_INSTR_PLUS_ICEBP vpsignb, YMM8, YMM9, YMM10
1881	EMIT_INSTR_PLUS_ICEBP vpsignb, YMM8, YMM9, FSxBX
1882	%endif
1883
1884	;
1885	; [V]PSIGNW
1886	;
1887	EMIT_INSTR_PLUS_ICEBP psignw, MM1, MM2
1888	EMIT_INSTR_PLUS_ICEBP psignw, MM1, FSxBX
1889
1890	EMIT_INSTR_PLUS_ICEBP psignw, XMM1, XMM2
1891	EMIT_INSTR_PLUS_ICEBP psignw, XMM1, FSxBX
1892	%if TMPL_BITS == 64
1893	EMIT_INSTR_PLUS_ICEBP psignw, XMM8, XMM9
1894	EMIT_INSTR_PLUS_ICEBP psignw, XMM8, FSxBX
1895	%endif
1896
1897	EMIT_INSTR_PLUS_ICEBP vpsignw, XMM1, XMM2, XMM3
1898	EMIT_INSTR_PLUS_ICEBP vpsignw, XMM1, XMM2, FSxBX
1899	%if TMPL_BITS == 64
1900	EMIT_INSTR_PLUS_ICEBP vpsignw, XMM8, XMM9, XMM10
1901	EMIT_INSTR_PLUS_ICEBP vpsignw, XMM8, XMM9, FSxBX
1902	%endif
1903
1904	EMIT_INSTR_PLUS_ICEBP vpsignw, YMM1, YMM2, YMM3
1905	EMIT_INSTR_PLUS_ICEBP vpsignw, YMM1, YMM2, FSxBX
1906	%if TMPL_BITS == 64
1907	EMIT_INSTR_PLUS_ICEBP vpsignw, YMM8, YMM9, YMM10
1908	EMIT_INSTR_PLUS_ICEBP vpsignw, YMM8, YMM9, FSxBX
1909	%endif
1910
1911	;
1912	; [V]PSIGND
1913	;
1914	EMIT_INSTR_PLUS_ICEBP psignd, MM1, MM2
1915	EMIT_INSTR_PLUS_ICEBP psignd, MM1, FSxBX
1916
1917	EMIT_INSTR_PLUS_ICEBP psignd, XMM1, XMM2
1918	EMIT_INSTR_PLUS_ICEBP psignd, XMM1, FSxBX
1919	%if TMPL_BITS == 64
1920	EMIT_INSTR_PLUS_ICEBP psignd, XMM8, XMM9
1921	EMIT_INSTR_PLUS_ICEBP psignd, XMM8, FSxBX
1922	%endif
1923
1924	EMIT_INSTR_PLUS_ICEBP vpsignd, XMM1, XMM2, XMM3
1925	EMIT_INSTR_PLUS_ICEBP vpsignd, XMM1, XMM2, FSxBX
1926	%if TMPL_BITS == 64
1927	EMIT_INSTR_PLUS_ICEBP vpsignd, XMM8, XMM9, XMM10
1928	EMIT_INSTR_PLUS_ICEBP vpsignd, XMM8, XMM9, FSxBX
1929	%endif
1930
1931	EMIT_INSTR_PLUS_ICEBP vpsignd, YMM1, YMM2, YMM3
1932	EMIT_INSTR_PLUS_ICEBP vpsignd, YMM1, YMM2, FSxBX
1933	%if TMPL_BITS == 64
1934	EMIT_INSTR_PLUS_ICEBP vpsignd, YMM8, YMM9, YMM10
1935	EMIT_INSTR_PLUS_ICEBP vpsignd, YMM8, YMM9, FSxBX
1936	%endif
1937
1938	;
1939	; [V]ABSB
1940	;
1941	EMIT_INSTR_PLUS_ICEBP pabsb, MM1, MM2
1942	EMIT_INSTR_PLUS_ICEBP pabsb, MM1, FSxBX
1943	EMIT_INSTR_PLUS_ICEBP pabsb, XMM1, XMM2
1944	EMIT_INSTR_PLUS_ICEBP pabsb, XMM1, FSxBX
1945	EMIT_INSTR_PLUS_ICEBP vpabsb, XMM1, XMM2
1946	EMIT_INSTR_PLUS_ICEBP vpabsb, XMM1, FSxBX
1947	EMIT_INSTR_PLUS_ICEBP vpabsb, YMM1, YMM2
1948	EMIT_INSTR_PLUS_ICEBP vpabsb, YMM1, FSxBX
1949	%if TMPL_BITS == 64
1950	EMIT_INSTR_PLUS_ICEBP pabsb, XMM9, XMM8
1951	EMIT_INSTR_PLUS_ICEBP pabsb, XMM9, FSxBX
1952	EMIT_INSTR_PLUS_ICEBP vpabsb, XMM9, XMM8
1953	EMIT_INSTR_PLUS_ICEBP vpabsb, XMM9, FSxBX
1954	EMIT_INSTR_PLUS_ICEBP vpabsb, YMM9, YMM8
1955	EMIT_INSTR_PLUS_ICEBP vpabsb, YMM9, FSxBX
1956	%endif
1957
1958	;
1959	; [V]ABSW
1960	;
1961	EMIT_INSTR_PLUS_ICEBP pabsw, MM1, MM2
1962	EMIT_INSTR_PLUS_ICEBP pabsw, MM1, FSxBX
1963	EMIT_INSTR_PLUS_ICEBP pabsw, XMM1, XMM2
1964	EMIT_INSTR_PLUS_ICEBP pabsw, XMM1, FSxBX
1965	EMIT_INSTR_PLUS_ICEBP vpabsw, XMM1, XMM2
1966	EMIT_INSTR_PLUS_ICEBP vpabsw, XMM1, FSxBX
1967	EMIT_INSTR_PLUS_ICEBP vpabsw, YMM1, YMM2
1968	EMIT_INSTR_PLUS_ICEBP vpabsw, YMM1, FSxBX
1969	%if TMPL_BITS == 64
1970	EMIT_INSTR_PLUS_ICEBP pabsw, XMM9, XMM8
1971	EMIT_INSTR_PLUS_ICEBP pabsw, XMM9, FSxBX
1972	EMIT_INSTR_PLUS_ICEBP vpabsw, XMM9, XMM8
1973	EMIT_INSTR_PLUS_ICEBP vpabsw, XMM9, FSxBX
1974	EMIT_INSTR_PLUS_ICEBP vpabsw, YMM9, YMM8
1975	EMIT_INSTR_PLUS_ICEBP vpabsw, YMM9, FSxBX
1976	%endif
1977
1978	;
1979	; [V]ABSD
1980	;
1981	EMIT_INSTR_PLUS_ICEBP pabsd, MM1, MM2
1982	EMIT_INSTR_PLUS_ICEBP pabsd, MM1, FSxBX
1983	EMIT_INSTR_PLUS_ICEBP pabsd, XMM1, XMM2
1984	EMIT_INSTR_PLUS_ICEBP pabsd, XMM1, FSxBX
1985	EMIT_INSTR_PLUS_ICEBP vpabsd, XMM1, XMM2
1986	EMIT_INSTR_PLUS_ICEBP vpabsd, XMM1, FSxBX
1987	EMIT_INSTR_PLUS_ICEBP vpabsd, YMM1, YMM2
1988	EMIT_INSTR_PLUS_ICEBP vpabsd, YMM1, FSxBX
1989	%if TMPL_BITS == 64
1990	EMIT_INSTR_PLUS_ICEBP pabsd, XMM9, XMM8
1991	EMIT_INSTR_PLUS_ICEBP pabsd, XMM9, FSxBX
1992	EMIT_INSTR_PLUS_ICEBP vpabsd, XMM9, XMM8
1993	EMIT_INSTR_PLUS_ICEBP vpabsd, XMM9, FSxBX
1994	EMIT_INSTR_PLUS_ICEBP vpabsd, YMM9, YMM8
1995	EMIT_INSTR_PLUS_ICEBP vpabsd, YMM9, FSxBX
1996	%endif
1997
1998	;
1999	; [V]PHADDW
2000	;
2001	EMIT_INSTR_PLUS_ICEBP phaddw, MM1, MM2
2002	EMIT_INSTR_PLUS_ICEBP phaddw, MM1, FSxBX
2003	EMIT_INSTR_PLUS_ICEBP phaddw, XMM1, XMM2
2004	EMIT_INSTR_PLUS_ICEBP phaddw, XMM1, FSxBX
2005	EMIT_INSTR_PLUS_ICEBP vphaddw, XMM1, XMM2, XMM3
2006	EMIT_INSTR_PLUS_ICEBP vphaddw, XMM1, XMM2, FSxBX
2007	EMIT_INSTR_PLUS_ICEBP vphaddw, YMM1, YMM2, YMM3
2008	EMIT_INSTR_PLUS_ICEBP vphaddw, YMM1, YMM2, FSxBX
2009	%if TMPL_BITS == 64
2010	EMIT_INSTR_PLUS_ICEBP phaddw, XMM8, XMM9
2011	EMIT_INSTR_PLUS_ICEBP phaddw, XMM8, FSxBX
2012	EMIT_INSTR_PLUS_ICEBP vphaddw, XMM8, XMM9, XMM10
2013	EMIT_INSTR_PLUS_ICEBP vphaddw, XMM8, XMM9, FSxBX
2014	EMIT_INSTR_PLUS_ICEBP vphaddw, YMM8, YMM9, YMM10
2015	EMIT_INSTR_PLUS_ICEBP vphaddw, YMM8, YMM9, FSxBX
2016	%endif
2017
2018	;
2019	; [V]PHADDD
2020	;
2021	EMIT_INSTR_PLUS_ICEBP phaddd, MM1, MM2
2022	EMIT_INSTR_PLUS_ICEBP phaddd, MM1, FSxBX
2023	EMIT_INSTR_PLUS_ICEBP phaddd, XMM1, XMM2
2024	EMIT_INSTR_PLUS_ICEBP phaddd, XMM1, FSxBX
2025	EMIT_INSTR_PLUS_ICEBP vphaddd, XMM1, XMM2, XMM3
2026	EMIT_INSTR_PLUS_ICEBP vphaddd, XMM1, XMM2, FSxBX
2027	EMIT_INSTR_PLUS_ICEBP vphaddd, YMM1, YMM2, YMM3
2028	EMIT_INSTR_PLUS_ICEBP vphaddd, YMM1, YMM2, FSxBX
2029	%if TMPL_BITS == 64
2030	EMIT_INSTR_PLUS_ICEBP phaddd, XMM8, XMM9
2031	EMIT_INSTR_PLUS_ICEBP phaddd, XMM8, FSxBX
2032	EMIT_INSTR_PLUS_ICEBP vphaddd, XMM8, XMM9, XMM10
2033	EMIT_INSTR_PLUS_ICEBP vphaddd, XMM8, XMM9, FSxBX
2034	EMIT_INSTR_PLUS_ICEBP vphaddd, YMM8, YMM9, YMM10
2035	EMIT_INSTR_PLUS_ICEBP vphaddd, YMM8, YMM9, FSxBX
2036	%endif
2037
2038
2039	;
2040	; [V]PHSUBW
2041	;
2042	EMIT_INSTR_PLUS_ICEBP phsubw, MM1, MM2
2043	EMIT_INSTR_PLUS_ICEBP phsubw, MM1, FSxBX
2044	EMIT_INSTR_PLUS_ICEBP phsubw, XMM1, XMM2
2045	EMIT_INSTR_PLUS_ICEBP phsubw, XMM1, FSxBX
2046	EMIT_INSTR_PLUS_ICEBP vphsubw, XMM1, XMM2, XMM3
2047	EMIT_INSTR_PLUS_ICEBP vphsubw, XMM1, XMM2, FSxBX
2048	EMIT_INSTR_PLUS_ICEBP vphsubw, YMM1, YMM2, YMM3
2049	EMIT_INSTR_PLUS_ICEBP vphsubw, YMM1, YMM2, FSxBX
2050	%if TMPL_BITS == 64
2051	EMIT_INSTR_PLUS_ICEBP phsubw, XMM8, XMM9
2052	EMIT_INSTR_PLUS_ICEBP phsubw, XMM8, FSxBX
2053	EMIT_INSTR_PLUS_ICEBP vphsubw, XMM8, XMM9, XMM10
2054	EMIT_INSTR_PLUS_ICEBP vphsubw, XMM8, XMM9, FSxBX
2055	EMIT_INSTR_PLUS_ICEBP vphsubw, YMM8, YMM9, YMM10
2056	EMIT_INSTR_PLUS_ICEBP vphsubw, YMM8, YMM9, FSxBX
2057	%endif
2058
2059	;
2060	; [V]PHSUBD
2061	;
2062	EMIT_INSTR_PLUS_ICEBP phsubd, MM1, MM2
2063	EMIT_INSTR_PLUS_ICEBP phsubd, MM1, FSxBX
2064	EMIT_INSTR_PLUS_ICEBP phsubd, XMM1, XMM2
2065	EMIT_INSTR_PLUS_ICEBP phsubd, XMM1, FSxBX
2066	EMIT_INSTR_PLUS_ICEBP vphsubd, XMM1, XMM2, XMM3
2067	EMIT_INSTR_PLUS_ICEBP vphsubd, XMM1, XMM2, FSxBX
2068	EMIT_INSTR_PLUS_ICEBP vphsubd, YMM1, YMM2, YMM3
2069	EMIT_INSTR_PLUS_ICEBP vphsubd, YMM1, YMM2, FSxBX
2070	%if TMPL_BITS == 64
2071	EMIT_INSTR_PLUS_ICEBP phsubd, XMM8, XMM9
2072	EMIT_INSTR_PLUS_ICEBP phsubd, XMM8, FSxBX
2073	EMIT_INSTR_PLUS_ICEBP vphsubd, XMM8, XMM9, XMM10
2074	EMIT_INSTR_PLUS_ICEBP vphsubd, XMM8, XMM9, FSxBX
2075	EMIT_INSTR_PLUS_ICEBP vphsubd, YMM8, YMM9, YMM10
2076	EMIT_INSTR_PLUS_ICEBP vphsubd, YMM8, YMM9, FSxBX
2077	%endif
2078
2079	;
2080	; [V]PHADDSW
2081	;
2082	EMIT_INSTR_PLUS_ICEBP phaddsw, MM1, MM2
2083	EMIT_INSTR_PLUS_ICEBP phaddsw, MM1, FSxBX
2084	EMIT_INSTR_PLUS_ICEBP phaddsw, XMM1, XMM2
2085	EMIT_INSTR_PLUS_ICEBP phaddsw, XMM1, FSxBX
2086	EMIT_INSTR_PLUS_ICEBP vphaddsw, XMM1, XMM2, XMM3
2087	EMIT_INSTR_PLUS_ICEBP vphaddsw, XMM1, XMM2, FSxBX
2088	EMIT_INSTR_PLUS_ICEBP vphaddsw, YMM1, YMM2, YMM3
2089	EMIT_INSTR_PLUS_ICEBP vphaddsw, YMM1, YMM2, FSxBX
2090	%if TMPL_BITS == 64
2091	EMIT_INSTR_PLUS_ICEBP phaddsw, XMM8, XMM9
2092	EMIT_INSTR_PLUS_ICEBP phaddsw, XMM8, FSxBX
2093	EMIT_INSTR_PLUS_ICEBP vphaddsw, XMM8, XMM9, XMM10
2094	EMIT_INSTR_PLUS_ICEBP vphaddsw, XMM8, XMM9, FSxBX
2095	EMIT_INSTR_PLUS_ICEBP vphaddsw, YMM8, YMM9, YMM10
2096	EMIT_INSTR_PLUS_ICEBP vphaddsw, YMM8, YMM9, FSxBX
2097	%endif
2098
2099	;
2100	; [V]PHSUBSW
2101	;
2102	EMIT_INSTR_PLUS_ICEBP phsubsw, MM1, MM2
2103	EMIT_INSTR_PLUS_ICEBP phsubsw, MM1, FSxBX
2104	EMIT_INSTR_PLUS_ICEBP phsubsw, XMM1, XMM2
2105	EMIT_INSTR_PLUS_ICEBP phsubsw, XMM1, FSxBX
2106	EMIT_INSTR_PLUS_ICEBP vphsubsw, XMM1, XMM2, XMM3
2107	EMIT_INSTR_PLUS_ICEBP vphsubsw, XMM1, XMM2, FSxBX
2108	EMIT_INSTR_PLUS_ICEBP vphsubsw, YMM1, YMM2, YMM3
2109	EMIT_INSTR_PLUS_ICEBP vphsubsw, YMM1, YMM2, FSxBX
2110	%if TMPL_BITS == 64
2111	EMIT_INSTR_PLUS_ICEBP phsubsw, XMM8, XMM9
2112	EMIT_INSTR_PLUS_ICEBP phsubsw, XMM8, FSxBX
2113	EMIT_INSTR_PLUS_ICEBP vphsubsw, XMM8, XMM9, XMM10
2114	EMIT_INSTR_PLUS_ICEBP vphsubsw, XMM8, XMM9, FSxBX
2115	EMIT_INSTR_PLUS_ICEBP vphsubsw, YMM8, YMM9, YMM10
2116	EMIT_INSTR_PLUS_ICEBP vphsubsw, YMM8, YMM9, FSxBX
2117	%endif
2118
2119	;
2120	; [V]PMADDUBSW
2121	;
2122	EMIT_INSTR_PLUS_ICEBP pmaddubsw, MM1, MM2
2123	EMIT_INSTR_PLUS_ICEBP pmaddubsw, MM1, FSxBX
2124	EMIT_INSTR_PLUS_ICEBP pmaddubsw, XMM1, XMM2
2125	EMIT_INSTR_PLUS_ICEBP pmaddubsw, XMM1, FSxBX
2126	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, XMM1, XMM2, XMM3
2127	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, XMM1, XMM2, FSxBX
2128	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, YMM1, YMM2, YMM3
2129	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, YMM1, YMM2, FSxBX
2130	%if TMPL_BITS == 64
2131	EMIT_INSTR_PLUS_ICEBP pmaddubsw, XMM8, XMM9
2132	EMIT_INSTR_PLUS_ICEBP pmaddubsw, XMM8, FSxBX
2133	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, XMM8, XMM9, XMM10
2134	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, XMM8, XMM9, FSxBX
2135	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, YMM8, YMM9, YMM10
2136	EMIT_INSTR_PLUS_ICEBP vpmaddubsw, YMM8, YMM9, FSxBX
2137	%endif
2138
2139	;
2140	; [V]PMULHRSW
2141	;
2142	EMIT_INSTR_PLUS_ICEBP pmulhrsw, MM1, MM2
2143	EMIT_INSTR_PLUS_ICEBP pmulhrsw, MM1, FSxBX
2144	EMIT_INSTR_PLUS_ICEBP pmulhrsw, XMM1, XMM2
2145	EMIT_INSTR_PLUS_ICEBP pmulhrsw, XMM1, FSxBX
2146	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, XMM1, XMM2, XMM3
2147	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, XMM1, XMM2, FSxBX
2148	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, YMM1, YMM2, YMM3
2149	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, YMM1, YMM2, FSxBX
2150	%if TMPL_BITS == 64
2151	EMIT_INSTR_PLUS_ICEBP pmulhrsw, XMM8, XMM9
2152	EMIT_INSTR_PLUS_ICEBP pmulhrsw, XMM8, FSxBX
2153	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, XMM8, XMM9, XMM10
2154	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, XMM8, XMM9, FSxBX
2155	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, YMM8, YMM9, YMM10
2156	EMIT_INSTR_PLUS_ICEBP vpmulhrsw, YMM8, YMM9, FSxBX
2157	%endif
2158
2159	;
2160	; [V]PSADBW
2161	;
2162	EMIT_INSTR_PLUS_ICEBP psadbw, MM1, MM2
2163	EMIT_INSTR_PLUS_ICEBP psadbw, MM1, FSxBX
2164	EMIT_INSTR_PLUS_ICEBP psadbw, XMM1, XMM2
2165	EMIT_INSTR_PLUS_ICEBP psadbw, XMM1, FSxBX
2166	EMIT_INSTR_PLUS_ICEBP vpsadbw, XMM1, XMM2, XMM3
2167	EMIT_INSTR_PLUS_ICEBP vpsadbw, XMM1, XMM2, FSxBX
2168	EMIT_INSTR_PLUS_ICEBP vpsadbw, YMM1, YMM2, YMM3
2169	EMIT_INSTR_PLUS_ICEBP vpsadbw, YMM1, YMM2, FSxBX
2170	%if TMPL_BITS == 64
2171	EMIT_INSTR_PLUS_ICEBP psadbw, XMM8, XMM9
2172	EMIT_INSTR_PLUS_ICEBP psadbw, XMM8, FSxBX
2173	EMIT_INSTR_PLUS_ICEBP vpsadbw, XMM8, XMM9, XMM10
2174	EMIT_INSTR_PLUS_ICEBP vpsadbw, XMM8, XMM9, FSxBX
2175	EMIT_INSTR_PLUS_ICEBP vpsadbw, YMM8, YMM9, YMM10
2176	EMIT_INSTR_PLUS_ICEBP vpsadbw, YMM8, YMM9, FSxBX
2177	%endif
2178
2179	;
2180	; [V]PMULDQ
2181	;
2182	EMIT_INSTR_PLUS_ICEBP pmuldq, XMM1, XMM2
2183	EMIT_INSTR_PLUS_ICEBP pmuldq, XMM1, FSxBX
2184	EMIT_INSTR_PLUS_ICEBP vpmuldq, XMM1, XMM2, XMM3
2185	EMIT_INSTR_PLUS_ICEBP vpmuldq, XMM1, XMM2, FSxBX
2186	EMIT_INSTR_PLUS_ICEBP vpmuldq, YMM1, YMM2, YMM3
2187	EMIT_INSTR_PLUS_ICEBP vpmuldq, YMM1, YMM2, FSxBX
2188	%if TMPL_BITS == 64
2189	EMIT_INSTR_PLUS_ICEBP pmuldq, XMM8, XMM9
2190	EMIT_INSTR_PLUS_ICEBP pmuldq, XMM8, FSxBX
2191	EMIT_INSTR_PLUS_ICEBP vpmuldq, XMM8, XMM9, XMM10
2192	EMIT_INSTR_PLUS_ICEBP vpmuldq, XMM8, XMM9, FSxBX
2193	EMIT_INSTR_PLUS_ICEBP vpmuldq, YMM8, YMM9, YMM10
2194	EMIT_INSTR_PLUS_ICEBP vpmuldq, YMM8, YMM9, FSxBX
2195	%endif
2196
2197	;
2198	; [V]PMULUDQ
2199	;
2200	EMIT_INSTR_PLUS_ICEBP pmuludq, MM1, MM2
2201	EMIT_INSTR_PLUS_ICEBP pmuludq, MM1, FSxBX
2202	EMIT_INSTR_PLUS_ICEBP pmuludq, XMM1, XMM2
2203	EMIT_INSTR_PLUS_ICEBP pmuludq, XMM1, FSxBX
2204	EMIT_INSTR_PLUS_ICEBP vpmuludq, XMM1, XMM2, XMM3
2205	EMIT_INSTR_PLUS_ICEBP vpmuludq, XMM1, XMM2, FSxBX
2206	EMIT_INSTR_PLUS_ICEBP vpmuludq, YMM1, YMM2, YMM3
2207	EMIT_INSTR_PLUS_ICEBP vpmuludq, YMM1, YMM2, FSxBX
2208	%if TMPL_BITS == 64
2209	EMIT_INSTR_PLUS_ICEBP pmuludq, XMM8, XMM9
2210	EMIT_INSTR_PLUS_ICEBP pmuludq, XMM8, FSxBX
2211	EMIT_INSTR_PLUS_ICEBP vpmuludq, XMM8, XMM9, XMM10
2212	EMIT_INSTR_PLUS_ICEBP vpmuludq, XMM8, XMM9, FSxBX
2213	EMIT_INSTR_PLUS_ICEBP vpmuludq, YMM8, YMM9, YMM10
2214	EMIT_INSTR_PLUS_ICEBP vpmuludq, YMM8, YMM9, FSxBX
2215	%endif
2216
2217	;
2218	; [V]PUNPCKLPS
2219	;
2220	EMIT_INSTR_PLUS_ICEBP unpcklps, XMM1, XMM2
2221	EMIT_INSTR_PLUS_ICEBP unpcklps, XMM1, FSxBX
2222	EMIT_INSTR_PLUS_ICEBP vunpcklps, XMM1, XMM2, XMM3
2223	EMIT_INSTR_PLUS_ICEBP vunpcklps, XMM1, XMM2, FSxBX
2224	EMIT_INSTR_PLUS_ICEBP vunpcklps, YMM1, YMM2, YMM3
2225	EMIT_INSTR_PLUS_ICEBP vunpcklps, YMM1, YMM2, FSxBX
2226	%if TMPL_BITS == 64
2227	EMIT_INSTR_PLUS_ICEBP unpcklps, XMM8, XMM9
2228	EMIT_INSTR_PLUS_ICEBP unpcklps, XMM8, FSxBX
2229	EMIT_INSTR_PLUS_ICEBP vunpcklps, XMM8, XMM9, XMM10
2230	EMIT_INSTR_PLUS_ICEBP vunpcklps, XMM8, XMM9, FSxBX
2231	EMIT_INSTR_PLUS_ICEBP vunpcklps, YMM8, YMM9, YMM10
2232	EMIT_INSTR_PLUS_ICEBP vunpcklps, YMM8, YMM9, FSxBX
2233	%endif
2234
2235	;
2236	; [V]PUNPCKLPD
2237	;
2238	EMIT_INSTR_PLUS_ICEBP unpcklpd, XMM1, XMM2
2239	EMIT_INSTR_PLUS_ICEBP unpcklpd, XMM1, FSxBX
2240	EMIT_INSTR_PLUS_ICEBP vunpcklpd, XMM1, XMM2, XMM3
2241	EMIT_INSTR_PLUS_ICEBP vunpcklpd, XMM1, XMM2, FSxBX
2242	EMIT_INSTR_PLUS_ICEBP vunpcklpd, YMM1, YMM2, YMM3
2243	EMIT_INSTR_PLUS_ICEBP vunpcklpd, YMM1, YMM2, FSxBX
2244	%if TMPL_BITS == 64
2245	EMIT_INSTR_PLUS_ICEBP unpcklpd, XMM8, XMM9
2246	EMIT_INSTR_PLUS_ICEBP unpcklpd, XMM8, FSxBX
2247	EMIT_INSTR_PLUS_ICEBP vunpcklpd, XMM8, XMM9, XMM10
2248	EMIT_INSTR_PLUS_ICEBP vunpcklpd, XMM8, XMM9, FSxBX
2249	EMIT_INSTR_PLUS_ICEBP vunpcklpd, YMM8, YMM9, YMM10
2250	EMIT_INSTR_PLUS_ICEBP vunpcklpd, YMM8, YMM9, FSxBX
2251	%endif
2252
2253	;
2254	; [V]PUNPCKHPS
2255	;
2256	EMIT_INSTR_PLUS_ICEBP unpckhps, XMM1, XMM2
2257	EMIT_INSTR_PLUS_ICEBP unpckhps, XMM1, FSxBX
2258	EMIT_INSTR_PLUS_ICEBP vunpckhps, XMM1, XMM2, XMM3
2259	EMIT_INSTR_PLUS_ICEBP vunpckhps, XMM1, XMM2, FSxBX
2260	EMIT_INSTR_PLUS_ICEBP vunpckhps, YMM1, YMM2, YMM3
2261	EMIT_INSTR_PLUS_ICEBP vunpckhps, YMM1, YMM2, FSxBX
2262	%if TMPL_BITS == 64
2263	EMIT_INSTR_PLUS_ICEBP unpckhps, XMM8, XMM9
2264	EMIT_INSTR_PLUS_ICEBP unpckhps, XMM8, FSxBX
2265	EMIT_INSTR_PLUS_ICEBP vunpckhps, XMM8, XMM9, XMM10
2266	EMIT_INSTR_PLUS_ICEBP vunpckhps, XMM8, XMM9, FSxBX
2267	EMIT_INSTR_PLUS_ICEBP vunpckhps, YMM8, YMM9, YMM10
2268	EMIT_INSTR_PLUS_ICEBP vunpckhps, YMM8, YMM9, FSxBX
2269	%endif
2270
2271	;
2272	; [V]PUNPCKHPD
2273	;
2274	EMIT_INSTR_PLUS_ICEBP unpckhpd, XMM1, XMM2
2275	EMIT_INSTR_PLUS_ICEBP unpckhpd, XMM1, FSxBX
2276	EMIT_INSTR_PLUS_ICEBP vunpckhpd, XMM1, XMM2, XMM3
2277	EMIT_INSTR_PLUS_ICEBP vunpckhpd, XMM1, XMM2, FSxBX
2278	EMIT_INSTR_PLUS_ICEBP vunpckhpd, YMM1, YMM2, YMM3
2279	EMIT_INSTR_PLUS_ICEBP vunpckhpd, YMM1, YMM2, FSxBX
2280	%if TMPL_BITS == 64
2281	EMIT_INSTR_PLUS_ICEBP unpckhpd, XMM8, XMM9
2282	EMIT_INSTR_PLUS_ICEBP unpckhpd, XMM8, FSxBX
2283	EMIT_INSTR_PLUS_ICEBP vunpckhpd, XMM8, XMM9, XMM10
2284	EMIT_INSTR_PLUS_ICEBP vunpckhpd, XMM8, XMM9, FSxBX
2285	EMIT_INSTR_PLUS_ICEBP vunpckhpd, YMM8, YMM9, YMM10
2286	EMIT_INSTR_PLUS_ICEBP vunpckhpd, YMM8, YMM9, FSxBX
2287	%endif
2288
2289	;
2290	; [V]PMOVSXBW
2291	;
2292	EMIT_INSTR_PLUS_ICEBP pmovsxbw, XMM1, XMM2
2293	EMIT_INSTR_PLUS_ICEBP pmovsxbw, XMM1, FSxBX
2294	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, XMM1, XMM2
2295	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, XMM1, FSxBX
2296	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, YMM1, XMM2
2297	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, YMM1, FSxBX
2298	%if TMPL_BITS == 64
2299	EMIT_INSTR_PLUS_ICEBP pmovsxbw, XMM9, XMM8
2300	EMIT_INSTR_PLUS_ICEBP pmovsxbw, XMM9, FSxBX
2301	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, XMM9, XMM8
2302	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, XMM9, FSxBX
2303	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, YMM9, XMM8
2304	EMIT_INSTR_PLUS_ICEBP vpmovsxbw, YMM9, FSxBX
2305	%endif
2306
2307	;
2308	; [V]PMOVSXBD
2309	;
2310	EMIT_INSTR_PLUS_ICEBP pmovsxbd, XMM1, XMM2
2311	EMIT_INSTR_PLUS_ICEBP pmovsxbd, XMM1, FSxBX
2312	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, XMM1, XMM2
2313	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, XMM1, FSxBX
2314	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, YMM1, XMM2
2315	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, YMM1, FSxBX
2316	%if TMPL_BITS == 64
2317	EMIT_INSTR_PLUS_ICEBP pmovsxbd, XMM9, XMM8
2318	EMIT_INSTR_PLUS_ICEBP pmovsxbd, XMM9, FSxBX
2319	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, XMM9, XMM8
2320	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, XMM9, FSxBX
2321	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, YMM9, XMM8
2322	EMIT_INSTR_PLUS_ICEBP vpmovsxbd, YMM9, FSxBX
2323	%endif
2324
2325	;
2326	; [V]PMOVSXBQ
2327	;
2328	EMIT_INSTR_PLUS_ICEBP pmovsxbq, XMM1, XMM2
2329	EMIT_INSTR_PLUS_ICEBP pmovsxbq, XMM1, FSxBX
2330	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, XMM1, XMM2
2331	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, XMM1, FSxBX
2332	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, YMM1, XMM2
2333	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, YMM1, FSxBX
2334	%if TMPL_BITS == 64
2335	EMIT_INSTR_PLUS_ICEBP pmovsxbq, XMM9, XMM8
2336	EMIT_INSTR_PLUS_ICEBP pmovsxbq, XMM9, FSxBX
2337	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, XMM9, XMM8
2338	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, XMM9, FSxBX
2339	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, YMM9, XMM8
2340	EMIT_INSTR_PLUS_ICEBP vpmovsxbq, YMM9, FSxBX
2341	%endif
2342
2343	;
2344	; [V]PMOVSXWD
2345	;
2346	EMIT_INSTR_PLUS_ICEBP pmovsxwd, XMM1, XMM2
2347	EMIT_INSTR_PLUS_ICEBP pmovsxwd, XMM1, FSxBX
2348	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, XMM1, XMM2
2349	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, XMM1, FSxBX
2350	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, YMM1, XMM2
2351	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, YMM1, FSxBX
2352	%if TMPL_BITS == 64
2353	EMIT_INSTR_PLUS_ICEBP pmovsxwd, XMM9, XMM8
2354	EMIT_INSTR_PLUS_ICEBP pmovsxwd, XMM9, FSxBX
2355	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, XMM9, XMM8
2356	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, XMM9, FSxBX
2357	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, YMM9, XMM8
2358	EMIT_INSTR_PLUS_ICEBP vpmovsxwd, YMM9, FSxBX
2359	%endif
2360
2361	;
2362	; [V]PMOVSXWQ
2363	;
2364	EMIT_INSTR_PLUS_ICEBP pmovsxwq, XMM1, XMM2
2365	EMIT_INSTR_PLUS_ICEBP pmovsxwq, XMM1, FSxBX
2366	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, XMM1, XMM2
2367	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, XMM1, FSxBX
2368	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, YMM1, XMM2
2369	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, YMM1, FSxBX
2370	%if TMPL_BITS == 64
2371	EMIT_INSTR_PLUS_ICEBP pmovsxwq, XMM9, XMM8
2372	EMIT_INSTR_PLUS_ICEBP pmovsxwq, XMM9, FSxBX
2373	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, XMM9, XMM8
2374	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, XMM9, FSxBX
2375	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, YMM9, XMM8
2376	EMIT_INSTR_PLUS_ICEBP vpmovsxwq, YMM9, FSxBX
2377	%endif
2378
2379	;
2380	; [V]PMOVSXDQ
2381	;
2382	EMIT_INSTR_PLUS_ICEBP pmovsxdq, XMM1, XMM2
2383	EMIT_INSTR_PLUS_ICEBP pmovsxdq, XMM1, FSxBX
2384	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, XMM1, XMM2
2385	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, XMM1, FSxBX
2386	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, YMM1, XMM2
2387	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, YMM1, FSxBX
2388	%if TMPL_BITS == 64
2389	EMIT_INSTR_PLUS_ICEBP pmovsxdq, XMM9, XMM8
2390	EMIT_INSTR_PLUS_ICEBP pmovsxdq, XMM9, FSxBX
2391	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, XMM9, XMM8
2392	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, XMM9, FSxBX
2393	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, YMM9, XMM8
2394	EMIT_INSTR_PLUS_ICEBP vpmovsxdq, YMM9, FSxBX
2395	%endif
2396
2397	;
2398	; [V]PMOVZXBW
2399	;
2400	EMIT_INSTR_PLUS_ICEBP pmovzxbw, XMM1, XMM2
2401	EMIT_INSTR_PLUS_ICEBP pmovzxbw, XMM1, FSxBX
2402	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, XMM1, XMM2
2403	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, XMM1, FSxBX
2404	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, YMM1, XMM2
2405	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, YMM1, FSxBX
2406	%if TMPL_BITS == 64
2407	EMIT_INSTR_PLUS_ICEBP pmovzxbw, XMM9, XMM8
2408	EMIT_INSTR_PLUS_ICEBP pmovzxbw, XMM9, FSxBX
2409	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, XMM9, XMM8
2410	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, XMM9, FSxBX
2411	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, YMM9, XMM8
2412	EMIT_INSTR_PLUS_ICEBP vpmovzxbw, YMM9, FSxBX
2413	%endif
2414
2415	;
2416	; [V]PMOVZXBD
2417	;
2418	EMIT_INSTR_PLUS_ICEBP pmovzxbd, XMM1, XMM2
2419	EMIT_INSTR_PLUS_ICEBP pmovzxbd, XMM1, FSxBX
2420	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, XMM1, XMM2
2421	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, XMM1, FSxBX
2422	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, YMM1, XMM2
2423	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, YMM1, FSxBX
2424	%if TMPL_BITS == 64
2425	EMIT_INSTR_PLUS_ICEBP pmovzxbd, XMM9, XMM8
2426	EMIT_INSTR_PLUS_ICEBP pmovzxbd, XMM9, FSxBX
2427	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, XMM9, XMM8
2428	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, XMM9, FSxBX
2429	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, YMM9, XMM8
2430	EMIT_INSTR_PLUS_ICEBP vpmovzxbd, YMM9, FSxBX
2431	%endif
2432
2433	;
2434	; [V]PMOVZXBQ
2435	;
2436	EMIT_INSTR_PLUS_ICEBP pmovzxbq, XMM1, XMM2
2437	EMIT_INSTR_PLUS_ICEBP pmovzxbq, XMM1, FSxBX
2438	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, XMM1, XMM2
2439	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, XMM1, FSxBX
2440	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, YMM1, XMM2
2441	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, YMM1, FSxBX
2442	%if TMPL_BITS == 64
2443	EMIT_INSTR_PLUS_ICEBP pmovzxbq, XMM9, XMM8
2444	EMIT_INSTR_PLUS_ICEBP pmovzxbq, XMM9, FSxBX
2445	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, XMM9, XMM8
2446	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, XMM9, FSxBX
2447	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, YMM9, XMM8
2448	EMIT_INSTR_PLUS_ICEBP vpmovzxbq, YMM9, FSxBX
2449	%endif
2450
2451	;
2452	; [V]PMOVZXWD
2453	;
2454	EMIT_INSTR_PLUS_ICEBP pmovzxwd, XMM1, XMM2
2455	EMIT_INSTR_PLUS_ICEBP pmovzxwd, XMM1, FSxBX
2456	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, XMM1, XMM2
2457	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, XMM1, FSxBX
2458	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, YMM1, XMM2
2459	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, YMM1, FSxBX
2460	%if TMPL_BITS == 64
2461	EMIT_INSTR_PLUS_ICEBP pmovzxwd, XMM9, XMM8
2462	EMIT_INSTR_PLUS_ICEBP pmovzxwd, XMM9, FSxBX
2463	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, XMM9, XMM8
2464	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, XMM9, FSxBX
2465	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, YMM9, XMM8
2466	EMIT_INSTR_PLUS_ICEBP vpmovzxwd, YMM9, FSxBX
2467	%endif
2468
2469	;
2470	; [V]PMOVZXWQ
2471	;
2472	EMIT_INSTR_PLUS_ICEBP pmovzxwq, XMM1, XMM2
2473	EMIT_INSTR_PLUS_ICEBP pmovzxwq, XMM1, FSxBX
2474	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, XMM1, XMM2
2475	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, XMM1, FSxBX
2476	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, YMM1, XMM2
2477	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, YMM1, FSxBX
2478	%if TMPL_BITS == 64
2479	EMIT_INSTR_PLUS_ICEBP pmovzxwq, XMM9, XMM8
2480	EMIT_INSTR_PLUS_ICEBP pmovzxwq, XMM9, FSxBX
2481	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, XMM9, XMM8
2482	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, XMM9, FSxBX
2483	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, YMM9, XMM8
2484	EMIT_INSTR_PLUS_ICEBP vpmovzxwq, YMM9, FSxBX
2485	%endif
2486
2487	;
2488	; [V]PMOVZXDQ
2489	;
2490	EMIT_INSTR_PLUS_ICEBP pmovzxdq, XMM1, XMM2
2491	EMIT_INSTR_PLUS_ICEBP pmovzxdq, XMM1, FSxBX
2492	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, XMM1, XMM2
2493	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, XMM1, FSxBX
2494	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, YMM1, XMM2
2495	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, YMM1, FSxBX
2496	%if TMPL_BITS == 64
2497	EMIT_INSTR_PLUS_ICEBP pmovzxdq, XMM9, XMM8
2498	EMIT_INSTR_PLUS_ICEBP pmovzxdq, XMM9, FSxBX
2499	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, XMM9, XMM8
2500	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, XMM9, FSxBX
2501	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, YMM9, XMM8
2502	EMIT_INSTR_PLUS_ICEBP vpmovzxdq, YMM9, FSxBX
2503	%endif
2504
2505	;
2506	; [V]SHUFPS
2507	;
2508	EMIT_INSTR_PLUS_ICEBP shufps, XMM1, XMM2, 0FFh
2509	EMIT_INSTR_PLUS_ICEBP shufps, XMM1, FSxBX, 0FFh
2510	EMIT_INSTR_PLUS_ICEBP shufps, XMM1, XMM2, 000h
2511	EMIT_INSTR_PLUS_ICEBP shufps, XMM1, FSxBX, 000h
2512
2513	EMIT_INSTR_PLUS_ICEBP vshufps, XMM1, XMM2, XMM3, 0FFh
2514	EMIT_INSTR_PLUS_ICEBP vshufps, XMM1, XMM2, FSxBX, 0FFh
2515	EMIT_INSTR_PLUS_ICEBP vshufps, XMM1, XMM2, XMM3, 000h
2516	EMIT_INSTR_PLUS_ICEBP vshufps, XMM1, XMM2, FSxBX, 000h
2517
2518	EMIT_INSTR_PLUS_ICEBP vshufps, YMM1, YMM2, YMM3, 0FFh
2519	EMIT_INSTR_PLUS_ICEBP vshufps, YMM1, YMM2, FSxBX, 0FFh
2520	EMIT_INSTR_PLUS_ICEBP vshufps, YMM1, YMM2, YMM3, 000h
2521	EMIT_INSTR_PLUS_ICEBP vshufps, YMM1, YMM2, FSxBX, 000h
2522
2523	%if TMPL_BITS == 64
2524	EMIT_INSTR_PLUS_ICEBP shufps, XMM8, XMM9, 0FFh
2525	EMIT_INSTR_PLUS_ICEBP shufps, XMM8, FSxBX, 0FFh
2526	EMIT_INSTR_PLUS_ICEBP shufps, XMM8, XMM9, 000h
2527	EMIT_INSTR_PLUS_ICEBP shufps, XMM8, FSxBX, 000h
2528
2529	EMIT_INSTR_PLUS_ICEBP vshufps, XMM8, XMM9, XMM10, 0FFh
2530	EMIT_INSTR_PLUS_ICEBP vshufps, XMM8, XMM9, FSxBX, 0FFh
2531	EMIT_INSTR_PLUS_ICEBP vshufps, XMM8, XMM9, XMM10, 000h
2532	EMIT_INSTR_PLUS_ICEBP vshufps, XMM8, XMM9, FSxBX, 000h
2533
2534	EMIT_INSTR_PLUS_ICEBP vshufps, YMM8, YMM9, YMM10, 0FFh
2535	EMIT_INSTR_PLUS_ICEBP vshufps, YMM8, YMM9, FSxBX, 0FFh
2536	EMIT_INSTR_PLUS_ICEBP vshufps, YMM8, YMM9, YMM10, 000h
2537	EMIT_INSTR_PLUS_ICEBP vshufps, YMM8, YMM9, FSxBX, 000h
2538	%endif
2539
2540	;
2541	; [V]SHUFPD
2542	;
2543	EMIT_INSTR_PLUS_ICEBP shufpd, XMM1, XMM2, 0FFh
2544	EMIT_INSTR_PLUS_ICEBP shufpd, XMM1, FSxBX, 0FFh
2545	EMIT_INSTR_PLUS_ICEBP shufpd, XMM1, XMM2, 000h
2546	EMIT_INSTR_PLUS_ICEBP shufpd, XMM1, FSxBX, 000h
2547
2548	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM1, XMM2, XMM3, 0FFh
2549	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM1, XMM2, FSxBX, 0FFh
2550	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM1, XMM2, XMM3, 000h
2551	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM1, XMM2, FSxBX, 000h
2552
2553	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM1, YMM2, YMM3, 0FFh
2554	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM1, YMM2, FSxBX, 0FFh
2555	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM1, YMM2, YMM3, 000h
2556	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM1, YMM2, FSxBX, 000h
2557
2558	%if TMPL_BITS == 64
2559	EMIT_INSTR_PLUS_ICEBP shufpd, XMM8, XMM9, 0FFh
2560	EMIT_INSTR_PLUS_ICEBP shufpd, XMM8, FSxBX, 0FFh
2561	EMIT_INSTR_PLUS_ICEBP shufpd, XMM8, XMM9, 000h
2562	EMIT_INSTR_PLUS_ICEBP shufpd, XMM8, FSxBX, 000h
2563
2564	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM8, XMM9, XMM10, 0FFh
2565	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM8, XMM9, FSxBX, 0FFh
2566	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM8, XMM9, XMM10, 000h
2567	EMIT_INSTR_PLUS_ICEBP vshufpd, XMM8, XMM9, FSxBX, 000h
2568
2569	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM8, YMM9, YMM10, 0FFh
2570	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM8, YMM9, FSxBX, 0FFh
2571	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM8, YMM9, YMM10, 000h
2572	EMIT_INSTR_PLUS_ICEBP vshufpd, YMM8, YMM9, FSxBX, 000h
2573	%endif
2574
2575	;
2576	; [V]LDDQU
2577	;
2578	EMIT_INSTR_PLUS_ICEBP lddqu, XMM1, FSxBX
2579	EMIT_INSTR_PLUS_ICEBP vlddqu, XMM1, FSxBX
2580	EMIT_INSTR_PLUS_ICEBP vlddqu, YMM1, FSxBX
2581	%if TMPL_BITS == 64
2582	EMIT_INSTR_PLUS_ICEBP lddqu, XMM10, FSxBX
2583	EMIT_INSTR_PLUS_ICEBP vlddqu, XMM11, FSxBX
2584	EMIT_INSTR_PLUS_ICEBP vlddqu, YMM12, FSxBX
2585	%endif
2586
2587	;
2588	; [V]PHMINPOSUW
2589	;
2590	EMIT_INSTR_PLUS_ICEBP phminposuw, XMM1, XMM2
2591	EMIT_INSTR_PLUS_ICEBP phminposuw, XMM1, FSxBX
2592	EMIT_INSTR_PLUS_ICEBP vphminposuw, XMM1, XMM2
2593	EMIT_INSTR_PLUS_ICEBP vphminposuw, XMM1, FSxBX
2594	%if TMPL_BITS == 64
2595	EMIT_INSTR_PLUS_ICEBP phminposuw, XMM9, XMM8
2596	EMIT_INSTR_PLUS_ICEBP phminposuw, XMM9, FSxBX
2597	EMIT_INSTR_PLUS_ICEBP vphminposuw, XMM9, XMM8
2598	EMIT_INSTR_PLUS_ICEBP vphminposuw, XMM9, FSxBX
2599	%endif
2600
2601	;
2602	; [V]PBLENDVB
2603	;
2604	EMIT_INSTR_PLUS_ICEBP pblendvb, XMM1, XMM2
2605	EMIT_INSTR_PLUS_ICEBP pblendvb, XMM1, FSxBX
2606	EMIT_INSTR_PLUS_ICEBP vpblendvb, XMM1, XMM2, XMM3, XMM4
2607	EMIT_INSTR_PLUS_ICEBP vpblendvb, XMM1, XMM2, FSxBX, XMM4
2608	%if TMPL_BITS == 64
2609	EMIT_INSTR_PLUS_ICEBP pblendvb, XMM8, XMM9
2610	EMIT_INSTR_PLUS_ICEBP pblendvb, XMM8, FSxBX
2611	EMIT_INSTR_PLUS_ICEBP vpblendvb, XMM8, XMM9, XMM10, XMM11
2612	EMIT_INSTR_PLUS_ICEBP vpblendvb, XMM8, XMM9, FSxBX, XMM11
2613	%endif
2614
2615	EMIT_INSTR_PLUS_ICEBP vpblendvb, YMM1, YMM2, YMM3, YMM4
2616	EMIT_INSTR_PLUS_ICEBP vpblendvb, YMM1, YMM2, FSxBX, YMM4
2617	%if TMPL_BITS == 64
2618	EMIT_INSTR_PLUS_ICEBP vpblendvb, YMM8, YMM9, YMM10, YMM11
2619	EMIT_INSTR_PLUS_ICEBP vpblendvb, YMM8, YMM9, FSxBX, YMM11
2620	%endif
2621
2622	;
2623	; [V]BLENDVPS
2624	;
2625	EMIT_INSTR_PLUS_ICEBP blendvps, XMM1, XMM2
2626	EMIT_INSTR_PLUS_ICEBP blendvps, XMM1, FSxBX
2627	EMIT_INSTR_PLUS_ICEBP vblendvps, XMM1, XMM2, XMM3, XMM4
2628	EMIT_INSTR_PLUS_ICEBP vblendvps, XMM1, XMM2, FSxBX, XMM4
2629	%if TMPL_BITS == 64
2630	EMIT_INSTR_PLUS_ICEBP blendvps, XMM8, XMM9
2631	EMIT_INSTR_PLUS_ICEBP blendvps, XMM8, FSxBX
2632	EMIT_INSTR_PLUS_ICEBP vblendvps, XMM8, XMM9, XMM10, XMM11
2633	EMIT_INSTR_PLUS_ICEBP vblendvps, XMM8, XMM9, FSxBX, XMM11
2634	%endif
2635
2636	EMIT_INSTR_PLUS_ICEBP vblendvps, YMM1, YMM2, YMM3, YMM4
2637	EMIT_INSTR_PLUS_ICEBP vblendvps, YMM1, YMM2, FSxBX, YMM4
2638	%if TMPL_BITS == 64
2639	EMIT_INSTR_PLUS_ICEBP vblendvps, YMM8, YMM9, YMM10, YMM11
2640	EMIT_INSTR_PLUS_ICEBP vblendvps, YMM8, YMM9, FSxBX, YMM11
2641	%endif
2642
2643	;
2644	; [V]BLENDVPD
2645	;
2646	EMIT_INSTR_PLUS_ICEBP blendvpd, XMM1, XMM2
2647	EMIT_INSTR_PLUS_ICEBP blendvpd, XMM1, FSxBX
2648	EMIT_INSTR_PLUS_ICEBP vblendvpd, XMM1, XMM2, XMM3, XMM4
2649	EMIT_INSTR_PLUS_ICEBP vblendvpd, XMM1, XMM2, FSxBX, XMM4
2650	%if TMPL_BITS == 64
2651	EMIT_INSTR_PLUS_ICEBP blendvpd, XMM8, XMM9
2652	EMIT_INSTR_PLUS_ICEBP blendvpd, XMM8, FSxBX
2653	EMIT_INSTR_PLUS_ICEBP vblendvpd, XMM8, XMM9, XMM10, XMM11
2654	EMIT_INSTR_PLUS_ICEBP vblendvpd, XMM8, XMM9, FSxBX, XMM11
2655	%endif
2656
2657	EMIT_INSTR_PLUS_ICEBP vblendvpd, YMM1, YMM2, YMM3, YMM4
2658	EMIT_INSTR_PLUS_ICEBP vblendvpd, YMM1, YMM2, FSxBX, YMM4
2659	%if TMPL_BITS == 64
2660	EMIT_INSTR_PLUS_ICEBP vblendvpd, YMM8, YMM9, YMM10, YMM11
2661	EMIT_INSTR_PLUS_ICEBP vblendvpd, YMM8, YMM9, FSxBX, YMM11
2662	%endif
2663
2664	;
2665	; [V]PALIGNR
2666	;
2667	EMIT_INSTR_PLUS_ICEBP palignr, MM1, MM2, 0FFh
2668	EMIT_INSTR_PLUS_ICEBP palignr, MM1, FSxBX, 0FFh
2669	EMIT_INSTR_PLUS_ICEBP palignr, MM1, MM2, 000h
2670	EMIT_INSTR_PLUS_ICEBP palignr, MM1, FSxBX, 000h
2671	EMIT_INSTR_PLUS_ICEBP palignr, MM1, MM2, 003h
2672	EMIT_INSTR_PLUS_ICEBP palignr, MM1, FSxBX, 003h
2673	EMIT_INSTR_PLUS_ICEBP palignr, MM1, MM2, 009h
2674	EMIT_INSTR_PLUS_ICEBP palignr, MM1, FSxBX, 009h
2675
2676	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, XMM2, 0FFh
2677	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, FSxBX, 0FFh
2678	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, XMM2, 000h
2679	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, FSxBX, 000h
2680	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, XMM2, 003h
2681	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, FSxBX, 003h
2682	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, XMM2, 013h
2683	EMIT_INSTR_PLUS_ICEBP palignr, XMM1, FSxBX, 013h
2684
2685	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, XMM3, 0FFh
2686	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, FSxBX, 0FFh
2687	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, XMM3, 000h
2688	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, FSxBX, 000h
2689	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, XMM3, 003h
2690	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, FSxBX, 003h
2691	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, XMM3, 013h
2692	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM1, XMM2, FSxBX, 013h
2693
2694	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, YMM3, 0FFh
2695	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, FSxBX, 0FFh
2696	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, YMM3, 000h
2697	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, FSxBX, 000h
2698	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, YMM3, 003h
2699	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, FSxBX, 003h
2700	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, YMM3, 013h
2701	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM1, YMM2, FSxBX, 013h
2702
2703	%if TMPL_BITS == 64
2704	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, XMM9, 0FFh
2705	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, FSxBX, 0FFh
2706	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, XMM9, 000h
2707	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, FSxBX, 000h
2708	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, XMM9, 003h
2709	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, FSxBX, 003h
2710	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, XMM9, 013h
2711	EMIT_INSTR_PLUS_ICEBP palignr, XMM8, FSxBX, 013h
2712
2713	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, XMM10, 0FFh
2714	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, FSxBX, 0FFh
2715	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, XMM10, 000h
2716	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, FSxBX, 000h
2717	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, XMM10, 003h
2718	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, FSxBX, 003h
2719	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, XMM10, 013h
2720	EMIT_INSTR_PLUS_ICEBP vpalignr, XMM8, XMM9, FSxBX, 013h
2721
2722	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, YMM10, 0FFh
2723	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, FSxBX, 0FFh
2724	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, YMM10, 000h
2725	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, FSxBX, 000h
2726	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, YMM10, 003h
2727	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, FSxBX, 003h
2728	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, YMM10, 013h
2729	EMIT_INSTR_PLUS_ICEBP vpalignr, YMM8, YMM9, FSxBX, 013h
2730	%endif
2731
2732	;
2733	; [V]PBLENDW
2734	;
2735	EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, XMM2, 0FFh
2736	EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, FSxBX, 0FFh
2737	EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, XMM2, 000h
2738	EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, FSxBX, 000h
2739
2740	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, XMM3, 0FFh
2741	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, FSxBX, 0FFh
2742	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, XMM3, 000h
2743	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, FSxBX, 000h
2744
2745	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, YMM3, 0FFh
2746	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, FSxBX, 0FFh
2747	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, YMM3, 000h
2748	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, FSxBX, 000h
2749
2750	%if TMPL_BITS == 64
2751	EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, XMM9, 0FFh
2752	EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, FSxBX, 0FFh
2753	EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, XMM9, 000h
2754	EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, FSxBX, 000h
2755
2756	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, XMM10, 0FFh
2757	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, FSxBX, 0FFh
2758	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, XMM10, 000h
2759	EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, FSxBX, 000h
2760
2761	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, YMM10, 0FFh
2762	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, FSxBX, 0FFh
2763	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, YMM10, 000h
2764	EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, FSxBX, 000h
2765	%endif
2766
2767	;
2768	; [V]BLENDPS
2769	;
2770	EMIT_INSTR_PLUS_ICEBP blendps, XMM1, XMM2, 0FFh
2771	EMIT_INSTR_PLUS_ICEBP blendps, XMM1, FSxBX, 0FFh
2772	EMIT_INSTR_PLUS_ICEBP blendps, XMM1, XMM2, 000h
2773	EMIT_INSTR_PLUS_ICEBP blendps, XMM1, FSxBX, 000h
2774
2775	EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, XMM3, 0FFh
2776	EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, FSxBX, 0FFh
2777	EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, XMM3, 000h
2778	EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, FSxBX, 000h
2779
2780	EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, YMM3, 0FFh
2781	EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, FSxBX, 0FFh
2782	EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, YMM3, 000h
2783	EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, FSxBX, 000h
2784
2785	%if TMPL_BITS == 64
2786	EMIT_INSTR_PLUS_ICEBP blendps, XMM8, XMM9, 0FFh
2787	EMIT_INSTR_PLUS_ICEBP blendps, XMM8, FSxBX, 0FFh
2788	EMIT_INSTR_PLUS_ICEBP blendps, XMM8, XMM9, 000h
2789	EMIT_INSTR_PLUS_ICEBP blendps, XMM8, FSxBX, 000h
2790
2791	EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, XMM10, 0FFh
2792	EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, FSxBX, 0FFh
2793	EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, XMM10, 000h
2794	EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, FSxBX, 000h
2795
2796	EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, YMM10, 0FFh
2797	EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, FSxBX, 0FFh
2798	EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, YMM10, 000h
2799	EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, FSxBX, 000h
2800	%endif
2801
2802	;
2803	; [V]BLENDPD
2804	;
2805	EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, XMM2, 0FFh
2806	EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, FSxBX, 0FFh
2807	EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, XMM2, 000h
2808	EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, FSxBX, 000h
2809
2810	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, XMM3, 0FFh
2811	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, FSxBX, 0FFh
2812	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, XMM3, 000h
2813	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, FSxBX, 000h
2814
2815	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, YMM3, 0FFh
2816	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, FSxBX, 0FFh
2817	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, YMM3, 000h
2818	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, FSxBX, 000h
2819
2820	%if TMPL_BITS == 64
2821	EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, XMM9, 0FFh
2822	EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, FSxBX, 0FFh
2823	EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, XMM9, 000h
2824	EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, FSxBX, 000h
2825
2826	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, XMM10, 0FFh
2827	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, FSxBX, 0FFh
2828	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, XMM10, 000h
2829	EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, FSxBX, 000h
2830
2831	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, YMM10, 0FFh
2832	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, FSxBX, 0FFh
2833	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, YMM10, 000h
2834	EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, FSxBX, 000h
2835	%endif
2836
2837	;
2838	; [V]PCLMULQDQ
2839	;
2840	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM1, XMM2, 0FFh
2841	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM1, FSxBX, 0FFh
2842	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM1, XMM2, 000h
2843	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM1, FSxBX, 000h
2844
2845	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM1, XMM2, XMM3, 0FFh
2846	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM1, XMM2, FSxBX, 0FFh
2847	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM1, XMM2, XMM3, 000h
2848	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM1, XMM2, FSxBX, 000h
2849
2850	%if TMPL_BITS == 64
2851	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM8, XMM9, 0FFh
2852	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM8, FSxBX, 0FFh
2853	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM8, XMM9, 000h
2854	EMIT_INSTR_PLUS_ICEBP pclmulqdq, XMM8, FSxBX, 000h
2855
2856	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM8, XMM9, XMM10, 0FFh
2857	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM8, XMM9, FSxBX, 0FFh
2858	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM8, XMM9, XMM10, 000h
2859	EMIT_INSTR_PLUS_ICEBP vpclmulqdq, XMM8, XMM9, FSxBX, 000h
2860	%endif
2861
2862	;
2863	; [V]PINSRW
2864	;
2865	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, EDX, 0FFh
2866	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, FSxBX, 0FFh
2867	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, EDX, 000h
2868	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, FSxBX, 000h
2869
2870	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM1, EDX, 0FFh
2871	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM1, FSxBX, 0FFh
2872	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM1, EDX, 000h
2873	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM1, FSxBX, 000h
2874
2875	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM1, XMM2, EDX, 0FFh
2876	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM1, XMM2, FSxBX, 0FFh
2877	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM1, XMM2, EDX, 000h
2878	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM1, XMM2, FSxBX, 000h
2879
2880	%if TMPL_BITS == 64
2881	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, R9D, 0FFh
2882	EMIT_INSTR_PLUS_ICEBP pinsrw, MM1, R9D, 000h
2883
2884	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM8, R9D, 0FFh
2885	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM8, FSxBX, 0FFh
2886	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM8, R9D, 000h
2887	EMIT_INSTR_PLUS_ICEBP pinsrw, XMM8, FSxBX, 000h
2888
2889	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM8, XMM9, R9D, 0FFh
2890	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM8, XMM9, FSxBX, 0FFh
2891	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM8, XMM9, R9D, 000h
2892	EMIT_INSTR_PLUS_ICEBP vpinsrw, XMM8, XMM9, FSxBX, 000h
2893	%endif
2894
2895	;
2896	; [V]PEXTRW
2897	;
2898	EMIT_INSTR_PLUS_ICEBP pextrw, EDX, MM1, 0FFh
2899	EMIT_INSTR_PLUS_ICEBP pextrw, EDX, MM1, 000h
2900
2901	EMIT_INSTR_PLUS_ICEBP pextrw, EDX, XMM1, 0FFh
2902	EMIT_INSTR_PLUS_ICEBP pextrw, EDX, XMM1, 000h
2903
2904	EMIT_INSTR_PLUS_ICEBP vpextrw, EDX, XMM1, 0FFh
2905	EMIT_INSTR_PLUS_ICEBP vpextrw, EDX, XMM1, 000h
2906
2907	%if TMPL_BITS == 64
2908	EMIT_INSTR_PLUS_ICEBP pextrw, R9D, MM1, 0FFh
2909	EMIT_INSTR_PLUS_ICEBP pextrw, R9D, MM1, 000h
2910
2911	; @todo Emits the SSE4.1 0f3a variant EMIT_INSTR_PLUS_ICEBP pextrw, RDX, XMM1, 0FFh
2912	; @todo Emits the SSE4.1 0f3a variant EMIT_INSTR_PLUS_ICEBP pextrw, RDX, XMM1, 000h
2913
2914	EMIT_INSTR_PLUS_ICEBP pextrw, R9D, XMM8, 0FFh
2915	EMIT_INSTR_PLUS_ICEBP pextrw, R9D, XMM8, 000h
2916
2917	EMIT_INSTR_PLUS_ICEBP vpextrw, R9D, XMM8, 0FFh
2918	EMIT_INSTR_PLUS_ICEBP vpextrw, R9D, XMM8, 000h
2919
2920	EMIT_INSTR_PLUS_ICEBP vpextrw, RDX, XMM1, 0FFh
2921	EMIT_INSTR_PLUS_ICEBP vpextrw, RDX, XMM1, 000h
2922	%endif
2923
2924	;
2925	; [V]MOVMSKPS
2926	;
2927	EMIT_INSTR_PLUS_ICEBP movmskps, EDX, XMM1
2928	EMIT_INSTR_PLUS_ICEBP vmovmskps, EDX, XMM1
2929	EMIT_INSTR_PLUS_ICEBP vmovmskps, EDX, YMM1
2930
2931	%if TMPL_BITS == 64
2932	EMIT_INSTR_PLUS_ICEBP movmskps, R9D, XMM8
2933	EMIT_INSTR_PLUS_ICEBP movmskps, RDX, XMM1
2934
2935	EMIT_INSTR_PLUS_ICEBP vmovmskps, R9D, XMM8
2936	EMIT_INSTR_PLUS_ICEBP vmovmskps, RDX, XMM1
2937
2938	EMIT_INSTR_PLUS_ICEBP vmovmskps, R9D, YMM8
2939	EMIT_INSTR_PLUS_ICEBP vmovmskps, RDX, YMM1
2940	%endif
2941
2942	;
2943	; [V]MOVMSKPD
2944	;
2945	EMIT_INSTR_PLUS_ICEBP movmskpd, EDX, XMM1
2946	EMIT_INSTR_PLUS_ICEBP vmovmskpd, EDX, XMM1
2947	EMIT_INSTR_PLUS_ICEBP vmovmskpd, EDX, YMM1
2948
2949	%if TMPL_BITS == 64
2950	EMIT_INSTR_PLUS_ICEBP movmskpd, R9D, XMM8
2951	EMIT_INSTR_PLUS_ICEBP movmskpd, RDX, XMM1
2952
2953	EMIT_INSTR_PLUS_ICEBP vmovmskpd, R9D, XMM8
2954	EMIT_INSTR_PLUS_ICEBP vmovmskpd, RDX, XMM1
2955
2956	EMIT_INSTR_PLUS_ICEBP vmovmskpd, R9D, YMM8
2957	EMIT_INSTR_PLUS_ICEBP vmovmskpd, RDX, YMM1
2958	%endif
2959
2960
2961	%endif ; BS3_INSTANTIATING_CMN
2962
2963	%include "bs3kit-template-footer.mac" ; reset environment

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