1 | /* $Id: bs3-cpu-instr-2.h 104000 2024-03-22 15:37:38Z vboxsync $ */
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2 | /** @file
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3 | * BS3Kit - bs3-cpu-instr-2, common header file.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2024 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * The contents of this file may alternatively be used under the terms
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26 | * of the Common Development and Distribution License Version 1.0
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27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | * in the VirtualBox distribution, in which case the provisions of the
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29 | * CDDL are applicable instead of those of the GPL.
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30 | *
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31 | * You may elect to license modified versions of this file under the
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32 | * terms and conditions of either the GPL or the CDDL or both.
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33 | *
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34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | */
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36 |
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37 | #ifndef VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h
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38 | #define VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h
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39 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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40 | # pragma once
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41 | #endif
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42 |
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43 | #pragma pack(1)
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44 |
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45 | /* binary: */
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46 |
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47 | typedef struct BS3CPUINSTR2BIN8
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48 | {
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49 | uint8_t uSrc1, uSrc2, uResult;
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50 | uint16_t fEflOut;
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51 | } BS3CPUINSTR2BIN8;
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52 | typedef BS3CPUINSTR2BIN8 const RT_FAR *PCBS3CPUINSTR2BIN8;
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53 |
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54 | typedef struct BS3CPUINSTR2BIN16
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55 | {
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56 | uint16_t uSrc1, uSrc2, uResult;
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57 | uint16_t fEflOut;
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58 | } BS3CPUINSTR2BIN16;
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59 | typedef BS3CPUINSTR2BIN16 const RT_FAR *PCBS3CPUINSTR2BIN16;
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60 |
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61 | typedef struct BS3CPUINSTR2BIN32
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62 | {
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63 | uint32_t uSrc1, uSrc2, uResult;
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64 | uint16_t fEflOut;
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65 | } BS3CPUINSTR2BIN32;
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66 | typedef BS3CPUINSTR2BIN32 const RT_FAR *PCBS3CPUINSTR2BIN32;
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67 |
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68 | typedef struct BS3CPUINSTR2BIN64
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69 | {
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70 | uint64_t uSrc1, uSrc2, uResult;
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71 | uint16_t fEflOut;
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72 | } BS3CPUINSTR2BIN64;
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73 | typedef BS3CPUINSTR2BIN64 const RT_FAR *PCBS3CPUINSTR2BIN64;
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74 |
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75 | /** Using unused EFLAGS bit 3 for CF input value for ADC, SBB and such. */
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76 | #define BS3CPUINSTR2BIN_EFL_CARRY_IN_BIT 3
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77 |
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78 |
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79 | /* shifting: */
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80 |
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81 | typedef struct BS3CPUINSTR2SHIFT8
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82 | {
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83 | uint8_t uSrc1;
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84 | uint8_t uSrc2;
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85 | uint16_t fEflIn;
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86 | uint8_t uResult;
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87 | uint16_t fEflOut;
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88 | } BS3CPUINSTR2SHIFT8;
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89 | typedef BS3CPUINSTR2SHIFT8 const RT_FAR *PCBS3CPUINSTR2SHIFT8;
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90 |
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91 | typedef struct BS3CPUINSTR2SHIFT16
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92 | {
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93 | uint16_t uSrc1;
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94 | uint8_t uSrc2;
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95 | uint16_t fEflIn;
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96 | uint16_t uResult;
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97 | uint16_t fEflOut;
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98 | } BS3CPUINSTR2SHIFT16;
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99 | typedef BS3CPUINSTR2SHIFT16 const RT_FAR *PCBS3CPUINSTR2SHIFT16;
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100 |
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101 | typedef struct BS3CPUINSTR2SHIFT32
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102 | {
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103 | uint32_t uSrc1;
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104 | uint8_t uSrc2;
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105 | uint16_t fEflIn;
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106 | uint32_t uResult;
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107 | uint16_t fEflOut;
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108 | } BS3CPUINSTR2SHIFT32;
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109 | typedef BS3CPUINSTR2SHIFT32 const RT_FAR *PCBS3CPUINSTR2SHIFT32;
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110 |
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111 | typedef struct BS3CPUINSTR2SHIFT64
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112 | {
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113 | uint64_t uSrc1;
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114 | uint8_t uSrc2;
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115 | uint16_t fEflIn;
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116 | uint64_t uResult;
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117 | uint16_t fEflOut;
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118 | } BS3CPUINSTR2SHIFT64;
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119 | typedef BS3CPUINSTR2SHIFT64 const RT_FAR *PCBS3CPUINSTR2SHIFT64;
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120 |
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121 | #pragma pack()
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122 |
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123 | /** Using unused EFLAGS bit 3 for alternative OF value for reg,Ib. */
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124 | #define BS3CPUINSTR2SHIFT_EFL_IB_OVERFLOW_OUT_BIT 3
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125 |
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126 | #endif /* !VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h */
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127 |
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