VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2.c@ 95465

Last change on this file since 95465 was 95465, checked in by vboxsync, 2 years ago

ValKit/bs3-cpu-instr-2: Simple crc32 instruction test. bugref:9898

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 5.3 KB
Line 
1/* $Id: bs3-cpu-instr-2.c 95465 2022-07-01 00:44:40Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-cpu-instr-2, 16-bit C code.
4 */
5
6/*
7 * Copyright (C) 2007-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27
28/*********************************************************************************************************************************
29* Header Files *
30*********************************************************************************************************************************/
31#include <bs3kit.h>
32
33
34/*********************************************************************************************************************************
35* Internal Functions *
36*********************************************************************************************************************************/
37BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_mul);
38BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_imul);
39BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_div);
40BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_idiv);
41BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_bsf_tzcnt);
42BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_bsr_lzcnt);
43BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_andn);
44BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_bextr);
45BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_blsr);
46BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_blsmsk);
47BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_blsi);
48BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_bzhi);
49BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_pdep);
50BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_pext);
51BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_rorx);
52BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_shlx);
53BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_sarx);
54BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_shrx);
55BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_mulx);
56BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_popcnt);
57BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_crc32);
58BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_cmpxchg16b);
59BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_wrfsbase);
60BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_wrgsbase);
61BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_rdfsbase);
62BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_rdgsbase);
63
64
65/*********************************************************************************************************************************
66* Global Variables *
67*********************************************************************************************************************************/
68static const BS3TESTMODEENTRY g_aModeTests[] =
69{
70#if 1
71 BS3TESTMODEENTRY_CMN("mul", bs3CpuInstr2_mul),
72 BS3TESTMODEENTRY_CMN("imul", bs3CpuInstr2_imul),
73 BS3TESTMODEENTRY_CMN("div", bs3CpuInstr2_div),
74 BS3TESTMODEENTRY_CMN("idiv", bs3CpuInstr2_idiv),
75#endif
76#if 1 /* BSF/BSR (386+) & TZCNT/LZCNT (BMI1,ABM) */
77 BS3TESTMODEENTRY_CMN("bsf/tzcnt", bs3CpuInstr2_bsf_tzcnt),
78 BS3TESTMODEENTRY_CMN("bsr/lzcnt", bs3CpuInstr2_bsr_lzcnt),
79#endif
80#if 1 /* BMI1 */
81 BS3TESTMODEENTRY_CMN("andn", bs3CpuInstr2_andn),
82 BS3TESTMODEENTRY_CMN("bextr", bs3CpuInstr2_bextr),
83 BS3TESTMODEENTRY_CMN("blsr", bs3CpuInstr2_blsr),
84 BS3TESTMODEENTRY_CMN("blsmsk", bs3CpuInstr2_blsmsk),
85 BS3TESTMODEENTRY_CMN("blsi", bs3CpuInstr2_blsi),
86#endif
87#if 1 /* BMI2 */
88 BS3TESTMODEENTRY_CMN("bzhi", bs3CpuInstr2_bzhi),
89 BS3TESTMODEENTRY_CMN("pdep", bs3CpuInstr2_pdep),
90 BS3TESTMODEENTRY_CMN("pext", bs3CpuInstr2_pext),
91 BS3TESTMODEENTRY_CMN("rorx", bs3CpuInstr2_rorx),
92 BS3TESTMODEENTRY_CMN("shlx", bs3CpuInstr2_shlx),
93 BS3TESTMODEENTRY_CMN("sarx", bs3CpuInstr2_sarx),
94 BS3TESTMODEENTRY_CMN("shrx", bs3CpuInstr2_shrx),
95 BS3TESTMODEENTRY_CMN("mulx", bs3CpuInstr2_mulx),
96#endif
97#if 1
98 BS3TESTMODEENTRY_CMN("popcnt", bs3CpuInstr2_popcnt), /* Intel: POPCNT; AMD: ABM */
99 BS3TESTMODEENTRY_CMN("crc32", bs3CpuInstr2_crc32), /* SSE4.2 */
100#endif
101#if 1
102 BS3TESTMODEENTRY_CMN_64("cmpxchg16b", bs3CpuInstr2_cmpxchg16b),
103 BS3TESTMODEENTRY_CMN_64("wrfsbase", bs3CpuInstr2_wrfsbase),
104 BS3TESTMODEENTRY_CMN_64("wrgsbase", bs3CpuInstr2_wrgsbase),
105 BS3TESTMODEENTRY_CMN_64("rdfsbase", bs3CpuInstr2_rdfsbase),
106 BS3TESTMODEENTRY_CMN_64("rdgsbase", bs3CpuInstr2_rdgsbase),
107#endif
108};
109
110
111BS3_DECL(void) Main_rm()
112{
113 Bs3InitAll_rm();
114 Bs3TestInit("bs3-cpu-instr-2");
115
116 Bs3TestDoModes_rm(g_aModeTests, RT_ELEMENTS(g_aModeTests));
117
118 Bs3TestTerm();
119}
120
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