bootsector2-cpu-hidden-regs-1-template.mac@ 98102

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1	; $Id: bootsector2-cpu-hidden-regs-1-template.mac 96407 2022-08-22 17:43:14Z vboxsync $
2	;; @file
3	; bootsector2 hidden CPU registers - multi mode template.
4	;
5
6	;
7	; Copyright (C) 2007-2022 Oracle and/or its affiliates.
8	;
9	; This file is part of VirtualBox base platform packages, as
10	; available from https://www.virtualbox.org.
11	;
12	; This program is free software; you can redistribute it and/or
13	; modify it under the terms of the GNU General Public License
14	; as published by the Free Software Foundation, in version 3 of the
15	; License.
16	;
17	; This program is distributed in the hope that it will be useful, but
18	; WITHOUT ANY WARRANTY; without even the implied warranty of
19	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	; General Public License for more details.
21	;
22	; You should have received a copy of the GNU General Public License
23	; along with this program; if not, see <https://www.gnu.org/licenses>.
24	;
25	; The contents of this file may alternatively be used under the terms
26	; of the Common Development and Distribution License Version 1.0
27	; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28	; in the VirtualBox distribution, in which case the provisions of the
29	; CDDL are applicable instead of those of the GPL.
30	;
31	; You may elect to license modified versions of this file under the
32	; terms and conditions of either the GPL or the CDDL or both.
33	;
34	; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35	;
36
37
38	%include "bootsector2-template-header.mac"
39
40	;;
41	; Helper for reporting several register values at in a sequence.
42	;
43	BEGINPROC TMPL_NM(TestValueRegSZZ)
44	push sAX
45	push sBX
46
47	mov xBX, xAX
48	.next:
49	mov xAX, xBX
50	call TMPL_NM_CMN(TestValueReg)
51	.inner_next:
52	inc xBX
53	cmp byte [xBX], 0
54	jne .inner_next
55
56	inc xBX
57	cmp byte [xBX], 0
58	je .done
59	jmp .next
60
61	.done
62	pop sBX
63	pop sAX
64	ret
65	ENDPROC TMPL_NM(TestValueRegSZZ)
66
67	;;
68	; Tests various LDTR values
69	;
70	BEGINPROC TMPL_NM(doLdtrTests)
71	push sAX
72
73	; The inital LDT.
74	mov sAX, .szLdtrInitial
75	call TMPL_NM(TestValueRegSZZ)
76
77	; Load our LDT
78	mov eax, BS2_SEL_LDT
79	lldt ax
80	mov sAX, .szLdtrValid
81	call TMPL_NM(TestValueRegSZZ)
82
83	; NULL LDTR.
84	xor eax, eax
85	lldt ax
86	mov sAX, .szLdtr0
87	call TMPL_NM(TestValueRegSZZ)
88
89	; NULL(1) LDTR.
90	mov eax, 1
91	lldt ax
92	mov sAX, .szLdtr1
93	call TMPL_NM(TestValueRegSZZ)
94
95	; NULL(2) LDTR.
96	mov eax, 2
97	lldt ax
98	mov sAX, .szLdtr2
99	call TMPL_NM(TestValueRegSZZ)
100
101	; NULL(3) LDTR.
102	mov eax, 3
103	lldt ax
104	mov sAX, .szLdtr3
105	call TMPL_NM(TestValueRegSZZ)
106
107	.done
108	pop sAX
109	ret
110
111	.szLdtrInitial:
112	db 'LDTR(Initial) sel:ldtr', 0
113	db 'LDTR(Initial) base:ldtr_base', 0
114	db 'LDTR(Initial) limit:ldtr_lim', 0
115	db 'LDTR(Initial) attr:ldtr_attr', 0
116	db 0
117	.szLdtrValid:
118	db 'LDTR(Valid) sel:ldtr', 0
119	db 'LDTR(Valid) base:ldtr_base', 0
120	db 'LDTR(Valid) limit:ldtr_lim', 0
121	db 'LDTR(Valid) attr:ldtr_attr', 0
122	db 0
123	.szLdtr0:
124	db 'LDTR(0) sel:ldtr', 0
125	db 'LDTR(0) base:ldtr_base', 0
126	db 'LDTR(0) limit:ldtr_lim', 0
127	db 'LDTR(0) attr:ldtr_attr', 0
128	db 0
129	.szLdtr1:
130	db 'LDTR(1) sel:ldtr', 0
131	db 'LDTR(1) base:ldtr_base', 0
132	db 'LDTR(1) limit:ldtr_lim', 0
133	db 'LDTR(1) attr:ldtr_attr', 0
134	db 0
135	.szLdtr2:
136	db 'LDTR(2) sel:ldtr', 0
137	db 'LDTR(2) base:ldtr_base', 0
138	db 'LDTR(2) limit:ldtr_lim', 0
139	db 'LDTR(2) attr:ldtr_attr', 0
140	db 0
141	.szLdtr3:
142	db 'LDTR(3) sel:ldtr', 0
143	db 'LDTR(3) base:ldtr_base', 0
144	db 'LDTR(3) limit:ldtr_lim', 0
145	db 'LDTR(3) attr:ldtr_attr', 0
146	db 0
147	ENDPROC TMPL_NM(doLdtrTests)
148
149
150	;;
151	; Tests various LDTR values
152	;
153	BEGINPROC TMPL_NM(doTrTests)
154	push sAX
155
156	; Initial TR values.
157	mov sAX, .szTrInitial
158	call TMPL_NM(TestValueRegSZZ)
159	jmp .next1
160	.szTrInitial:
161	db 'TR(Initial) sel:tr', 0
162	db 'TR(Initial) base:tr_base', 0
163	db 'TR(Initial) limit:tr_lim', 0
164	db 'TR(Initial) attr:tr_attr', 0
165	db 0
166	.next1:
167
168	; Our TR.
169	%ifdef TMPL_CMN_LM
170	mov ax, BS2_SEL_TSS64
171	ltr ax
172	mov sAX, .szTrTss64
173	call TMPL_NM(TestValueRegSZZ)
174	jmp .next2
175	.szTrTss64:
176	db 'TR(64) sel:tr', 0
177	db 'TR(64) base:tr_base', 0
178	db 'TR(64) limit:tr_lim', 0
179	db 'TR(64) attr:tr_attr', 0
180	db 0
181
182	%elifdef TMPL_PP32
183	mov ax, BS2_SEL_TSS32
184	ltr ax
185	mov sAX, .szTrTss32
186	call TMPL_NM(TestValueRegSZZ)
187	jmp .next2
188	.szTrTss32:
189	db 'TR(32) sel:tr', 0
190	db 'TR(32) base:tr_base', 0
191	db 'TR(32) limit:tr_lim', 0
192	db 'TR(32) attr:tr_attr', 0
193	db 0
194	;%elifdef TMPL_PP16
195	; mov ax, BS2_SEL_TSS16
196	; mov sAX, .szTrTss16
197	; call TMPL_NM(TestValueRegSZZ)
198	%endif
199	.next2:
200
201	; Note! Loading 0 into TR is not possible, unlike with LDTR.
202
203	.done
204	pop sAX
205	ret
206	ENDPROC TMPL_NM(doTrTests)
207
208
209	;;
210	; Test loading of NULL selectors.
211	;
212	BEGINPROC TMPL_NM(doNullSelTests)
213	push sAX
214	push xBX
215	push gs
216
217	mov ax, ss
218	mov gs, ax
219	mov sAX, .szGsSs
220	call TMPL_NM(TestValueRegSZZ)
221
222	xor eax, eax
223	mov gs, ax
224	mov sAX, .szGs0
225	call TMPL_NM(TestValueRegSZZ)
226
227	mov ax, 3
228	mov gs, ax
229	mov sAX, .szGs3
230	call TMPL_NM(TestValueRegSZZ)
231
232	%ifdef TMPL_64BIT
233	pushf
234	cli
235	mov bx, ss
236	mov ax, 0
237	mov ss, ax
238	mov sAX, .szSs0
239	call TMPL_NM(TestValueRegSZZ)
240	mov ss, bx
241	popf
242
243	call TMPL_NM_CMN(Bs2ToRing2)
244	mov bx, ss
245	mov ax, 2
246	mov ss, ax
247	mov sAX, .szSs1Ring2
248	call TMPL_NM(TestValueRegSZZ)
249	mov ss, bx
250
251	test byte [g_fCpuAmd], 1
252	jz .not_amd
253	mov ax, 3
254	mov ss, ax
255	mov sAX, .szSs3Ring2
256	call TMPL_NM(TestValueRegSZZ)
257
258	.not_amd:
259	call TMPL_NM_CMN(Bs2ToRing0)
260
261	%endif
262
263	pop gs
264	pop xBX
265	pop sAX
266	ret
267
268	.szGsSs:
269	db 'GS(ss) sel:gs', 0
270	db 'GS(ss) base:gs_base', 0
271	db 'GS(ss) limit:gs_lim', 0
272	db 'GS(ss) attr:gs_attr', 0
273	db 0
274	.szGs0:
275	db 'GS(0) sel:gs', 0
276	db 'GS(0) base:gs_base', 0
277	db 'GS(0) limit:gs_lim', 0
278	db 'GS(0) attr:gs_attr', 0
279	db 0
280	.szGs3:
281	db 'GS(3) sel:gs', 0
282	db 'GS(3) base:gs_base', 0
283	db 'GS(3) limit:gs_lim', 0
284	db 'GS(3) attr:gs_attr', 0
285	db 0
286	%ifdef TMPL_64BIT
287	.szSs0:
288	db 'SS(0) sel:ss', 0
289	db 'SS(0) base:ss_base', 0
290	db 'SS(0) limit:ss_lim', 0
291	db 'SS(0) attr:ss_attr', 0
292	db 0
293	.szSs1Ring2
294	db 'ring-2 SS(2) sel:ss', 0
295	db 'ring-2 SS(2) base:ss_base', 0
296	db 'ring-2 SS(2) limit:ss_lim', 0
297	db 'ring-2 SS(2) attr:ss_attr', 0
298	db 0
299	.szSs3Ring2
300	db 'ring-2 SS(3) sel:ss', 0
301	db 'ring-2 SS(3) base:ss_base', 0
302	db 'ring-2 SS(3) limit:ss_lim', 0
303	db 'ring-2 SS(3) attr:ss_attr', 0
304	db 0
305	%endif
306	ENDPROC TMPL_NM(doNullSelTests)
307
308
309	BEGINPROC TMPL_NM(doTestsWorker)
310	push sAX
311
312	mov xAX, .s_szSubTest
313	call TMPL_NM_CMN(TestSub)
314	call TMPL_NM(doLdtrTests)
315	call TMPL_NM(doTrTests)
316	call TMPL_NM(doNullSelTests)
317
318	.done
319	pop sAX
320	ret
321
322	.s_szSubTest:
323	db TMPL_MODE_STR, 0
324	ENDPROC TMPL_NM(doTestsWorker)
325
326
327	;;
328	; Do the tests for this mode.
329	;
330	; @uses nothing
331	;
332	BEGINCODELOW
333	BITS 16
334	BEGINPROC TMPL_NM(doTests_rm)
335	call TMPL_NM(Bs2IsModeSupported_rm)
336	jz .done
337	call TMPL_NM(Bs2EnterMode_rm)
338	BITS TMPL_BITS
339
340	call TMPL_NM(doTestsWorker)
341
342	call TMPL_NM(Bs2ExitMode)
343	BITS 16
344	.done:
345	ret
346	ENDPROC TMPL_NM(doTests_rm)
347	TMPL_BEGINCODE
348	BITS TMPL_BITS
349
350
351	%include "bootsector2-template-footer.mac"
352

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