1 | /* $Id: tstX86-FpuSaveRestore.cpp 62478 2016-07-22 18:29:06Z vboxsync $ */
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2 | /** @file
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3 | * tstX86-FpuSaveRestore - Experimenting with saving and restoring FPU.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2013-2016 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 |
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19 | /*********************************************************************************************************************************
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20 | * Header Files *
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21 | *********************************************************************************************************************************/
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22 | #include <iprt/initterm.h>
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23 | #include <iprt/message.h>
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24 | #include <iprt/string.h>
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25 | #include <iprt/test.h>
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26 | #include <iprt/x86.h>
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27 |
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28 | DECLASM(void) MyFpuPrepXcpt(void);
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29 | DECLASM(void) MyFpuSave(PX86FXSTATE pState);
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30 | DECLASM(void) MyFpuStoreEnv(PX86FSTENV32P pEnv);
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31 | DECLASM(void) MyFpuRestore(PX86FXSTATE pState);
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32 | DECLASM(void) MyFpuLoadEnv(PX86FSTENV32P pEnv);
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33 |
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34 | int main()
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35 | {
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36 | RTTEST hTest;
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37 | int rc = RTTestInitAndCreate("tstX86-FpuSaveRestore", &hTest);
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38 | RTTestBanner(hTest);
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39 |
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40 |
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41 |
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42 | RTTestSub(hTest, "CS/DS Selector");
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43 |
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44 | RTTestIPrintf(RTTESTLVL_ALWAYS, "Initial state (0x20 will be subtracted from IP):\n");
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45 | /* Trigger an exception to make sure we've got something to look at. */
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46 | MyFpuPrepXcpt();
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47 | static X86FXSTATE FxState;
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48 | MyFpuSave(&FxState);
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49 | static X86FSTENV32P FpuEnv;
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50 | MyFpuStoreEnv(&FpuEnv);
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51 | #ifdef RT_ARCH_AMD64
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52 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxState.Rsrvd1, FxState.CS, FxState.FPUIP);
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53 | #else
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54 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxState.CS, FxState.FPUIP);
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55 | #endif
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56 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnv.FPUCS, FpuEnv.FPUIP);
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57 |
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58 | /* Modify the state a little so we can tell the difference. */
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59 | static X86FXSTATE FxState2;
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60 | FxState2 = FxState;
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61 | FxState2.FPUIP -= 0x20;
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62 | static X86FSTENV32P FpuEnv2;
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63 | FpuEnv2 = FpuEnv;
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64 | FpuEnv2.FPUIP -= 0x20;
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65 |
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66 | /* Just do FXRSTOR. */
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67 | RTTestIPrintf(RTTESTLVL_ALWAYS, "Just FXRSTOR:\n");
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68 | MyFpuRestore(&FxState2);
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69 |
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70 | static X86FXSTATE FxStateJustRestore;
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71 | MyFpuSave(&FxStateJustRestore);
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72 | static X86FSTENV32P FpuEnvJustRestore;
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73 | MyFpuStoreEnv(&FpuEnvJustRestore);
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74 | #ifdef RT_ARCH_AMD64
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75 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateJustRestore.Rsrvd1, FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
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76 | #else
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77 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
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78 | #endif
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79 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvJustRestore.FPUCS, FpuEnvJustRestore.FPUIP);
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80 |
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81 |
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82 | /* FXRSTORE + FLDENV */
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83 | RTTestIPrintf(RTTESTLVL_ALWAYS, "FXRSTOR first, then FLDENV:\n");
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84 | MyFpuRestore(&FxState2);
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85 | MyFpuLoadEnv(&FpuEnv2);
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86 |
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87 | static X86FXSTATE FxStateRestoreLoad;
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88 | MyFpuSave(&FxStateRestoreLoad);
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89 | static X86FSTENV32P FpuEnvRestoreLoad;
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90 | MyFpuStoreEnv(&FpuEnvRestoreLoad);
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91 | #ifdef RT_ARCH_AMD64
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92 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateRestoreLoad.Rsrvd1, FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
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93 | #else
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94 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
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95 | #endif
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96 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvRestoreLoad.FPUCS, FpuEnvRestoreLoad.FPUIP);
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97 |
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98 | /* Reverse the order (FLDENV + FXRSTORE). */
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99 | RTTestIPrintf(RTTESTLVL_ALWAYS, "FLDENV first, then FXRSTOR:\n");
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100 | MyFpuLoadEnv(&FpuEnv2);
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101 | MyFpuRestore(&FxState2);
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102 |
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103 | static X86FXSTATE FxStateLoadRestore;
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104 | MyFpuSave(&FxStateLoadRestore);
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105 | static X86FSTENV32P FpuEnvLoadRestore;
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106 | MyFpuStoreEnv(&FpuEnvLoadRestore);
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107 | #ifdef RT_ARCH_AMD64
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108 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState IP=%#06x%04x%08x\n", FxStateLoadRestore.Rsrvd1, FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
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109 | #else
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110 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FxState CS:IP=%#06x:%#010x\n", FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
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111 | #endif
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112 | RTTestIPrintf(RTTESTLVL_ALWAYS, " FpuEnv CS:IP=%#06x:%#010x\n", FpuEnvLoadRestore.FPUCS, FpuEnvLoadRestore.FPUIP);
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113 |
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114 |
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115 | return RTTestSummaryAndDestroy(hTest);
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116 | }
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