1 | /* $Id: tstCompiler.cpp 38636 2011-09-05 13:49:45Z vboxsync $ */
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2 | /** @file
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3 | * Testing how the compiler deals with various things.
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4 | *
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5 | * This is testcase requires manual inspection and might not be very useful
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6 | * in non-optimized compiler modes.
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7 | */
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8 |
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9 | /*
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10 | * Copyright (C) 2006-2007 Oracle Corporation
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11 | *
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12 | * This file is part of VirtualBox Open Source Edition (OSE), as
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13 | * available from http://www.virtualbox.org. This file is free software;
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14 | * you can redistribute it and/or modify it under the terms of the GNU
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15 | * General Public License (GPL) as published by the Free Software
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16 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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17 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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18 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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19 | */
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20 |
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21 |
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22 | /*******************************************************************************
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23 | * Header Files *
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24 | *******************************************************************************/
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25 | #include <VBox/dis.h>
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26 | #include <VBox/disopcode.h>
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27 | #include <iprt/stream.h>
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28 | #include <iprt/err.h>
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29 | #include <iprt/x86.h>
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30 | #include <iprt/string.h>
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31 | #include <iprt/message.h>
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32 | #include <iprt/initterm.h>
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33 |
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34 | #if 1
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35 |
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36 | /**
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37 | * PAE page table entry.
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38 | */
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39 | #ifdef __GNUC__
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40 | __extension__ /* Makes it shut up about the 40 bit uint64_t field. */
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41 | #endif
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42 | typedef struct X86PTEPAEBITS64
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43 | {
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44 | /** Flags whether(=1) or not the page is present. */
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45 | uint64_t u1Present : 1;
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46 | /** Read(=0) / Write(=1) flag. */
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47 | uint64_t u1Write : 1;
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48 | /** User(=1) / Supervisor(=0) flag. */
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49 | uint64_t u1User : 1;
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50 | /** Write Thru flag. If PAT enabled, bit 0 of the index. */
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51 | uint64_t u1WriteThru : 1;
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52 | /** Cache disabled flag. If PAT enabled, bit 1 of the index. */
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53 | uint64_t u1CacheDisable : 1;
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54 | /** Accessed flag.
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55 | * Indicates that the page have been read or written to. */
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56 | uint64_t u1Accessed : 1;
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57 | /** Dirty flag.
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58 | * Indicates that the page have been written to. */
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59 | uint64_t u1Dirty : 1;
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60 | /** Reserved / If PAT enabled, bit 2 of the index. */
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61 | uint64_t u1PAT : 1;
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62 | /** Global flag. (Ignored in all but final level.) */
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63 | uint64_t u1Global : 1;
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64 | /** Available for use to system software. */
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65 | uint64_t u3Available : 3;
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66 | /** Physical Page number of the next level. */
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67 | uint64_t u40PageNo : 40;
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68 | /** MBZ bits */
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69 | uint64_t u11Reserved : 11;
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70 | /** No Execute flag. */
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71 | uint64_t u1NoExecute : 1;
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72 | } X86PTEPAEBITS64;
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73 | /** Pointer to a page table entry. */
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74 | typedef X86PTEPAEBITS64 *PX86PTEPAEBITS64;
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75 |
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76 | /**
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77 | * PAE Page table entry.
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78 | */
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79 | typedef union X86PTEPAE64
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80 | {
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81 | /** Bit field view. */
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82 | X86PTEPAEBITS64 n;
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83 | /** Unsigned integer view */
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84 | X86PGPAEUINT u;
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85 | /** 32-bit view. */
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86 | uint32_t au32[2];
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87 | /** 16-bit view. */
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88 | uint16_t au16[4];
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89 | /** 8-bit view. */
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90 | uint8_t au8[8];
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91 | } X86PTEPAE64;
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92 | /** Pointer to a PAE page table entry. */
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93 | typedef X86PTEPAE64 *PX86PTEPAE64;
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94 | /** @} */
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95 |
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96 | #else /* use current (uint32_t based) PAE structures */
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97 |
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98 | #define X86PTEPAE64 X86PTEPAE
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99 | #define PX86PTEPAE64 PX86PTEPAE
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100 |
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101 | #endif
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102 |
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103 |
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104 | void SetPresent(PX86PTE pPte)
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105 | {
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106 | pPte->n.u1Present = 1;
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107 | }
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108 |
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109 |
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110 | void SetPresent64(PX86PTEPAE64 pPte)
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111 | {
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112 | pPte->n.u1Present = 1;
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113 | }
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114 |
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115 |
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116 | void SetWriteDirtyAccessed(PX86PTE pPte)
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117 | {
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118 | pPte->n.u1Write = 1;
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119 | pPte->n.u1Dirty = 1;
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120 | pPte->n.u1Accessed = 1;
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121 | }
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122 |
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123 |
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124 | void SetWriteDirtyAccessed64(PX86PTEPAE64 pPte)
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125 | {
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126 | pPte->n.u1Write = 1;
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127 | pPte->n.u1Dirty = 1;
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128 | pPte->n.u1Accessed = 1;
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129 | }
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130 |
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131 |
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132 | void SetWriteDirtyAccessedClearAVL(PX86PTE pPte)
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133 | {
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134 | pPte->n.u1Write = 1;
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135 | pPte->n.u1Dirty = 1;
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136 | pPte->n.u1Accessed = 1;
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137 | pPte->u &= ~RT_BIT(10);
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138 | }
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139 |
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140 |
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141 | void SetWriteDirtyAccessedClearAVL64(PX86PTEPAE64 pPte)
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142 | {
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143 | pPte->n.u1Write = 1;
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144 | pPte->n.u1Dirty = 1;
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145 | pPte->n.u1Accessed = 1;
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146 | pPte->u &= ~RT_BIT(10); /* bad, but serves as demonstration. */
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147 | }
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148 |
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149 |
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150 | bool Test3232(X86PTEPAE Pte)
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151 | {
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152 | return !!(Pte.u & RT_BIT(10));
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153 | }
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154 |
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155 |
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156 | bool Test3264(X86PTEPAE Pte)
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157 | {
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158 | return !!(Pte.u & RT_BIT_64(10));
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159 | }
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160 |
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161 |
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162 | bool Test6432(X86PTEPAE64 Pte)
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163 | {
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164 | return !!(Pte.u & RT_BIT(10));
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165 | }
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166 |
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167 |
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168 | bool Test6464(X86PTEPAE64 Pte)
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169 | {
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170 | return !!(Pte.u & RT_BIT_64(10));
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171 | }
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172 |
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173 |
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174 | void Mix6432Consts(PX86PTEPAE64 pPteDst, PX86PTEPAE64 pPteSrc)
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175 | {
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176 | pPteDst->u = pPteSrc->u & ~(X86_PTE_PAE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT);
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177 | }
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178 |
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179 |
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180 | void Mix32Var64Const64Data(PX86PTEPAE64 pPteDst, uint32_t fMask, uint32_t fFlags)
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181 | {
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182 | pPteDst->u = (pPteDst->u & (fMask | X86_PTE_PAE_PG_MASK)) | (fFlags & ~X86_PTE_PAE_PG_MASK);
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183 | }
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184 |
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185 |
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186 | X86PTE Return32BitStruct(PX86PTE paPT)
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187 | {
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188 | return paPT[10];
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189 | }
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190 |
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191 |
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192 | X86PTEPAE64 Return64BitStruct(PX86PTEPAE64 paPT)
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193 | {
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194 | return paPT[10];
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195 | }
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196 |
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197 |
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198 | static void DisasFunction(const char *pszName, PFNRT pv)
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199 | {
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200 | RTPrintf("tstBitFields: Disassembly of %s:\n", pszName);
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201 | RTUINTPTR uCur = (uintptr_t)pv;
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202 | RTUINTPTR uCurMax = uCur + 256;
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203 | DISCPUSTATE Cpu;
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204 |
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205 | memset(&Cpu, 0, sizeof(Cpu));
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206 | Cpu.mode = CPUMODE_32BIT;
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207 | do
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208 | {
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209 | char sz[256];
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210 | uint32_t cbInstr = 0;
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211 | if (RT_SUCCESS(DISInstr(&Cpu, uCur, 0, &cbInstr, sz)))
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212 | {
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213 | RTPrintf("tstBitFields: %s", sz);
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214 | uCur += cbInstr;
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215 | }
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216 | else
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217 | {
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218 | RTPrintf("tstBitFields: %p: %02x - DISInstr failed!\n", uCur, *(uint8_t *)(uintptr_t)uCur);
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219 | uCur += 1;
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220 | }
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221 | } while (Cpu.pCurInstr->opcode != OP_RETN || uCur > uCurMax);
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222 | }
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223 |
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224 |
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225 | int main()
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226 | {
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227 | int rc = RTR3InitExeNoArguments(0);
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228 | if (RT_FAILURE(rc))
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229 | return RTMsgInitFailure(rc);
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230 |
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231 | RTPrintf("tstBitFields: This testcase requires manual inspection of the output!\n"
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232 | "\n"
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233 | "tstBitFields: The compiler must be able to combine operations when\n"
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234 | "tstBitFields: optimizing, if not we're screwed.\n"
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235 | "\n");
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236 | DisasFunction("SetPresent", (PFNRT)&SetPresent);
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237 | RTPrintf("\n");
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238 | DisasFunction("SetPresent64", (PFNRT)&SetPresent64);
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239 | RTPrintf("\n");
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240 | DisasFunction("SetWriteDirtyAccessed", (PFNRT)&SetWriteDirtyAccessed);
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241 | RTPrintf("\n");
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242 | DisasFunction("SetWriteDirtyAccessed64", (PFNRT)&SetWriteDirtyAccessed64);
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243 | RTPrintf("\n");
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244 | DisasFunction("SetWriteDirtyAccessedClearAVL", (PFNRT)&SetWriteDirtyAccessedClearAVL);
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245 | RTPrintf("\n");
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246 | DisasFunction("SetWriteDirtyAccessedClearAVL64", (PFNRT)&SetWriteDirtyAccessedClearAVL64);
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247 | RTPrintf("\n");
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248 | DisasFunction("Test3232", (PFNRT)&Test3232);
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249 | DisasFunction("Test3264", (PFNRT)&Test3264);
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250 | DisasFunction("Test6432", (PFNRT)&Test6432);
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251 | DisasFunction("Test6464", (PFNRT)&Test6464);
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252 | RTPrintf("\n");
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253 | DisasFunction("Mix6432Consts", (PFNRT)&Mix6432Consts);
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254 | RTPrintf("\n");
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255 | DisasFunction("Mix32Var64Const64Data", (PFNRT)&Mix32Var64Const64Data);
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256 | RTPrintf("\n");
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257 | DisasFunction("Return32BitStruct", (PFNRT)&Return32BitStruct);
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258 | RTPrintf("\n");
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259 | DisasFunction("Return64BitStruct", (PFNRT)&Return64BitStruct);
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260 | return 0;
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261 | }
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262 |
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