VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PGMGstDefs.h@ 87766

Last change on this file since 87766 was 86477, checked in by vboxsync, 4 years ago

VMM/PGM: Use atomics when updating accessed and dirty flags from the Trap0e handler code, also take the PGM lock first to reduce races. bugref:9841 bugref:9746

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 13.2 KB
Line 
1/* $Id: PGMGstDefs.h 86477 2020-10-07 20:10:05Z vboxsync $ */
2/** @file
3 * VBox - Page Manager, Guest Paging Template - All context code.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Defined Constants And Macros *
21*******************************************************************************/
22#undef GSTUINT
23#undef GST_ATOMIC_OR
24#undef GSTPT
25#undef PGSTPT
26#undef GSTPTE
27#undef PGSTPTE
28#undef GSTPD
29#undef PGSTPD
30#undef GSTPDE
31#undef PGSTPDE
32#undef GSTPTWALK
33#undef PGSTPTWALK
34#undef PCGSTPTWALK
35#undef GST_BIG_PAGE_SIZE
36#undef GST_BIG_PAGE_OFFSET_MASK
37#undef GST_PDE_PG_MASK
38#undef GST_PDE_BIG_PG_MASK
39#undef GST_PD_SHIFT
40#undef GST_PD_MASK
41#undef GST_PTE_PG_MASK
42#undef GST_GET_PTE_SHW_FLAGS
43#undef GST_PT_SHIFT
44#undef GST_PT_MASK
45#undef GST_TOTAL_PD_ENTRIES
46#undef GST_CR3_PAGE_MASK
47#undef GST_PDPE_ENTRIES
48#undef GST_PDPT_SHIFT
49#undef GST_PDPT_MASK
50#undef GST_PDPE_PG_MASK
51#undef GST_GET_PTE_GCPHYS
52#undef GST_GET_PDE_GCPHYS
53#undef GST_GET_BIG_PDE_GCPHYS
54#undef GST_GET_PDE_SHW_FLAGS
55#undef GST_GET_BIG_PDE_SHW_FLAGS
56#undef GST_GET_BIG_PDE_SHW_FLAGS_4_PTE
57#undef GST_IS_PTE_VALID
58#undef GST_IS_PDE_VALID
59#undef GST_IS_BIG_PDE_VALID
60#undef GST_IS_PDPE_VALID
61#undef GST_IS_BIG_PDPE_VALID
62#undef GST_IS_PML4E_VALID
63#undef GST_IS_PSE_ACTIVE
64#undef GST_IS_NX_ACTIVE
65#undef BTH_IS_NP_ACTIVE
66
67#if PGM_GST_TYPE == PGM_TYPE_REAL \
68 || PGM_GST_TYPE == PGM_TYPE_PROT
69
70# if PGM_SHW_TYPE == PGM_TYPE_EPT
71# define GSTUINT uint64_t
72# define GST_ATOMIC_OR(a_pu, a_fFlags) ASMAtomicOrU64((a_pu), (a_fFlags))
73# define GSTPT X86PTPAE
74# define PGSTPT PX86PTPAE
75# define GSTPTE X86PTEPAE
76# define PGSTPTE PX86PTEPAE
77# define GSTPD X86PDPAE
78# define PGSTPD PX86PDPAE
79# define GSTPDE X86PDEPAE
80# define PGSTPDE PX86PDEPAE
81# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
82# define GST_IS_NX_ACTIVE(pVCpu) (true && This_should_perhaps_not_be_used_in_this_context)
83# define BTH_IS_NP_ACTIVE(pVM) (true)
84# else
85# if PGM_SHW_TYPE == PGM_TYPE_32BIT /* Same as shadow paging, but no PGMSHWPTEPAE. */
86# define GSTUINT uint32_t
87# define GST_ATOMIC_OR(a_pu, a_fFlags) ASMAtomicOrU32((a_pu), (a_fFlags))
88# define GSTPT X86PT
89# define PGSTPT PX86PT
90# define GSTPTE X86PTE
91# define PGSTPTE PX86PTE
92# define GSTPD X86PD
93# define PGSTPD PX86PD
94# define GSTPDE X86PDE
95# define PGSTPDE PX86PDE
96# define GST_PTE_PG_MASK X86_PTE_PG_MASK
97# else
98# define GSTUINT uint64_t
99# define GST_ATOMIC_OR(a_pu, a_fFlags) ASMAtomicOrU64((a_pu), (a_fFlags))
100# define GSTPT X86PTPAE
101# define PGSTPT PX86PTPAE
102# define GSTPTE X86PTEPAE
103# define PGSTPTE PX86PTEPAE
104# define GSTPD X86PDPAE
105# define PGSTPD PX86PDPAE
106# define GSTPDE X86PDEPAE
107# define PGSTPDE PX86PDEPAE
108# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
109# endif
110# define GST_IS_NX_ACTIVE(pVCpu) (pgmGstIsNoExecuteActive(pVCpu))
111# if PGM_GST_TYPE == PGM_TYPE_PROT /* (comment at top of PGMAllBth.h) */
112# define BTH_IS_NP_ACTIVE(pVM) (pVM->pgm.s.fNestedPaging)
113# else
114# define BTH_IS_NP_ACTIVE(pVM) (false)
115# endif
116# endif
117# define GST_GET_PTE_GCPHYS(Pte) PGM_A20_APPLY(pVCpu, ((Pte).u & GST_PTE_PG_MASK))
118# define GST_GET_PDE_GCPHYS(Pde) (true && This_should_perhaps_not_be_used_in_this_context) //??
119# define GST_GET_BIG_PDE_GCPHYS(Pde) (true && This_should_perhaps_not_be_used_in_this_context) //??
120# define GST_GET_PTE_SHW_FLAGS(pVCpu, Pte) ((Pte).u & (X86_PTE_P | X86_PTE_RW | X86_PTE_US | X86_PTE_A | X86_PTE_D | X86_PTE_G)) /**< @todo Could return P|RW|US|A|D here without consulting the PTE. */
121# define GST_GET_PDE_SHW_FLAGS(pVCpu, Pde) (true && This_should_perhaps_not_be_used_in_this_context) //??
122# define GST_GET_BIG_PDE_SHW_FLAGS(pVCpu, Pde) (true && This_should_perhaps_not_be_used_in_this_context) //??
123# define GST_GET_BIG_PDE_SHW_FLAGS_4_PTE(pVCpu, Pde) (true && This_should_perhaps_not_be_used_in_this_context) //??
124# define GST_IS_PTE_VALID(pVCpu, Pte) (true)
125# define GST_IS_PDE_VALID(pVCpu, Pde) (true)
126# define GST_IS_BIG_PDE_VALID(pVCpu, Pde) (true)
127# define GST_IS_PDPE_VALID(pVCpu, Pdpe) (true)
128# define GST_IS_BIG_PDPE_VALID(pVCpu, Pdpe) (true)
129# define GST_IS_PML4E_VALID(pVCpu, Pml4e) (true)
130# define GST_IS_PSE_ACTIVE(pVCpu) (false && This_should_not_be_used_in_this_context)
131
132#elif PGM_GST_TYPE == PGM_TYPE_32BIT
133# define GSTUINT uint32_t
134# define GST_ATOMIC_OR(a_pu, a_fFlags) ASMAtomicOrU32((a_pu), (a_fFlags))
135# define GSTPT X86PT
136# define PGSTPT PX86PT
137# define GSTPTE X86PTE
138# define PGSTPTE PX86PTE
139# define GSTPD X86PD
140# define PGSTPD PX86PD
141# define GSTPDE X86PDE
142# define PGSTPDE PX86PDE
143# define GSTPTWALK PGMPTWALKGST32BIT
144# define PGSTPTWALK PPGMPTWALKGST32BIT
145# define PCGSTPTWALK PCPGMPTWALKGST32BIT
146# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
147# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
148# define GST_PDE_PG_MASK X86_PDE_PG_MASK
149# define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
150# define GST_GET_PTE_GCPHYS(Pte) PGM_A20_APPLY(pVCpu, ((Pte).u & GST_PDE_PG_MASK))
151# define GST_GET_PDE_GCPHYS(Pde) PGM_A20_APPLY(pVCpu, ((Pde).u & GST_PDE_PG_MASK))
152# define GST_GET_BIG_PDE_GCPHYS(pVM, Pde) PGM_A20_APPLY(pVCpu, pgmGstGet4MBPhysPage((pVM), Pde))
153# define GST_GET_PDE_SHW_FLAGS(pVCpu, Pde) ((Pde).u & (X86_PDE_P | X86_PDE_RW | X86_PDE_US | X86_PDE_A))
154# define GST_GET_BIG_PDE_SHW_FLAGS(pVCpu, Pde) \
155 ( ((Pde).u & (X86_PDE4M_P | X86_PDE4M_RW | X86_PDE4M_US | X86_PDE4M_A)) | PGM_PDFLAGS_BIG_PAGE )
156# define GST_GET_BIG_PDE_SHW_FLAGS_4_PTE(pVCpu, Pde) \
157 ((Pde).u & (X86_PDE4M_P | X86_PDE4M_RW | X86_PDE4M_US | X86_PDE4M_A | X86_PDE4M_D | X86_PDE4M_G))
158# define GST_PD_SHIFT X86_PD_SHIFT
159# define GST_PD_MASK X86_PD_MASK
160# define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
161# define GST_PTE_PG_MASK X86_PTE_PG_MASK
162# define GST_GET_PTE_SHW_FLAGS(pVCpu, Pte) ((Pte).u & (X86_PTE_P | X86_PTE_RW | X86_PTE_US | X86_PTE_A | X86_PTE_D | X86_PTE_G))
163# define GST_PT_SHIFT X86_PT_SHIFT
164# define GST_PT_MASK X86_PT_MASK
165# define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
166# define GST_IS_PTE_VALID(pVCpu, Pte) (true)
167# define GST_IS_PDE_VALID(pVCpu, Pde) (true)
168# define GST_IS_BIG_PDE_VALID(pVCpu, Pde) (!( (Pde).u & (pVCpu)->pgm.s.fGst32BitMbzBigPdeMask ))
169//# define GST_IS_PDPE_VALID(pVCpu, Pdpe) (false)
170//# define GST_IS_BIG_PDPE_VALID(pVCpu, Pdpe) (false)
171//# define GST_IS_PML4E_VALID(pVCpu, Pml4e) (false)
172# define GST_IS_PSE_ACTIVE(pVCpu) pgmGst32BitIsPageSizeExtActive(pVCpu)
173# define GST_IS_NX_ACTIVE(pVCpu) (false)
174# define BTH_IS_NP_ACTIVE(pVM) (false)
175
176#elif PGM_GST_TYPE == PGM_TYPE_PAE \
177 || PGM_GST_TYPE == PGM_TYPE_AMD64
178# define GSTUINT uint64_t
179# define GST_ATOMIC_OR(a_pu, a_fFlags) ASMAtomicOrU64((a_pu), (a_fFlags))
180# define GSTPT X86PTPAE
181# define PGSTPT PX86PTPAE
182# define GSTPTE X86PTEPAE
183# define PGSTPTE PX86PTEPAE
184# define GSTPD X86PDPAE
185# define PGSTPD PX86PDPAE
186# define GSTPDE X86PDEPAE
187# define PGSTPDE PX86PDEPAE
188# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
189# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
190# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
191# define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
192# define GST_GET_PTE_GCPHYS(Pte) PGM_A20_APPLY(pVCpu, ((Pte).u & GST_PTE_PG_MASK))
193# define GST_GET_PDE_GCPHYS(Pde) PGM_A20_APPLY(pVCpu, ((Pde).u & GST_PDE_PG_MASK))
194# define GST_GET_BIG_PDE_GCPHYS(pVM, Pde) PGM_A20_APPLY(pVCpu, ((Pde).u & GST_PDE_BIG_PG_MASK))
195# define GST_GET_PTE_SHW_FLAGS(pVCpu, Pte) ((Pte).u & (pVCpu)->pgm.s.fGst64ShadowedPteMask )
196# define GST_GET_PDE_SHW_FLAGS(pVCpu, Pde) ((Pde).u & (pVCpu)->pgm.s.fGst64ShadowedPdeMask )
197# define GST_GET_BIG_PDE_SHW_FLAGS(pVCpu, Pde) ( ((Pde).u & (pVCpu)->pgm.s.fGst64ShadowedBigPdeMask ) | PGM_PDFLAGS_BIG_PAGE)
198# define GST_GET_BIG_PDE_SHW_FLAGS_4_PTE(pVCpu, Pde) ((Pde).u & (pVCpu)->pgm.s.fGst64ShadowedBigPde4PteMask )
199
200# define GST_PD_SHIFT X86_PD_PAE_SHIFT
201# define GST_PD_MASK X86_PD_PAE_MASK
202# if PGM_GST_TYPE == PGM_TYPE_PAE
203# define GSTPTWALK PGMPTWALKGSTPAE
204# define PGSTPTWALK PPGMPTWALKGSTPAE
205# define PCGSTPTWALK PCPGMPTWALKGSTPAE
206# define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
207# define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
208# define GST_PDPE_PG_MASK X86_PDPE_PG_MASK
209# define GST_PDPT_SHIFT X86_PDPT_SHIFT
210# define GST_PDPT_MASK X86_PDPT_MASK_PAE
211# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
212# define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
213# define GST_IS_PTE_VALID(pVCpu, Pte) (!( (Pte).u & (pVCpu)->pgm.s.fGstPaeMbzPteMask ))
214# define GST_IS_PDE_VALID(pVCpu, Pde) (!( (Pde).u & (pVCpu)->pgm.s.fGstPaeMbzPdeMask ))
215# define GST_IS_BIG_PDE_VALID(pVCpu, Pde) (!( (Pde).u & (pVCpu)->pgm.s.fGstPaeMbzBigPdeMask ))
216# define GST_IS_PDPE_VALID(pVCpu, Pdpe) (!( (Pdpe).u & (pVCpu)->pgm.s.fGstPaeMbzPdpeMask ))
217//# define GST_IS_BIG_PDPE_VALID(pVCpu, Pdpe) (false)
218//# define GST_IS_PML4E_VALID(pVCpu, Pml4e) (false)
219# else
220# define GSTPTWALK PGMPTWALKGSTAMD64
221# define PGSTPTWALK PPGMPTWALKGSTAMD64
222# define PCGSTPTWALK PCPGMPTWALKGSTAMD64
223# define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
224# define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
225# define GST_PDPT_SHIFT X86_PDPT_SHIFT
226# define GST_PDPE_PG_MASK X86_PDPE_PG_MASK
227# define GST_PDPT_MASK X86_PDPT_MASK_AMD64
228# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
229# define GST_CR3_PAGE_MASK X86_CR3_AMD64_PAGE_MASK
230# define GST_IS_PTE_VALID(pVCpu, Pte) (!( (Pte).u & (pVCpu)->pgm.s.fGstAmd64MbzPteMask ))
231# define GST_IS_PDE_VALID(pVCpu, Pde) (!( (Pde).u & (pVCpu)->pgm.s.fGstAmd64MbzPdeMask ))
232# define GST_IS_BIG_PDE_VALID(pVCpu, Pde) (!( (Pde).u & (pVCpu)->pgm.s.fGstAmd64MbzBigPdeMask ))
233# define GST_IS_PDPE_VALID(pVCpu, Pdpe) (!( (Pdpe).u & (pVCpu)->pgm.s.fGstAmd64MbzPdpeMask ))
234# define GST_IS_BIG_PDPE_VALID(pVCpu, Pdpe) (!( (Pdpe).u & (pVCpu)->pgm.s.fGstAmd64MbzBigPdpeMask ))
235# define GST_IS_PML4E_VALID(pVCpu, Pml4e) (!( (Pml4e).u & (pVCpu)->pgm.s.fGstAmd64MbzPml4eMask ))
236# endif
237# define GST_PT_SHIFT X86_PT_PAE_SHIFT
238# define GST_PT_MASK X86_PT_PAE_MASK
239# define GST_IS_PSE_ACTIVE(pVCpu) (true)
240# define GST_IS_NX_ACTIVE(pVCpu) (pgmGstIsNoExecuteActive(pVCpu))
241# define BTH_IS_NP_ACTIVE(pVM) (false)
242#endif
243
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette