VirtualBox

source: vbox/trunk/src/VBox/VMM/include/IOMInternal.h@ 90346

Last change on this file since 90346 was 90346, checked in by vboxsync, 3 years ago
  • VMM: Pass pVM to PDMCritSect APIs. bugref:9218 bugref:10074
  • DrvNetShaper: Do bandwidth allocation via PDMDrvHlp. bugref:10074
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 24.6 KB
Line 
1/* $Id: IOMInternal.h 90346 2021-07-26 19:55:53Z vboxsync $ */
2/** @file
3 * IOM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_IOMInternal_h
19#define VMM_INCLUDED_SRC_include_IOMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#define IOM_WITH_CRIT_SECT_RW
25
26#include <VBox/cdefs.h>
27#include <VBox/types.h>
28#include <VBox/vmm/iom.h>
29#include <VBox/vmm/stam.h>
30#include <VBox/vmm/pgm.h>
31#include <VBox/vmm/pdmcritsect.h>
32#ifdef IOM_WITH_CRIT_SECT_RW
33# include <VBox/vmm/pdmcritsectrw.h>
34#endif
35#include <VBox/param.h>
36#include <iprt/assert.h>
37#include <iprt/avl.h>
38
39
40
41/** @defgroup grp_iom_int Internals
42 * @ingroup grp_iom
43 * @internal
44 * @{
45 */
46
47/**
48 * I/O port lookup table entry.
49 */
50typedef struct IOMIOPORTLOOKUPENTRY
51{
52 /** The first port in the range. */
53 RTIOPORT uFirstPort;
54 /** The last port in the range (inclusive). */
55 RTIOPORT uLastPort;
56 /** The registration handle/index. */
57 uint16_t idx;
58} IOMIOPORTLOOKUPENTRY;
59/** Pointer to an I/O port lookup table entry. */
60typedef IOMIOPORTLOOKUPENTRY *PIOMIOPORTLOOKUPENTRY;
61/** Pointer to a const I/O port lookup table entry. */
62typedef IOMIOPORTLOOKUPENTRY const *PCIOMIOPORTLOOKUPENTRY;
63
64/**
65 * Ring-0 I/O port handle table entry.
66 */
67typedef struct IOMIOPORTENTRYR0
68{
69 /** Pointer to user argument. */
70 RTR0PTR pvUser;
71 /** Pointer to the associated device instance, NULL if entry not used. */
72 R0PTRTYPE(PPDMDEVINS) pDevIns;
73 /** Pointer to OUT callback function. */
74 R0PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
75 /** Pointer to IN callback function. */
76 R0PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
77 /** Pointer to string OUT callback function. */
78 R0PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
79 /** Pointer to string IN callback function. */
80 R0PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
81 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
82 uint16_t idxStats;
83 /** The number of ports covered by this entry, 0 if entry not used. */
84 RTIOPORT cPorts;
85 /** Same as the handle index. */
86 uint16_t idxSelf;
87 /** IOM_IOPORT_F_XXX (copied from ring-3). */
88 uint16_t fFlags;
89} IOMIOPORTENTRYR0;
90/** Pointer to a ring-0 I/O port handle table entry. */
91typedef IOMIOPORTENTRYR0 *PIOMIOPORTENTRYR0;
92/** Pointer to a const ring-0 I/O port handle table entry. */
93typedef IOMIOPORTENTRYR0 const *PCIOMIOPORTENTRYR0;
94
95/**
96 * Ring-3 I/O port handle table entry.
97 */
98typedef struct IOMIOPORTENTRYR3
99{
100 /** Pointer to user argument. */
101 RTR3PTR pvUser;
102 /** Pointer to the associated device instance. */
103 R3PTRTYPE(PPDMDEVINS) pDevIns;
104 /** Pointer to OUT callback function. */
105 R3PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
106 /** Pointer to IN callback function. */
107 R3PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
108 /** Pointer to string OUT callback function. */
109 R3PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
110 /** Pointer to string IN callback function. */
111 R3PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
112 /** Description / Name. For easing debugging. */
113 R3PTRTYPE(const char *) pszDesc;
114 /** Extended port description table, optional. */
115 R3PTRTYPE(PCIOMIOPORTDESC) paExtDescs;
116 /** PCI device the registration is associated with. */
117 R3PTRTYPE(PPDMPCIDEV) pPciDev;
118 /** The PCI device region (high 16-bit word) and subregion (low word),
119 * UINT32_MAX if not applicable. */
120 uint32_t iPciRegion;
121 /** The number of ports covered by this entry. */
122 RTIOPORT cPorts;
123 /** The current port mapping (duplicates lookup table). */
124 RTIOPORT uPort;
125 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
126 uint16_t idxStats;
127 /** Set if mapped, clear if not.
128 * Only updated when critsect is held exclusively. */
129 bool fMapped;
130 /** Set if there is an ring-0 entry too. */
131 bool fRing0;
132 /** Set if there is an raw-mode entry too. */
133 bool fRawMode;
134 /** IOM_IOPORT_F_XXX */
135 uint8_t fFlags;
136 /** Same as the handle index. */
137 uint16_t idxSelf;
138} IOMIOPORTENTRYR3;
139AssertCompileSize(IOMIOPORTENTRYR3, 9 * sizeof(RTR3PTR) + 16);
140/** Pointer to a ring-3 I/O port handle table entry. */
141typedef IOMIOPORTENTRYR3 *PIOMIOPORTENTRYR3;
142/** Pointer to a const ring-3 I/O port handle table entry. */
143typedef IOMIOPORTENTRYR3 const *PCIOMIOPORTENTRYR3;
144
145/**
146 * I/O port statistics entry (one I/O port).
147 */
148typedef struct IOMIOPORTSTATSENTRY
149{
150 /** All accesses (only updated for the first port in a range). */
151 STAMCOUNTER Total;
152
153 /** Number of INs to this port from R3. */
154 STAMCOUNTER InR3;
155 /** Profiling IN handler overhead in R3. */
156 STAMPROFILE ProfInR3;
157 /** Number of OUTs to this port from R3. */
158 STAMCOUNTER OutR3;
159 /** Profiling OUT handler overhead in R3. */
160 STAMPROFILE ProfOutR3;
161
162 /** Number of INs to this port from R0/RC. */
163 STAMCOUNTER InRZ;
164 /** Profiling IN handler overhead in R0/RC. */
165 STAMPROFILE ProfInRZ;
166 /** Number of INs to this port from R0/RC which was serviced in R3. */
167 STAMCOUNTER InRZToR3;
168
169 /** Number of OUTs to this port from R0/RC. */
170 STAMCOUNTER OutRZ;
171 /** Profiling OUT handler overhead in R0/RC. */
172 STAMPROFILE ProfOutRZ;
173 /** Number of OUTs to this port from R0/RC which was serviced in R3. */
174 STAMCOUNTER OutRZToR3;
175} IOMIOPORTSTATSENTRY;
176/** Pointer to I/O port statistics entry. */
177typedef IOMIOPORTSTATSENTRY *PIOMIOPORTSTATSENTRY;
178
179
180
181/**
182 * MMIO lookup table entry.
183 */
184typedef struct IOMMMIOLOOKUPENTRY
185{
186 /** The first port in the range. */
187 RTGCPHYS GCPhysFirst;
188 /** The last port in the range (inclusive). */
189 RTGCPHYS GCPhysLast;
190 /** The registration handle/index.
191 * @todo bake this into the lower/upper bits of GCPhysFirst & GCPhysLast. */
192 uint16_t idx;
193 uint16_t abPadding[3];
194} IOMMMIOLOOKUPENTRY;
195/** Pointer to an MMIO lookup table entry. */
196typedef IOMMMIOLOOKUPENTRY *PIOMMMIOLOOKUPENTRY;
197/** Pointer to a const MMIO lookup table entry. */
198typedef IOMMMIOLOOKUPENTRY const *PCIOMMMIOLOOKUPENTRY;
199
200/**
201 * Ring-0 MMIO handle table entry.
202 */
203typedef struct IOMMMIOENTRYR0
204{
205 /** The number of bytes covered by this entry, 0 if entry not used. */
206 RTGCPHYS cbRegion;
207 /** Pointer to user argument. */
208 RTR0PTR pvUser;
209 /** Pointer to the associated device instance, NULL if entry not used. */
210 R0PTRTYPE(PPDMDEVINS) pDevIns;
211 /** Pointer to the write callback function. */
212 R0PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
213 /** Pointer to the read callback function. */
214 R0PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
215 /** Pointer to the fill callback function. */
216 R0PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
217 /** The entry of the first statistics entry, UINT16_MAX if no stats.
218 * @note For simplicity, this is always copied from ring-3 for all entries at
219 * the end of VM creation. */
220 uint16_t idxStats;
221 /** Same as the handle index. */
222 uint16_t idxSelf;
223 /** IOM_MMIO_F_XXX (copied from ring-3). */
224 uint32_t fFlags;
225} IOMMMIOENTRYR0;
226/** Pointer to a ring-0 MMIO handle table entry. */
227typedef IOMMMIOENTRYR0 *PIOMMMIOENTRYR0;
228/** Pointer to a const ring-0 MMIO handle table entry. */
229typedef IOMMMIOENTRYR0 const *PCIOMMMIOENTRYR0;
230
231/**
232 * Ring-3 MMIO handle table entry.
233 */
234typedef struct IOMMMIOENTRYR3
235{
236 /** The number of bytes covered by this entry. */
237 RTGCPHYS cbRegion;
238 /** The current mapping address (duplicates lookup table).
239 * This is set to NIL_RTGCPHYS if not mapped (exclusive lock + atomic). */
240 RTGCPHYS volatile GCPhysMapping;
241 /** Pointer to user argument. */
242 RTR3PTR pvUser;
243 /** Pointer to the associated device instance. */
244 R3PTRTYPE(PPDMDEVINS) pDevIns;
245 /** Pointer to the write callback function. */
246 R3PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
247 /** Pointer to the read callback function. */
248 R3PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
249 /** Pointer to the fill callback function. */
250 R3PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
251 /** Description / Name. For easing debugging. */
252 R3PTRTYPE(const char *) pszDesc;
253 /** PCI device the registration is associated with. */
254 R3PTRTYPE(PPDMPCIDEV) pPciDev;
255 /** The PCI device region (high 16-bit word) and subregion (low word),
256 * UINT32_MAX if not applicable. */
257 uint32_t iPciRegion;
258 /** IOM_MMIO_F_XXX */
259 uint32_t fFlags;
260 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
261 uint16_t idxStats;
262 /** Set if mapped, clear if not.
263 * Only updated when critsect is held exclusively.
264 * @todo remove as GCPhysMapping != NIL_RTGCPHYS serves the same purpose. */
265 bool volatile fMapped;
266 /** Set if there is an ring-0 entry too. */
267 bool fRing0;
268 /** Set if there is an raw-mode entry too. */
269 bool fRawMode;
270 uint8_t bPadding;
271 /** Same as the handle index. */
272 uint16_t idxSelf;
273} IOMMMIOENTRYR3;
274AssertCompileSize(IOMMMIOENTRYR3, sizeof(RTGCPHYS) * 2 + 7 * sizeof(RTR3PTR) + 16);
275/** Pointer to a ring-3 MMIO handle table entry. */
276typedef IOMMMIOENTRYR3 *PIOMMMIOENTRYR3;
277/** Pointer to a const ring-3 MMIO handle table entry. */
278typedef IOMMMIOENTRYR3 const *PCIOMMMIOENTRYR3;
279
280/**
281 * MMIO statistics entry (one MMIO).
282 */
283typedef struct IOMMMIOSTATSENTRY
284{
285 /** Counting and profiling reads in R0/RC. */
286 STAMPROFILE ProfReadRZ;
287 /** Number of successful read accesses. */
288 STAMCOUNTER Reads;
289 /** Number of reads to this address from R0/RC which was serviced in R3. */
290 STAMCOUNTER ReadRZToR3;
291 /** Number of complicated reads. */
292 STAMCOUNTER ComplicatedReads;
293 /** Number of reads of 0xff or 0x00. */
294 STAMCOUNTER FFor00Reads;
295 /** Profiling read handler overhead in R3. */
296 STAMPROFILE ProfReadR3;
297
298 /** Counting and profiling writes in R0/RC. */
299 STAMPROFILE ProfWriteRZ;
300 /** Number of successful read accesses. */
301 STAMCOUNTER Writes;
302 /** Number of writes to this address from R0/RC which was serviced in R3. */
303 STAMCOUNTER WriteRZToR3;
304 /** Number of writes to this address from R0/RC which was committed in R3. */
305 STAMCOUNTER CommitRZToR3;
306 /** Number of complicated writes. */
307 STAMCOUNTER ComplicatedWrites;
308 /** Profiling write handler overhead in R3. */
309 STAMPROFILE ProfWriteR3;
310} IOMMMIOSTATSENTRY;
311/** Pointer to MMIO statistics entry. */
312typedef IOMMMIOSTATSENTRY *PIOMMMIOSTATSENTRY;
313
314
315/**
316 * IOM per virtual CPU instance data.
317 */
318typedef struct IOMCPU
319{
320 /**
321 * Pending I/O port write commit (VINF_IOM_R3_IOPORT_COMMIT_WRITE).
322 *
323 * This is a converted VINF_IOM_R3_IOPORT_WRITE handler return that lets the
324 * execution engine commit the instruction and then return to ring-3 to complete
325 * the I/O port write there. This avoids having to decode the instruction again
326 * in ring-3.
327 */
328 struct
329 {
330 /** The value size (0 if not pending). */
331 uint16_t cbValue;
332 /** The I/O port. */
333 RTIOPORT IOPort;
334 /** The value. */
335 uint32_t u32Value;
336 } PendingIOPortWrite;
337
338 /**
339 * Pending MMIO write commit (VINF_IOM_R3_MMIO_COMMIT_WRITE).
340 *
341 * This is a converted VINF_IOM_R3_MMIO_WRITE handler return that lets the
342 * execution engine commit the instruction, stop any more REPs, and return to
343 * ring-3 to complete the MMIO write there. The avoid the tedious decoding of
344 * the instruction again once we're in ring-3, more importantly it allows us to
345 * correctly deal with read-modify-write instructions like XCHG, OR, and XOR.
346 */
347 struct
348 {
349 /** Guest physical MMIO address. */
350 RTGCPHYS GCPhys;
351 /** The number of bytes to write (0 if nothing pending). */
352 uint32_t cbValue;
353 /** Hint. */
354 uint32_t idxMmioRegionHint;
355 /** The value to write. */
356 uint8_t abValue[128];
357 } PendingMmioWrite;
358
359 /** @name Caching of I/O Port and MMIO ranges and statistics.
360 * (Saves quite some time in rep outs/ins instruction emulation.)
361 * @{ */
362 /** I/O port registration index for the last read operation. */
363 uint16_t idxIoPortLastRead;
364 /** I/O port registration index for the last write operation. */
365 uint16_t idxIoPortLastWrite;
366 /** I/O port registration index for the last read string operation. */
367 uint16_t idxIoPortLastReadStr;
368 /** I/O port registration index for the last write string operation. */
369 uint16_t idxIoPortLastWriteStr;
370
371 /** MMIO port registration index for the last IOMR3MmioPhysHandler call.
372 * @note pretty static as only used by APIC on AMD-V. */
373 uint16_t idxMmioLastPhysHandler;
374 uint16_t au16Padding[3];
375 /** @} */
376} IOMCPU;
377/** Pointer to IOM per virtual CPU instance data. */
378typedef IOMCPU *PIOMCPU;
379
380
381/**
382 * IOM Data (part of VM)
383 */
384typedef struct IOM
385{
386 /** @name I/O ports
387 * @note The updating of these variables is done exclusively from EMT(0).
388 * @{ */
389 /** Number of I/O port registrations. */
390 uint32_t cIoPortRegs;
391 /** The size of the paIoPortRegs allocation (in entries). */
392 uint32_t cIoPortAlloc;
393 /** I/O port registration table for ring-3.
394 * There is a parallel table in ring-0, IOMR0PERVM::paIoPortRegs. */
395 R3PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRegs;
396 /** Number of entries in the lookup table. */
397 uint32_t cIoPortLookupEntries;
398 uint32_t u32Padding1;
399 /** I/O port lookup table. */
400 R3PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
401
402 /** The number of valid entries in paioPortStats. */
403 uint32_t cIoPortStats;
404 /** The size of the paIoPortStats allocation (in entries). */
405 uint32_t cIoPortStatsAllocation;
406 /** I/O port lookup table. */
407 R3PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
408 /** Dummy stats entry so we don't need to check for NULL pointers so much. */
409 IOMIOPORTSTATSENTRY IoPortDummyStats;
410 /** @} */
411
412 /** @name MMIO ports
413 * @note The updating of these variables is done exclusively from EMT(0).
414 * @{ */
415 /** MMIO physical access handler type, new style. */
416 PGMPHYSHANDLERTYPE hNewMmioHandlerType;
417 /** Number of MMIO registrations. */
418 uint32_t cMmioRegs;
419 /** The size of the paMmioRegs allocation (in entries). */
420 uint32_t cMmioAlloc;
421 /** MMIO registration table for ring-3.
422 * There is a parallel table in ring-0, IOMR0PERVM::paMmioRegs. */
423 R3PTRTYPE(PIOMMMIOENTRYR3) paMmioRegs;
424 /** Number of entries in the lookup table. */
425 uint32_t cMmioLookupEntries;
426 uint32_t u32Padding2;
427 /** MMIO lookup table. */
428 R3PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
429
430 /** The number of valid entries in paioPortStats. */
431 uint32_t cMmioStats;
432 /** The size of the paMmioStats allocation (in entries). */
433 uint32_t cMmioStatsAllocation;
434 /** MMIO lookup table. */
435 R3PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
436 /** Dummy stats entry so we don't need to check for NULL pointers so much. */
437 IOMMMIOSTATSENTRY MmioDummyStats;
438 /** @} */
439
440
441 /** Lock serializing EMT access to IOM. */
442#ifdef IOM_WITH_CRIT_SECT_RW
443 PDMCRITSECTRW CritSect;
444#else
445 PDMCRITSECT CritSect;
446#endif
447
448 /** @name I/O Port statistics.
449 * @{ */
450 STAMCOUNTER StatIoPortIn;
451 STAMCOUNTER StatIoPortOut;
452 STAMCOUNTER StatIoPortInS;
453 STAMCOUNTER StatIoPortOutS;
454 STAMCOUNTER StatIoPortCommits;
455 /** @} */
456
457 /** @name MMIO statistics.
458 * @{ */
459 STAMPROFILE StatMmioPfHandler;
460 STAMPROFILE StatMmioPhysHandler;
461 STAMCOUNTER StatMmioHandlerR3;
462 STAMCOUNTER StatMmioHandlerR0;
463 STAMCOUNTER StatMmioReadsR0ToR3;
464 STAMCOUNTER StatMmioWritesR0ToR3;
465 STAMCOUNTER StatMmioCommitsR0ToR3;
466 STAMCOUNTER StatMmioCommitsDirect;
467 STAMCOUNTER StatMmioCommitsPgm;
468 STAMCOUNTER StatMmioStaleMappings;
469 STAMCOUNTER StatMmioDevLockContentionR0;
470 /** @} */
471} IOM;
472/** Pointer to IOM instance data. */
473typedef IOM *PIOM;
474
475
476/**
477 * IOM data kept in the ring-0 GVM.
478 */
479typedef struct IOMR0PERVM
480{
481 /** @name I/O ports
482 * @{ */
483 /** The higest ring-0 I/O port registration plus one. */
484 uint32_t cIoPortMax;
485 /** The size of the paIoPortRegs allocation (in entries). */
486 uint32_t cIoPortAlloc;
487 /** I/O port registration table for ring-0.
488 * There is a parallel table for ring-3, paIoPortRing3Regs. */
489 R0PTRTYPE(PIOMIOPORTENTRYR0) paIoPortRegs;
490 /** I/O port lookup table. */
491 R0PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
492 /** I/O port registration table for ring-3.
493 * Also mapped to ring-3 as IOM::paIoPortRegs. */
494 R0PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRing3Regs;
495 /** Handle to the allocation backing both the ring-0 and ring-3 registration
496 * tables as well as the lookup table. */
497 RTR0MEMOBJ hIoPortMemObj;
498 /** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
499 RTR0MEMOBJ hIoPortMapObj;
500#ifdef VBOX_WITH_STATISTICS
501 /** The size of the paIoPortStats allocation (in entries). */
502 uint32_t cIoPortStatsAllocation;
503 /** Prevents paIoPortStats from growing, set by IOMR0IoPortSyncStatisticsIndices(). */
504 bool fIoPortStatsFrozen;
505 /** I/O port lookup table. */
506 R0PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
507 /** Handle to the allocation backing the I/O port statistics. */
508 RTR0MEMOBJ hIoPortStatsMemObj;
509 /** Handle to the ring-3 mapping of the I/O port statistics. */
510 RTR0MEMOBJ hIoPortStatsMapObj;
511#endif
512 /** @} */
513
514 /** @name MMIO
515 * @{ */
516 /** The higest ring-0 MMIO registration plus one. */
517 uint32_t cMmioMax;
518 /** The size of the paMmioRegs allocation (in entries). */
519 uint32_t cMmioAlloc;
520 /** MMIO registration table for ring-0.
521 * There is a parallel table for ring-3, paMmioRing3Regs. */
522 R0PTRTYPE(PIOMMMIOENTRYR0) paMmioRegs;
523 /** MMIO lookup table. */
524 R0PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
525 /** MMIO registration table for ring-3.
526 * Also mapped to ring-3 as IOM::paMmioRegs. */
527 R0PTRTYPE(PIOMMMIOENTRYR3) paMmioRing3Regs;
528 /** Handle to the allocation backing both the ring-0 and ring-3 registration
529 * tables as well as the lookup table. */
530 RTR0MEMOBJ hMmioMemObj;
531 /** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
532 RTR0MEMOBJ hMmioMapObj;
533#ifdef VBOX_WITH_STATISTICS
534 /** The size of the paMmioStats allocation (in entries). */
535 uint32_t cMmioStatsAllocation;
536 /* Prevents paMmioStats from growing, set by IOMR0MmioSyncStatisticsIndices(). */
537 bool fMmioStatsFrozen;
538 /** MMIO lookup table. */
539 R0PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
540 /** Handle to the allocation backing the MMIO statistics. */
541 RTR0MEMOBJ hMmioStatsMemObj;
542 /** Handle to the ring-3 mapping of the MMIO statistics. */
543 RTR0MEMOBJ hMmioStatsMapObj;
544#endif
545 /** @} */
546
547} IOMR0PERVM;
548
549
550RT_C_DECLS_BEGIN
551
552#ifdef IN_RING3
553DECLCALLBACK(void) iomR3IoPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
554void iomR3IoPortRegStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry);
555DECLCALLBACK(void) iomR3MmioInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
556void iomR3MmioRegStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry);
557VBOXSTRICTRC iomR3MmioCommitWorker(PVM pVM, PVMCPU pVCpu, PIOMMMIOENTRYR3 pRegEntry, RTGCPHYS offRegion); /* IOMAllMmioNew.cpp */
558#endif /* IN_RING3 */
559#ifdef IN_RING0
560void iomR0IoPortCleanupVM(PGVM pGVM);
561void iomR0IoPortInitPerVMData(PGVM pGVM);
562void iomR0MmioCleanupVM(PGVM pGVM);
563void iomR0MmioInitPerVMData(PGVM pGVM);
564#endif
565
566#ifndef IN_RING3
567DECLEXPORT(FNPGMRZPHYSPFHANDLER) iomMmioPfHandlerNew;
568#endif
569PGM_ALL_CB2_PROTO(FNPGMPHYSHANDLER) iomMmioHandlerNew;
570
571/* IOM locking helpers. */
572#ifdef IOM_WITH_CRIT_SECT_RW
573# define IOM_LOCK_EXCL(a_pVM) PDMCritSectRwEnterExcl(&(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
574# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectRwLeaveExcl(&(a_pVM)->iom.s.CritSect); } while (0)
575# if 0 /* (in case needed for debugging) */
576# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterExcl(&(a_pVM)->iom.s.CritSect, (a_rcBusy))
577# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveExcl(&(a_pVM)->iom.s.CritSect); } while (0)
578# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner(&(a_pVM)->iom.s.CritSect)
579# else
580# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterShared(&(a_pVM)->iom.s.CritSect, (a_rcBusy))
581# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveShared(&(a_pVM)->iom.s.CritSect); } while (0)
582# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsReadOwner(&(a_pVM)->iom.s.CritSect, true)
583# endif
584# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner(&(a_pVM)->iom.s.CritSect)
585#else
586# define IOM_LOCK_EXCL(a_pVM) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
587# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
588# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, (a_rcBusy))
589# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
590# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
591# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
592#endif
593#define IOM_LOCK_SHARED(a_pVM) IOM_LOCK_SHARED_EX(a_pVM, VERR_SEM_BUSY)
594
595
596RT_C_DECLS_END
597
598
599#ifdef IN_RING3
600
601#endif
602
603/** @} */
604
605#endif /* !VMM_INCLUDED_SRC_include_IOMInternal_h */
606
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