IOMInternal.h@ 104821

Last change on this file since 104821 was 103152, checked in by vboxsync, 9 months ago
VMM/IOM: Enable I/O port info handlers for the ARMv8 target because it is actually used for PCI devices, bugref:10383
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 25.5 KB

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1	/* $Id: IOMInternal.h 103152 2024-01-31 15:43:28Z vboxsync $ */
2	/** @file
3	* IOM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	#ifndef VMM_INCLUDED_SRC_include_IOMInternal_h
29	#define VMM_INCLUDED_SRC_include_IOMInternal_h
30	#ifndef RT_WITHOUT_PRAGMA_ONCE
31	# pragma once
32	#endif
33
34	#define IOM_WITH_CRIT_SECT_RW
35
36	#include <VBox/cdefs.h>
37	#include <VBox/types.h>
38	#include <VBox/vmm/iom.h>
39	#include <VBox/vmm/stam.h>
40	#include <VBox/vmm/pgm.h>
41	#include <VBox/vmm/pdmcritsect.h>
42	#ifdef IOM_WITH_CRIT_SECT_RW
43	# include <VBox/vmm/pdmcritsectrw.h>
44	#endif
45	#include <VBox/param.h>
46	#include <iprt/assert.h>
47	#include <iprt/avl.h>
48
49
50
51	/** @defgroup grp_iom_int Internals
52	* @ingroup grp_iom
53	* @internal
54	* @{
55	*/
56
57	/**
58	* I/O port lookup table entry.
59	*/
60	typedef struct IOMIOPORTLOOKUPENTRY
61	{
62	/** The first port in the range. */
63	RTIOPORT uFirstPort;
64	/** The last port in the range (inclusive). */
65	RTIOPORT uLastPort;
66	/** The registration handle/index. */
67	uint16_t idx;
68	} IOMIOPORTLOOKUPENTRY;
69	/** Pointer to an I/O port lookup table entry. */
70	typedef IOMIOPORTLOOKUPENTRY *PIOMIOPORTLOOKUPENTRY;
71	/** Pointer to a const I/O port lookup table entry. */
72	typedef IOMIOPORTLOOKUPENTRY const *PCIOMIOPORTLOOKUPENTRY;
73
74	/**
75	* Ring-0 I/O port handle table entry.
76	*/
77	typedef struct IOMIOPORTENTRYR0
78	{
79	/** Pointer to user argument. */
80	RTR0PTR pvUser;
81	/** Pointer to the associated device instance, NULL if entry not used. */
82	R0PTRTYPE(PPDMDEVINS) pDevIns;
83	/** Pointer to OUT callback function. */
84	R0PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
85	/** Pointer to IN callback function. */
86	R0PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
87	/** Pointer to string OUT callback function. */
88	R0PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
89	/** Pointer to string IN callback function. */
90	R0PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
91	/** The entry of the first statistics entry, UINT16_MAX if no stats. */
92	uint16_t idxStats;
93	/** The number of ports covered by this entry, 0 if entry not used. */
94	RTIOPORT cPorts;
95	/** Same as the handle index. */
96	uint16_t idxSelf;
97	/** IOM_IOPORT_F_XXX (copied from ring-3). */
98	uint16_t fFlags;
99	} IOMIOPORTENTRYR0;
100	/** Pointer to a ring-0 I/O port handle table entry. */
101	typedef IOMIOPORTENTRYR0 *PIOMIOPORTENTRYR0;
102	/** Pointer to a const ring-0 I/O port handle table entry. */
103	typedef IOMIOPORTENTRYR0 const *PCIOMIOPORTENTRYR0;
104
105	/**
106	* Ring-3 I/O port handle table entry.
107	*/
108	typedef struct IOMIOPORTENTRYR3
109	{
110	/** Pointer to user argument. */
111	RTR3PTR pvUser;
112	/** Pointer to the associated device instance. */
113	R3PTRTYPE(PPDMDEVINS) pDevIns;
114	/** Pointer to OUT callback function. */
115	R3PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
116	/** Pointer to IN callback function. */
117	R3PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
118	/** Pointer to string OUT callback function. */
119	R3PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
120	/** Pointer to string IN callback function. */
121	R3PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
122	/** Description / Name. For easing debugging. */
123	R3PTRTYPE(const char *) pszDesc;
124	/** Extended port description table, optional. */
125	R3PTRTYPE(PCIOMIOPORTDESC) paExtDescs;
126	/** PCI device the registration is associated with. */
127	R3PTRTYPE(PPDMPCIDEV) pPciDev;
128	/** The PCI device region (high 16-bit word) and subregion (low word),
129	* UINT32_MAX if not applicable. */
130	uint32_t iPciRegion;
131	/** The number of ports covered by this entry. */
132	RTIOPORT cPorts;
133	/** The current port mapping (duplicates lookup table). */
134	RTIOPORT uPort;
135	/** The entry of the first statistics entry, UINT16_MAX if no stats. */
136	uint16_t idxStats;
137	/** Set if mapped, clear if not.
138	* Only updated when critsect is held exclusively. */
139	bool fMapped;
140	/** Set if there is an ring-0 entry too. */
141	bool fRing0;
142	/** Set if there is an raw-mode entry too. */
143	bool fRawMode;
144	/** IOM_IOPORT_F_XXX */
145	uint8_t fFlags;
146	/** Same as the handle index. */
147	uint16_t idxSelf;
148	} IOMIOPORTENTRYR3;
149	AssertCompileSize(IOMIOPORTENTRYR3, 9 * sizeof(RTR3PTR) + 16);
150	/** Pointer to a ring-3 I/O port handle table entry. */
151	typedef IOMIOPORTENTRYR3 *PIOMIOPORTENTRYR3;
152	/** Pointer to a const ring-3 I/O port handle table entry. */
153	typedef IOMIOPORTENTRYR3 const *PCIOMIOPORTENTRYR3;
154
155	/**
156	* I/O port statistics entry (one I/O port).
157	*/
158	typedef struct IOMIOPORTSTATSENTRY
159	{
160	/** All accesses (only updated for the first port in a range). */
161	STAMCOUNTER Total;
162
163	/** Number of INs to this port from R3. */
164	STAMCOUNTER InR3;
165	/** Profiling IN handler overhead in R3. */
166	STAMPROFILE ProfInR3;
167	/** Number of OUTs to this port from R3. */
168	STAMCOUNTER OutR3;
169	/** Profiling OUT handler overhead in R3. */
170	STAMPROFILE ProfOutR3;
171
172	/** Number of INs to this port from R0/RC. */
173	STAMCOUNTER InRZ;
174	/** Profiling IN handler overhead in R0/RC. */
175	STAMPROFILE ProfInRZ;
176	/** Number of INs to this port from R0/RC which was serviced in R3. */
177	STAMCOUNTER InRZToR3;
178
179	/** Number of OUTs to this port from R0/RC. */
180	STAMCOUNTER OutRZ;
181	/** Profiling OUT handler overhead in R0/RC. */
182	STAMPROFILE ProfOutRZ;
183	/** Number of OUTs to this port from R0/RC which was serviced in R3. */
184	STAMCOUNTER OutRZToR3;
185	} IOMIOPORTSTATSENTRY;
186	/** Pointer to I/O port statistics entry. */
187	typedef IOMIOPORTSTATSENTRY *PIOMIOPORTSTATSENTRY;
188
189
190
191	/**
192	* MMIO lookup table entry.
193	*/
194	typedef struct IOMMMIOLOOKUPENTRY
195	{
196	/** The first port in the range. */
197	RTGCPHYS GCPhysFirst;
198	/** The last port in the range (inclusive). */
199	RTGCPHYS GCPhysLast;
200	/** The registration handle/index.
201	* @todo bake this into the lower/upper bits of GCPhysFirst & GCPhysLast. */
202	uint16_t idx;
203	uint16_t abPadding[3];
204	} IOMMMIOLOOKUPENTRY;
205	/** Pointer to an MMIO lookup table entry. */
206	typedef IOMMMIOLOOKUPENTRY *PIOMMMIOLOOKUPENTRY;
207	/** Pointer to a const MMIO lookup table entry. */
208	typedef IOMMMIOLOOKUPENTRY const *PCIOMMMIOLOOKUPENTRY;
209
210	/**
211	* Ring-0 MMIO handle table entry.
212	*/
213	typedef struct IOMMMIOENTRYR0
214	{
215	/** The number of bytes covered by this entry, 0 if entry not used. */
216	RTGCPHYS cbRegion;
217	/** Pointer to user argument. */
218	RTR0PTR pvUser;
219	/** Pointer to the associated device instance, NULL if entry not used. */
220	R0PTRTYPE(PPDMDEVINS) pDevIns;
221	/** Pointer to the write callback function. */
222	R0PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
223	/** Pointer to the read callback function. */
224	R0PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
225	/** Pointer to the fill callback function. */
226	R0PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
227	/** The entry of the first statistics entry, UINT16_MAX if no stats.
228	* @note For simplicity, this is always copied from ring-3 for all entries at
229	* the end of VM creation. */
230	uint16_t idxStats;
231	/** Same as the handle index. */
232	uint16_t idxSelf;
233	/** IOM_MMIO_F_XXX (copied from ring-3). */
234	uint32_t fFlags;
235	} IOMMMIOENTRYR0;
236	/** Pointer to a ring-0 MMIO handle table entry. */
237	typedef IOMMMIOENTRYR0 *PIOMMMIOENTRYR0;
238	/** Pointer to a const ring-0 MMIO handle table entry. */
239	typedef IOMMMIOENTRYR0 const *PCIOMMMIOENTRYR0;
240
241	/**
242	* Ring-3 MMIO handle table entry.
243	*/
244	typedef struct IOMMMIOENTRYR3
245	{
246	/** The number of bytes covered by this entry. */
247	RTGCPHYS cbRegion;
248	/** The current mapping address (duplicates lookup table).
249	* This is set to NIL_RTGCPHYS if not mapped (exclusive lock + atomic). */
250	RTGCPHYS volatile GCPhysMapping;
251	/** Pointer to user argument. */
252	RTR3PTR pvUser;
253	/** Pointer to the associated device instance. */
254	R3PTRTYPE(PPDMDEVINS) pDevIns;
255	/** Pointer to the write callback function. */
256	R3PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
257	/** Pointer to the read callback function. */
258	R3PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
259	/** Pointer to the fill callback function. */
260	R3PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
261	/** Description / Name. For easing debugging. */
262	R3PTRTYPE(const char *) pszDesc;
263	/** PCI device the registration is associated with. */
264	R3PTRTYPE(PPDMPCIDEV) pPciDev;
265	/** The PCI device region (high 16-bit word) and subregion (low word),
266	* UINT32_MAX if not applicable. */
267	uint32_t iPciRegion;
268	/** IOM_MMIO_F_XXX */
269	uint32_t fFlags;
270	/** The entry of the first statistics entry, UINT16_MAX if no stats. */
271	uint16_t idxStats;
272	/** Set if mapped, clear if not.
273	* Only updated when critsect is held exclusively.
274	* @todo remove as GCPhysMapping != NIL_RTGCPHYS serves the same purpose. */
275	bool volatile fMapped;
276	/** Set if there is an ring-0 entry too. */
277	bool fRing0;
278	/** Set if there is an raw-mode entry too. */
279	bool fRawMode;
280	uint8_t bPadding;
281	/** Same as the handle index. */
282	uint16_t idxSelf;
283	} IOMMMIOENTRYR3;
284	AssertCompileSize(IOMMMIOENTRYR3, sizeof(RTGCPHYS) * 2 + 7 * sizeof(RTR3PTR) + 16);
285	/** Pointer to a ring-3 MMIO handle table entry. */
286	typedef IOMMMIOENTRYR3 *PIOMMMIOENTRYR3;
287	/** Pointer to a const ring-3 MMIO handle table entry. */
288	typedef IOMMMIOENTRYR3 const *PCIOMMMIOENTRYR3;
289
290	/**
291	* MMIO statistics entry (one MMIO).
292	*/
293	typedef struct IOMMMIOSTATSENTRY
294	{
295	/** Counting and profiling reads in R0/RC. */
296	STAMPROFILE ProfReadRZ;
297	/** Number of successful read accesses. */
298	STAMCOUNTER Reads;
299	/** Number of reads to this address from R0/RC which was serviced in R3. */
300	STAMCOUNTER ReadRZToR3;
301	/** Number of complicated reads. */
302	STAMCOUNTER ComplicatedReads;
303	/** Number of reads of 0xff or 0x00. */
304	STAMCOUNTER FFor00Reads;
305	/** Profiling read handler overhead in R3. */
306	STAMPROFILE ProfReadR3;
307
308	/** Counting and profiling writes in R0/RC. */
309	STAMPROFILE ProfWriteRZ;
310	/** Number of successful read accesses. */
311	STAMCOUNTER Writes;
312	/** Number of writes to this address from R0/RC which was serviced in R3. */
313	STAMCOUNTER WriteRZToR3;
314	/** Number of writes to this address from R0/RC which was committed in R3. */
315	STAMCOUNTER CommitRZToR3;
316	/** Number of complicated writes. */
317	STAMCOUNTER ComplicatedWrites;
318	/** Profiling write handler overhead in R3. */
319	STAMPROFILE ProfWriteR3;
320	} IOMMMIOSTATSENTRY;
321	/** Pointer to MMIO statistics entry. */
322	typedef IOMMMIOSTATSENTRY *PIOMMMIOSTATSENTRY;
323
324
325	/**
326	* IOM per virtual CPU instance data.
327	*/
328	typedef struct IOMCPU
329	{
330	/**
331	* Pending I/O port write commit (VINF_IOM_R3_IOPORT_COMMIT_WRITE).
332	*
333	* This is a converted VINF_IOM_R3_IOPORT_WRITE handler return that lets the
334	* execution engine commit the instruction and then return to ring-3 to complete
335	* the I/O port write there. This avoids having to decode the instruction again
336	* in ring-3.
337	*/
338	struct
339	{
340	/** The value size (0 if not pending). */
341	uint16_t cbValue;
342	/** The I/O port. */
343	RTIOPORT IOPort;
344	/** The value. */
345	uint32_t u32Value;
346	} PendingIOPortWrite;
347
348	/**
349	* Pending MMIO write commit (VINF_IOM_R3_MMIO_COMMIT_WRITE).
350	*
351	* This is a converted VINF_IOM_R3_MMIO_WRITE handler return that lets the
352	* execution engine commit the instruction, stop any more REPs, and return to
353	* ring-3 to complete the MMIO write there. The avoid the tedious decoding of
354	* the instruction again once we're in ring-3, more importantly it allows us to
355	* correctly deal with read-modify-write instructions like XCHG, OR, and XOR.
356	*/
357	struct
358	{
359	/** Guest physical MMIO address. */
360	RTGCPHYS GCPhys;
361	/** The number of bytes to write (0 if nothing pending). */
362	uint32_t cbValue;
363	/** Hint. */
364	uint32_t idxMmioRegionHint;
365	/** The value to write. */
366	uint8_t abValue[128];
367	} PendingMmioWrite;
368
369	/** @name Caching of I/O Port and MMIO ranges and statistics.
370	* (Saves quite some time in rep outs/ins instruction emulation.)
371	* @{ */
372	/** I/O port registration index for the last read operation. */
373	uint16_t idxIoPortLastRead;
374	/** I/O port registration index for the last write operation. */
375	uint16_t idxIoPortLastWrite;
376	/** I/O port registration index for the last read string operation. */
377	uint16_t idxIoPortLastReadStr;
378	/** I/O port registration index for the last write string operation. */
379	uint16_t idxIoPortLastWriteStr;
380
381	/** MMIO port registration index for the last IOMR3MmioPhysHandler call.
382	* @note pretty static as only used by APIC on AMD-V. */
383	uint16_t idxMmioLastPhysHandler;
384	uint16_t au16Padding[2];
385	/** @} */
386
387	/** MMIO recursion guard (see @bugref{10315}). */
388	uint8_t cMmioRecursionDepth;
389	uint8_t bPadding;
390	/** The MMIO recursion stack (ring-3 version). */
391	PPDMDEVINSR3 apMmioRecursionStack[2];
392	} IOMCPU;
393	/** Pointer to IOM per virtual CPU instance data. */
394	typedef IOMCPU *PIOMCPU;
395
396
397	/**
398	* IOM Data (part of VM)
399	*/
400	typedef struct IOM
401	{
402	/** Lock serializing EMT access to IOM. */
403	#ifdef IOM_WITH_CRIT_SECT_RW
404	PDMCRITSECTRW CritSect;
405	#else
406	PDMCRITSECT CritSect;
407	#endif
408
409	/** @name I/O ports
410	* @note The updating of these variables is done exclusively from EMT(0).
411	* @{ */
412	/** Number of I/O port registrations. */
413	uint32_t cIoPortRegs;
414	/** The size of the paIoPortRegs allocation (in entries). */
415	uint32_t cIoPortAlloc;
416	/** I/O port registration table for ring-3.
417	* There is a parallel table in ring-0, IOMR0PERVM::paIoPortRegs. */
418	R3PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRegs;
419	/** I/O port lookup table. */
420	R3PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
421	/** Number of entries in the lookup table. */
422	uint32_t cIoPortLookupEntries;
423	/** Set if I/O port registrations are frozen. */
424	bool fIoPortsFrozen;
425	bool afPadding1[3];
426
427	/** The number of valid entries in paioPortStats. */
428	uint32_t cIoPortStats;
429	/** The size of the paIoPortStats allocation (in entries). */
430	uint32_t cIoPortStatsAllocation;
431	/** I/O port lookup table. */
432	R3PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
433	/** Dummy stats entry so we don't need to check for NULL pointers so much. */
434	IOMIOPORTSTATSENTRY IoPortDummyStats;
435	/** @} */
436
437	/** @name MMIO ports
438	* @note The updating of these variables is done exclusively from EMT(0).
439	* @{ */
440	/** MMIO physical access handler type, new style. */
441	PGMPHYSHANDLERTYPE hNewMmioHandlerType;
442	/** Number of MMIO registrations. */
443	uint32_t cMmioRegs;
444	/** The size of the paMmioRegs allocation (in entries). */
445	uint32_t cMmioAlloc;
446	/** MMIO registration table for ring-3.
447	* There is a parallel table in ring-0, IOMR0PERVM::paMmioRegs. */
448	R3PTRTYPE(PIOMMMIOENTRYR3) paMmioRegs;
449	/** MMIO lookup table. */
450	R3PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
451	/** Number of entries in the lookup table. */
452	uint32_t cMmioLookupEntries;
453	/** Set if MMIO registrations are frozen. */
454	bool fMmioFrozen;
455	bool afPadding2[3];
456
457	/** The number of valid entries in paioPortStats. */
458	uint32_t cMmioStats;
459	/** The size of the paMmioStats allocation (in entries). */
460	uint32_t cMmioStatsAllocation;
461	/** MMIO lookup table. */
462	R3PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
463	/** Dummy stats entry so we don't need to check for NULL pointers so much. */
464	IOMMMIOSTATSENTRY MmioDummyStats;
465	/** @} */
466
467	/** @name I/O Port statistics.
468	* @{ */
469	STAMCOUNTER StatIoPortIn;
470	STAMCOUNTER StatIoPortOut;
471	STAMCOUNTER StatIoPortInS;
472	STAMCOUNTER StatIoPortOutS;
473	STAMCOUNTER StatIoPortCommits;
474	/** @} */
475
476	/** @name MMIO statistics.
477	* @{ */
478	STAMPROFILE StatMmioPfHandler;
479	STAMPROFILE StatMmioPhysHandler;
480	STAMCOUNTER StatMmioHandlerR3;
481	STAMCOUNTER StatMmioHandlerR0;
482	STAMCOUNTER StatMmioReadsR0ToR3;
483	STAMCOUNTER StatMmioWritesR0ToR3;
484	STAMCOUNTER StatMmioCommitsR0ToR3;
485	STAMCOUNTER StatMmioCommitsDirect;
486	STAMCOUNTER StatMmioCommitsPgm;
487	STAMCOUNTER StatMmioStaleMappings;
488	STAMCOUNTER StatMmioDevLockContentionR0;
489	STAMCOUNTER StatMmioTooDeepRecursion;
490	/** @} */
491	} IOM;
492	#ifdef IOM_WITH_CRIT_SECT_RW
493	AssertCompileMemberAlignment(IOM, CritSect, 64);
494	#endif
495	/** Pointer to IOM instance data. */
496	typedef IOM *PIOM;
497
498
499	/**
500	* IOM data kept in the ring-0 GVM.
501	*/
502	typedef struct IOMR0PERVM
503	{
504	/** @name I/O ports
505	* @{ */
506	/** The higest ring-0 I/O port registration plus one. */
507	uint32_t cIoPortMax;
508	/** The size of the paIoPortRegs allocation (in entries). */
509	uint32_t cIoPortAlloc;
510	/** I/O port registration table for ring-0.
511	* There is a parallel table for ring-3, paIoPortRing3Regs. */
512	R0PTRTYPE(PIOMIOPORTENTRYR0) paIoPortRegs;
513	/** I/O port lookup table. */
514	R0PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
515	/** I/O port registration table for ring-3.
516	* Also mapped to ring-3 as IOM::paIoPortRegs. */
517	R0PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRing3Regs;
518	/** Handle to the allocation backing both the ring-0 and ring-3 registration
519	* tables as well as the lookup table. */
520	RTR0MEMOBJ hIoPortMemObj;
521	/** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
522	RTR0MEMOBJ hIoPortMapObj;
523	#ifdef VBOX_WITH_STATISTICS
524	/** The size of the paIoPortStats allocation (in entries). */
525	uint32_t cIoPortStatsAllocation;
526	/** Prevents paIoPortStats from growing, set by IOMR0IoPortSyncStatisticsIndices(). */
527	bool fIoPortStatsFrozen;
528	/** I/O port lookup table. */
529	R0PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
530	/** Handle to the allocation backing the I/O port statistics. */
531	RTR0MEMOBJ hIoPortStatsMemObj;
532	/** Handle to the ring-3 mapping of the I/O port statistics. */
533	RTR0MEMOBJ hIoPortStatsMapObj;
534	#endif
535	/** @} */
536
537	/** @name MMIO
538	* @{ */
539	/** The higest ring-0 MMIO registration plus one. */
540	uint32_t cMmioMax;
541	/** The size of the paMmioRegs allocation (in entries). */
542	uint32_t cMmioAlloc;
543	/** MMIO registration table for ring-0.
544	* There is a parallel table for ring-3, paMmioRing3Regs. */
545	R0PTRTYPE(PIOMMMIOENTRYR0) paMmioRegs;
546	/** MMIO lookup table. */
547	R0PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
548	/** MMIO registration table for ring-3.
549	* Also mapped to ring-3 as IOM::paMmioRegs. */
550	R0PTRTYPE(PIOMMMIOENTRYR3) paMmioRing3Regs;
551	/** Handle to the allocation backing both the ring-0 and ring-3 registration
552	* tables as well as the lookup table. */
553	RTR0MEMOBJ hMmioMemObj;
554	/** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
555	RTR0MEMOBJ hMmioMapObj;
556	#ifdef VBOX_WITH_STATISTICS
557	/** The size of the paMmioStats allocation (in entries). */
558	uint32_t cMmioStatsAllocation;
559	/* Prevents paMmioStats from growing, set by IOMR0MmioSyncStatisticsIndices(). */
560	bool fMmioStatsFrozen;
561	/** MMIO lookup table. */
562	R0PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
563	/** Handle to the allocation backing the MMIO statistics. */
564	RTR0MEMOBJ hMmioStatsMemObj;
565	/** Handle to the ring-3 mapping of the MMIO statistics. */
566	RTR0MEMOBJ hMmioStatsMapObj;
567	#endif
568	/** @} */
569
570	} IOMR0PERVM;
571
572
573	RT_C_DECLS_BEGIN
574
575	#ifdef IN_RING3
576	DECLCALLBACK(void) iomR3IoPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
577	void iomR3IoPortRegStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry);
578	DECLCALLBACK(void) iomR3MmioInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
579	void iomR3MmioRegStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry);
580	VBOXSTRICTRC iomR3MmioCommitWorker(PVM pVM, PVMCPU pVCpu, PIOMMMIOENTRYR3 pRegEntry, RTGCPHYS offRegion); /* IOMAllMmioNew.cpp */
581	#endif /* IN_RING3 */
582	#ifdef IN_RING0
583	void iomR0IoPortCleanupVM(PGVM pGVM);
584	void iomR0IoPortInitPerVMData(PGVM pGVM);
585	void iomR0MmioCleanupVM(PGVM pGVM);
586	void iomR0MmioInitPerVMData(PGVM pGVM);
587	#endif
588
589	#ifndef IN_RING3
590	DECLCALLBACK(FNPGMRZPHYSPFHANDLER) iomMmioPfHandlerNew;
591	#endif
592	DECLCALLBACK(FNPGMPHYSHANDLER) iomMmioHandlerNew;
593
594	/* IOM locking helpers. */
595	#ifdef IOM_WITH_CRIT_SECT_RW
596	# define IOM_LOCK_EXCL(a_pVM) PDMCritSectRwEnterExcl((a_pVM), &(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
597	# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectRwLeaveExcl((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
598	# if 0 /* (in case needed for debugging) */
599	# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterExcl(&(a_pVM)->iom.s.CritSect, (a_rcBusy))
600	# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveExcl(&(a_pVM)->iom.s.CritSect); } while (0)
601	# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner(&(a_pVM)->iom.s.CritSect)
602	# else
603	# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterShared((a_pVM), &(a_pVM)->iom.s.CritSect, (a_rcBusy))
604	# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveShared((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
605	# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsReadOwner((a_pVM), &(a_pVM)->iom.s.CritSect, true)
606	# endif
607	# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
608	#else
609	# define IOM_LOCK_EXCL(a_pVM) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
610	# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
611	# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, (a_rcBusy))
612	# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
613	# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
614	# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
615	#endif
616	#define IOM_LOCK_SHARED(a_pVM) IOM_LOCK_SHARED_EX(a_pVM, VERR_SEM_BUSY)
617
618
619	RT_C_DECLS_END
620
621
622	#ifdef IN_RING3
623
624	#endif
625
626	/** @} */
627
628	#endif /* !VMM_INCLUDED_SRC_include_IOMInternal_h */
629

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source: vbox/trunk/src/VBox/VMM/include/IOMInternal.h@ 104821

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