VirtualBox

source: vbox/trunk/src/VBox/VMM/include/IOMInternal.h@ 93718

Last change on this file since 93718 was 93650, checked in by vboxsync, 3 years ago

VMM/PGM,*: Split the physical access handler type registration into separate ring-0 and ring-3 steps, expanding the type to 64-bit. bugref:10094

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File size: 24.9 KB
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1/* $Id: IOMInternal.h 93650 2022-02-08 10:43:53Z vboxsync $ */
2/** @file
3 * IOM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_IOMInternal_h
19#define VMM_INCLUDED_SRC_include_IOMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#define IOM_WITH_CRIT_SECT_RW
25
26#include <VBox/cdefs.h>
27#include <VBox/types.h>
28#include <VBox/vmm/iom.h>
29#include <VBox/vmm/stam.h>
30#include <VBox/vmm/pgm.h>
31#include <VBox/vmm/pdmcritsect.h>
32#ifdef IOM_WITH_CRIT_SECT_RW
33# include <VBox/vmm/pdmcritsectrw.h>
34#endif
35#include <VBox/param.h>
36#include <iprt/assert.h>
37#include <iprt/avl.h>
38
39
40
41/** @defgroup grp_iom_int Internals
42 * @ingroup grp_iom
43 * @internal
44 * @{
45 */
46
47/**
48 * I/O port lookup table entry.
49 */
50typedef struct IOMIOPORTLOOKUPENTRY
51{
52 /** The first port in the range. */
53 RTIOPORT uFirstPort;
54 /** The last port in the range (inclusive). */
55 RTIOPORT uLastPort;
56 /** The registration handle/index. */
57 uint16_t idx;
58} IOMIOPORTLOOKUPENTRY;
59/** Pointer to an I/O port lookup table entry. */
60typedef IOMIOPORTLOOKUPENTRY *PIOMIOPORTLOOKUPENTRY;
61/** Pointer to a const I/O port lookup table entry. */
62typedef IOMIOPORTLOOKUPENTRY const *PCIOMIOPORTLOOKUPENTRY;
63
64/**
65 * Ring-0 I/O port handle table entry.
66 */
67typedef struct IOMIOPORTENTRYR0
68{
69 /** Pointer to user argument. */
70 RTR0PTR pvUser;
71 /** Pointer to the associated device instance, NULL if entry not used. */
72 R0PTRTYPE(PPDMDEVINS) pDevIns;
73 /** Pointer to OUT callback function. */
74 R0PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
75 /** Pointer to IN callback function. */
76 R0PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
77 /** Pointer to string OUT callback function. */
78 R0PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
79 /** Pointer to string IN callback function. */
80 R0PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
81 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
82 uint16_t idxStats;
83 /** The number of ports covered by this entry, 0 if entry not used. */
84 RTIOPORT cPorts;
85 /** Same as the handle index. */
86 uint16_t idxSelf;
87 /** IOM_IOPORT_F_XXX (copied from ring-3). */
88 uint16_t fFlags;
89} IOMIOPORTENTRYR0;
90/** Pointer to a ring-0 I/O port handle table entry. */
91typedef IOMIOPORTENTRYR0 *PIOMIOPORTENTRYR0;
92/** Pointer to a const ring-0 I/O port handle table entry. */
93typedef IOMIOPORTENTRYR0 const *PCIOMIOPORTENTRYR0;
94
95/**
96 * Ring-3 I/O port handle table entry.
97 */
98typedef struct IOMIOPORTENTRYR3
99{
100 /** Pointer to user argument. */
101 RTR3PTR pvUser;
102 /** Pointer to the associated device instance. */
103 R3PTRTYPE(PPDMDEVINS) pDevIns;
104 /** Pointer to OUT callback function. */
105 R3PTRTYPE(PFNIOMIOPORTNEWOUT) pfnOutCallback;
106 /** Pointer to IN callback function. */
107 R3PTRTYPE(PFNIOMIOPORTNEWIN) pfnInCallback;
108 /** Pointer to string OUT callback function. */
109 R3PTRTYPE(PFNIOMIOPORTNEWOUTSTRING) pfnOutStrCallback;
110 /** Pointer to string IN callback function. */
111 R3PTRTYPE(PFNIOMIOPORTNEWINSTRING) pfnInStrCallback;
112 /** Description / Name. For easing debugging. */
113 R3PTRTYPE(const char *) pszDesc;
114 /** Extended port description table, optional. */
115 R3PTRTYPE(PCIOMIOPORTDESC) paExtDescs;
116 /** PCI device the registration is associated with. */
117 R3PTRTYPE(PPDMPCIDEV) pPciDev;
118 /** The PCI device region (high 16-bit word) and subregion (low word),
119 * UINT32_MAX if not applicable. */
120 uint32_t iPciRegion;
121 /** The number of ports covered by this entry. */
122 RTIOPORT cPorts;
123 /** The current port mapping (duplicates lookup table). */
124 RTIOPORT uPort;
125 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
126 uint16_t idxStats;
127 /** Set if mapped, clear if not.
128 * Only updated when critsect is held exclusively. */
129 bool fMapped;
130 /** Set if there is an ring-0 entry too. */
131 bool fRing0;
132 /** Set if there is an raw-mode entry too. */
133 bool fRawMode;
134 /** IOM_IOPORT_F_XXX */
135 uint8_t fFlags;
136 /** Same as the handle index. */
137 uint16_t idxSelf;
138} IOMIOPORTENTRYR3;
139AssertCompileSize(IOMIOPORTENTRYR3, 9 * sizeof(RTR3PTR) + 16);
140/** Pointer to a ring-3 I/O port handle table entry. */
141typedef IOMIOPORTENTRYR3 *PIOMIOPORTENTRYR3;
142/** Pointer to a const ring-3 I/O port handle table entry. */
143typedef IOMIOPORTENTRYR3 const *PCIOMIOPORTENTRYR3;
144
145/**
146 * I/O port statistics entry (one I/O port).
147 */
148typedef struct IOMIOPORTSTATSENTRY
149{
150 /** All accesses (only updated for the first port in a range). */
151 STAMCOUNTER Total;
152
153 /** Number of INs to this port from R3. */
154 STAMCOUNTER InR3;
155 /** Profiling IN handler overhead in R3. */
156 STAMPROFILE ProfInR3;
157 /** Number of OUTs to this port from R3. */
158 STAMCOUNTER OutR3;
159 /** Profiling OUT handler overhead in R3. */
160 STAMPROFILE ProfOutR3;
161
162 /** Number of INs to this port from R0/RC. */
163 STAMCOUNTER InRZ;
164 /** Profiling IN handler overhead in R0/RC. */
165 STAMPROFILE ProfInRZ;
166 /** Number of INs to this port from R0/RC which was serviced in R3. */
167 STAMCOUNTER InRZToR3;
168
169 /** Number of OUTs to this port from R0/RC. */
170 STAMCOUNTER OutRZ;
171 /** Profiling OUT handler overhead in R0/RC. */
172 STAMPROFILE ProfOutRZ;
173 /** Number of OUTs to this port from R0/RC which was serviced in R3. */
174 STAMCOUNTER OutRZToR3;
175} IOMIOPORTSTATSENTRY;
176/** Pointer to I/O port statistics entry. */
177typedef IOMIOPORTSTATSENTRY *PIOMIOPORTSTATSENTRY;
178
179
180
181/**
182 * MMIO lookup table entry.
183 */
184typedef struct IOMMMIOLOOKUPENTRY
185{
186 /** The first port in the range. */
187 RTGCPHYS GCPhysFirst;
188 /** The last port in the range (inclusive). */
189 RTGCPHYS GCPhysLast;
190 /** The registration handle/index.
191 * @todo bake this into the lower/upper bits of GCPhysFirst & GCPhysLast. */
192 uint16_t idx;
193 uint16_t abPadding[3];
194} IOMMMIOLOOKUPENTRY;
195/** Pointer to an MMIO lookup table entry. */
196typedef IOMMMIOLOOKUPENTRY *PIOMMMIOLOOKUPENTRY;
197/** Pointer to a const MMIO lookup table entry. */
198typedef IOMMMIOLOOKUPENTRY const *PCIOMMMIOLOOKUPENTRY;
199
200/**
201 * Ring-0 MMIO handle table entry.
202 */
203typedef struct IOMMMIOENTRYR0
204{
205 /** The number of bytes covered by this entry, 0 if entry not used. */
206 RTGCPHYS cbRegion;
207 /** Pointer to user argument. */
208 RTR0PTR pvUser;
209 /** Pointer to the associated device instance, NULL if entry not used. */
210 R0PTRTYPE(PPDMDEVINS) pDevIns;
211 /** Pointer to the write callback function. */
212 R0PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
213 /** Pointer to the read callback function. */
214 R0PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
215 /** Pointer to the fill callback function. */
216 R0PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
217 /** The entry of the first statistics entry, UINT16_MAX if no stats.
218 * @note For simplicity, this is always copied from ring-3 for all entries at
219 * the end of VM creation. */
220 uint16_t idxStats;
221 /** Same as the handle index. */
222 uint16_t idxSelf;
223 /** IOM_MMIO_F_XXX (copied from ring-3). */
224 uint32_t fFlags;
225} IOMMMIOENTRYR0;
226/** Pointer to a ring-0 MMIO handle table entry. */
227typedef IOMMMIOENTRYR0 *PIOMMMIOENTRYR0;
228/** Pointer to a const ring-0 MMIO handle table entry. */
229typedef IOMMMIOENTRYR0 const *PCIOMMMIOENTRYR0;
230
231/**
232 * Ring-3 MMIO handle table entry.
233 */
234typedef struct IOMMMIOENTRYR3
235{
236 /** The number of bytes covered by this entry. */
237 RTGCPHYS cbRegion;
238 /** The current mapping address (duplicates lookup table).
239 * This is set to NIL_RTGCPHYS if not mapped (exclusive lock + atomic). */
240 RTGCPHYS volatile GCPhysMapping;
241 /** Pointer to user argument. */
242 RTR3PTR pvUser;
243 /** Pointer to the associated device instance. */
244 R3PTRTYPE(PPDMDEVINS) pDevIns;
245 /** Pointer to the write callback function. */
246 R3PTRTYPE(PFNIOMMMIONEWWRITE) pfnWriteCallback;
247 /** Pointer to the read callback function. */
248 R3PTRTYPE(PFNIOMMMIONEWREAD) pfnReadCallback;
249 /** Pointer to the fill callback function. */
250 R3PTRTYPE(PFNIOMMMIONEWFILL) pfnFillCallback;
251 /** Description / Name. For easing debugging. */
252 R3PTRTYPE(const char *) pszDesc;
253 /** PCI device the registration is associated with. */
254 R3PTRTYPE(PPDMPCIDEV) pPciDev;
255 /** The PCI device region (high 16-bit word) and subregion (low word),
256 * UINT32_MAX if not applicable. */
257 uint32_t iPciRegion;
258 /** IOM_MMIO_F_XXX */
259 uint32_t fFlags;
260 /** The entry of the first statistics entry, UINT16_MAX if no stats. */
261 uint16_t idxStats;
262 /** Set if mapped, clear if not.
263 * Only updated when critsect is held exclusively.
264 * @todo remove as GCPhysMapping != NIL_RTGCPHYS serves the same purpose. */
265 bool volatile fMapped;
266 /** Set if there is an ring-0 entry too. */
267 bool fRing0;
268 /** Set if there is an raw-mode entry too. */
269 bool fRawMode;
270 uint8_t bPadding;
271 /** Same as the handle index. */
272 uint16_t idxSelf;
273} IOMMMIOENTRYR3;
274AssertCompileSize(IOMMMIOENTRYR3, sizeof(RTGCPHYS) * 2 + 7 * sizeof(RTR3PTR) + 16);
275/** Pointer to a ring-3 MMIO handle table entry. */
276typedef IOMMMIOENTRYR3 *PIOMMMIOENTRYR3;
277/** Pointer to a const ring-3 MMIO handle table entry. */
278typedef IOMMMIOENTRYR3 const *PCIOMMMIOENTRYR3;
279
280/**
281 * MMIO statistics entry (one MMIO).
282 */
283typedef struct IOMMMIOSTATSENTRY
284{
285 /** Counting and profiling reads in R0/RC. */
286 STAMPROFILE ProfReadRZ;
287 /** Number of successful read accesses. */
288 STAMCOUNTER Reads;
289 /** Number of reads to this address from R0/RC which was serviced in R3. */
290 STAMCOUNTER ReadRZToR3;
291 /** Number of complicated reads. */
292 STAMCOUNTER ComplicatedReads;
293 /** Number of reads of 0xff or 0x00. */
294 STAMCOUNTER FFor00Reads;
295 /** Profiling read handler overhead in R3. */
296 STAMPROFILE ProfReadR3;
297
298 /** Counting and profiling writes in R0/RC. */
299 STAMPROFILE ProfWriteRZ;
300 /** Number of successful read accesses. */
301 STAMCOUNTER Writes;
302 /** Number of writes to this address from R0/RC which was serviced in R3. */
303 STAMCOUNTER WriteRZToR3;
304 /** Number of writes to this address from R0/RC which was committed in R3. */
305 STAMCOUNTER CommitRZToR3;
306 /** Number of complicated writes. */
307 STAMCOUNTER ComplicatedWrites;
308 /** Profiling write handler overhead in R3. */
309 STAMPROFILE ProfWriteR3;
310} IOMMMIOSTATSENTRY;
311/** Pointer to MMIO statistics entry. */
312typedef IOMMMIOSTATSENTRY *PIOMMMIOSTATSENTRY;
313
314
315/**
316 * IOM per virtual CPU instance data.
317 */
318typedef struct IOMCPU
319{
320 /**
321 * Pending I/O port write commit (VINF_IOM_R3_IOPORT_COMMIT_WRITE).
322 *
323 * This is a converted VINF_IOM_R3_IOPORT_WRITE handler return that lets the
324 * execution engine commit the instruction and then return to ring-3 to complete
325 * the I/O port write there. This avoids having to decode the instruction again
326 * in ring-3.
327 */
328 struct
329 {
330 /** The value size (0 if not pending). */
331 uint16_t cbValue;
332 /** The I/O port. */
333 RTIOPORT IOPort;
334 /** The value. */
335 uint32_t u32Value;
336 } PendingIOPortWrite;
337
338 /**
339 * Pending MMIO write commit (VINF_IOM_R3_MMIO_COMMIT_WRITE).
340 *
341 * This is a converted VINF_IOM_R3_MMIO_WRITE handler return that lets the
342 * execution engine commit the instruction, stop any more REPs, and return to
343 * ring-3 to complete the MMIO write there. The avoid the tedious decoding of
344 * the instruction again once we're in ring-3, more importantly it allows us to
345 * correctly deal with read-modify-write instructions like XCHG, OR, and XOR.
346 */
347 struct
348 {
349 /** Guest physical MMIO address. */
350 RTGCPHYS GCPhys;
351 /** The number of bytes to write (0 if nothing pending). */
352 uint32_t cbValue;
353 /** Hint. */
354 uint32_t idxMmioRegionHint;
355 /** The value to write. */
356 uint8_t abValue[128];
357 } PendingMmioWrite;
358
359 /** @name Caching of I/O Port and MMIO ranges and statistics.
360 * (Saves quite some time in rep outs/ins instruction emulation.)
361 * @{ */
362 /** I/O port registration index for the last read operation. */
363 uint16_t idxIoPortLastRead;
364 /** I/O port registration index for the last write operation. */
365 uint16_t idxIoPortLastWrite;
366 /** I/O port registration index for the last read string operation. */
367 uint16_t idxIoPortLastReadStr;
368 /** I/O port registration index for the last write string operation. */
369 uint16_t idxIoPortLastWriteStr;
370
371 /** MMIO port registration index for the last IOMR3MmioPhysHandler call.
372 * @note pretty static as only used by APIC on AMD-V. */
373 uint16_t idxMmioLastPhysHandler;
374 uint16_t au16Padding[3];
375 /** @} */
376} IOMCPU;
377/** Pointer to IOM per virtual CPU instance data. */
378typedef IOMCPU *PIOMCPU;
379
380
381/**
382 * IOM Data (part of VM)
383 */
384typedef struct IOM
385{
386 /** Lock serializing EMT access to IOM. */
387#ifdef IOM_WITH_CRIT_SECT_RW
388 PDMCRITSECTRW CritSect;
389#else
390 PDMCRITSECT CritSect;
391#endif
392
393 /** @name I/O ports
394 * @note The updating of these variables is done exclusively from EMT(0).
395 * @{ */
396 /** Number of I/O port registrations. */
397 uint32_t cIoPortRegs;
398 /** The size of the paIoPortRegs allocation (in entries). */
399 uint32_t cIoPortAlloc;
400 /** I/O port registration table for ring-3.
401 * There is a parallel table in ring-0, IOMR0PERVM::paIoPortRegs. */
402 R3PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRegs;
403 /** I/O port lookup table. */
404 R3PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
405 /** Number of entries in the lookup table. */
406 uint32_t cIoPortLookupEntries;
407 /** Set if I/O port registrations are frozen. */
408 bool fIoPortsFrozen;
409 bool afPadding1[3];
410
411 /** The number of valid entries in paioPortStats. */
412 uint32_t cIoPortStats;
413 /** The size of the paIoPortStats allocation (in entries). */
414 uint32_t cIoPortStatsAllocation;
415 /** I/O port lookup table. */
416 R3PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
417 /** Dummy stats entry so we don't need to check for NULL pointers so much. */
418 IOMIOPORTSTATSENTRY IoPortDummyStats;
419 /** @} */
420
421 /** @name MMIO ports
422 * @note The updating of these variables is done exclusively from EMT(0).
423 * @{ */
424 /** MMIO physical access handler type, new style. */
425 PGMPHYSHANDLERTYPE hNewMmioHandlerType;
426 /** Number of MMIO registrations. */
427 uint32_t cMmioRegs;
428 /** The size of the paMmioRegs allocation (in entries). */
429 uint32_t cMmioAlloc;
430 /** MMIO registration table for ring-3.
431 * There is a parallel table in ring-0, IOMR0PERVM::paMmioRegs. */
432 R3PTRTYPE(PIOMMMIOENTRYR3) paMmioRegs;
433 /** MMIO lookup table. */
434 R3PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
435 /** Number of entries in the lookup table. */
436 uint32_t cMmioLookupEntries;
437 /** Set if MMIO registrations are frozen. */
438 bool fMmioFrozen;
439 bool afPadding2[3];
440
441 /** The number of valid entries in paioPortStats. */
442 uint32_t cMmioStats;
443 /** The size of the paMmioStats allocation (in entries). */
444 uint32_t cMmioStatsAllocation;
445 /** MMIO lookup table. */
446 R3PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
447 /** Dummy stats entry so we don't need to check for NULL pointers so much. */
448 IOMMMIOSTATSENTRY MmioDummyStats;
449 /** @} */
450
451 /** @name I/O Port statistics.
452 * @{ */
453 STAMCOUNTER StatIoPortIn;
454 STAMCOUNTER StatIoPortOut;
455 STAMCOUNTER StatIoPortInS;
456 STAMCOUNTER StatIoPortOutS;
457 STAMCOUNTER StatIoPortCommits;
458 /** @} */
459
460 /** @name MMIO statistics.
461 * @{ */
462 STAMPROFILE StatMmioPfHandler;
463 STAMPROFILE StatMmioPhysHandler;
464 STAMCOUNTER StatMmioHandlerR3;
465 STAMCOUNTER StatMmioHandlerR0;
466 STAMCOUNTER StatMmioReadsR0ToR3;
467 STAMCOUNTER StatMmioWritesR0ToR3;
468 STAMCOUNTER StatMmioCommitsR0ToR3;
469 STAMCOUNTER StatMmioCommitsDirect;
470 STAMCOUNTER StatMmioCommitsPgm;
471 STAMCOUNTER StatMmioStaleMappings;
472 STAMCOUNTER StatMmioDevLockContentionR0;
473 /** @} */
474} IOM;
475#ifdef IOM_WITH_CRIT_SECT_RW
476AssertCompileMemberAlignment(IOM, CritSect, 64);
477#endif
478/** Pointer to IOM instance data. */
479typedef IOM *PIOM;
480
481
482/**
483 * IOM data kept in the ring-0 GVM.
484 */
485typedef struct IOMR0PERVM
486{
487 /** @name I/O ports
488 * @{ */
489 /** The higest ring-0 I/O port registration plus one. */
490 uint32_t cIoPortMax;
491 /** The size of the paIoPortRegs allocation (in entries). */
492 uint32_t cIoPortAlloc;
493 /** I/O port registration table for ring-0.
494 * There is a parallel table for ring-3, paIoPortRing3Regs. */
495 R0PTRTYPE(PIOMIOPORTENTRYR0) paIoPortRegs;
496 /** I/O port lookup table. */
497 R0PTRTYPE(PIOMIOPORTLOOKUPENTRY) paIoPortLookup;
498 /** I/O port registration table for ring-3.
499 * Also mapped to ring-3 as IOM::paIoPortRegs. */
500 R0PTRTYPE(PIOMIOPORTENTRYR3) paIoPortRing3Regs;
501 /** Handle to the allocation backing both the ring-0 and ring-3 registration
502 * tables as well as the lookup table. */
503 RTR0MEMOBJ hIoPortMemObj;
504 /** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
505 RTR0MEMOBJ hIoPortMapObj;
506#ifdef VBOX_WITH_STATISTICS
507 /** The size of the paIoPortStats allocation (in entries). */
508 uint32_t cIoPortStatsAllocation;
509 /** Prevents paIoPortStats from growing, set by IOMR0IoPortSyncStatisticsIndices(). */
510 bool fIoPortStatsFrozen;
511 /** I/O port lookup table. */
512 R0PTRTYPE(PIOMIOPORTSTATSENTRY) paIoPortStats;
513 /** Handle to the allocation backing the I/O port statistics. */
514 RTR0MEMOBJ hIoPortStatsMemObj;
515 /** Handle to the ring-3 mapping of the I/O port statistics. */
516 RTR0MEMOBJ hIoPortStatsMapObj;
517#endif
518 /** @} */
519
520 /** @name MMIO
521 * @{ */
522 /** The higest ring-0 MMIO registration plus one. */
523 uint32_t cMmioMax;
524 /** The size of the paMmioRegs allocation (in entries). */
525 uint32_t cMmioAlloc;
526 /** MMIO registration table for ring-0.
527 * There is a parallel table for ring-3, paMmioRing3Regs. */
528 R0PTRTYPE(PIOMMMIOENTRYR0) paMmioRegs;
529 /** MMIO lookup table. */
530 R0PTRTYPE(PIOMMMIOLOOKUPENTRY) paMmioLookup;
531 /** MMIO registration table for ring-3.
532 * Also mapped to ring-3 as IOM::paMmioRegs. */
533 R0PTRTYPE(PIOMMMIOENTRYR3) paMmioRing3Regs;
534 /** Handle to the allocation backing both the ring-0 and ring-3 registration
535 * tables as well as the lookup table. */
536 RTR0MEMOBJ hMmioMemObj;
537 /** Handle to the ring-3 mapping of the lookup and ring-3 registration table. */
538 RTR0MEMOBJ hMmioMapObj;
539#ifdef VBOX_WITH_STATISTICS
540 /** The size of the paMmioStats allocation (in entries). */
541 uint32_t cMmioStatsAllocation;
542 /* Prevents paMmioStats from growing, set by IOMR0MmioSyncStatisticsIndices(). */
543 bool fMmioStatsFrozen;
544 /** MMIO lookup table. */
545 R0PTRTYPE(PIOMMMIOSTATSENTRY) paMmioStats;
546 /** Handle to the allocation backing the MMIO statistics. */
547 RTR0MEMOBJ hMmioStatsMemObj;
548 /** Handle to the ring-3 mapping of the MMIO statistics. */
549 RTR0MEMOBJ hMmioStatsMapObj;
550#endif
551 /** @} */
552
553} IOMR0PERVM;
554
555
556RT_C_DECLS_BEGIN
557
558#ifdef IN_RING3
559DECLCALLBACK(void) iomR3IoPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
560void iomR3IoPortRegStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry);
561DECLCALLBACK(void) iomR3MmioInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
562void iomR3MmioRegStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry);
563VBOXSTRICTRC iomR3MmioCommitWorker(PVM pVM, PVMCPU pVCpu, PIOMMMIOENTRYR3 pRegEntry, RTGCPHYS offRegion); /* IOMAllMmioNew.cpp */
564#endif /* IN_RING3 */
565#ifdef IN_RING0
566void iomR0IoPortCleanupVM(PGVM pGVM);
567void iomR0IoPortInitPerVMData(PGVM pGVM);
568void iomR0MmioCleanupVM(PGVM pGVM);
569void iomR0MmioInitPerVMData(PGVM pGVM);
570#endif
571
572#ifndef IN_RING3
573DECLCALLBACK(FNPGMRZPHYSPFHANDLER) iomMmioPfHandlerNew;
574#endif
575DECLCALLBACK(FNPGMPHYSHANDLER) iomMmioHandlerNew;
576
577/* IOM locking helpers. */
578#ifdef IOM_WITH_CRIT_SECT_RW
579# define IOM_LOCK_EXCL(a_pVM) PDMCritSectRwEnterExcl((a_pVM), &(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
580# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectRwLeaveExcl((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
581# if 0 /* (in case needed for debugging) */
582# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterExcl(&(a_pVM)->iom.s.CritSect, (a_rcBusy))
583# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveExcl(&(a_pVM)->iom.s.CritSect); } while (0)
584# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner(&(a_pVM)->iom.s.CritSect)
585# else
586# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectRwEnterShared((a_pVM), &(a_pVM)->iom.s.CritSect, (a_rcBusy))
587# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectRwLeaveShared((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
588# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectRwIsReadOwner((a_pVM), &(a_pVM)->iom.s.CritSect, true)
589# endif
590# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectRwIsWriteOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
591#else
592# define IOM_LOCK_EXCL(a_pVM) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, VERR_SEM_BUSY)
593# define IOM_UNLOCK_EXCL(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
594# define IOM_LOCK_SHARED_EX(a_pVM, a_rcBusy) PDMCritSectEnter((a_pVM), &(a_pVM)->iom.s.CritSect, (a_rcBusy))
595# define IOM_UNLOCK_SHARED(a_pVM) do { PDMCritSectLeave((a_pVM), &(a_pVM)->iom.s.CritSect); } while (0)
596# define IOM_IS_SHARED_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
597# define IOM_IS_EXCL_LOCK_OWNER(a_pVM) PDMCritSectIsOwner((a_pVM), &(a_pVM)->iom.s.CritSect)
598#endif
599#define IOM_LOCK_SHARED(a_pVM) IOM_LOCK_SHARED_EX(a_pVM, VERR_SEM_BUSY)
600
601
602RT_C_DECLS_END
603
604
605#ifdef IN_RING3
606
607#endif
608
609/** @} */
610
611#endif /* !VMM_INCLUDED_SRC_include_IOMInternal_h */
612
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