IEMN8veRecompiler.h@ 102089

Last change on this file since 102089 was 102077, checked in by vboxsync, 15 months ago
VMM/IEM,STAM: Native translation of IEM_MC_REF_EFLAGS, IEM_MC_REF_GREG_U16, IEM_MC_CALL_VOID_AIMPL_X and IEM_MC_CALL_AIMPL_X. Added STAMUNIT_BYTES_PER_TB. bugref:10371
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 35.7 KB

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1	/* $Id: IEMN8veRecompiler.h 102077 2023-11-13 11:52:34Z vboxsync $ */
2	/** @file
3	* IEM - Interpreted Execution Manager - Native Recompiler Internals.
4	*/
5
6	/*
7	* Copyright (C) 2011-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	#ifndef VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h
29	#define VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h
30	#ifndef RT_WITHOUT_PRAGMA_ONCE
31	# pragma once
32	#endif
33
34
35	/** @defgroup grp_iem_n8ve_re Native Recompiler Internals.
36	* @ingroup grp_iem_int
37	* @{
38	*/
39
40	/** @def IEMNATIVE_WITH_TB_DEBUG_INFO
41	* Enables generating internal debug info for better TB disassembly dumping. */
42	#if defined(DEBUG) \|\| defined(DOXYGEN_RUNNING)
43	# define IEMNATIVE_WITH_TB_DEBUG_INFO
44	#endif
45
46
47	/** @name Stack Frame Layout
48	*
49	* @{ */
50	/** The size of the area for stack variables and spills and stuff.
51	* @note This limit is duplicated in the python script(s). We add 0x40 for
52	* alignment padding. */
53	#define IEMNATIVE_FRAME_VAR_SIZE (0xc0 + 0x40)
54	/** Number of 64-bit variable slots (0x100 / 8 = 32. */
55	#define IEMNATIVE_FRAME_VAR_SLOTS (IEMNATIVE_FRAME_VAR_SIZE / 8)
56	AssertCompile(IEMNATIVE_FRAME_VAR_SLOTS == 32);
57
58	#ifdef RT_ARCH_AMD64
59	/** An stack alignment adjustment (between non-volatile register pushes and
60	* the stack variable area, so the latter better aligned). */
61	# define IEMNATIVE_FRAME_ALIGN_SIZE 8
62
63	/** Number of stack arguments slots for calls made from the frame. */
64	# ifdef RT_OS_WINDOWS
65	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 4
66	# else
67	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 2
68	# endif
69	/** Number of any shadow arguments (spill area) for calls we make. */
70	# ifdef RT_OS_WINDOWS
71	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 4
72	# else
73	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 0
74	# endif
75
76	/** Frame pointer (RBP) relative offset of the last push. */
77	# ifdef RT_OS_WINDOWS
78	# define IEMNATIVE_FP_OFF_LAST_PUSH (7 * -8)
79	# else
80	# define IEMNATIVE_FP_OFF_LAST_PUSH (5 * -8)
81	# endif
82	/** Frame pointer (RBP) relative offset of the stack variable area (the lowest
83	* address for it). */
84	# define IEMNATIVE_FP_OFF_STACK_VARS (IEMNATIVE_FP_OFF_LAST_PUSH - IEMNATIVE_FRAME_ALIGN_SIZE - IEMNATIVE_FRAME_VAR_SIZE)
85	/** Frame pointer (RBP) relative offset of the first stack argument for calls. */
86	# define IEMNATIVE_FP_OFF_STACK_ARG0 (IEMNATIVE_FP_OFF_STACK_VARS - IEMNATIVE_FRAME_STACK_ARG_COUNT * 8)
87	/** Frame pointer (RBP) relative offset of the second stack argument for calls. */
88	# define IEMNATIVE_FP_OFF_STACK_ARG1 (IEMNATIVE_FP_OFF_STACK_ARG0 + 8)
89	# ifdef RT_OS_WINDOWS
90	/** Frame pointer (RBP) relative offset of the third stack argument for calls. */
91	# define IEMNATIVE_FP_OFF_STACK_ARG2 (IEMNATIVE_FP_OFF_STACK_ARG0 + 16)
92	/** Frame pointer (RBP) relative offset of the fourth stack argument for calls. */
93	# define IEMNATIVE_FP_OFF_STACK_ARG3 (IEMNATIVE_FP_OFF_STACK_ARG0 + 24)
94	# endif
95
96	# ifdef RT_OS_WINDOWS
97	/** Frame pointer (RBP) relative offset of the first incoming shadow argument. */
98	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG0 (16)
99	/** Frame pointer (RBP) relative offset of the second incoming shadow argument. */
100	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG1 (24)
101	/** Frame pointer (RBP) relative offset of the third incoming shadow argument. */
102	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG2 (32)
103	/** Frame pointer (RBP) relative offset of the fourth incoming shadow argument. */
104	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG3 (40)
105	# endif
106
107	#elif RT_ARCH_ARM64
108	/** No alignment padding needed for arm64. */
109	# define IEMNATIVE_FRAME_ALIGN_SIZE 0
110	/** No stack argument slots, got 8 registers for arguments will suffice. */
111	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 0
112	/** There are no argument spill area. */
113	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 0
114
115	/** Number of saved registers at the top of our stack frame.
116	* This includes the return address and old frame pointer, so x19 thru x30. */
117	# define IEMNATIVE_FRAME_SAVE_REG_COUNT (12)
118	/** The size of the save registered (IEMNATIVE_FRAME_SAVE_REG_COUNT). */
119	# define IEMNATIVE_FRAME_SAVE_REG_SIZE (IEMNATIVE_FRAME_SAVE_REG_COUNT * 8)
120
121	/** Frame pointer (BP) relative offset of the last push. */
122	# define IEMNATIVE_FP_OFF_LAST_PUSH (7 * -8)
123
124	/** Frame pointer (BP) relative offset of the stack variable area (the lowest
125	* address for it). */
126	# define IEMNATIVE_FP_OFF_STACK_VARS (IEMNATIVE_FP_OFF_LAST_PUSH - IEMNATIVE_FRAME_ALIGN_SIZE - IEMNATIVE_FRAME_VAR_SIZE)
127
128	#else
129	# error "port me"
130	#endif
131	/** @} */
132
133
134	/** @name Fixed Register Allocation(s)
135	* @{ */
136	/** @def IEMNATIVE_REG_FIXED_PVMCPU
137	* The number of the register holding the pVCpu pointer. */
138	/** @def IEMNATIVE_REG_FIXED_PCPUMCTX
139	* The number of the register holding the &pVCpu->cpum.GstCtx pointer.
140	* @note This not available on AMD64, only ARM64. */
141	/** @def IEMNATIVE_REG_FIXED_TMP0
142	* Dedicated temporary register.
143	* @todo replace this by a register allocator and content tracker. */
144	/** @def IEMNATIVE_REG_FIXED_MASK
145	* Mask GPRs with fixes assignments, either by us or dictated by the CPU/OS
146	* architecture. */
147	#if defined(RT_ARCH_AMD64) && !defined(DOXYGEN_RUNNING)
148	# define IEMNATIVE_REG_FIXED_PVMCPU X86_GREG_xBX
149	# define IEMNATIVE_REG_FIXED_TMP0 X86_GREG_x11
150	# define IEMNATIVE_REG_FIXED_MASK ( RT_BIT_32(IEMNATIVE_REG_FIXED_PVMCPU) \
151	\| RT_BIT_32(IEMNATIVE_REG_FIXED_TMP0) \
152	\| RT_BIT_32(X86_GREG_xSP) \
153	\| RT_BIT_32(X86_GREG_xBP) )
154
155	#elif defined(RT_ARCH_ARM64) \|\| defined(DOXYGEN_RUNNING)
156	# define IEMNATIVE_REG_FIXED_PVMCPU ARMV8_A64_REG_X28
157	# define IEMNATIVE_REG_FIXED_PCPUMCTX ARMV8_A64_REG_X27
158	# define IEMNATIVE_REG_FIXED_TMP0 ARMV8_A64_REG_X15
159	# define IEMNATIVE_REG_FIXED_MASK ( RT_BIT_32(ARMV8_A64_REG_SP) \
160	\| RT_BIT_32(ARMV8_A64_REG_LR) \
161	\| RT_BIT_32(ARMV8_A64_REG_BP) \
162	\| RT_BIT_32(IEMNATIVE_REG_FIXED_PVMCPU) \
163	\| RT_BIT_32(IEMNATIVE_REG_FIXED_PCPUMCTX) \
164	\| RT_BIT_32(ARMV8_A64_REG_X18) \
165	\| RT_BIT_32(IEMNATIVE_REG_FIXED_TMP0) )
166
167	#else
168	# error "port me"
169	#endif
170	/** @} */
171
172	/** @name Call related registers.
173	* @{ */
174	/** @def IEMNATIVE_CALL_RET_GREG
175	* The return value register. */
176	/** @def IEMNATIVE_CALL_ARG_GREG_COUNT
177	* Number of arguments in registers. */
178	/** @def IEMNATIVE_CALL_ARG0_GREG
179	* The general purpose register carrying argument \#0. */
180	/** @def IEMNATIVE_CALL_ARG1_GREG
181	* The general purpose register carrying argument \#1. */
182	/** @def IEMNATIVE_CALL_ARG2_GREG
183	* The general purpose register carrying argument \#2. */
184	/** @def IEMNATIVE_CALL_ARG3_GREG
185	* The general purpose register carrying argument \#3. */
186	/** @def IEMNATIVE_CALL_VOLATILE_GREG_MASK
187	* Mask of registers the callee will not save and may trash. */
188	#ifdef RT_ARCH_AMD64
189	# define IEMNATIVE_CALL_RET_GREG X86_GREG_xAX
190
191	# ifdef RT_OS_WINDOWS
192	# define IEMNATIVE_CALL_ARG_GREG_COUNT 4
193	# define IEMNATIVE_CALL_ARG0_GREG X86_GREG_xCX
194	# define IEMNATIVE_CALL_ARG1_GREG X86_GREG_xDX
195	# define IEMNATIVE_CALL_ARG2_GREG X86_GREG_x8
196	# define IEMNATIVE_CALL_ARG3_GREG X86_GREG_x9
197	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(X86_GREG_xAX) \
198	\| RT_BIT_32(X86_GREG_xCX) \
199	\| RT_BIT_32(X86_GREG_xDX) \
200	\| RT_BIT_32(X86_GREG_x8) \
201	\| RT_BIT_32(X86_GREG_x9) \
202	\| RT_BIT_32(X86_GREG_x10) \
203	\| RT_BIT_32(X86_GREG_x11) )
204	# else
205	# define IEMNATIVE_CALL_ARG_GREG_COUNT 6
206	# define IEMNATIVE_CALL_ARG0_GREG X86_GREG_xDI
207	# define IEMNATIVE_CALL_ARG1_GREG X86_GREG_xSI
208	# define IEMNATIVE_CALL_ARG2_GREG X86_GREG_xDX
209	# define IEMNATIVE_CALL_ARG3_GREG X86_GREG_xCX
210	# define IEMNATIVE_CALL_ARG4_GREG X86_GREG_x8
211	# define IEMNATIVE_CALL_ARG5_GREG X86_GREG_x9
212	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(X86_GREG_xAX) \
213	\| RT_BIT_32(X86_GREG_xCX) \
214	\| RT_BIT_32(X86_GREG_xDX) \
215	\| RT_BIT_32(X86_GREG_xDI) \
216	\| RT_BIT_32(X86_GREG_xSI) \
217	\| RT_BIT_32(X86_GREG_x8) \
218	\| RT_BIT_32(X86_GREG_x9) \
219	\| RT_BIT_32(X86_GREG_x10) \
220	\| RT_BIT_32(X86_GREG_x11) )
221	# endif
222
223	#elif defined(RT_ARCH_ARM64)
224	# define IEMNATIVE_CALL_RET_GREG ARMV8_A64_REG_X0
225	# define IEMNATIVE_CALL_ARG_GREG_COUNT 8
226	# define IEMNATIVE_CALL_ARG0_GREG ARMV8_A64_REG_X0
227	# define IEMNATIVE_CALL_ARG1_GREG ARMV8_A64_REG_X1
228	# define IEMNATIVE_CALL_ARG2_GREG ARMV8_A64_REG_X2
229	# define IEMNATIVE_CALL_ARG3_GREG ARMV8_A64_REG_X3
230	# define IEMNATIVE_CALL_ARG4_GREG ARMV8_A64_REG_X4
231	# define IEMNATIVE_CALL_ARG5_GREG ARMV8_A64_REG_X5
232	# define IEMNATIVE_CALL_ARG6_GREG ARMV8_A64_REG_X6
233	# define IEMNATIVE_CALL_ARG7_GREG ARMV8_A64_REG_X7
234	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(ARMV8_A64_REG_X0) \
235	\| RT_BIT_32(ARMV8_A64_REG_X1) \
236	\| RT_BIT_32(ARMV8_A64_REG_X2) \
237	\| RT_BIT_32(ARMV8_A64_REG_X3) \
238	\| RT_BIT_32(ARMV8_A64_REG_X4) \
239	\| RT_BIT_32(ARMV8_A64_REG_X5) \
240	\| RT_BIT_32(ARMV8_A64_REG_X6) \
241	\| RT_BIT_32(ARMV8_A64_REG_X7) \
242	\| RT_BIT_32(ARMV8_A64_REG_X8) \
243	\| RT_BIT_32(ARMV8_A64_REG_X9) \
244	\| RT_BIT_32(ARMV8_A64_REG_X10) \
245	\| RT_BIT_32(ARMV8_A64_REG_X11) \
246	\| RT_BIT_32(ARMV8_A64_REG_X12) \
247	\| RT_BIT_32(ARMV8_A64_REG_X13) \
248	\| RT_BIT_32(ARMV8_A64_REG_X14) \
249	\| RT_BIT_32(ARMV8_A64_REG_X15) \
250	\| RT_BIT_32(ARMV8_A64_REG_X16) \
251	\| RT_BIT_32(ARMV8_A64_REG_X17) )
252
253	#endif
254
255	/** This is the maximum argument count we'll ever be needing. */
256	#define IEMNATIVE_CALL_MAX_ARG_COUNT 7
257	/** @} */
258
259
260	/** @def IEMNATIVE_HST_GREG_COUNT
261	* Number of host general purpose registers we tracker. */
262	/** @def IEMNATIVE_HST_GREG_MASK
263	* Mask corresponding to IEMNATIVE_HST_GREG_COUNT that can be applied to
264	* inverted register masks and such to get down to a correct set of regs. */
265	#ifdef RT_ARCH_AMD64
266	# define IEMNATIVE_HST_GREG_COUNT 16
267	# define IEMNATIVE_HST_GREG_MASK UINT32_C(0xffff)
268
269	#elif defined(RT_ARCH_ARM64)
270	# define IEMNATIVE_HST_GREG_COUNT 32
271	# define IEMNATIVE_HST_GREG_MASK UINT32_MAX
272	#else
273	# error "Port me!"
274	#endif
275
276
277	/** Native code generator label types. */
278	typedef enum
279	{
280	kIemNativeLabelType_Invalid = 0,
281	/* Labels w/o data, only once instance per TB: */
282	kIemNativeLabelType_Return,
283	kIemNativeLabelType_ReturnBreak,
284	kIemNativeLabelType_ReturnWithFlags,
285	kIemNativeLabelType_NonZeroRetOrPassUp,
286	kIemNativeLabelType_RaiseGp0,
287	/* Labels with data, potentially multiple instances per TB: */
288	kIemNativeLabelType_If,
289	kIemNativeLabelType_Else,
290	kIemNativeLabelType_Endif,
291	kIemNativeLabelType_CheckIrq,
292	kIemNativeLabelType_End
293	} IEMNATIVELABELTYPE;
294
295	/** Native code generator label definition. */
296	typedef struct IEMNATIVELABEL
297	{
298	/** Code offset if defined, UINT32_MAX if it needs to be generated after/in
299	* the epilog. */
300	uint32_t off;
301	/** The type of label (IEMNATIVELABELTYPE). */
302	uint16_t enmType;
303	/** Additional label data, type specific. */
304	uint16_t uData;
305	} IEMNATIVELABEL;
306	/** Pointer to a label. */
307	typedef IEMNATIVELABEL *PIEMNATIVELABEL;
308
309
310	/** Native code generator fixup types. */
311	typedef enum
312	{
313	kIemNativeFixupType_Invalid = 0,
314	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
315	/** AMD64 fixup: PC relative 32-bit with addend in bData. */
316	kIemNativeFixupType_Rel32,
317	#elif defined(RT_ARCH_ARM64)
318	/** ARM64 fixup: PC relative offset at bits 25:0 (B, BL). */
319	kIemNativeFixupType_RelImm26At0,
320	/** ARM64 fixup: PC relative offset at bits 23:5 (CBZ, CBNZ, B.CC). */
321	kIemNativeFixupType_RelImm19At5,
322	/** ARM64 fixup: PC relative offset at bits 18:5 (TBZ, TBNZ). */
323	kIemNativeFixupType_RelImm14At5,
324	#endif
325	kIemNativeFixupType_End
326	} IEMNATIVEFIXUPTYPE;
327
328	/** Native code generator fixup. */
329	typedef struct IEMNATIVEFIXUP
330	{
331	/** Code offset of the fixup location. */
332	uint32_t off;
333	/** The IEMNATIVELABEL this is a fixup for. */
334	uint16_t idxLabel;
335	/** The fixup type (IEMNATIVEFIXUPTYPE). */
336	uint8_t enmType;
337	/** Addend or other data. */
338	int8_t offAddend;
339	} IEMNATIVEFIXUP;
340	/** Pointer to a native code generator fixup. */
341	typedef IEMNATIVEFIXUP *PIEMNATIVEFIXUP;
342
343
344	/**
345	* Guest registers that can be shadowed in GPRs.
346	*/
347	typedef enum IEMNATIVEGSTREG : uint8_t
348	{
349	kIemNativeGstReg_GprFirst = 0,
350	kIemNativeGstReg_GprLast = kIemNativeGstReg_GprFirst + 15,
351	kIemNativeGstReg_Pc,
352	kIemNativeGstReg_EFlags, /*< 32-bit, includes internal flags. /
353	kIemNativeGstReg_SegSelFirst,
354	kIemNativeGstReg_SegSelLast = kIemNativeGstReg_SegSelFirst + 5,
355	kIemNativeGstReg_SegBaseFirst,
356	kIemNativeGstReg_SegBaseLast = kIemNativeGstReg_SegBaseFirst + 5,
357	kIemNativeGstReg_SegLimitFirst,
358	kIemNativeGstReg_SegLimitLast = kIemNativeGstReg_SegLimitFirst + 5,
359	kIemNativeGstReg_End
360	} IEMNATIVEGSTREG;
361
362	/** @name Helpers for converting register numbers to IEMNATIVEGSTREG values.
363	* @{ */
364	#define IEMNATIVEGSTREG_GPR(a_iGpr) ((IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + (a_iGpr) ))
365	#define IEMNATIVEGSTREG_SEG_SEL(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegSelFirst + (a_iSegReg) ))
366	#define IEMNATIVEGSTREG_SEG_BASE(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegBaseFirst + (a_iSegReg) ))
367	#define IEMNATIVEGSTREG_SEG_LIMIT(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegLimitFirst + (a_iSegReg) ))
368	/** @} */
369
370	/**
371	* Intended use statement for iemNativeRegAllocTmpForGuestReg().
372	*/
373	typedef enum IEMNATIVEGSTREGUSE
374	{
375	/** The usage is read-only, the register holding the guest register
376	* shadow copy will not be modified by the caller. */
377	kIemNativeGstRegUse_ReadOnly = 0,
378	/** The caller will update the guest register (think: PC += cbInstr).
379	* The guest shadow copy will follow the returned register. */
380	kIemNativeGstRegUse_ForUpdate,
381	/** The call will put an entirely new value in the guest register, so
382	* if new register is allocate it will be returned uninitialized. */
383	kIemNativeGstRegUse_ForFullWrite,
384	/** The caller will use the guest register value as input in a calculation
385	* and the host register will be modified.
386	* This means that the returned host register will not be marked as a shadow
387	* copy of the guest register. */
388	kIemNativeGstRegUse_Calculation
389	} IEMNATIVEGSTREGUSE;
390
391	/**
392	* Guest registers (classes) that can be referenced.
393	*/
394	typedef enum IEMNATIVEGSTREGREF : uint8_t
395	{
396	kIemNativeGstRegRef_Invalid = 0,
397	kIemNativeGstRegRef_Gpr,
398	kIemNativeGstRegRef_GprHighByte, /*< AH, CH, DH, BH/
399	kIemNativeGstRegRef_EFlags,
400	kIemNativeGstRegRef_MxCsr,
401	kIemNativeGstRegRef_FpuReg,
402	kIemNativeGstRegRef_MReg,
403	kIemNativeGstRegRef_XReg,
404	//kIemNativeGstRegRef_YReg, - doesn't work.
405	kIemNativeGstRegRef_End
406	} IEMNATIVEGSTREGREF;
407
408
409	/** Variable kinds. */
410	typedef enum IEMNATIVEVARKIND : uint8_t
411	{
412	/** Customary invalid zero value. */
413	kIemNativeVarKind_Invalid = 0,
414	/** This is either in a register or on the stack. */
415	kIemNativeVarKind_Stack,
416	/** Immediate value - loaded into register when needed, or can live on the
417	* stack if referenced (in theory). */
418	kIemNativeVarKind_Immediate,
419	/** Variable reference - loaded into register when needed, never stack. */
420	kIemNativeVarKind_VarRef,
421	/** Guest register reference - loaded into register when needed, never stack. */
422	kIemNativeVarKind_GstRegRef,
423	/** End of valid values. */
424	kIemNativeVarKind_End
425	} IEMNATIVEVARKIND;
426
427
428	/** Variable or argument. */
429	typedef struct IEMNATIVEVAR
430	{
431	/** The kind of variable. */
432	IEMNATIVEVARKIND enmKind;
433	/** The variable size in bytes. */
434	uint8_t cbVar;
435	/** The first stack slot (uint64_t), except for immediate and references
436	* where it usually is UINT8_MAX. */
437	uint8_t idxStackSlot;
438	/** The host register allocated for the variable, UINT8_MAX if not. */
439	uint8_t idxReg;
440	/** The argument number if argument, UINT8_MAX if regular variable. */
441	uint8_t uArgNo;
442	/** If referenced, the index of the variable referencing this one, otherwise
443	* UINT8_MAX. A referenced variable must only be placed on the stack and
444	* must be either kIemNativeVarKind_Stack or kIemNativeVarKind_Immediate. */
445	uint8_t idxReferrerVar;
446	/** Guest register being shadowed here, kIemNativeGstReg_End(/UINT8_MAX) if not.
447	* @todo not sure what this really is for... */
448	IEMNATIVEGSTREG enmGstReg;
449	uint8_t bAlign;
450
451	union
452	{
453	/** kIemNativeVarKind_Immediate: The immediate value. */
454	uint64_t uValue;
455	/** kIemNativeVarKind_VarRef: The index of the variable being referenced. */
456	uint8_t idxRefVar;
457	/** kIemNativeVarKind_GstRegRef: The guest register being referrenced. */
458	struct
459	{
460	/** The class of register. */
461	IEMNATIVEGSTREGREF enmClass;
462	/** Index within the class. */
463	uint8_t idx;
464	} GstRegRef;
465	} u;
466	} IEMNATIVEVAR;
467
468	/** What is being kept in a host register. */
469	typedef enum IEMNATIVEWHAT : uint8_t
470	{
471	/** The traditional invalid zero value. */
472	kIemNativeWhat_Invalid = 0,
473	/** Mapping a variable (IEMNATIVEHSTREG::idxVar). */
474	kIemNativeWhat_Var,
475	/** Temporary register, this is typically freed when a MC completes. */
476	kIemNativeWhat_Tmp,
477	/** Call argument w/o a variable mapping. This is free (via
478	* IEMNATIVE_CALL_VOLATILE_GREG_MASK) after the call is emitted. */
479	kIemNativeWhat_Arg,
480	/** Return status code.
481	* @todo not sure if we need this... */
482	kIemNativeWhat_rc,
483	/** The fixed pVCpu (PVMCPUCC) register.
484	* @todo consider offsetting this on amd64 to use negative offsets to access
485	* more members using 8-byte disp. */
486	kIemNativeWhat_pVCpuFixed,
487	/** The fixed pCtx (PCPUMCTX) register.
488	* @todo consider offsetting this on amd64 to use negative offsets to access
489	* more members using 8-byte disp. */
490	kIemNativeWhat_pCtxFixed,
491	/** Fixed temporary register. */
492	kIemNativeWhat_FixedTmp,
493	/** Register reserved by the CPU or OS architecture. */
494	kIemNativeWhat_FixedReserved,
495	/** End of valid values. */
496	kIemNativeWhat_End
497	} IEMNATIVEWHAT;
498
499	/**
500	* Host general register entry.
501	*
502	* The actual allocation status is kept in IEMRECOMPILERSTATE::bmHstRegs.
503	*
504	* @todo Track immediate values in host registers similarlly to how we track the
505	* guest register shadow copies. For it to be real helpful, though,
506	* we probably need to know which will be reused and put them into
507	* non-volatile registers, otherwise it's going to be more or less
508	* restricted to an instruction or two.
509	*/
510	typedef struct IEMNATIVEHSTREG
511	{
512	/** Set of guest registers this one shadows.
513	*
514	* Using a bitmap here so we can designate the same host register as a copy
515	* for more than one guest register. This is expected to be useful in
516	* situations where one value is copied to several registers in a sequence.
517	* If the mapping is 1:1, then we'd have to pick which side of a 'MOV SRC,DST'
518	* sequence we'd want to let this register follow to be a copy of and there
519	* will always be places where we'd be picking the wrong one.
520	*/
521	uint64_t fGstRegShadows;
522	/** What is being kept in this register. */
523	IEMNATIVEWHAT enmWhat;
524	/** Variable index if holding a variable, otherwise UINT8_MAX. */
525	uint8_t idxVar;
526	/** Alignment padding. */
527	uint8_t abAlign[6];
528	} IEMNATIVEHSTREG;
529
530
531	/**
532	* Core state for the native recompiler, that is, things that needs careful
533	* handling when dealing with branches.
534	*/
535	typedef struct IEMNATIVECORESTATE
536	{
537	/** Allocation bitmap for aHstRegs. */
538	uint32_t bmHstRegs;
539
540	/** Bitmap marking which host register contains guest register shadow copies.
541	* This is used during register allocation to try preserve copies. */
542	uint32_t bmHstRegsWithGstShadow;
543	/** Bitmap marking valid entries in aidxGstRegShadows. */
544	uint64_t bmGstRegShadows;
545
546	union
547	{
548	/** Index of variable arguments, UINT8_MAX if not valid. */
549	uint8_t aidxArgVars[8];
550	/** For more efficient resetting. */
551	uint64_t u64ArgVars;
552	};
553
554	/** Allocation bitmap for the stack. */
555	uint32_t bmStack;
556	/** Allocation bitmap for aVars. */
557	uint32_t bmVars;
558
559	/** Maps a guest register to a host GPR (index by IEMNATIVEGSTREG).
560	* Entries are only valid if the corresponding bit in bmGstRegShadows is set.
561	* (A shadow copy of a guest register can only be held in a one host register,
562	* there are no duplicate copies or ambiguities like that). */
563	uint8_t aidxGstRegShadows[kIemNativeGstReg_End];
564
565	/** Host register allocation tracking. */
566	IEMNATIVEHSTREG aHstRegs[IEMNATIVE_HST_GREG_COUNT];
567
568	/** Variables and arguments. */
569	IEMNATIVEVAR aVars[9];
570	} IEMNATIVECORESTATE;
571	/** Pointer to core state. */
572	typedef IEMNATIVECORESTATE *PIEMNATIVECORESTATE;
573	/** Pointer to const core state. */
574	typedef IEMNATIVECORESTATE const *PCIEMNATIVECORESTATE;
575
576
577	/**
578	* Conditional stack entry.
579	*/
580	typedef struct IEMNATIVECOND
581	{
582	/** Set if we're in the "else" part, clear if we're in the "if" before it. */
583	bool fInElse;
584	/** The label for the IEM_MC_ELSE. */
585	uint32_t idxLabelElse;
586	/** The label for the IEM_MC_ENDIF. */
587	uint32_t idxLabelEndIf;
588	/** The initial state snapshot as the if-block starts executing. */
589	IEMNATIVECORESTATE InitialState;
590	/** The state snapshot at the end of the if-block. */
591	IEMNATIVECORESTATE IfFinalState;
592	} IEMNATIVECOND;
593	/** Pointer to a condition stack entry. */
594	typedef IEMNATIVECOND *PIEMNATIVECOND;
595
596
597	/**
598	* Native recompiler state.
599	*/
600	typedef struct IEMRECOMPILERSTATE
601	{
602	/** Size of the buffer that pbNativeRecompileBufR3 points to in
603	* IEMNATIVEINSTR units. */
604	uint32_t cInstrBufAlloc;
605	#ifdef VBOX_STRICT
606	/** Strict: How far the last iemNativeInstrBufEnsure() checked. */
607	uint32_t offInstrBufChecked;
608	#else
609	uint32_t uPadding1; /* We don't keep track of the size here... */
610	#endif
611	/** Fixed temporary code buffer for native recompilation. */
612	PIEMNATIVEINSTR pInstrBuf;
613
614	/** Bitmaps with the label types used. */
615	uint64_t bmLabelTypes;
616	/** Actual number of labels in paLabels. */
617	uint32_t cLabels;
618	/** Max number of entries allowed in paLabels before reallocating it. */
619	uint32_t cLabelsAlloc;
620	/** Labels defined while recompiling (referenced by fixups). */
621	PIEMNATIVELABEL paLabels;
622
623	/** Actual number of fixups paFixups. */
624	uint32_t cFixups;
625	/** Max number of entries allowed in paFixups before reallocating it. */
626	uint32_t cFixupsAlloc;
627	/** Buffer used by the recompiler for recording fixups when generating code. */
628	PIEMNATIVEFIXUP paFixups;
629
630	#ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
631	/** Number of debug info entries allocated for pDbgInfo. */
632	uint32_t cDbgInfoAlloc;
633	uint32_t uPadding;
634	/** Debug info. */
635	PIEMTBDBG pDbgInfo;
636	#endif
637
638	/** The translation block being recompiled. */
639	PCIEMTB pTbOrg;
640
641	/** The current condition stack depth (aCondStack). */
642	uint8_t cCondDepth;
643	uint8_t bPadding2;
644	/** Condition sequence number (for generating unique labels). */
645	uint16_t uCondSeqNo;
646	/** Check IRQ seqeunce number (for generating unique lables). */
647	uint16_t uCheckIrqSeqNo;
648	uint8_t bPadding3;
649
650	/** The argument count + hidden regs from the IEM_MC_BEGIN statement. */
651	uint8_t cArgs;
652	/** The IEM_CIMPL_F_XXX flags from the IEM_MC_BEGIN statement. */
653	uint32_t fCImpl;
654	/** The IEM_MC_F_XXX flags from the IEM_MC_BEGIN statement. */
655	uint32_t fMc;
656
657	/** Core state requiring care with branches. */
658	IEMNATIVECORESTATE Core;
659
660	/** The condition nesting stack. */
661	IEMNATIVECOND aCondStack[2];
662
663	#ifndef IEM_WITH_THROW_CATCH
664	/** Pointer to the setjmp/longjmp buffer if we're not using C++ exceptions
665	* for recompilation error handling. */
666	jmp_buf JmpBuf;
667	#endif
668	} IEMRECOMPILERSTATE;
669	/** Pointer to a native recompiler state. */
670	typedef IEMRECOMPILERSTATE *PIEMRECOMPILERSTATE;
671
672
673	/** @def IEMNATIVE_TRY_SETJMP
674	* Wrapper around setjmp / try, hiding all the ugly differences.
675	*
676	* @note Use with extreme care as this is a fragile macro.
677	* @param a_pReNative The native recompile state.
678	* @param a_rcTarget The variable that should receive the status code in case
679	* of a longjmp/throw.
680	*/
681	/** @def IEMNATIVE_CATCH_LONGJMP_BEGIN
682	* Start wrapper for catch / setjmp-else.
683	*
684	* This will set up a scope.
685	*
686	* @note Use with extreme care as this is a fragile macro.
687	* @param a_pReNative The native recompile state.
688	* @param a_rcTarget The variable that should receive the status code in case
689	* of a longjmp/throw.
690	*/
691	/** @def IEMNATIVE_CATCH_LONGJMP_END
692	* End wrapper for catch / setjmp-else.
693	*
694	* This will close the scope set up by IEMNATIVE_CATCH_LONGJMP_BEGIN and clean
695	* up the state.
696	*
697	* @note Use with extreme care as this is a fragile macro.
698	* @param a_pReNative The native recompile state.
699	*/
700	/** @def IEMNATIVE_DO_LONGJMP
701	*
702	* Wrapper around longjmp / throw.
703	*
704	* @param a_pReNative The native recompile state.
705	* @param a_rc The status code jump back with / throw.
706	*/
707	#ifdef IEM_WITH_THROW_CATCH
708	# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
709	a_rcTarget = VINF_SUCCESS; \
710	try
711	# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
712	catch (int rcThrown) \
713	{ \
714	a_rcTarget = rcThrown
715	# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
716	} \
717	((void)0)
718	# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc) throw int(a_rc)
719	#else /* !IEM_WITH_THROW_CATCH */
720	# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
721	if ((a_rcTarget = setjmp((a_pReNative)->JmpBuf)) == 0)
722	# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
723	else \
724	{ \
725	((void)0)
726	# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
727	}
728	# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc) longjmp((a_pReNative)->JmpBuf, (a_rc))
729	#endif /* !IEM_WITH_THROW_CATCH */
730
731
732	/**
733	* Native recompiler worker for a threaded function.
734	*
735	* @returns New code buffer offset; throws VBox status code in case of a failure.
736	* @param pReNative The native recompiler state.
737	* @param off The current code buffer offset.
738	* @param pCallEntry The threaded call entry.
739	*
740	* @note This may throw/longjmp VBox status codes (int) to abort compilation, so no RT_NOEXCEPT!
741	*/
742	typedef uint32_t (VBOXCALL FNIEMNATIVERECOMPFUNC)(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry);
743	/** Pointer to a native recompiler worker for a threaded function. */
744	typedef FNIEMNATIVERECOMPFUNC *PFNIEMNATIVERECOMPFUNC;
745
746	/** Defines a native recompiler worker for a threaded function.
747	* @see FNIEMNATIVERECOMPFUNC */
748	#define IEM_DECL_IEMNATIVERECOMPFUNC_DEF(a_Name) \
749	uint32_t VBOXCALL a_Name(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry)
750
751	/** Prototypes a native recompiler function for a threaded function.
752	* @see FNIEMNATIVERECOMPFUNC */
753	#define IEM_DECL_IEMNATIVERECOMPFUNC_PROTO(a_Name) FNIEMNATIVERECOMPFUNC a_Name
754
755	DECL_HIDDEN_THROW(uint32_t) iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
756	uint32_t offWhere = UINT32_MAX, uint16_t uData = 0);
757	DECL_HIDDEN_THROW(void) iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere);
758	DECL_HIDDEN_THROW(void) iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
759	IEMNATIVEFIXUPTYPE enmType, int8_t offAddend = 0);
760	DECL_HIDDEN_THROW(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq);
761
762	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fPreferVolatile = true);
763	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm,
764	bool fPreferVolatile = true);
765	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
766	IEMNATIVEGSTREG enmGstReg, IEMNATIVEGSTREGUSE enmIntendedUse);
767	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
768	IEMNATIVEGSTREG enmGstReg);
769
770	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar);
771	DECL_HIDDEN_THROW(uint32_t) iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs);
772	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg);
773	DECLHIDDEN(void) iemNativeRegFree(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
774	DECLHIDDEN(void) iemNativeRegFreeTmp(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
775	DECLHIDDEN(void) iemNativeRegFreeTmpImm(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
776	DECLHIDDEN(void) iemNativeRegFreeAndFlushMask(PIEMRECOMPILERSTATE pReNative, uint32_t fHstRegMask) RT_NOEXCEPT;
777	DECL_HIDDEN_THROW(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off);
778
779	DECL_HIDDEN_THROW(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,
780	uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg);
781	DECL_HIDDEN_THROW(uint32_t) iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr);
782
783	extern DECL_HIDDEN_DATA(const char * const) g_apszIemNativeHstRegNames[];
784
785
786	/**
787	* Ensures that there is sufficient space in the instruction output buffer.
788	*
789	* This will reallocate the buffer if needed and allowed.
790	*
791	* @note Always use IEMNATIVE_ASSERT_INSTR_BUF_ENSURE when done to check the
792	* allocation size.
793	*
794	* @returns Pointer to the instruction output buffer on success; throws VBox
795	* status code on failure, so no need to check it.
796	* @param pReNative The native recompile state.
797	* @param off Current instruction offset. Works safely for UINT32_MAX
798	* as well.
799	* @param cInstrReq Number of instruction about to be added. It's okay to
800	* overestimate this a bit.
801	*/
802	DECL_FORCE_INLINE_THROW(PIEMNATIVEINSTR)
803	iemNativeInstrBufEnsure(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq)
804	{
805	uint64_t const offChecked = off + (uint64_t)cInstrReq; /** @todo may reconsider the need for UINT32_MAX safety... */
806	if (RT_LIKELY(offChecked <= pReNative->cInstrBufAlloc))
807	{
808	#ifdef VBOX_STRICT
809	pReNative->offInstrBufChecked = offChecked;
810	#endif
811	return pReNative->pInstrBuf;
812	}
813	return iemNativeInstrBufEnsureSlow(pReNative, off, cInstrReq);
814	}
815
816	/**
817	* Checks that we didn't exceed the space requested in the last
818	* iemNativeInstrBufEnsure() call.
819	*/
820	#define IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(a_pReNative, a_off) \
821	AssertMsg((a_off) <= (a_pReNative)->offInstrBufChecked, \
822	("off=%#x offInstrBufChecked=%#x\n", (a_off), (a_pReNative)->offInstrBufChecked))
823
824	/**
825	* Checks that a variable index is valid.
826	*/
827	#define IEMNATIVE_ASSERT_VAR_IDX(a_pReNative, a_idxVar) \
828	AssertMsg( (unsigned)(a_idxVar) < RT_ELEMENTS((a_pReNative)->Core.aVars) \
829	&& ((a_pReNative)->Core.bmVars & RT_BIT_32(a_idxVar)), ("%s=%d\n", #a_idxVar, a_idxVar))
830
831	/**
832	* Checks that a variable index is valid and that the variable is assigned the
833	* correct argument number.
834	* This also adds a RT_NOREF of a_idxVar.
835	*/
836	#define IEMNATIVE_ASSERT_ARG_VAR_IDX(a_pReNative, a_idxVar, a_uArgNo) do { \
837	RT_NOREF(a_idxVar); \
838	AssertMsg( (unsigned)(a_idxVar) < RT_ELEMENTS((a_pReNative)->Core.aVars) \
839	&& ((a_pReNative)->Core.bmVars & RT_BIT_32(a_idxVar))\
840	&& (a_pReNative)->Core.aVars[a_idxVar].uArgNo == (a_uArgNo) \
841	, ("%s=%d; uArgNo=%d, expected %u\n", #a_idxVar, a_idxVar, \
842	(a_pReNative)->Core.aVars[RT_MAX(a_idxVar, RT_ELEMENTS((a_pReNative)->Core.aVars)) - 1].uArgNo, a_uArgNo)); \
843	} while (0)
844
845	/**
846	* Calculates the stack address of a variable as a [r]BP displacement value.
847	*/
848	DECL_FORCE_INLINE(int32_t)
849	iemNativeStackCalcBpDisp(uint8_t idxStackSlot)
850	{
851	Assert(idxStackSlot < IEMNATIVE_FRAME_VAR_SLOTS);
852	return idxStackSlot * sizeof(uint64_t) + IEMNATIVE_FP_OFF_STACK_VARS;
853	}
854
855	/**
856	* Calculates the stack address of a variable as a [r]BP displacement value.
857	*/
858	DECL_FORCE_INLINE(int32_t)
859	iemNativeVarCalcBpDisp(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar)
860	{
861	return iemNativeStackCalcBpDisp(pReNative->Core.aVars[idxVar].idxStackSlot);
862	}
863
864	/** @} */
865
866	#endif /* !VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h */
867

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