IEMInternal.h@ 51182

Last change on this file since 51182 was 51182, checked in by vboxsync, 10 years ago
VMM/IEM: Implemented hardware task-switches, code path disabled.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
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1	/* $Id: IEMInternal.h 51182 2014-05-05 12:08:40Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** @def IEM_VERIFICATION_MODE_FULL
37	* Shorthand for:
38	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
39	*/
40	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
41	# define IEM_VERIFICATION_MODE_FULL
42	#endif
43
44
45	/** Finish and move to types.h */
46	typedef union
47	{
48	uint32_t u32;
49	} RTFLOAT32U;
50	typedef RTFLOAT32U *PRTFLOAT32U;
51	typedef RTFLOAT32U const *PCRTFLOAT32U;
52
53
54	/**
55	* Extended operand mode that includes a representation of 8-bit.
56	*
57	* This is used for packing down modes when invoking some C instruction
58	* implementations.
59	*/
60	typedef enum IEMMODEX
61	{
62	IEMMODEX_16BIT = IEMMODE_16BIT,
63	IEMMODEX_32BIT = IEMMODE_32BIT,
64	IEMMODEX_64BIT = IEMMODE_64BIT,
65	IEMMODEX_8BIT
66	} IEMMODEX;
67	AssertCompileSize(IEMMODEX, 4);
68
69
70	/**
71	* Branch types.
72	*/
73	typedef enum IEMBRANCH
74	{
75	IEMBRANCH_JUMP = 1,
76	IEMBRANCH_CALL,
77	IEMBRANCH_TRAP,
78	IEMBRANCH_SOFTWARE_INT,
79	IEMBRANCH_HARDWARE_INT
80	} IEMBRANCH;
81	AssertCompileSize(IEMBRANCH, 4);
82
83
84	/**
85	* A FPU result.
86	*/
87	typedef struct IEMFPURESULT
88	{
89	/** The output value. */
90	RTFLOAT80U r80Result;
91	/** The output status. */
92	uint16_t FSW;
93	} IEMFPURESULT;
94	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
95	/** Pointer to a FPU result. */
96	typedef IEMFPURESULT *PIEMFPURESULT;
97	/** Pointer to a const FPU result. */
98	typedef IEMFPURESULT const *PCIEMFPURESULT;
99
100
101	/**
102	* A FPU result consisting of two output values and FSW.
103	*/
104	typedef struct IEMFPURESULTTWO
105	{
106	/** The first output value. */
107	RTFLOAT80U r80Result1;
108	/** The output status. */
109	uint16_t FSW;
110	/** The second output value. */
111	RTFLOAT80U r80Result2;
112	} IEMFPURESULTTWO;
113	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
114	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
115	/** Pointer to a FPU result consisting of two output values and FSW. */
116	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
117	/** Pointer to a const FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
119
120
121	#ifdef IEM_VERIFICATION_MODE_FULL
122
123	/**
124	* Verification event type.
125	*/
126	typedef enum IEMVERIFYEVENT
127	{
128	IEMVERIFYEVENT_INVALID = 0,
129	IEMVERIFYEVENT_IOPORT_READ,
130	IEMVERIFYEVENT_IOPORT_WRITE,
131	IEMVERIFYEVENT_RAM_WRITE,
132	IEMVERIFYEVENT_RAM_READ
133	} IEMVERIFYEVENT;
134
135	/** Checks if the event type is a RAM read or write. */
136	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
137
138	/**
139	* Verification event record.
140	*/
141	typedef struct IEMVERIFYEVTREC
142	{
143	/** Pointer to the next record in the list. */
144	struct IEMVERIFYEVTREC *pNext;
145	/** The event type. */
146	IEMVERIFYEVENT enmEvent;
147	/** The event data. */
148	union
149	{
150	/** IEMVERIFYEVENT_IOPORT_READ */
151	struct
152	{
153	RTIOPORT Port;
154	uint32_t cbValue;
155	} IOPortRead;
156
157	/** IEMVERIFYEVENT_IOPORT_WRITE */
158	struct
159	{
160	RTIOPORT Port;
161	uint32_t cbValue;
162	uint32_t u32Value;
163	} IOPortWrite;
164
165	/** IEMVERIFYEVENT_RAM_READ */
166	struct
167	{
168	RTGCPHYS GCPhys;
169	uint32_t cb;
170	} RamRead;
171
172	/** IEMVERIFYEVENT_RAM_WRITE */
173	struct
174	{
175	RTGCPHYS GCPhys;
176	uint32_t cb;
177	uint8_t ab[512];
178	} RamWrite;
179	} u;
180	} IEMVERIFYEVTREC;
181	/** Pointer to an IEM event verification records. */
182	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
183
184	#endif /* IEM_VERIFICATION_MODE_FULL */
185
186
187	/**
188	* The per-CPU IEM state.
189	*/
190	typedef struct IEMCPU
191	{
192	/** Pointer to the CPU context - ring-3 contex. */
193	R3PTRTYPE(PCPUMCTX) pCtxR3;
194	/** Pointer to the CPU context - ring-0 contex. */
195	R0PTRTYPE(PCPUMCTX) pCtxR0;
196	/** Pointer to the CPU context - raw-mode contex. */
197	RCPTRTYPE(PCPUMCTX) pCtxRC;
198
199	/** Offset of the VMCPU structure relative to this structure (negative). */
200	int32_t offVMCpu;
201	/** Offset of the VM structure relative to this structure (negative). */
202	int32_t offVM;
203
204	/** Whether to bypass access handlers or not. */
205	bool fBypassHandlers;
206	/** Indicates that we're interpreting patch code - RC only! */
207	bool fInPatchCode;
208	/** Explicit alignment padding. */
209	bool afAlignment0[2];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE_FULL
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
264	bool fProblematicMemory;
265	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
266	* CPUM doesn't yet reflect. */
267	uint8_t uInjectCpl;
268	bool afAlignment2[3];
269	/** Mask of undefined eflags.
270	* The verifier will any difference in these flags. */
271	uint32_t fUndefinedEFlags;
272	/** The CS of the instruction being interpreted. */
273	RTSEL uOldCs;
274	/** The RIP of the instruction being interpreted. */
275	uint64_t uOldRip;
276	/** The physical address corresponding to abOpcodes[0]. */
277	RTGCPHYS GCPhysOpcodes;
278	#endif
279	/** @} */
280
281	/** @name Decoder state.
282	* @{ */
283
284	/** The default addressing mode . */
285	IEMMODE enmDefAddrMode;
286	/** The effective addressing mode . */
287	IEMMODE enmEffAddrMode;
288	/** The default operand mode . */
289	IEMMODE enmDefOpSize;
290	/** The effective operand mode . */
291	IEMMODE enmEffOpSize;
292
293	/** The prefix mask (IEM_OP_PRF_XXX). */
294	uint32_t fPrefixes;
295	/** The extra REX ModR/M register field bit (REX.R << 3). */
296	uint8_t uRexReg;
297	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
298	* (REX.B << 3). */
299	uint8_t uRexB;
300	/** The extra REX SIB index field bit (REX.X << 3). */
301	uint8_t uRexIndex;
302	/** The effective segment register (X86_SREG_XXX). */
303	uint8_t iEffSeg;
304
305	/** The current offset into abOpcodes. */
306	uint8_t offOpcode;
307	/** The size of what has currently been fetched into abOpcodes. */
308	uint8_t cbOpcode;
309	/** The opcode bytes. */
310	uint8_t abOpcode[15];
311	/** Offset into abOpcodes where the FPU instruction starts.
312	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
313	* instruction result is committed. */
314	uint8_t offFpuOpcode;
315
316	/** @}*/
317
318	/** Alignment padding for aMemMappings. */
319	uint8_t abAlignment2[4];
320
321	/** The number of active guest memory mappings. */
322	uint8_t cActiveMappings;
323	/** The next unused mapping index. */
324	uint8_t iNextMapping;
325	/** Records for tracking guest memory mappings. */
326	struct
327	{
328	/** The address of the mapped bytes. */
329	void *pv;
330	#if defined(IN_RC) && HC_ARCH_BITS == 64
331	uint32_t u32Alignment3; /*< Alignment padding. /
332	#endif
333	/** The access flags (IEM_ACCESS_XXX).
334	* IEM_ACCESS_INVALID if the entry is unused. */
335	uint32_t fAccess;
336	#if HC_ARCH_BITS == 64
337	uint32_t u32Alignment4; /*< Alignment padding. /
338	#endif
339	} aMemMappings[3];
340
341	/** Locking records for the mapped memory. */
342	union
343	{
344	PGMPAGEMAPLOCK Lock;
345	uint64_t au64Padding[2];
346	} aMemMappingLocks[3];
347
348	/** Bounce buffer info.
349	* This runs in parallel to aMemMappings. */
350	struct
351	{
352	/** The physical address of the first byte. */
353	RTGCPHYS GCPhysFirst;
354	/** The physical address of the second page. */
355	RTGCPHYS GCPhysSecond;
356	/** The number of bytes in the first page. */
357	uint16_t cbFirst;
358	/** The number of bytes in the second page. */
359	uint16_t cbSecond;
360	/** Whether it's unassigned memory. */
361	bool fUnassigned;
362	/** Explicit alignment padding. */
363	bool afAlignment5[3];
364	} aMemBbMappings[3];
365
366	/** Bounce buffer storage.
367	* This runs in parallel to aMemMappings and aMemBbMappings. */
368	struct
369	{
370	uint8_t ab[512];
371	} aBounceBuffers[3];
372
373	/** @name Target CPU information.
374	* @{ */
375	/** EDX value of CPUID(1).
376	* @remarks Some bits are subject to change and must be queried dynamically. */
377	uint32_t fCpuIdStdFeaturesEdx;
378	/** ECX value of CPUID(1).
379	* @remarks Some bits are subject to change and must be queried dynamically. */
380	uint32_t fCpuIdStdFeaturesEcx;
381	/** The CPU vendor. */
382	CPUMCPUVENDOR enmCpuVendor;
383	/** @} */
384
385	/** @name Host CPU information.
386	* @{ */
387	/** EDX value of CPUID(1). */
388	uint32_t fHostCpuIdStdFeaturesEdx;
389	/** ECX value of CPUID(1). */
390	uint32_t fHostCpuIdStdFeaturesEcx;
391	/** The CPU vendor. */
392	CPUMCPUVENDOR enmHostCpuVendor;
393	/** @} */
394
395	#ifdef IEM_VERIFICATION_MODE_FULL
396	/** The event verification records for what IEM did (LIFO). */
397	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
398	/** Insertion point for pIemEvtRecHead. */
399	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
400	/** The event verification records for what the other party did (FIFO). */
401	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
402	/** Insertion point for pOtherEvtRecHead. */
403	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
404	/** List of free event records. */
405	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
406	#endif
407	} IEMCPU;
408	/** Pointer to the per-CPU IEM state. */
409	typedef IEMCPU *PIEMCPU;
410	/** Pointer to the const per-CPU IEM state. */
411	typedef IEMCPU const *PCIEMCPU;
412
413	/** Converts a IEMCPU pointer to a VMCPU pointer.
414	* @returns VMCPU pointer.
415	* @param a_pIemCpu The IEM per CPU instance data.
416	*/
417	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
418
419	/** Converts a IEMCPU pointer to a VM pointer.
420	* @returns VM pointer.
421	* @param a_pIemCpu The IEM per CPU instance data.
422	*/
423	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
424
425	/** @name IEM_ACCESS_XXX - Access details.
426	* @{ */
427	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
428	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
429	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
430	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
431	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
432	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
433	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
434	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
435	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
436	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
437	/** The writes are partial, so if initialize the bounce buffer with the
438	* orignal RAM content. */
439	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
440	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
441	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
442	/** Read+write data alias. */
443	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
444	/** Write data alias. */
445	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
446	/** Read data alias. */
447	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
448	/** Instruction fetch alias. */
449	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
450	/** Stack write alias. */
451	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
452	/** Stack read alias. */
453	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
454	/** Stack read+write alias. */
455	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
456	/** Read system table alias. */
457	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
458	/** Read+write system table alias. */
459	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
460	/** @} */
461
462	/** @name Prefix constants (IEMCPU::fPrefixes)
463	* @{ */
464	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
465	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
466	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
467	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
468	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
469	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
470	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
471
472	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
473	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
474	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
475
476	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
477	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
478	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
479
480	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
481	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
482	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
483	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
484	/** Mask with all the REX prefix flags.
485	* This is generally for use when needing to undo the REX prefixes when they
486	* are followed legacy prefixes and therefore does not immediately preceed
487	* the first opcode byte.
488	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
489	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
490	/** @} */
491
492	/** @name Opcode forms
493	* @{ */
494	/** ModR/M: reg, r/m */
495	#define IEMOPFORM_RM 0
496	/** ModR/M: reg, r/m (register) */
497	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
498	/** ModR/M: reg, r/m (memory) */
499	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
500	/** ModR/M: r/m, reg */
501	#define IEMOPFORM_MR 1
502	/** ModR/M: r/m (register), reg */
503	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
504	/** ModR/M: r/m (memory), reg */
505	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
506	/** ModR/M: r/m only */
507	#define IEMOPFORM_M 2
508	/** ModR/M: r/m only (register). */
509	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
510	/** ModR/M: r/m only (memory). */
511	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
512	/** ModR/M: reg only */
513	#define IEMOPFORM_R 3
514
515	/** Fixed register instruction, no R/M. */
516	#define IEMOPFORM_FIXED 4
517
518	/** The r/m is a register. */
519	#define IEMOPFORM_MOD3 RT_BIT_32(8)
520	/** The r/m is a memory access. */
521	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
522	/** @} */
523
524	/**
525	* Possible hardware task switch sources.
526	*/
527	typedef enum IEMTASKSWITCH
528	{
529	/** Task switch caused by an interrupt/exception. */
530	IEMTASKSWITCH_INT_XCPT = 1,
531	/** Task switch caused by a far CALL. */
532	IEMTASKSWITCH_CALL,
533	/** Task switch caused by a far JMP. */
534	IEMTASKSWITCH_JUMP,
535	/** Task switch caused by an IRET. */
536	IEMTASKSWITCH_IRET
537	} IEMTASKSWITCH;
538	AssertCompileSize(IEMTASKSWITCH, 4);
539
540
541	/**
542	* Tests if verification mode is enabled.
543	*
544	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
545	* should therefore cause the compiler to eliminate the verification branch
546	* of an if statement. */
547	#ifdef IEM_VERIFICATION_MODE_FULL
548	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
549	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
550	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
551	#else
552	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
553	#endif
554
555	/**
556	* Tests if full verification mode is enabled.
557	*
558	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
559	* should therefore cause the compiler to eliminate the verification branch
560	* of an if statement. */
561	#ifdef IEM_VERIFICATION_MODE_FULL
562	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
563	#else
564	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
565	#endif
566
567	/**
568	* Tests if full verification mode is enabled again REM.
569	*
570	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
571	* should therefore cause the compiler to eliminate the verification branch
572	* of an if statement. */
573	#ifdef IEM_VERIFICATION_MODE_FULL
574	# ifdef IEM_VERIFICATION_MODE_FULL_HM
575	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
576	# else
577	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
578	# endif
579	#else
580	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
581	#endif
582
583	/** @def IEM_VERIFICATION_MODE
584	* Indicates that one of the verfication modes are enabled.
585	*/
586	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
587	# define IEM_VERIFICATION_MODE
588	#endif
589
590	/**
591	* Indicates to the verifier that the given flag set is undefined.
592	*
593	* Can be invoked again to add more flags.
594	*
595	* This is a NOOP if the verifier isn't compiled in.
596	*/
597	#ifdef IEM_VERIFICATION_MODE_FULL
598	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
599	#else
600	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
601	#endif
602
603
604	/** @def IEM_DECL_IMPL_TYPE
605	* For typedef'ing an instruction implementation function.
606	*
607	* @param a_RetType The return type.
608	* @param a_Name The name of the type.
609	* @param a_ArgList The argument list enclosed in parentheses.
610	*/
611
612	/** @def IEM_DECL_IMPL_DEF
613	* For defining an instruction implementation function.
614	*
615	* @param a_RetType The return type.
616	* @param a_Name The name of the type.
617	* @param a_ArgList The argument list enclosed in parentheses.
618	*/
619
620	#if defined(__GNUC__) && defined(RT_ARCH_X86)
621	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
622	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
623	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
624	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
625
626	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
627	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
628	a_RetType (__fastcall a_Name) a_ArgList
629	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
630	a_RetType __fastcall a_Name a_ArgList
631
632	#else
633	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
634	a_RetType (VBOXCALL a_Name) a_ArgList
635	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
636	a_RetType VBOXCALL a_Name a_ArgList
637
638	#endif
639
640	/** @name Arithmetic assignment operations on bytes (binary).
641	* @{ */
642	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
643	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
644	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
645	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
646	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
647	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
648	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
649	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
650	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
651	/** @} */
652
653	/** @name Arithmetic assignment operations on words (binary).
654	* @{ */
655	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
656	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
657	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
658	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
659	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
660	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
661	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
662	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
663	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
664	/** @} */
665
666	/** @name Arithmetic assignment operations on double words (binary).
667	* @{ */
668	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
669	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
670	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
671	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
672	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
673	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
674	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
675	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
676	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
677	/** @} */
678
679	/** @name Arithmetic assignment operations on quad words (binary).
680	* @{ */
681	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
682	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
683	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
684	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
685	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
686	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
687	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
688	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
689	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
690	/** @} */
691
692	/** @name Compare operations (thrown in with the binary ops).
693	* @{ */
694	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
695	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
696	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
697	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
698	/** @} */
699
700	/** @name Test operations (thrown in with the binary ops).
701	* @{ */
702	FNIEMAIMPLBINU8 iemAImpl_test_u8;
703	FNIEMAIMPLBINU16 iemAImpl_test_u16;
704	FNIEMAIMPLBINU32 iemAImpl_test_u32;
705	FNIEMAIMPLBINU64 iemAImpl_test_u64;
706	/** @} */
707
708	/** @name Bit operations operations (thrown in with the binary ops).
709	* @{ */
710	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
711	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
712	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
713	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
714	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
715	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
716	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
717	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
718	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
719	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
720	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
721	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
722	/** @} */
723
724	/** @name Exchange memory with register operations.
725	* @{ */
726	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
727	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
728	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
729	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
730	/** @} */
731
732	/** @name Exchange and add operations.
733	* @{ */
734	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
735	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
736	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
738	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
739	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
740	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
741	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
742	/** @} */
743
744	/** @name Compare and exchange.
745	* @{ */
746	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
747	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
748	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
749	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
750	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
751	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
752	#ifdef RT_ARCH_X86
753	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
754	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
755	#else
756	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
757	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
758	#endif
759	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
760	uint32_t *pEFlags));
761	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
762	uint32_t *pEFlags));
763	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
764	uint32_t *pEFlags));
765	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
766	uint32_t *pEFlags));
767	/** @} */
768
769	/** @name Memory ordering
770	* @{ */
771	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
772	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
773	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
774	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
775	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
776	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
777	/** @} */
778
779	/** @name Double precision shifts
780	* @{ */
781	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
782	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
783	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
784	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
785	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
786	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
787	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
788	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
789	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
790	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
791	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
792	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
793	/** @} */
794
795
796	/** @name Bit search operations (thrown in with the binary ops).
797	* @{ */
798	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
799	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
800	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
801	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
802	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
803	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
804	/** @} */
805
806	/** @name Signed multiplication operations (thrown in with the binary ops).
807	* @{ */
808	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
809	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
810	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
811	/** @} */
812
813	/** @name Arithmetic assignment operations on bytes (unary).
814	* @{ */
815	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
816	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
817	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
818	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
819	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
820	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
821	/** @} */
822
823	/** @name Arithmetic assignment operations on words (unary).
824	* @{ */
825	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
826	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
827	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
828	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
829	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
830	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
831	/** @} */
832
833	/** @name Arithmetic assignment operations on double words (unary).
834	* @{ */
835	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
836	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
837	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
838	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
839	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
840	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
841	/** @} */
842
843	/** @name Arithmetic assignment operations on quad words (unary).
844	* @{ */
845	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
846	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
847	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
848	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
849	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
850	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
851	/** @} */
852
853
854	/** @name Shift operations on bytes (Group 2).
855	* @{ */
856	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
857	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
858	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
859	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
860	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
861	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
862	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
863	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
864	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
865	/** @} */
866
867	/** @name Shift operations on words (Group 2).
868	* @{ */
869	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
870	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
871	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
872	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
873	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
874	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
875	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
876	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
877	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
878	/** @} */
879
880	/** @name Shift operations on double words (Group 2).
881	* @{ */
882	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
883	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
884	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
885	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
886	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
887	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
888	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
889	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
890	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
891	/** @} */
892
893	/** @name Shift operations on words (Group 2).
894	* @{ */
895	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
896	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
897	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
898	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
899	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
900	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
901	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
902	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
903	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
904	/** @} */
905
906	/** @name Multiplication and division operations.
907	* @{ */
908	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
909	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
910	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
911	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
912
913	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
914	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
915	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
916	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
917
918	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
919	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
920	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
921	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
922
923	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
924	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
925	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
926	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
927	/** @} */
928
929	/** @name Byte Swap.
930	* @{ */
931	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
932	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
933	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
934	/** @} */
935
936	/** @name Misc.
937	* @{ */
938	FNIEMAIMPLBINU16 iemAImpl_arpl;
939	/** @} */
940
941
942	/** @name FPU operations taking a 32-bit float argument
943	* @{ */
944	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
945	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
946	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
947
948	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
949	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
950	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
951
952	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
953	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
954	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
955	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
956	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
957	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
958	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
959
960	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
961	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
962	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
963	/** @} */
964
965	/** @name FPU operations taking a 64-bit float argument
966	* @{ */
967	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
968	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
969	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
970
971	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
972	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
973	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
974	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
975	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
976	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
977
978	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
979	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
980	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
981	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
982	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
983	/** @} */
984
985	/** @name FPU operations taking a 80-bit float argument
986	* @{ */
987	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
988	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
989	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
990	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
991	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
992	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
993	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
994	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
995	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
996	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
997	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
998	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
999
1000	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
1001	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
1002
1003	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1004	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1005	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1006	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1007	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1008
1009	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1010	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1011	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1012	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1013	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1014
1015	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1016	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1017	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1018	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1019	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1020	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1021	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1022	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1023	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1024	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1025
1026	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1027	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1028	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1029	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1030
1031	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1032	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1033	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1034	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1035	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1036	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1037	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1038	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1039	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1040
1041	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1042	PCRTFLOAT80U pr80Val));
1043	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1044	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1045	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1046	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1047
1048	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1049	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1050	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1051
1052	/** @} */
1053
1054	/** @name FPU operations taking a 16-bit signed integer argument
1055	* @{ */
1056	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1057	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1058	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1059
1060	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1061	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1062	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1063	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1064	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1065	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1066
1067	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1068	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1069
1070	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1071	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1072	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1073	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1074	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1075	/** @} */
1076
1077	/** @name FPU operations taking a 32-bit signed integer argument
1078	* @{ */
1079	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1080	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1081	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1082
1083	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1084	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1085	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1086	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1087	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1088	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1089
1090	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1091	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1092
1093	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1094	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1095	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1096	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1097	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1098	/** @} */
1099
1100	/** @name FPU operations taking a 64-bit signed integer argument
1101	* @{ */
1102	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1103	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1104	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1105
1106	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1107	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1108	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1109	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1110	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1111	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1112
1113	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1114	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1115
1116	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1117	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1118	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1119	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1120	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1121	/** @} */
1122
1123
1124	/** Temporary type representing a 256-bit vector register. */
1125	typedef struct {uint64_t au64[4]; } IEMVMM256;
1126	/** Temporary type pointing to a 256-bit vector register. */
1127	typedef IEMVMM256 *PIEMVMM256;
1128	/** Temporary type pointing to a const 256-bit vector register. */
1129	typedef IEMVMM256 *PCIEMVMM256;
1130
1131
1132	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1133	* @{ */
1134	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1135	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1136	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1137	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1138	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1139	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1140	/** @} */
1141
1142	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1143	* @{ */
1144	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1145	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1146	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1147	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1148	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1149	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1150	/** @} */
1151
1152	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1153	* @{ */
1154	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1155	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1156	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1157	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1158	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1159	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1160	/** @} */
1161
1162	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1163	* @{ */
1164	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1165	uint128_t const *pu128Src, uint8_t bEvil));
1166	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1167	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1168	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1169	/** @} */
1170
1171	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1172	* @{ */
1173	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1174	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1175	/** @} */
1176
1177
1178
1179	/** @name Function tables.
1180	* @{
1181	*/
1182
1183	/**
1184	* Function table for a binary operator providing implementation based on
1185	* operand size.
1186	*/
1187	typedef struct IEMOPBINSIZES
1188	{
1189	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1190	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1191	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1192	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1193	} IEMOPBINSIZES;
1194	/** Pointer to a binary operator function table. */
1195	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1196
1197
1198	/**
1199	* Function table for a unary operator providing implementation based on
1200	* operand size.
1201	*/
1202	typedef struct IEMOPUNARYSIZES
1203	{
1204	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1205	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1206	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1207	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1208	} IEMOPUNARYSIZES;
1209	/** Pointer to a unary operator function table. */
1210	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1211
1212
1213	/**
1214	* Function table for a shift operator providing implementation based on
1215	* operand size.
1216	*/
1217	typedef struct IEMOPSHIFTSIZES
1218	{
1219	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1220	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1221	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1222	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1223	} IEMOPSHIFTSIZES;
1224	/** Pointer to a shift operator function table. */
1225	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1226
1227
1228	/**
1229	* Function table for a multiplication or division operation.
1230	*/
1231	typedef struct IEMOPMULDIVSIZES
1232	{
1233	PFNIEMAIMPLMULDIVU8 pfnU8;
1234	PFNIEMAIMPLMULDIVU16 pfnU16;
1235	PFNIEMAIMPLMULDIVU32 pfnU32;
1236	PFNIEMAIMPLMULDIVU64 pfnU64;
1237	} IEMOPMULDIVSIZES;
1238	/** Pointer to a multiplication or division operation function table. */
1239	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1240
1241
1242	/**
1243	* Function table for a double precision shift operator providing implementation
1244	* based on operand size.
1245	*/
1246	typedef struct IEMOPSHIFTDBLSIZES
1247	{
1248	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1249	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1250	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1251	} IEMOPSHIFTDBLSIZES;
1252	/** Pointer to a double precision shift function table. */
1253	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1254
1255
1256	/**
1257	* Function table for media instruction taking two full sized media registers,
1258	* optionally the 2nd being a memory reference (only modifying the first op.)
1259	*/
1260	typedef struct IEMOPMEDIAF2
1261	{
1262	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1263	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1264	} IEMOPMEDIAF2;
1265	/** Pointer to a media operation function table for full sized ops. */
1266	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1267
1268	/**
1269	* Function table for media instruction taking taking one full and one lower
1270	* half media register.
1271	*/
1272	typedef struct IEMOPMEDIAF1L1
1273	{
1274	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1275	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1276	} IEMOPMEDIAF1L1;
1277	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1278	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1279
1280	/**
1281	* Function table for media instruction taking taking one full and one high half
1282	* media register.
1283	*/
1284	typedef struct IEMOPMEDIAF1H1
1285	{
1286	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1287	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1288	} IEMOPMEDIAF1H1;
1289	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1290	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1291
1292
1293	/** @} */
1294
1295
1296	/** @name C instruction implementations for anything slightly complicated.
1297	* @{ */
1298
1299	/**
1300	* For typedef'ing or declaring a C instruction implementation function taking
1301	* no extra arguments.
1302	*
1303	* @param a_Name The name of the type.
1304	*/
1305	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1306	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1307	/**
1308	* For defining a C instruction implementation function taking no extra
1309	* arguments.
1310	*
1311	* @param a_Name The name of the function
1312	*/
1313	# define IEM_CIMPL_DEF_0(a_Name) \
1314	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1315	/**
1316	* For calling a C instruction implementation function taking no extra
1317	* arguments.
1318	*
1319	* This special call macro adds default arguments to the call and allow us to
1320	* change these later.
1321	*
1322	* @param a_fn The name of the function.
1323	*/
1324	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1325
1326	/**
1327	* For typedef'ing or declaring a C instruction implementation function taking
1328	* one extra argument.
1329	*
1330	* @param a_Name The name of the type.
1331	* @param a_Type0 The argument type.
1332	* @param a_Arg0 The argument name.
1333	*/
1334	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1335	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1336	/**
1337	* For defining a C instruction implementation function taking one extra
1338	* argument.
1339	*
1340	* @param a_Name The name of the function
1341	* @param a_Type0 The argument type.
1342	* @param a_Arg0 The argument name.
1343	*/
1344	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1345	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1346	/**
1347	* For calling a C instruction implementation function taking one extra
1348	* argument.
1349	*
1350	* This special call macro adds default arguments to the call and allow us to
1351	* change these later.
1352	*
1353	* @param a_fn The name of the function.
1354	* @param a0 The name of the 1st argument.
1355	*/
1356	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1357
1358	/**
1359	* For typedef'ing or declaring a C instruction implementation function taking
1360	* two extra arguments.
1361	*
1362	* @param a_Name The name of the type.
1363	* @param a_Type0 The type of the 1st argument
1364	* @param a_Arg0 The name of the 1st argument.
1365	* @param a_Type1 The type of the 2nd argument.
1366	* @param a_Arg1 The name of the 2nd argument.
1367	*/
1368	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1369	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1370	/**
1371	* For defining a C instruction implementation function taking two extra
1372	* arguments.
1373	*
1374	* @param a_Name The name of the function.
1375	* @param a_Type0 The type of the 1st argument
1376	* @param a_Arg0 The name of the 1st argument.
1377	* @param a_Type1 The type of the 2nd argument.
1378	* @param a_Arg1 The name of the 2nd argument.
1379	*/
1380	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1381	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1382	/**
1383	* For calling a C instruction implementation function taking two extra
1384	* arguments.
1385	*
1386	* This special call macro adds default arguments to the call and allow us to
1387	* change these later.
1388	*
1389	* @param a_fn The name of the function.
1390	* @param a0 The name of the 1st argument.
1391	* @param a1 The name of the 2nd argument.
1392	*/
1393	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1394
1395	/**
1396	* For typedef'ing or declaring a C instruction implementation function taking
1397	* three extra arguments.
1398	*
1399	* @param a_Name The name of the type.
1400	* @param a_Type0 The type of the 1st argument
1401	* @param a_Arg0 The name of the 1st argument.
1402	* @param a_Type1 The type of the 2nd argument.
1403	* @param a_Arg1 The name of the 2nd argument.
1404	* @param a_Type2 The type of the 3rd argument.
1405	* @param a_Arg2 The name of the 3rd argument.
1406	*/
1407	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1408	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1409	/**
1410	* For defining a C instruction implementation function taking three extra
1411	* arguments.
1412	*
1413	* @param a_Name The name of the function.
1414	* @param a_Type0 The type of the 1st argument
1415	* @param a_Arg0 The name of the 1st argument.
1416	* @param a_Type1 The type of the 2nd argument.
1417	* @param a_Arg1 The name of the 2nd argument.
1418	* @param a_Type2 The type of the 3rd argument.
1419	* @param a_Arg2 The name of the 3rd argument.
1420	*/
1421	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1422	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1423	/**
1424	* For calling a C instruction implementation function taking three extra
1425	* arguments.
1426	*
1427	* This special call macro adds default arguments to the call and allow us to
1428	* change these later.
1429	*
1430	* @param a_fn The name of the function.
1431	* @param a0 The name of the 1st argument.
1432	* @param a1 The name of the 2nd argument.
1433	* @param a2 The name of the 3rd argument.
1434	*/
1435	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1436
1437
1438	/**
1439	* For typedef'ing or declaring a C instruction implementation function taking
1440	* four extra arguments.
1441	*
1442	* @param a_Name The name of the type.
1443	* @param a_Type0 The type of the 1st argument
1444	* @param a_Arg0 The name of the 1st argument.
1445	* @param a_Type1 The type of the 2nd argument.
1446	* @param a_Arg1 The name of the 2nd argument.
1447	* @param a_Type2 The type of the 3rd argument.
1448	* @param a_Arg2 The name of the 3rd argument.
1449	* @param a_Type3 The type of the 4th argument.
1450	* @param a_Arg3 The name of the 4th argument.
1451	*/
1452	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1453	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1454	/**
1455	* For defining a C instruction implementation function taking four extra
1456	* arguments.
1457	*
1458	* @param a_Name The name of the function.
1459	* @param a_Type0 The type of the 1st argument
1460	* @param a_Arg0 The name of the 1st argument.
1461	* @param a_Type1 The type of the 2nd argument.
1462	* @param a_Arg1 The name of the 2nd argument.
1463	* @param a_Type2 The type of the 3rd argument.
1464	* @param a_Arg2 The name of the 3rd argument.
1465	* @param a_Type3 The type of the 4th argument.
1466	* @param a_Arg3 The name of the 4th argument.
1467	*/
1468	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1469	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1470	a_Type2 a_Arg2, a_Type3 a_Arg3))
1471	/**
1472	* For calling a C instruction implementation function taking four extra
1473	* arguments.
1474	*
1475	* This special call macro adds default arguments to the call and allow us to
1476	* change these later.
1477	*
1478	* @param a_fn The name of the function.
1479	* @param a0 The name of the 1st argument.
1480	* @param a1 The name of the 2nd argument.
1481	* @param a2 The name of the 3rd argument.
1482	* @param a3 The name of the 4th argument.
1483	*/
1484	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1485
1486
1487	/**
1488	* For typedef'ing or declaring a C instruction implementation function taking
1489	* five extra arguments.
1490	*
1491	* @param a_Name The name of the type.
1492	* @param a_Type0 The type of the 1st argument
1493	* @param a_Arg0 The name of the 1st argument.
1494	* @param a_Type1 The type of the 2nd argument.
1495	* @param a_Arg1 The name of the 2nd argument.
1496	* @param a_Type2 The type of the 3rd argument.
1497	* @param a_Arg2 The name of the 3rd argument.
1498	* @param a_Type3 The type of the 4th argument.
1499	* @param a_Arg3 The name of the 4th argument.
1500	* @param a_Type4 The type of the 5th argument.
1501	* @param a_Arg4 The name of the 5th argument.
1502	*/
1503	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1504	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1505	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1506	a_Type3 a_Arg3, a_Type4 a_Arg4))
1507	/**
1508	* For defining a C instruction implementation function taking five extra
1509	* arguments.
1510	*
1511	* @param a_Name The name of the function.
1512	* @param a_Type0 The type of the 1st argument
1513	* @param a_Arg0 The name of the 1st argument.
1514	* @param a_Type1 The type of the 2nd argument.
1515	* @param a_Arg1 The name of the 2nd argument.
1516	* @param a_Type2 The type of the 3rd argument.
1517	* @param a_Arg2 The name of the 3rd argument.
1518	* @param a_Type3 The type of the 4th argument.
1519	* @param a_Arg3 The name of the 4th argument.
1520	* @param a_Type4 The type of the 5th argument.
1521	* @param a_Arg4 The name of the 5th argument.
1522	*/
1523	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1524	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1525	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1526	a_Type3 a_Arg3, a_Type4 a_Arg4))
1527	/**
1528	* For calling a C instruction implementation function taking five extra
1529	* arguments.
1530	*
1531	* This special call macro adds default arguments to the call and allow us to
1532	* change these later.
1533	*
1534	* @param a_fn The name of the function.
1535	* @param a0 The name of the 1st argument.
1536	* @param a1 The name of the 2nd argument.
1537	* @param a2 The name of the 3rd argument.
1538	* @param a3 The name of the 4th argument.
1539	* @param a4 The name of the 5th argument.
1540	*/
1541	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1542
1543	/** @} */
1544
1545
1546	/** @} */
1547
1548	RT_C_DECLS_END
1549
1550	#endif
1551

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 51182

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