IEMInternal.h@ 49141

Last change on this file since 49141 was 47754, checked in by vboxsync, 11 years ago
IEM: POP rSP fix.
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1	/* $Id: IEMInternal.h 47754 2013-08-15 11:41:03Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** @def IEM_VERIFICATION_MODE_FULL
37	* Shorthand for:
38	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
39	*/
40	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
41	# define IEM_VERIFICATION_MODE_FULL
42	#endif
43
44
45	/** Finish and move to types.h */
46	typedef union
47	{
48	uint32_t u32;
49	} RTFLOAT32U;
50	typedef RTFLOAT32U *PRTFLOAT32U;
51	typedef RTFLOAT32U const *PCRTFLOAT32U;
52
53
54	/**
55	* Extended operand mode that includes a representation of 8-bit.
56	*
57	* This is used for packing down modes when invoking some C instruction
58	* implementations.
59	*/
60	typedef enum IEMMODEX
61	{
62	IEMMODEX_16BIT = IEMMODE_16BIT,
63	IEMMODEX_32BIT = IEMMODE_32BIT,
64	IEMMODEX_64BIT = IEMMODE_64BIT,
65	IEMMODEX_8BIT
66	} IEMMODEX;
67	AssertCompileSize(IEMMODEX, 4);
68
69
70	/**
71	* Branch types.
72	*/
73	typedef enum IEMBRANCH
74	{
75	IEMBRANCH_JUMP = 1,
76	IEMBRANCH_CALL,
77	IEMBRANCH_TRAP,
78	IEMBRANCH_SOFTWARE_INT,
79	IEMBRANCH_HARDWARE_INT
80	} IEMBRANCH;
81	AssertCompileSize(IEMBRANCH, 4);
82
83
84	/**
85	* A FPU result.
86	*/
87	typedef struct IEMFPURESULT
88	{
89	/** The output value. */
90	RTFLOAT80U r80Result;
91	/** The output status. */
92	uint16_t FSW;
93	} IEMFPURESULT;
94	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
95	/** Pointer to a FPU result. */
96	typedef IEMFPURESULT *PIEMFPURESULT;
97	/** Pointer to a const FPU result. */
98	typedef IEMFPURESULT const *PCIEMFPURESULT;
99
100
101	/**
102	* A FPU result consisting of two output values and FSW.
103	*/
104	typedef struct IEMFPURESULTTWO
105	{
106	/** The first output value. */
107	RTFLOAT80U r80Result1;
108	/** The output status. */
109	uint16_t FSW;
110	/** The second output value. */
111	RTFLOAT80U r80Result2;
112	} IEMFPURESULTTWO;
113	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
114	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
115	/** Pointer to a FPU result consisting of two output values and FSW. */
116	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
117	/** Pointer to a const FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
119
120
121	#ifdef IEM_VERIFICATION_MODE_FULL
122
123	/**
124	* Verification event type.
125	*/
126	typedef enum IEMVERIFYEVENT
127	{
128	IEMVERIFYEVENT_INVALID = 0,
129	IEMVERIFYEVENT_IOPORT_READ,
130	IEMVERIFYEVENT_IOPORT_WRITE,
131	IEMVERIFYEVENT_RAM_WRITE,
132	IEMVERIFYEVENT_RAM_READ
133	} IEMVERIFYEVENT;
134
135	/** Checks if the event type is a RAM read or write. */
136	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
137
138	/**
139	* Verification event record.
140	*/
141	typedef struct IEMVERIFYEVTREC
142	{
143	/** Pointer to the next record in the list. */
144	struct IEMVERIFYEVTREC *pNext;
145	/** The event type. */
146	IEMVERIFYEVENT enmEvent;
147	/** The event data. */
148	union
149	{
150	/** IEMVERIFYEVENT_IOPORT_READ */
151	struct
152	{
153	RTIOPORT Port;
154	uint32_t cbValue;
155	} IOPortRead;
156
157	/** IEMVERIFYEVENT_IOPORT_WRITE */
158	struct
159	{
160	RTIOPORT Port;
161	uint32_t cbValue;
162	uint32_t u32Value;
163	} IOPortWrite;
164
165	/** IEMVERIFYEVENT_RAM_READ */
166	struct
167	{
168	RTGCPHYS GCPhys;
169	uint32_t cb;
170	} RamRead;
171
172	/** IEMVERIFYEVENT_RAM_WRITE */
173	struct
174	{
175	RTGCPHYS GCPhys;
176	uint32_t cb;
177	uint8_t ab[512];
178	} RamWrite;
179	} u;
180	} IEMVERIFYEVTREC;
181	/** Pointer to an IEM event verification records. */
182	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
183
184	#endif /* IEM_VERIFICATION_MODE_FULL */
185
186
187	/**
188	* The per-CPU IEM state.
189	*/
190	typedef struct IEMCPU
191	{
192	/** Pointer to the CPU context - ring-3 contex. */
193	R3PTRTYPE(PCPUMCTX) pCtxR3;
194	/** Pointer to the CPU context - ring-0 contex. */
195	R0PTRTYPE(PCPUMCTX) pCtxR0;
196	/** Pointer to the CPU context - raw-mode contex. */
197	RCPTRTYPE(PCPUMCTX) pCtxRC;
198
199	/** Offset of the VMCPU structure relative to this structure (negative). */
200	int32_t offVMCpu;
201	/** Offset of the VM structure relative to this structure (negative). */
202	int32_t offVM;
203
204	/** Whether to bypass access handlers or not. */
205	bool fBypassHandlers;
206	/** Indicates that we're interpreting patch code - RC only! */
207	bool fInPatchCode;
208	/** Explicit alignment padding. */
209	bool afAlignment0[2];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE_FULL
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
264	bool fProblematicMemory;
265	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
266	* CPUM doesn't yet reflect. */
267	uint8_t uInjectCpl;
268	bool afAlignment2[3];
269	/** Mask of undefined eflags.
270	* The verifier will any difference in these flags. */
271	uint32_t fUndefinedEFlags;
272	/** The CS of the instruction being interpreted. */
273	RTSEL uOldCs;
274	/** The RIP of the instruction being interpreted. */
275	uint64_t uOldRip;
276	/** The physical address corresponding to abOpcodes[0]. */
277	RTGCPHYS GCPhysOpcodes;
278	#endif
279	/** @} */
280
281	/** @name Decoder state.
282	* @{ */
283
284	/** The default addressing mode . */
285	IEMMODE enmDefAddrMode;
286	/** The effective addressing mode . */
287	IEMMODE enmEffAddrMode;
288	/** The default operand mode . */
289	IEMMODE enmDefOpSize;
290	/** The effective operand mode . */
291	IEMMODE enmEffOpSize;
292
293	/** The prefix mask (IEM_OP_PRF_XXX). */
294	uint32_t fPrefixes;
295	/** The extra REX ModR/M register field bit (REX.R << 3). */
296	uint8_t uRexReg;
297	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
298	* (REX.B << 3). */
299	uint8_t uRexB;
300	/** The extra REX SIB index field bit (REX.X << 3). */
301	uint8_t uRexIndex;
302	/** The effective segment register (X86_SREG_XXX). */
303	uint8_t iEffSeg;
304
305	/** The current offset into abOpcodes. */
306	uint8_t offOpcode;
307	/** The size of what has currently been fetched into abOpcodes. */
308	uint8_t cbOpcode;
309	/** The opcode bytes. */
310	uint8_t abOpcode[15];
311	/** Offset into abOpcodes where the FPU instruction starts.
312	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
313	* instruction result is committed. */
314	uint8_t offFpuOpcode;
315
316	/** @}*/
317
318	/** Alignment padding for aMemMappings. */
319	uint8_t abAlignment2[4];
320
321	/** The number of active guest memory mappings. */
322	uint8_t cActiveMappings;
323	/** The next unused mapping index. */
324	uint8_t iNextMapping;
325	/** Records for tracking guest memory mappings. */
326	struct
327	{
328	/** The address of the mapped bytes. */
329	void *pv;
330	#if defined(IN_RC) && HC_ARCH_BITS == 64
331	uint32_t u32Alignment3; /*< Alignment padding. /
332	#endif
333	/** The access flags (IEM_ACCESS_XXX).
334	* IEM_ACCESS_INVALID if the entry is unused. */
335	uint32_t fAccess;
336	#if HC_ARCH_BITS == 64
337	uint32_t u32Alignment4; /*< Alignment padding. /
338	#endif
339	} aMemMappings[3];
340
341	/** Locking records for the mapped memory. */
342	union
343	{
344	PGMPAGEMAPLOCK Lock;
345	uint64_t au64Padding[2];
346	} aMemMappingLocks[3];
347
348	/** Bounce buffer info.
349	* This runs in parallel to aMemMappings. */
350	struct
351	{
352	/** The physical address of the first byte. */
353	RTGCPHYS GCPhysFirst;
354	/** The physical address of the second page. */
355	RTGCPHYS GCPhysSecond;
356	/** The number of bytes in the first page. */
357	uint16_t cbFirst;
358	/** The number of bytes in the second page. */
359	uint16_t cbSecond;
360	/** Whether it's unassigned memory. */
361	bool fUnassigned;
362	/** Explicit alignment padding. */
363	bool afAlignment5[3];
364	} aMemBbMappings[3];
365
366	/** Bounce buffer storage.
367	* This runs in parallel to aMemMappings and aMemBbMappings. */
368	struct
369	{
370	uint8_t ab[512];
371	} aBounceBuffers[3];
372
373	/** @name Target CPU information.
374	* @{ */
375	/** EDX value of CPUID(1).
376	* @remarks Some bits are subject to change and must be queried dynamically. */
377	uint32_t fCpuIdStdFeaturesEdx;
378	/** ECX value of CPUID(1).
379	* @remarks Some bits are subject to change and must be queried dynamically. */
380	uint32_t fCpuIdStdFeaturesEcx;
381	/** The CPU vendor. */
382	CPUMCPUVENDOR enmCpuVendor;
383	/** @} */
384
385	/** @name Host CPU information.
386	* @{ */
387	/** EDX value of CPUID(1). */
388	uint32_t fHostCpuIdStdFeaturesEdx;
389	/** ECX value of CPUID(1). */
390	uint32_t fHostCpuIdStdFeaturesEcx;
391	/** The CPU vendor. */
392	CPUMCPUVENDOR enmHostCpuVendor;
393	/** @} */
394
395	#ifdef IEM_VERIFICATION_MODE_FULL
396	/** The event verification records for what IEM did (LIFO). */
397	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
398	/** Insertion point for pIemEvtRecHead. */
399	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
400	/** The event verification records for what the other party did (FIFO). */
401	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
402	/** Insertion point for pOtherEvtRecHead. */
403	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
404	/** List of free event records. */
405	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
406	#endif
407	} IEMCPU;
408	/** Pointer to the per-CPU IEM state. */
409	typedef IEMCPU *PIEMCPU;
410	/** Pointer to the const per-CPU IEM state. */
411	typedef IEMCPU const *PCIEMCPU;
412
413	/** Converts a IEMCPU pointer to a VMCPU pointer.
414	* @returns VMCPU pointer.
415	* @param a_pIemCpu The IEM per CPU instance data.
416	*/
417	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
418
419	/** Converts a IEMCPU pointer to a VM pointer.
420	* @returns VM pointer.
421	* @param a_pIemCpu The IEM per CPU instance data.
422	*/
423	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
424
425	/** @name IEM_ACCESS_XXX - Access details.
426	* @{ */
427	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
428	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
429	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
430	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
431	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
432	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
433	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
434	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
435	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
436	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
437	/** The writes are partial, so if initialize the bounce buffer with the
438	* orignal RAM content. */
439	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
440	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
441	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
442	/** Read+write data alias. */
443	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
444	/** Write data alias. */
445	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
446	/** Read data alias. */
447	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
448	/** Instruction fetch alias. */
449	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
450	/** Stack write alias. */
451	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
452	/** Stack read alias. */
453	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
454	/** Stack read+write alias. */
455	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
456	/** Read system table alias. */
457	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
458	/** Read+write system table alias. */
459	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
460	/** @} */
461
462	/** @name Prefix constants (IEMCPU::fPrefixes)
463	* @{ */
464	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
465	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
466	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
467	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
468	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
469	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
470	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
471
472	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
473	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
474	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
475
476	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
477	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
478	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
479
480	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
481	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
482	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
483	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
484	/** Mask with all the REX prefix flags.
485	* This is generally for use when needing to undo the REX prefixes when they
486	* are followed legacy prefixes and therefore does not immediately preceed
487	* the first opcode byte.
488	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
489	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
490	/** @} */
491
492	/** @name Opcode forms
493	* @{ */
494	/** ModR/M: reg, r/m */
495	#define IEMOPFORM_RM 0
496	/** ModR/M: reg, r/m (register) */
497	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
498	/** ModR/M: reg, r/m (memory) */
499	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
500	/** ModR/M: r/m, reg */
501	#define IEMOPFORM_MR 1
502	/** ModR/M: r/m (register), reg */
503	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
504	/** ModR/M: r/m (memory), reg */
505	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
506	/** ModR/M: r/m only */
507	#define IEMOPFORM_M 2
508	/** ModR/M: r/m only (register). */
509	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
510	/** ModR/M: r/m only (memory). */
511	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
512	/** ModR/M: reg only */
513	#define IEMOPFORM_R 3
514
515	/** Fixed register instruction, no R/M. */
516	#define IEMOPFORM_FIXED 4
517
518	/** The r/m is a register. */
519	#define IEMOPFORM_MOD3 RT_BIT_32(8)
520	/** The r/m is a memory access. */
521	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
522	/** @} */
523
524	/**
525	* Tests if verification mode is enabled.
526	*
527	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
528	* should therefore cause the compiler to eliminate the verification branch
529	* of an if statement. */
530	#ifdef IEM_VERIFICATION_MODE_FULL
531	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
532	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
533	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
534	#else
535	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
536	#endif
537
538	/**
539	* Tests if full verification mode is enabled.
540	*
541	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
542	* should therefore cause the compiler to eliminate the verification branch
543	* of an if statement. */
544	#ifdef IEM_VERIFICATION_MODE_FULL
545	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
546	#else
547	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
548	#endif
549
550	/**
551	* Tests if full verification mode is enabled again REM.
552	*
553	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
554	* should therefore cause the compiler to eliminate the verification branch
555	* of an if statement. */
556	#ifdef IEM_VERIFICATION_MODE_FULL
557	# ifdef IEM_VERIFICATION_MODE_FULL_HM
558	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
559	# else
560	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
561	# endif
562	#else
563	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
564	#endif
565
566	/** @def IEM_VERIFICATION_MODE
567	* Indicates that one of the verfication modes are enabled.
568	*/
569	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
570	# define IEM_VERIFICATION_MODE
571	#endif
572
573	/**
574	* Indicates to the verifier that the given flag set is undefined.
575	*
576	* Can be invoked again to add more flags.
577	*
578	* This is a NOOP if the verifier isn't compiled in.
579	*/
580	#ifdef IEM_VERIFICATION_MODE_FULL
581	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
582	#else
583	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
584	#endif
585
586
587	/** @def IEM_DECL_IMPL_TYPE
588	* For typedef'ing an instruction implementation function.
589	*
590	* @param a_RetType The return type.
591	* @param a_Name The name of the type.
592	* @param a_ArgList The argument list enclosed in parentheses.
593	*/
594
595	/** @def IEM_DECL_IMPL_DEF
596	* For defining an instruction implementation function.
597	*
598	* @param a_RetType The return type.
599	* @param a_Name The name of the type.
600	* @param a_ArgList The argument list enclosed in parentheses.
601	*/
602
603	#if defined(__GNUC__) && defined(RT_ARCH_X86)
604	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
605	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
606	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
607	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
608
609	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
610	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
611	a_RetType (__fastcall a_Name) a_ArgList
612	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
613	a_RetType __fastcall a_Name a_ArgList
614
615	#else
616	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
617	a_RetType (VBOXCALL a_Name) a_ArgList
618	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
619	a_RetType VBOXCALL a_Name a_ArgList
620
621	#endif
622
623	/** @name Arithmetic assignment operations on bytes (binary).
624	* @{ */
625	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
626	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
627	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
628	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
629	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
630	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
631	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
632	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
633	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
634	/** @} */
635
636	/** @name Arithmetic assignment operations on words (binary).
637	* @{ */
638	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
639	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
640	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
641	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
642	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
643	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
644	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
645	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
646	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
647	/** @} */
648
649	/** @name Arithmetic assignment operations on double words (binary).
650	* @{ */
651	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
652	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
653	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
654	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
655	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
656	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
657	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
658	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
659	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
660	/** @} */
661
662	/** @name Arithmetic assignment operations on quad words (binary).
663	* @{ */
664	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
665	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
666	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
667	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
668	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
669	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
670	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
671	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
672	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
673	/** @} */
674
675	/** @name Compare operations (thrown in with the binary ops).
676	* @{ */
677	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
678	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
679	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
680	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
681	/** @} */
682
683	/** @name Test operations (thrown in with the binary ops).
684	* @{ */
685	FNIEMAIMPLBINU8 iemAImpl_test_u8;
686	FNIEMAIMPLBINU16 iemAImpl_test_u16;
687	FNIEMAIMPLBINU32 iemAImpl_test_u32;
688	FNIEMAIMPLBINU64 iemAImpl_test_u64;
689	/** @} */
690
691	/** @name Bit operations operations (thrown in with the binary ops).
692	* @{ */
693	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
694	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
695	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
696	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
697	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
698	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
699	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
700	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
701	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
702	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
703	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
704	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
705	/** @} */
706
707	/** @name Exchange memory with register operations.
708	* @{ */
709	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
710	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
711	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
712	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
713	/** @} */
714
715	/** @name Exchange and add operations.
716	* @{ */
717	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
718	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
719	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
720	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
721	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
722	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
723	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
724	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
725	/** @} */
726
727	/** @name Compare and exchange.
728	* @{ */
729	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
730	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
731	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
732	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
733	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
734	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
735	#ifdef RT_ARCH_X86
736	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
738	#else
739	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
740	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
741	#endif
742	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
743	uint32_t *pEFlags));
744	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
745	uint32_t *pEFlags));
746	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
747	uint32_t *pEFlags));
748	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
749	uint32_t *pEFlags));
750	/** @} */
751
752	/** @name Memory ordering
753	* @{ */
754	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
755	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
756	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
757	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
758	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
759	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
760	/** @} */
761
762	/** @name Double precision shifts
763	* @{ */
764	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
765	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
766	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
767	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
768	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
769	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
770	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
771	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
772	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
773	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
774	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
775	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
776	/** @} */
777
778
779	/** @name Bit search operations (thrown in with the binary ops).
780	* @{ */
781	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
782	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
783	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
784	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
785	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
786	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
787	/** @} */
788
789	/** @name Signed multiplication operations (thrown in with the binary ops).
790	* @{ */
791	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
792	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
793	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
794	/** @} */
795
796	/** @name Arithmetic assignment operations on bytes (unary).
797	* @{ */
798	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
799	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
800	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
801	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
802	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
803	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
804	/** @} */
805
806	/** @name Arithmetic assignment operations on words (unary).
807	* @{ */
808	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
809	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
810	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
811	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
812	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
813	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
814	/** @} */
815
816	/** @name Arithmetic assignment operations on double words (unary).
817	* @{ */
818	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
819	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
820	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
821	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
822	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
823	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
824	/** @} */
825
826	/** @name Arithmetic assignment operations on quad words (unary).
827	* @{ */
828	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
829	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
830	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
831	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
832	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
833	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
834	/** @} */
835
836
837	/** @name Shift operations on bytes (Group 2).
838	* @{ */
839	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
840	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
841	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
842	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
843	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
844	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
845	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
846	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
847	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
848	/** @} */
849
850	/** @name Shift operations on words (Group 2).
851	* @{ */
852	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
853	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
854	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
855	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
856	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
857	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
858	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
859	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
860	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
861	/** @} */
862
863	/** @name Shift operations on double words (Group 2).
864	* @{ */
865	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
866	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
867	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
868	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
869	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
870	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
871	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
872	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
873	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
874	/** @} */
875
876	/** @name Shift operations on words (Group 2).
877	* @{ */
878	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
879	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
880	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
881	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
882	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
883	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
884	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
885	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
886	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
887	/** @} */
888
889	/** @name Multiplication and division operations.
890	* @{ */
891	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
892	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
893	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
894	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
895
896	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
897	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
898	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
899	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
900
901	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
902	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
903	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
904	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
905
906	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
907	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
908	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
909	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
910	/** @} */
911
912	/** @name Byte Swap.
913	* @{ */
914	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
915	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
916	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
917	/** @} */
918
919	/** @name Misc.
920	* @{ */
921	FNIEMAIMPLBINU16 iemAImpl_arpl;
922	/** @} */
923
924
925	/** @name FPU operations taking a 32-bit float argument
926	* @{ */
927	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
928	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
929	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
930
931	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
932	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
933	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
934
935	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
936	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
937	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
938	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
939	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
940	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
941	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
942
943	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
944	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
945	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
946	/** @} */
947
948	/** @name FPU operations taking a 64-bit float argument
949	* @{ */
950	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
951	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
952	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
953
954	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
955	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
956	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
957	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
958	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
959	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
960
961	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
962	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
963	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
964	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
965	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
966	/** @} */
967
968	/** @name FPU operations taking a 80-bit float argument
969	* @{ */
970	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
971	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
972	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
973	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
974	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
975	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
976	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
977	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
978	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
979	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
980	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
981	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
982
983	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
984	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
985
986	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
987	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
988	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
989	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
990	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
991
992	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
993	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
994	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
995	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
996	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
997
998	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
999	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1000	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1001	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1002	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1003	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1004	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1005	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1006	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1007	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1008
1009	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1010	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1011	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1012	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1013
1014	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1015	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1016	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1017	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1018	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1019	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1020	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1021	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1022	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1023
1024	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1025	PCRTFLOAT80U pr80Val));
1026	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1027	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1028	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1029	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1030
1031	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1032	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1033	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1034
1035	/** @} */
1036
1037	/** @name FPU operations taking a 16-bit signed integer argument
1038	* @{ */
1039	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1040	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1041	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1042
1043	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1044	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1045	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1046	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1047	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1048	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1049
1050	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1051	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1052
1053	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1054	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1055	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1056	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1057	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1058	/** @} */
1059
1060	/** @name FPU operations taking a 32-bit signed integer argument
1061	* @{ */
1062	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1063	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1064	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1065
1066	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1067	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1068	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1069	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1070	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1071	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1072
1073	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1074	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1075
1076	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1077	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1078	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1079	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1080	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1081	/** @} */
1082
1083	/** @name FPU operations taking a 64-bit signed integer argument
1084	* @{ */
1085	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1086	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1087	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1088
1089	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1090	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1091	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1092	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1093	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1094	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1095
1096	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1097	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1098
1099	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1100	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1101	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1102	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1103	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1104	/** @} */
1105
1106
1107	/** Temporary type representing a 256-bit vector register. */
1108	typedef struct {uint64_t au64[4]; } IEMVMM256;
1109	/** Temporary type pointing to a 256-bit vector register. */
1110	typedef IEMVMM256 *PIEMVMM256;
1111	/** Temporary type pointing to a const 256-bit vector register. */
1112	typedef IEMVMM256 *PCIEMVMM256;
1113
1114
1115	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1116	* @{ */
1117	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1118	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1119	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1120	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1121	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1122	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1123	/** @} */
1124
1125	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1126	* @{ */
1127	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1128	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1129	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1130	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1131	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1132	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1133	/** @} */
1134
1135	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1136	* @{ */
1137	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1138	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1139	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1140	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1141	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1142	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1143	/** @} */
1144
1145	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1146	* @{ */
1147	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1148	uint128_t const *pu128Src, uint8_t bEvil));
1149	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1150	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1151	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1152	/** @} */
1153
1154	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1155	* @{ */
1156	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1157	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1158	/** @} */
1159
1160
1161
1162	/** @name Function tables.
1163	* @{
1164	*/
1165
1166	/**
1167	* Function table for a binary operator providing implementation based on
1168	* operand size.
1169	*/
1170	typedef struct IEMOPBINSIZES
1171	{
1172	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1173	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1174	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1175	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1176	} IEMOPBINSIZES;
1177	/** Pointer to a binary operator function table. */
1178	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1179
1180
1181	/**
1182	* Function table for a unary operator providing implementation based on
1183	* operand size.
1184	*/
1185	typedef struct IEMOPUNARYSIZES
1186	{
1187	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1188	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1189	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1190	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1191	} IEMOPUNARYSIZES;
1192	/** Pointer to a unary operator function table. */
1193	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1194
1195
1196	/**
1197	* Function table for a shift operator providing implementation based on
1198	* operand size.
1199	*/
1200	typedef struct IEMOPSHIFTSIZES
1201	{
1202	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1203	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1204	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1205	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1206	} IEMOPSHIFTSIZES;
1207	/** Pointer to a shift operator function table. */
1208	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1209
1210
1211	/**
1212	* Function table for a multiplication or division operation.
1213	*/
1214	typedef struct IEMOPMULDIVSIZES
1215	{
1216	PFNIEMAIMPLMULDIVU8 pfnU8;
1217	PFNIEMAIMPLMULDIVU16 pfnU16;
1218	PFNIEMAIMPLMULDIVU32 pfnU32;
1219	PFNIEMAIMPLMULDIVU64 pfnU64;
1220	} IEMOPMULDIVSIZES;
1221	/** Pointer to a multiplication or division operation function table. */
1222	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1223
1224
1225	/**
1226	* Function table for a double precision shift operator providing implementation
1227	* based on operand size.
1228	*/
1229	typedef struct IEMOPSHIFTDBLSIZES
1230	{
1231	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1232	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1233	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1234	} IEMOPSHIFTDBLSIZES;
1235	/** Pointer to a double precision shift function table. */
1236	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1237
1238
1239	/**
1240	* Function table for media instruction taking two full sized media registers,
1241	* optionally the 2nd being a memory reference (only modifying the first op.)
1242	*/
1243	typedef struct IEMOPMEDIAF2
1244	{
1245	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1246	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1247	} IEMOPMEDIAF2;
1248	/** Pointer to a media operation function table for full sized ops. */
1249	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1250
1251	/**
1252	* Function table for media instruction taking taking one full and one lower
1253	* half media register.
1254	*/
1255	typedef struct IEMOPMEDIAF1L1
1256	{
1257	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1258	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1259	} IEMOPMEDIAF1L1;
1260	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1261	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1262
1263	/**
1264	* Function table for media instruction taking taking one full and one high half
1265	* media register.
1266	*/
1267	typedef struct IEMOPMEDIAF1H1
1268	{
1269	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1270	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1271	} IEMOPMEDIAF1H1;
1272	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1273	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1274
1275
1276	/** @} */
1277
1278
1279	/** @name C instruction implementations for anything slightly complicated.
1280	* @{ */
1281
1282	/**
1283	* For typedef'ing or declaring a C instruction implementation function taking
1284	* no extra arguments.
1285	*
1286	* @param a_Name The name of the type.
1287	*/
1288	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1289	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1290	/**
1291	* For defining a C instruction implementation function taking no extra
1292	* arguments.
1293	*
1294	* @param a_Name The name of the function
1295	*/
1296	# define IEM_CIMPL_DEF_0(a_Name) \
1297	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1298	/**
1299	* For calling a C instruction implementation function taking no extra
1300	* arguments.
1301	*
1302	* This special call macro adds default arguments to the call and allow us to
1303	* change these later.
1304	*
1305	* @param a_fn The name of the function.
1306	*/
1307	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1308
1309	/**
1310	* For typedef'ing or declaring a C instruction implementation function taking
1311	* one extra argument.
1312	*
1313	* @param a_Name The name of the type.
1314	* @param a_Type0 The argument type.
1315	* @param a_Arg0 The argument name.
1316	*/
1317	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1318	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1319	/**
1320	* For defining a C instruction implementation function taking one extra
1321	* argument.
1322	*
1323	* @param a_Name The name of the function
1324	* @param a_Type0 The argument type.
1325	* @param a_Arg0 The argument name.
1326	*/
1327	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1328	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1329	/**
1330	* For calling a C instruction implementation function taking one extra
1331	* argument.
1332	*
1333	* This special call macro adds default arguments to the call and allow us to
1334	* change these later.
1335	*
1336	* @param a_fn The name of the function.
1337	* @param a0 The name of the 1st argument.
1338	*/
1339	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1340
1341	/**
1342	* For typedef'ing or declaring a C instruction implementation function taking
1343	* two extra arguments.
1344	*
1345	* @param a_Name The name of the type.
1346	* @param a_Type0 The type of the 1st argument
1347	* @param a_Arg0 The name of the 1st argument.
1348	* @param a_Type1 The type of the 2nd argument.
1349	* @param a_Arg1 The name of the 2nd argument.
1350	*/
1351	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1352	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1353	/**
1354	* For defining a C instruction implementation function taking two extra
1355	* arguments.
1356	*
1357	* @param a_Name The name of the function.
1358	* @param a_Type0 The type of the 1st argument
1359	* @param a_Arg0 The name of the 1st argument.
1360	* @param a_Type1 The type of the 2nd argument.
1361	* @param a_Arg1 The name of the 2nd argument.
1362	*/
1363	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1364	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1365	/**
1366	* For calling a C instruction implementation function taking two extra
1367	* arguments.
1368	*
1369	* This special call macro adds default arguments to the call and allow us to
1370	* change these later.
1371	*
1372	* @param a_fn The name of the function.
1373	* @param a0 The name of the 1st argument.
1374	* @param a1 The name of the 2nd argument.
1375	*/
1376	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1377
1378	/**
1379	* For typedef'ing or declaring a C instruction implementation function taking
1380	* three extra arguments.
1381	*
1382	* @param a_Name The name of the type.
1383	* @param a_Type0 The type of the 1st argument
1384	* @param a_Arg0 The name of the 1st argument.
1385	* @param a_Type1 The type of the 2nd argument.
1386	* @param a_Arg1 The name of the 2nd argument.
1387	* @param a_Type2 The type of the 3rd argument.
1388	* @param a_Arg2 The name of the 3rd argument.
1389	*/
1390	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1391	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1392	/**
1393	* For defining a C instruction implementation function taking three extra
1394	* arguments.
1395	*
1396	* @param a_Name The name of the function.
1397	* @param a_Type0 The type of the 1st argument
1398	* @param a_Arg0 The name of the 1st argument.
1399	* @param a_Type1 The type of the 2nd argument.
1400	* @param a_Arg1 The name of the 2nd argument.
1401	* @param a_Type2 The type of the 3rd argument.
1402	* @param a_Arg2 The name of the 3rd argument.
1403	*/
1404	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1405	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1406	/**
1407	* For calling a C instruction implementation function taking three extra
1408	* arguments.
1409	*
1410	* This special call macro adds default arguments to the call and allow us to
1411	* change these later.
1412	*
1413	* @param a_fn The name of the function.
1414	* @param a0 The name of the 1st argument.
1415	* @param a1 The name of the 2nd argument.
1416	* @param a2 The name of the 3rd argument.
1417	*/
1418	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1419
1420
1421	/**
1422	* For typedef'ing or declaring a C instruction implementation function taking
1423	* four extra arguments.
1424	*
1425	* @param a_Name The name of the type.
1426	* @param a_Type0 The type of the 1st argument
1427	* @param a_Arg0 The name of the 1st argument.
1428	* @param a_Type1 The type of the 2nd argument.
1429	* @param a_Arg1 The name of the 2nd argument.
1430	* @param a_Type2 The type of the 3rd argument.
1431	* @param a_Arg2 The name of the 3rd argument.
1432	* @param a_Type3 The type of the 4th argument.
1433	* @param a_Arg3 The name of the 4th argument.
1434	*/
1435	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1436	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1437	/**
1438	* For defining a C instruction implementation function taking four extra
1439	* arguments.
1440	*
1441	* @param a_Name The name of the function.
1442	* @param a_Type0 The type of the 1st argument
1443	* @param a_Arg0 The name of the 1st argument.
1444	* @param a_Type1 The type of the 2nd argument.
1445	* @param a_Arg1 The name of the 2nd argument.
1446	* @param a_Type2 The type of the 3rd argument.
1447	* @param a_Arg2 The name of the 3rd argument.
1448	* @param a_Type3 The type of the 4th argument.
1449	* @param a_Arg3 The name of the 4th argument.
1450	*/
1451	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1452	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1453	a_Type2 a_Arg2, a_Type3 a_Arg3))
1454	/**
1455	* For calling a C instruction implementation function taking four extra
1456	* arguments.
1457	*
1458	* This special call macro adds default arguments to the call and allow us to
1459	* change these later.
1460	*
1461	* @param a_fn The name of the function.
1462	* @param a0 The name of the 1st argument.
1463	* @param a1 The name of the 2nd argument.
1464	* @param a2 The name of the 3rd argument.
1465	* @param a3 The name of the 4th argument.
1466	*/
1467	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1468
1469
1470	/**
1471	* For typedef'ing or declaring a C instruction implementation function taking
1472	* five extra arguments.
1473	*
1474	* @param a_Name The name of the type.
1475	* @param a_Type0 The type of the 1st argument
1476	* @param a_Arg0 The name of the 1st argument.
1477	* @param a_Type1 The type of the 2nd argument.
1478	* @param a_Arg1 The name of the 2nd argument.
1479	* @param a_Type2 The type of the 3rd argument.
1480	* @param a_Arg2 The name of the 3rd argument.
1481	* @param a_Type3 The type of the 4th argument.
1482	* @param a_Arg3 The name of the 4th argument.
1483	* @param a_Type4 The type of the 5th argument.
1484	* @param a_Arg4 The name of the 5th argument.
1485	*/
1486	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1487	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1488	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1489	a_Type3 a_Arg3, a_Type4 a_Arg4))
1490	/**
1491	* For defining a C instruction implementation function taking five extra
1492	* arguments.
1493	*
1494	* @param a_Name The name of the function.
1495	* @param a_Type0 The type of the 1st argument
1496	* @param a_Arg0 The name of the 1st argument.
1497	* @param a_Type1 The type of the 2nd argument.
1498	* @param a_Arg1 The name of the 2nd argument.
1499	* @param a_Type2 The type of the 3rd argument.
1500	* @param a_Arg2 The name of the 3rd argument.
1501	* @param a_Type3 The type of the 4th argument.
1502	* @param a_Arg3 The name of the 4th argument.
1503	* @param a_Type4 The type of the 5th argument.
1504	* @param a_Arg4 The name of the 5th argument.
1505	*/
1506	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1507	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1508	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1509	a_Type3 a_Arg3, a_Type4 a_Arg4))
1510	/**
1511	* For calling a C instruction implementation function taking five extra
1512	* arguments.
1513	*
1514	* This special call macro adds default arguments to the call and allow us to
1515	* change these later.
1516	*
1517	* @param a_fn The name of the function.
1518	* @param a0 The name of the 1st argument.
1519	* @param a1 The name of the 2nd argument.
1520	* @param a2 The name of the 3rd argument.
1521	* @param a3 The name of the 4th argument.
1522	* @param a4 The name of the 5th argument.
1523	*/
1524	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1525
1526	/** @} */
1527
1528
1529	/** @} */
1530
1531	RT_C_DECLS_END
1532
1533	#endif
1534

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 49141

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