IEMInternal.h@ 47737

Last change on this file since 47737 was 47568, checked in by vboxsync, 11 years ago
IEM: LAR,LSL,ARPL, and some tracing (RTTraceBuf*).
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 62.7 KB

Line
1	/* $Id: IEMInternal.h 47568 2013-08-07 03:11:58Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** @def IEM_VERIFICATION_MODE_FULL
37	* Shorthand for:
38	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
39	*/
40	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
41	# define IEM_VERIFICATION_MODE_FULL
42	#endif
43
44
45	/** Finish and move to types.h */
46	typedef union
47	{
48	uint32_t u32;
49	} RTFLOAT32U;
50	typedef RTFLOAT32U *PRTFLOAT32U;
51	typedef RTFLOAT32U const *PCRTFLOAT32U;
52
53
54	/**
55	* Extended operand mode that includes a representation of 8-bit.
56	*
57	* This is used for packing down modes when invoking some C instruction
58	* implementations.
59	*/
60	typedef enum IEMMODEX
61	{
62	IEMMODEX_16BIT = IEMMODE_16BIT,
63	IEMMODEX_32BIT = IEMMODE_32BIT,
64	IEMMODEX_64BIT = IEMMODE_64BIT,
65	IEMMODEX_8BIT
66	} IEMMODEX;
67	AssertCompileSize(IEMMODEX, 4);
68
69
70	/**
71	* Branch types.
72	*/
73	typedef enum IEMBRANCH
74	{
75	IEMBRANCH_JUMP = 1,
76	IEMBRANCH_CALL,
77	IEMBRANCH_TRAP,
78	IEMBRANCH_SOFTWARE_INT,
79	IEMBRANCH_HARDWARE_INT
80	} IEMBRANCH;
81	AssertCompileSize(IEMBRANCH, 4);
82
83
84	/**
85	* A FPU result.
86	*/
87	typedef struct IEMFPURESULT
88	{
89	/** The output value. */
90	RTFLOAT80U r80Result;
91	/** The output status. */
92	uint16_t FSW;
93	} IEMFPURESULT;
94	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
95	/** Pointer to a FPU result. */
96	typedef IEMFPURESULT *PIEMFPURESULT;
97	/** Pointer to a const FPU result. */
98	typedef IEMFPURESULT const *PCIEMFPURESULT;
99
100
101	/**
102	* A FPU result consisting of two output values and FSW.
103	*/
104	typedef struct IEMFPURESULTTWO
105	{
106	/** The first output value. */
107	RTFLOAT80U r80Result1;
108	/** The output status. */
109	uint16_t FSW;
110	/** The second output value. */
111	RTFLOAT80U r80Result2;
112	} IEMFPURESULTTWO;
113	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
114	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
115	/** Pointer to a FPU result consisting of two output values and FSW. */
116	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
117	/** Pointer to a const FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
119
120
121	#ifdef IEM_VERIFICATION_MODE_FULL
122
123	/**
124	* Verification event type.
125	*/
126	typedef enum IEMVERIFYEVENT
127	{
128	IEMVERIFYEVENT_INVALID = 0,
129	IEMVERIFYEVENT_IOPORT_READ,
130	IEMVERIFYEVENT_IOPORT_WRITE,
131	IEMVERIFYEVENT_RAM_WRITE,
132	IEMVERIFYEVENT_RAM_READ
133	} IEMVERIFYEVENT;
134
135	/** Checks if the event type is a RAM read or write. */
136	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
137
138	/**
139	* Verification event record.
140	*/
141	typedef struct IEMVERIFYEVTREC
142	{
143	/** Pointer to the next record in the list. */
144	struct IEMVERIFYEVTREC *pNext;
145	/** The event type. */
146	IEMVERIFYEVENT enmEvent;
147	/** The event data. */
148	union
149	{
150	/** IEMVERIFYEVENT_IOPORT_READ */
151	struct
152	{
153	RTIOPORT Port;
154	uint32_t cbValue;
155	} IOPortRead;
156
157	/** IEMVERIFYEVENT_IOPORT_WRITE */
158	struct
159	{
160	RTIOPORT Port;
161	uint32_t cbValue;
162	uint32_t u32Value;
163	} IOPortWrite;
164
165	/** IEMVERIFYEVENT_RAM_READ */
166	struct
167	{
168	RTGCPHYS GCPhys;
169	uint32_t cb;
170	} RamRead;
171
172	/** IEMVERIFYEVENT_RAM_WRITE */
173	struct
174	{
175	RTGCPHYS GCPhys;
176	uint32_t cb;
177	uint8_t ab[512];
178	} RamWrite;
179	} u;
180	} IEMVERIFYEVTREC;
181	/** Pointer to an IEM event verification records. */
182	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
183
184	#endif /* IEM_VERIFICATION_MODE_FULL */
185
186
187	/**
188	* The per-CPU IEM state.
189	*/
190	typedef struct IEMCPU
191	{
192	/** Pointer to the CPU context - ring-3 contex. */
193	R3PTRTYPE(PCPUMCTX) pCtxR3;
194	/** Pointer to the CPU context - ring-0 contex. */
195	R0PTRTYPE(PCPUMCTX) pCtxR0;
196	/** Pointer to the CPU context - raw-mode contex. */
197	RCPTRTYPE(PCPUMCTX) pCtxRC;
198
199	/** Offset of the VMCPU structure relative to this structure (negative). */
200	int32_t offVMCpu;
201	/** Offset of the VM structure relative to this structure (negative). */
202	int32_t offVM;
203
204	/** Whether to bypass access handlers or not. */
205	bool fBypassHandlers;
206	/** Indicates that we're interpreting patch code - RC only! */
207	bool fInPatchCode;
208	/** Explicit alignment padding. */
209	bool afAlignment0[2];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE_FULL
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
264	* CPUM doesn't yet reflect. */
265	uint8_t uInjectCpl;
266	bool afAlignment2[4];
267	/** Mask of undefined eflags.
268	* The verifier will any difference in these flags. */
269	uint32_t fUndefinedEFlags;
270	/** The CS of the instruction being interpreted. */
271	RTSEL uOldCs;
272	/** The RIP of the instruction being interpreted. */
273	uint64_t uOldRip;
274	/** The physical address corresponding to abOpcodes[0]. */
275	RTGCPHYS GCPhysOpcodes;
276	#endif
277	/** @} */
278
279	/** @name Decoder state.
280	* @{ */
281
282	/** The default addressing mode . */
283	IEMMODE enmDefAddrMode;
284	/** The effective addressing mode . */
285	IEMMODE enmEffAddrMode;
286	/** The default operand mode . */
287	IEMMODE enmDefOpSize;
288	/** The effective operand mode . */
289	IEMMODE enmEffOpSize;
290
291	/** The prefix mask (IEM_OP_PRF_XXX). */
292	uint32_t fPrefixes;
293	/** The extra REX ModR/M register field bit (REX.R << 3). */
294	uint8_t uRexReg;
295	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
296	* (REX.B << 3). */
297	uint8_t uRexB;
298	/** The extra REX SIB index field bit (REX.X << 3). */
299	uint8_t uRexIndex;
300	/** The effective segment register (X86_SREG_XXX). */
301	uint8_t iEffSeg;
302
303	/** The current offset into abOpcodes. */
304	uint8_t offOpcode;
305	/** The size of what has currently been fetched into abOpcodes. */
306	uint8_t cbOpcode;
307	/** The opcode bytes. */
308	uint8_t abOpcode[15];
309	/** Offset into abOpcodes where the FPU instruction starts.
310	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
311	* instruction result is committed. */
312	uint8_t offFpuOpcode;
313
314	/** @}*/
315
316	/** Alignment padding for aMemMappings. */
317	uint8_t abAlignment2[4];
318
319	/** The number of active guest memory mappings. */
320	uint8_t cActiveMappings;
321	/** The next unused mapping index. */
322	uint8_t iNextMapping;
323	/** Records for tracking guest memory mappings. */
324	struct
325	{
326	/** The address of the mapped bytes. */
327	void *pv;
328	#if defined(IN_RC) && HC_ARCH_BITS == 64
329	uint32_t u32Alignment3; /*< Alignment padding. /
330	#endif
331	/** The access flags (IEM_ACCESS_XXX).
332	* IEM_ACCESS_INVALID if the entry is unused. */
333	uint32_t fAccess;
334	#if HC_ARCH_BITS == 64
335	uint32_t u32Alignment4; /*< Alignment padding. /
336	#endif
337	} aMemMappings[3];
338
339	/** Locking records for the mapped memory. */
340	union
341	{
342	PGMPAGEMAPLOCK Lock;
343	uint64_t au64Padding[2];
344	} aMemMappingLocks[3];
345
346	/** Bounce buffer info.
347	* This runs in parallel to aMemMappings. */
348	struct
349	{
350	/** The physical address of the first byte. */
351	RTGCPHYS GCPhysFirst;
352	/** The physical address of the second page. */
353	RTGCPHYS GCPhysSecond;
354	/** The number of bytes in the first page. */
355	uint16_t cbFirst;
356	/** The number of bytes in the second page. */
357	uint16_t cbSecond;
358	/** Whether it's unassigned memory. */
359	bool fUnassigned;
360	/** Explicit alignment padding. */
361	bool afAlignment5[3];
362	} aMemBbMappings[3];
363
364	/** Bounce buffer storage.
365	* This runs in parallel to aMemMappings and aMemBbMappings. */
366	struct
367	{
368	uint8_t ab[512];
369	} aBounceBuffers[3];
370
371	/** @name Target CPU information.
372	* @{ */
373	/** EDX value of CPUID(1).
374	* @remarks Some bits are subject to change and must be queried dynamically. */
375	uint32_t fCpuIdStdFeaturesEdx;
376	/** ECX value of CPUID(1).
377	* @remarks Some bits are subject to change and must be queried dynamically. */
378	uint32_t fCpuIdStdFeaturesEcx;
379	/** The CPU vendor. */
380	CPUMCPUVENDOR enmCpuVendor;
381	/** @} */
382
383	/** @name Host CPU information.
384	* @{ */
385	/** EDX value of CPUID(1). */
386	uint32_t fHostCpuIdStdFeaturesEdx;
387	/** ECX value of CPUID(1). */
388	uint32_t fHostCpuIdStdFeaturesEcx;
389	/** The CPU vendor. */
390	CPUMCPUVENDOR enmHostCpuVendor;
391	/** @} */
392
393	#ifdef IEM_VERIFICATION_MODE_FULL
394	/** The event verification records for what IEM did (LIFO). */
395	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
396	/** Insertion point for pIemEvtRecHead. */
397	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
398	/** The event verification records for what the other party did (FIFO). */
399	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
400	/** Insertion point for pOtherEvtRecHead. */
401	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
402	/** List of free event records. */
403	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
404	#endif
405	} IEMCPU;
406	/** Pointer to the per-CPU IEM state. */
407	typedef IEMCPU *PIEMCPU;
408	/** Pointer to the const per-CPU IEM state. */
409	typedef IEMCPU const *PCIEMCPU;
410
411	/** Converts a IEMCPU pointer to a VMCPU pointer.
412	* @returns VMCPU pointer.
413	* @param a_pIemCpu The IEM per CPU instance data.
414	*/
415	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
416
417	/** Converts a IEMCPU pointer to a VM pointer.
418	* @returns VM pointer.
419	* @param a_pIemCpu The IEM per CPU instance data.
420	*/
421	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
422
423	/** @name IEM_ACCESS_XXX - Access details.
424	* @{ */
425	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
426	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
427	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
428	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
429	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
430	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
431	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
432	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
433	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
434	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
435	/** The writes are partial, so if initialize the bounce buffer with the
436	* orignal RAM content. */
437	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
438	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
439	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
440	/** Read+write data alias. */
441	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
442	/** Write data alias. */
443	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
444	/** Read data alias. */
445	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
446	/** Instruction fetch alias. */
447	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
448	/** Stack write alias. */
449	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
450	/** Stack read alias. */
451	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
452	/** Stack read+write alias. */
453	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
454	/** Read system table alias. */
455	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
456	/** Read+write system table alias. */
457	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
458	/** @} */
459
460	/** @name Prefix constants (IEMCPU::fPrefixes)
461	* @{ */
462	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
463	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
464	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
465	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
466	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
467	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
468	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
469
470	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
471	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
472	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
473
474	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
475	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
476	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
477
478	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
479	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
480	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
481	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
482	/** Mask with all the REX prefix flags.
483	* This is generally for use when needing to undo the REX prefixes when they
484	* are followed legacy prefixes and therefore does not immediately preceed
485	* the first opcode byte.
486	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
487	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
488	/** @} */
489
490	/** @name Opcode forms
491	* @{ */
492	/** ModR/M: reg, r/m */
493	#define IEMOPFORM_RM 0
494	/** ModR/M: reg, r/m (register) */
495	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
496	/** ModR/M: reg, r/m (memory) */
497	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
498	/** ModR/M: r/m, reg */
499	#define IEMOPFORM_MR 1
500	/** ModR/M: r/m (register), reg */
501	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
502	/** ModR/M: r/m (memory), reg */
503	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
504	/** ModR/M: r/m only */
505	#define IEMOPFORM_M 2
506	/** ModR/M: r/m only (register). */
507	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
508	/** ModR/M: r/m only (memory). */
509	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
510	/** ModR/M: reg only */
511	#define IEMOPFORM_R 3
512
513	/** The r/m is a register. */
514	#define IEMOPFORM_MOD3 RT_BIT_32(8)
515	/** The r/m is a memory access. */
516	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
517	/** @} */
518
519	/**
520	* Tests if verification mode is enabled.
521	*
522	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
523	* should therefore cause the compiler to eliminate the verification branch
524	* of an if statement. */
525	#ifdef IEM_VERIFICATION_MODE_FULL
526	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
527	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
528	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
529	#else
530	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
531	#endif
532
533	/**
534	* Tests if full verification mode is enabled.
535	*
536	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
537	* should therefore cause the compiler to eliminate the verification branch
538	* of an if statement. */
539	#ifdef IEM_VERIFICATION_MODE_FULL
540	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
541	#else
542	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
543	#endif
544
545	/** @def IEM_VERIFICATION_MODE
546	* Indicates that one of the verfication modes are enabled.
547	*/
548	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
549	# define IEM_VERIFICATION_MODE
550	#endif
551
552	/**
553	* Indicates to the verifier that the given flag set is undefined.
554	*
555	* Can be invoked again to add more flags.
556	*
557	* This is a NOOP if the verifier isn't compiled in.
558	*/
559	#ifdef IEM_VERIFICATION_MODE_FULL
560	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
561	#else
562	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
563	#endif
564
565
566	/** @def IEM_DECL_IMPL_TYPE
567	* For typedef'ing an instruction implementation function.
568	*
569	* @param a_RetType The return type.
570	* @param a_Name The name of the type.
571	* @param a_ArgList The argument list enclosed in parentheses.
572	*/
573
574	/** @def IEM_DECL_IMPL_DEF
575	* For defining an instruction implementation function.
576	*
577	* @param a_RetType The return type.
578	* @param a_Name The name of the type.
579	* @param a_ArgList The argument list enclosed in parentheses.
580	*/
581
582	#if defined(__GNUC__) && defined(RT_ARCH_X86)
583	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
584	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
585	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
586	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
587
588	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
589	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
590	a_RetType (__fastcall a_Name) a_ArgList
591	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
592	a_RetType __fastcall a_Name a_ArgList
593
594	#else
595	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
596	a_RetType (VBOXCALL a_Name) a_ArgList
597	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
598	a_RetType VBOXCALL a_Name a_ArgList
599
600	#endif
601
602	/** @name Arithmetic assignment operations on bytes (binary).
603	* @{ */
604	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
605	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
606	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
607	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
608	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
609	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
610	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
611	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
612	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
613	/** @} */
614
615	/** @name Arithmetic assignment operations on words (binary).
616	* @{ */
617	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
618	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
619	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
620	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
621	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
622	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
623	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
624	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
625	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
626	/** @} */
627
628	/** @name Arithmetic assignment operations on double words (binary).
629	* @{ */
630	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
631	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
632	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
633	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
634	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
635	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
636	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
637	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
638	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
639	/** @} */
640
641	/** @name Arithmetic assignment operations on quad words (binary).
642	* @{ */
643	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
644	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
645	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
646	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
647	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
648	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
649	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
650	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
651	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
652	/** @} */
653
654	/** @name Compare operations (thrown in with the binary ops).
655	* @{ */
656	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
657	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
658	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
659	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
660	/** @} */
661
662	/** @name Test operations (thrown in with the binary ops).
663	* @{ */
664	FNIEMAIMPLBINU8 iemAImpl_test_u8;
665	FNIEMAIMPLBINU16 iemAImpl_test_u16;
666	FNIEMAIMPLBINU32 iemAImpl_test_u32;
667	FNIEMAIMPLBINU64 iemAImpl_test_u64;
668	/** @} */
669
670	/** @name Bit operations operations (thrown in with the binary ops).
671	* @{ */
672	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
673	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
674	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
675	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
676	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
677	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
678	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
679	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
680	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
681	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
682	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
683	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
684	/** @} */
685
686	/** @name Exchange memory with register operations.
687	* @{ */
688	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
689	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
690	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
691	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
692	/** @} */
693
694	/** @name Exchange and add operations.
695	* @{ */
696	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
697	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
698	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
699	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
700	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
701	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
702	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
703	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
704	/** @} */
705
706	/** @name Compare and exchange.
707	* @{ */
708	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
709	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
710	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
711	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
712	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
713	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
714	#ifdef RT_ARCH_X86
715	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
716	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
717	#else
718	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
719	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
720	#endif
721	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
722	uint32_t *pEFlags));
723	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
724	uint32_t *pEFlags));
725	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
726	uint32_t *pEFlags));
727	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
728	uint32_t *pEFlags));
729	/** @} */
730
731	/** @name Memory ordering
732	* @{ */
733	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
734	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
735	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
736	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
738	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
739	/** @} */
740
741	/** @name Double precision shifts
742	* @{ */
743	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
744	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
745	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
746	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
747	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
748	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
749	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
750	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
751	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
752	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
753	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
754	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
755	/** @} */
756
757
758	/** @name Bit search operations (thrown in with the binary ops).
759	* @{ */
760	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
761	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
762	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
763	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
764	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
765	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
766	/** @} */
767
768	/** @name Signed multiplication operations (thrown in with the binary ops).
769	* @{ */
770	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
771	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
772	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
773	/** @} */
774
775	/** @name Arithmetic assignment operations on bytes (unary).
776	* @{ */
777	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
778	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
779	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
780	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
781	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
782	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
783	/** @} */
784
785	/** @name Arithmetic assignment operations on words (unary).
786	* @{ */
787	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
788	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
789	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
790	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
791	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
792	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
793	/** @} */
794
795	/** @name Arithmetic assignment operations on double words (unary).
796	* @{ */
797	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
798	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
799	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
800	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
801	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
802	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
803	/** @} */
804
805	/** @name Arithmetic assignment operations on quad words (unary).
806	* @{ */
807	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
808	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
809	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
810	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
811	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
812	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
813	/** @} */
814
815
816	/** @name Shift operations on bytes (Group 2).
817	* @{ */
818	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
819	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
820	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
821	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
822	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
823	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
824	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
825	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
826	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
827	/** @} */
828
829	/** @name Shift operations on words (Group 2).
830	* @{ */
831	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
832	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
833	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
834	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
835	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
836	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
837	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
838	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
839	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
840	/** @} */
841
842	/** @name Shift operations on double words (Group 2).
843	* @{ */
844	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
845	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
846	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
847	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
848	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
849	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
850	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
851	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
852	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
853	/** @} */
854
855	/** @name Shift operations on words (Group 2).
856	* @{ */
857	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
858	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
859	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
860	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
861	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
862	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
863	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
864	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
865	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
866	/** @} */
867
868	/** @name Multiplication and division operations.
869	* @{ */
870	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
871	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
872	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
873	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
874
875	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
876	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
877	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
878	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
879
880	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
881	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
882	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
883	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
884
885	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
886	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
887	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
888	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
889	/** @} */
890
891	/** @name Byte Swap.
892	* @{ */
893	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
894	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
895	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
896	/** @} */
897
898	/** @name Misc.
899	* @{ */
900	FNIEMAIMPLBINU16 iemAImpl_arpl;
901	/** @} */
902
903
904	/** @name FPU operations taking a 32-bit float argument
905	* @{ */
906	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
907	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
908	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
909
910	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
911	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
912	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
913
914	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
915	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
916	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
917	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
918	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
919	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
920	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
921
922	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
923	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
924	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
925	/** @} */
926
927	/** @name FPU operations taking a 64-bit float argument
928	* @{ */
929	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
930	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
931	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
932
933	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
934	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
935	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
936	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
937	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
938	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
939
940	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
941	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
942	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
943	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
944	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
945	/** @} */
946
947	/** @name FPU operations taking a 80-bit float argument
948	* @{ */
949	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
950	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
951	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
952	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
953	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
954	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
955	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
956	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
957	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
958	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
959	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
960	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
961
962	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
963	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
964
965	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
966	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
967	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
968	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
969	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
970
971	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
972	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
973	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
974	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
975	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
976
977	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
978	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
979	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
980	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
981	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
982	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
983	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
984	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
985	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
986	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
987
988	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
989	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
990	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
991	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
992
993	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
994	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
995	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
996	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
997	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
998	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
999	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1000	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1001	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1002
1003	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1004	PCRTFLOAT80U pr80Val));
1005	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1006	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1007	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1008	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1009
1010	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1011	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1012	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1013
1014	/** @} */
1015
1016	/** @name FPU operations taking a 16-bit signed integer argument
1017	* @{ */
1018	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1019	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1020	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1021
1022	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1023	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1024	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1025	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1026	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1027	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1028
1029	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1030	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1031
1032	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1033	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1034	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1035	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1036	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1037	/** @} */
1038
1039	/** @name FPU operations taking a 32-bit signed integer argument
1040	* @{ */
1041	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1042	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1043	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1044
1045	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1046	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1047	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1048	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1049	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1050	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1051
1052	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1053	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1054
1055	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1056	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1057	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1058	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1059	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1060	/** @} */
1061
1062	/** @name FPU operations taking a 64-bit signed integer argument
1063	* @{ */
1064	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1065	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1066	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1067
1068	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1069	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1070	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1071	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1072	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1073	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1074
1075	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1076	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1077
1078	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1079	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1080	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1081	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1082	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1083	/** @} */
1084
1085
1086	/** Temporary type representing a 256-bit vector register. */
1087	typedef struct {uint64_t au64[4]; } IEMVMM256;
1088	/** Temporary type pointing to a 256-bit vector register. */
1089	typedef IEMVMM256 *PIEMVMM256;
1090	/** Temporary type pointing to a const 256-bit vector register. */
1091	typedef IEMVMM256 *PCIEMVMM256;
1092
1093
1094	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1095	* @{ */
1096	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1097	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1098	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1099	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1100	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1101	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1102	/** @} */
1103
1104	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1105	* @{ */
1106	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1107	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1108	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1109	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1110	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1111	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1112	/** @} */
1113
1114	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1115	* @{ */
1116	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1117	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1118	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1119	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1120	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1121	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1122	/** @} */
1123
1124	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1125	* @{ */
1126	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1127	uint128_t const *pu128Src, uint8_t bEvil));
1128	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1129	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1130	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1131	/** @} */
1132
1133	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1134	* @{ */
1135	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1136	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1137	/** @} */
1138
1139
1140
1141	/** @name Function tables.
1142	* @{
1143	*/
1144
1145	/**
1146	* Function table for a binary operator providing implementation based on
1147	* operand size.
1148	*/
1149	typedef struct IEMOPBINSIZES
1150	{
1151	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1152	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1153	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1154	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1155	} IEMOPBINSIZES;
1156	/** Pointer to a binary operator function table. */
1157	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1158
1159
1160	/**
1161	* Function table for a unary operator providing implementation based on
1162	* operand size.
1163	*/
1164	typedef struct IEMOPUNARYSIZES
1165	{
1166	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1167	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1168	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1169	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1170	} IEMOPUNARYSIZES;
1171	/** Pointer to a unary operator function table. */
1172	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1173
1174
1175	/**
1176	* Function table for a shift operator providing implementation based on
1177	* operand size.
1178	*/
1179	typedef struct IEMOPSHIFTSIZES
1180	{
1181	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1182	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1183	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1184	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1185	} IEMOPSHIFTSIZES;
1186	/** Pointer to a shift operator function table. */
1187	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1188
1189
1190	/**
1191	* Function table for a multiplication or division operation.
1192	*/
1193	typedef struct IEMOPMULDIVSIZES
1194	{
1195	PFNIEMAIMPLMULDIVU8 pfnU8;
1196	PFNIEMAIMPLMULDIVU16 pfnU16;
1197	PFNIEMAIMPLMULDIVU32 pfnU32;
1198	PFNIEMAIMPLMULDIVU64 pfnU64;
1199	} IEMOPMULDIVSIZES;
1200	/** Pointer to a multiplication or division operation function table. */
1201	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1202
1203
1204	/**
1205	* Function table for a double precision shift operator providing implementation
1206	* based on operand size.
1207	*/
1208	typedef struct IEMOPSHIFTDBLSIZES
1209	{
1210	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1211	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1212	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1213	} IEMOPSHIFTDBLSIZES;
1214	/** Pointer to a double precision shift function table. */
1215	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1216
1217
1218	/**
1219	* Function table for media instruction taking two full sized media registers,
1220	* optionally the 2nd being a memory reference (only modifying the first op.)
1221	*/
1222	typedef struct IEMOPMEDIAF2
1223	{
1224	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1225	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1226	} IEMOPMEDIAF2;
1227	/** Pointer to a media operation function table for full sized ops. */
1228	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1229
1230	/**
1231	* Function table for media instruction taking taking one full and one lower
1232	* half media register.
1233	*/
1234	typedef struct IEMOPMEDIAF1L1
1235	{
1236	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1237	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1238	} IEMOPMEDIAF1L1;
1239	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1240	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1241
1242	/**
1243	* Function table for media instruction taking taking one full and one high half
1244	* media register.
1245	*/
1246	typedef struct IEMOPMEDIAF1H1
1247	{
1248	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1249	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1250	} IEMOPMEDIAF1H1;
1251	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1252	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1253
1254
1255	/** @} */
1256
1257
1258	/** @name C instruction implementations for anything slightly complicated.
1259	* @{ */
1260
1261	/**
1262	* For typedef'ing or declaring a C instruction implementation function taking
1263	* no extra arguments.
1264	*
1265	* @param a_Name The name of the type.
1266	*/
1267	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1268	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1269	/**
1270	* For defining a C instruction implementation function taking no extra
1271	* arguments.
1272	*
1273	* @param a_Name The name of the function
1274	*/
1275	# define IEM_CIMPL_DEF_0(a_Name) \
1276	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1277	/**
1278	* For calling a C instruction implementation function taking no extra
1279	* arguments.
1280	*
1281	* This special call macro adds default arguments to the call and allow us to
1282	* change these later.
1283	*
1284	* @param a_fn The name of the function.
1285	*/
1286	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1287
1288	/**
1289	* For typedef'ing or declaring a C instruction implementation function taking
1290	* one extra argument.
1291	*
1292	* @param a_Name The name of the type.
1293	* @param a_Type0 The argument type.
1294	* @param a_Arg0 The argument name.
1295	*/
1296	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1297	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1298	/**
1299	* For defining a C instruction implementation function taking one extra
1300	* argument.
1301	*
1302	* @param a_Name The name of the function
1303	* @param a_Type0 The argument type.
1304	* @param a_Arg0 The argument name.
1305	*/
1306	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1307	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1308	/**
1309	* For calling a C instruction implementation function taking one extra
1310	* argument.
1311	*
1312	* This special call macro adds default arguments to the call and allow us to
1313	* change these later.
1314	*
1315	* @param a_fn The name of the function.
1316	* @param a0 The name of the 1st argument.
1317	*/
1318	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1319
1320	/**
1321	* For typedef'ing or declaring a C instruction implementation function taking
1322	* two extra arguments.
1323	*
1324	* @param a_Name The name of the type.
1325	* @param a_Type0 The type of the 1st argument
1326	* @param a_Arg0 The name of the 1st argument.
1327	* @param a_Type1 The type of the 2nd argument.
1328	* @param a_Arg1 The name of the 2nd argument.
1329	*/
1330	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1331	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1332	/**
1333	* For defining a C instruction implementation function taking two extra
1334	* arguments.
1335	*
1336	* @param a_Name The name of the function.
1337	* @param a_Type0 The type of the 1st argument
1338	* @param a_Arg0 The name of the 1st argument.
1339	* @param a_Type1 The type of the 2nd argument.
1340	* @param a_Arg1 The name of the 2nd argument.
1341	*/
1342	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1343	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1344	/**
1345	* For calling a C instruction implementation function taking two extra
1346	* arguments.
1347	*
1348	* This special call macro adds default arguments to the call and allow us to
1349	* change these later.
1350	*
1351	* @param a_fn The name of the function.
1352	* @param a0 The name of the 1st argument.
1353	* @param a1 The name of the 2nd argument.
1354	*/
1355	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1356
1357	/**
1358	* For typedef'ing or declaring a C instruction implementation function taking
1359	* three extra arguments.
1360	*
1361	* @param a_Name The name of the type.
1362	* @param a_Type0 The type of the 1st argument
1363	* @param a_Arg0 The name of the 1st argument.
1364	* @param a_Type1 The type of the 2nd argument.
1365	* @param a_Arg1 The name of the 2nd argument.
1366	* @param a_Type2 The type of the 3rd argument.
1367	* @param a_Arg2 The name of the 3rd argument.
1368	*/
1369	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1370	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1371	/**
1372	* For defining a C instruction implementation function taking three extra
1373	* arguments.
1374	*
1375	* @param a_Name The name of the function.
1376	* @param a_Type0 The type of the 1st argument
1377	* @param a_Arg0 The name of the 1st argument.
1378	* @param a_Type1 The type of the 2nd argument.
1379	* @param a_Arg1 The name of the 2nd argument.
1380	* @param a_Type2 The type of the 3rd argument.
1381	* @param a_Arg2 The name of the 3rd argument.
1382	*/
1383	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1384	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1385	/**
1386	* For calling a C instruction implementation function taking three extra
1387	* arguments.
1388	*
1389	* This special call macro adds default arguments to the call and allow us to
1390	* change these later.
1391	*
1392	* @param a_fn The name of the function.
1393	* @param a0 The name of the 1st argument.
1394	* @param a1 The name of the 2nd argument.
1395	* @param a2 The name of the 3rd argument.
1396	*/
1397	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1398
1399
1400	/**
1401	* For typedef'ing or declaring a C instruction implementation function taking
1402	* four extra arguments.
1403	*
1404	* @param a_Name The name of the type.
1405	* @param a_Type0 The type of the 1st argument
1406	* @param a_Arg0 The name of the 1st argument.
1407	* @param a_Type1 The type of the 2nd argument.
1408	* @param a_Arg1 The name of the 2nd argument.
1409	* @param a_Type2 The type of the 3rd argument.
1410	* @param a_Arg2 The name of the 3rd argument.
1411	* @param a_Type3 The type of the 4th argument.
1412	* @param a_Arg3 The name of the 4th argument.
1413	*/
1414	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1415	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1416	/**
1417	* For defining a C instruction implementation function taking four extra
1418	* arguments.
1419	*
1420	* @param a_Name The name of the function.
1421	* @param a_Type0 The type of the 1st argument
1422	* @param a_Arg0 The name of the 1st argument.
1423	* @param a_Type1 The type of the 2nd argument.
1424	* @param a_Arg1 The name of the 2nd argument.
1425	* @param a_Type2 The type of the 3rd argument.
1426	* @param a_Arg2 The name of the 3rd argument.
1427	* @param a_Type3 The type of the 4th argument.
1428	* @param a_Arg3 The name of the 4th argument.
1429	*/
1430	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1431	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1432	a_Type2 a_Arg2, a_Type3 a_Arg3))
1433	/**
1434	* For calling a C instruction implementation function taking four extra
1435	* arguments.
1436	*
1437	* This special call macro adds default arguments to the call and allow us to
1438	* change these later.
1439	*
1440	* @param a_fn The name of the function.
1441	* @param a0 The name of the 1st argument.
1442	* @param a1 The name of the 2nd argument.
1443	* @param a2 The name of the 3rd argument.
1444	* @param a3 The name of the 4th argument.
1445	*/
1446	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1447
1448
1449	/**
1450	* For typedef'ing or declaring a C instruction implementation function taking
1451	* five extra arguments.
1452	*
1453	* @param a_Name The name of the type.
1454	* @param a_Type0 The type of the 1st argument
1455	* @param a_Arg0 The name of the 1st argument.
1456	* @param a_Type1 The type of the 2nd argument.
1457	* @param a_Arg1 The name of the 2nd argument.
1458	* @param a_Type2 The type of the 3rd argument.
1459	* @param a_Arg2 The name of the 3rd argument.
1460	* @param a_Type3 The type of the 4th argument.
1461	* @param a_Arg3 The name of the 4th argument.
1462	* @param a_Type4 The type of the 5th argument.
1463	* @param a_Arg4 The name of the 5th argument.
1464	*/
1465	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1466	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1467	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1468	a_Type3 a_Arg3, a_Type4 a_Arg4))
1469	/**
1470	* For defining a C instruction implementation function taking five extra
1471	* arguments.
1472	*
1473	* @param a_Name The name of the function.
1474	* @param a_Type0 The type of the 1st argument
1475	* @param a_Arg0 The name of the 1st argument.
1476	* @param a_Type1 The type of the 2nd argument.
1477	* @param a_Arg1 The name of the 2nd argument.
1478	* @param a_Type2 The type of the 3rd argument.
1479	* @param a_Arg2 The name of the 3rd argument.
1480	* @param a_Type3 The type of the 4th argument.
1481	* @param a_Arg3 The name of the 4th argument.
1482	* @param a_Type4 The type of the 5th argument.
1483	* @param a_Arg4 The name of the 5th argument.
1484	*/
1485	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1486	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1487	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1488	a_Type3 a_Arg3, a_Type4 a_Arg4))
1489	/**
1490	* For calling a C instruction implementation function taking five extra
1491	* arguments.
1492	*
1493	* This special call macro adds default arguments to the call and allow us to
1494	* change these later.
1495	*
1496	* @param a_fn The name of the function.
1497	* @param a0 The name of the 1st argument.
1498	* @param a1 The name of the 2nd argument.
1499	* @param a2 The name of the 3rd argument.
1500	* @param a3 The name of the 4th argument.
1501	* @param a4 The name of the 5th argument.
1502	*/
1503	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1504
1505	/** @} */
1506
1507
1508	/** @} */
1509
1510	RT_C_DECLS_END
1511
1512	#endif
1513

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 47737

Download in other formats: