IEMInternal.h@ 47413

Last change on this file since 47413 was 47413, checked in by vboxsync, 11 years ago
IEM: Started introducing some disassembler details in the decoder that can later be used for instruction statistics and building heuristics.
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File size: 62.7 KB

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1	/* $Id: IEMInternal.h 47413 2013-07-25 22:04:31Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35	/** @def IEM_VERIFICATION_MODE_FULL
36	* Shorthand for:
37	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
38	*/
39	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
40	# define IEM_VERIFICATION_MODE_FULL
41	#endif
42
43
44	/** Finish and move to types.h */
45	typedef union
46	{
47	uint32_t u32;
48	} RTFLOAT32U;
49	typedef RTFLOAT32U *PRTFLOAT32U;
50	typedef RTFLOAT32U const *PCRTFLOAT32U;
51
52
53	/**
54	* Operand or addressing mode.
55	*/
56	typedef enum IEMMODE
57	{
58	IEMMODE_16BIT = 0,
59	IEMMODE_32BIT,
60	IEMMODE_64BIT
61	} IEMMODE;
62	AssertCompileSize(IEMMODE, 4);
63
64	/**
65	* Extended operand mode that includes a representation of 8-bit.
66	*
67	* This is used for packing down modes when invoking some C instruction
68	* implementations.
69	*/
70	typedef enum IEMMODEX
71	{
72	IEMMODEX_16BIT = IEMMODE_16BIT,
73	IEMMODEX_32BIT = IEMMODE_32BIT,
74	IEMMODEX_64BIT = IEMMODE_64BIT,
75	IEMMODEX_8BIT
76	} IEMMODEX;
77	AssertCompileSize(IEMMODEX, 4);
78
79
80	/**
81	* Branch types.
82	*/
83	typedef enum IEMBRANCH
84	{
85	IEMBRANCH_JUMP = 1,
86	IEMBRANCH_CALL,
87	IEMBRANCH_TRAP,
88	IEMBRANCH_SOFTWARE_INT,
89	IEMBRANCH_HARDWARE_INT
90	} IEMBRANCH;
91	AssertCompileSize(IEMBRANCH, 4);
92
93
94	/**
95	* A FPU result.
96	*/
97	typedef struct IEMFPURESULT
98	{
99	/** The output value. */
100	RTFLOAT80U r80Result;
101	/** The output status. */
102	uint16_t FSW;
103	} IEMFPURESULT;
104	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
105	/** Pointer to a FPU result. */
106	typedef IEMFPURESULT *PIEMFPURESULT;
107	/** Pointer to a const FPU result. */
108	typedef IEMFPURESULT const *PCIEMFPURESULT;
109
110
111	/**
112	* A FPU result consisting of two output values and FSW.
113	*/
114	typedef struct IEMFPURESULTTWO
115	{
116	/** The first output value. */
117	RTFLOAT80U r80Result1;
118	/** The output status. */
119	uint16_t FSW;
120	/** The second output value. */
121	RTFLOAT80U r80Result2;
122	} IEMFPURESULTTWO;
123	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
124	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
125	/** Pointer to a FPU result consisting of two output values and FSW. */
126	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
127	/** Pointer to a const FPU result consisting of two output values and FSW. */
128	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
129
130
131	#ifdef IEM_VERIFICATION_MODE_FULL
132
133	/**
134	* Verification event type.
135	*/
136	typedef enum IEMVERIFYEVENT
137	{
138	IEMVERIFYEVENT_INVALID = 0,
139	IEMVERIFYEVENT_IOPORT_READ,
140	IEMVERIFYEVENT_IOPORT_WRITE,
141	IEMVERIFYEVENT_RAM_WRITE,
142	IEMVERIFYEVENT_RAM_READ
143	} IEMVERIFYEVENT;
144
145	/** Checks if the event type is a RAM read or write. */
146	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
147
148	/**
149	* Verification event record.
150	*/
151	typedef struct IEMVERIFYEVTREC
152	{
153	/** Pointer to the next record in the list. */
154	struct IEMVERIFYEVTREC *pNext;
155	/** The event type. */
156	IEMVERIFYEVENT enmEvent;
157	/** The event data. */
158	union
159	{
160	/** IEMVERIFYEVENT_IOPORT_READ */
161	struct
162	{
163	RTIOPORT Port;
164	uint32_t cbValue;
165	} IOPortRead;
166
167	/** IEMVERIFYEVENT_IOPORT_WRITE */
168	struct
169	{
170	RTIOPORT Port;
171	uint32_t cbValue;
172	uint32_t u32Value;
173	} IOPortWrite;
174
175	/** IEMVERIFYEVENT_RAM_READ */
176	struct
177	{
178	RTGCPHYS GCPhys;
179	uint32_t cb;
180	} RamRead;
181
182	/** IEMVERIFYEVENT_RAM_WRITE */
183	struct
184	{
185	RTGCPHYS GCPhys;
186	uint32_t cb;
187	uint8_t ab[512];
188	} RamWrite;
189	} u;
190	} IEMVERIFYEVTREC;
191	/** Pointer to an IEM event verification records. */
192	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
193
194	#endif /* IEM_VERIFICATION_MODE_FULL */
195
196
197	/**
198	* The per-CPU IEM state.
199	*/
200	typedef struct IEMCPU
201	{
202	/** Pointer to the CPU context - ring-3 contex. */
203	R3PTRTYPE(PCPUMCTX) pCtxR3;
204	/** Pointer to the CPU context - ring-0 contex. */
205	R0PTRTYPE(PCPUMCTX) pCtxR0;
206	/** Pointer to the CPU context - raw-mode contex. */
207	RCPTRTYPE(PCPUMCTX) pCtxRC;
208
209	/** Offset of the VMCPU structure relative to this structure (negative). */
210	int32_t offVMCpu;
211	/** Offset of the VM structure relative to this structure (negative). */
212	int32_t offVM;
213
214	/** Whether to bypass access handlers or not. */
215	bool fBypassHandlers;
216	/** Indicates that we're interpreting patch code - RC only! */
217	bool fInPatchCode;
218	/** Explicit alignment padding. */
219	bool afAlignment0[2];
220
221	/** The flags of the current exception / interrupt. */
222	uint32_t fCurXcpt;
223	/** The current exception / interrupt. */
224	uint8_t uCurXcpt;
225	/** Exception / interrupt recursion depth. */
226	int8_t cXcptRecursions;
227	/** Explicit alignment padding. */
228	bool afAlignment1[1];
229	/** The CPL. */
230	uint8_t uCpl;
231	/** The current CPU execution mode (CS). */
232	IEMMODE enmCpuMode;
233	/** Info status code that needs to be propagated to the IEM caller.
234	* This cannot be passed internally, as it would complicate all success
235	* checks within the interpreter making the code larger and almost impossible
236	* to get right. Instead, we'll store status codes to pass on here. Each
237	* source of these codes will perform appropriate sanity checks. */
238	int32_t rcPassUp;
239
240	/** @name Statistics
241	* @{ */
242	/** The number of instructions we've executed. */
243	uint32_t cInstructions;
244	/** The number of potential exits. */
245	uint32_t cPotentialExits;
246	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
247	* This may contain uncommitted writes. */
248	uint32_t cbWritten;
249	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
250	uint32_t cRetInstrNotImplemented;
251	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
252	uint32_t cRetAspectNotImplemented;
253	/** Counts informational statuses returned (other than VINF_SUCCESS). */
254	uint32_t cRetInfStatuses;
255	/** Counts other error statuses returned. */
256	uint32_t cRetErrStatuses;
257	/** Number of times rcPassUp has been used. */
258	uint32_t cRetPassUpStatus;
259	#ifdef IEM_VERIFICATION_MODE_FULL
260	/** The Number of I/O port reads that has been performed. */
261	uint32_t cIOReads;
262	/** The Number of I/O port writes that has been performed. */
263	uint32_t cIOWrites;
264	/** Set if no comparison to REM is currently performed.
265	* This is used to skip past really slow bits. */
266	bool fNoRem;
267	/** Indicates that RAX and RDX differences should be ignored since RDTSC
268	* and RDTSCP are timing sensitive. */
269	bool fIgnoreRaxRdx;
270	/** Indicates that a MOVS instruction with overlapping source and destination
271	* was executed, causing the memory write records to be incorrrect. */
272	bool fOverlappingMovs;
273	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
274	* CPUM doesn't yet reflect. */
275	uint8_t uInjectCpl;
276	bool afAlignment2[4];
277	/** Mask of undefined eflags.
278	* The verifier will any difference in these flags. */
279	uint32_t fUndefinedEFlags;
280	/** The CS of the instruction being interpreted. */
281	RTSEL uOldCs;
282	/** The RIP of the instruction being interpreted. */
283	uint64_t uOldRip;
284	/** The physical address corresponding to abOpcodes[0]. */
285	RTGCPHYS GCPhysOpcodes;
286	#endif
287	/** @} */
288
289	/** @name Decoder state.
290	* @{ */
291
292	/** The default addressing mode . */
293	IEMMODE enmDefAddrMode;
294	/** The effective addressing mode . */
295	IEMMODE enmEffAddrMode;
296	/** The default operand mode . */
297	IEMMODE enmDefOpSize;
298	/** The effective operand mode . */
299	IEMMODE enmEffOpSize;
300
301	/** The prefix mask (IEM_OP_PRF_XXX). */
302	uint32_t fPrefixes;
303	/** The extra REX ModR/M register field bit (REX.R << 3). */
304	uint8_t uRexReg;
305	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
306	* (REX.B << 3). */
307	uint8_t uRexB;
308	/** The extra REX SIB index field bit (REX.X << 3). */
309	uint8_t uRexIndex;
310	/** The effective segment register (X86_SREG_XXX). */
311	uint8_t iEffSeg;
312
313	/** The current offset into abOpcodes. */
314	uint8_t offOpcode;
315	/** The size of what has currently been fetched into abOpcodes. */
316	uint8_t cbOpcode;
317	/** The opcode bytes. */
318	uint8_t abOpcode[15];
319	/** Offset into abOpcodes where the FPU instruction starts.
320	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
321	* instruction result is committed. */
322	uint8_t offFpuOpcode;
323
324	/** @}*/
325
326	/** Alignment padding for aMemMappings. */
327	uint8_t abAlignment2[4];
328
329	/** The number of active guest memory mappings. */
330	uint8_t cActiveMappings;
331	/** The next unused mapping index. */
332	uint8_t iNextMapping;
333	/** Records for tracking guest memory mappings. */
334	struct
335	{
336	/** The address of the mapped bytes. */
337	void *pv;
338	#if defined(IN_RC) && HC_ARCH_BITS == 64
339	uint32_t u32Alignment3; /*< Alignment padding. /
340	#endif
341	/** The access flags (IEM_ACCESS_XXX).
342	* IEM_ACCESS_INVALID if the entry is unused. */
343	uint32_t fAccess;
344	#if HC_ARCH_BITS == 64
345	uint32_t u32Alignment4; /*< Alignment padding. /
346	#endif
347	} aMemMappings[3];
348
349	/** Locking records for the mapped memory. */
350	union
351	{
352	PGMPAGEMAPLOCK Lock;
353	uint64_t au64Padding[2];
354	} aMemMappingLocks[3];
355
356	/** Bounce buffer info.
357	* This runs in parallel to aMemMappings. */
358	struct
359	{
360	/** The physical address of the first byte. */
361	RTGCPHYS GCPhysFirst;
362	/** The physical address of the second page. */
363	RTGCPHYS GCPhysSecond;
364	/** The number of bytes in the first page. */
365	uint16_t cbFirst;
366	/** The number of bytes in the second page. */
367	uint16_t cbSecond;
368	/** Whether it's unassigned memory. */
369	bool fUnassigned;
370	/** Explicit alignment padding. */
371	bool afAlignment5[3];
372	} aMemBbMappings[3];
373
374	/** Bounce buffer storage.
375	* This runs in parallel to aMemMappings and aMemBbMappings. */
376	struct
377	{
378	uint8_t ab[512];
379	} aBounceBuffers[3];
380
381	/** @name Target CPU information.
382	* @{ */
383	/** EDX value of CPUID(1).
384	* @remarks Some bits are subject to change and must be queried dynamically. */
385	uint32_t fCpuIdStdFeaturesEdx;
386	/** ECX value of CPUID(1).
387	* @remarks Some bits are subject to change and must be queried dynamically. */
388	uint32_t fCpuIdStdFeaturesEcx;
389	/** The CPU vendor. */
390	CPUMCPUVENDOR enmCpuVendor;
391	/** @} */
392
393	/** @name Host CPU information.
394	* @{ */
395	/** EDX value of CPUID(1). */
396	uint32_t fHostCpuIdStdFeaturesEdx;
397	/** ECX value of CPUID(1). */
398	uint32_t fHostCpuIdStdFeaturesEcx;
399	/** The CPU vendor. */
400	CPUMCPUVENDOR enmHostCpuVendor;
401	/** @} */
402
403	#ifdef IEM_VERIFICATION_MODE_FULL
404	/** The event verification records for what IEM did (LIFO). */
405	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
406	/** Insertion point for pIemEvtRecHead. */
407	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
408	/** The event verification records for what the other party did (FIFO). */
409	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
410	/** Insertion point for pOtherEvtRecHead. */
411	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
412	/** List of free event records. */
413	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
414	#endif
415	} IEMCPU;
416	/** Pointer to the per-CPU IEM state. */
417	typedef IEMCPU *PIEMCPU;
418	/** Pointer to the const per-CPU IEM state. */
419	typedef IEMCPU const *PCIEMCPU;
420
421	/** Converts a IEMCPU pointer to a VMCPU pointer.
422	* @returns VMCPU pointer.
423	* @param a_pIemCpu The IEM per CPU instance data.
424	*/
425	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
426
427	/** Converts a IEMCPU pointer to a VM pointer.
428	* @returns VM pointer.
429	* @param a_pIemCpu The IEM per CPU instance data.
430	*/
431	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
432
433	/** @name IEM_ACCESS_XXX - Access details.
434	* @{ */
435	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
436	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
437	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
438	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
439	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
440	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
441	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
442	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
443	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
444	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
445	/** The writes are partial, so if initialize the bounce buffer with the
446	* orignal RAM content. */
447	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
448	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
449	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
450	/** Read+write data alias. */
451	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
452	/** Write data alias. */
453	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
454	/** Read data alias. */
455	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
456	/** Instruction fetch alias. */
457	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
458	/** Stack write alias. */
459	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
460	/** Stack read alias. */
461	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
462	/** Stack read+write alias. */
463	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
464	/** Read system table alias. */
465	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
466	/** Read+write system table alias. */
467	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
468	/** @} */
469
470	/** @name Prefix constants (IEMCPU::fPrefixes)
471	* @{ */
472	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
473	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
474	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
475	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
476	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
477	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
478	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
479
480	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
481	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
482	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
483
484	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
485	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
486	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
487
488	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
489	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
490	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
491	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
492	/** Mask with all the REX prefix flags.
493	* This is generally for use when needing to undo the REX prefixes when they
494	* are followed legacy prefixes and therefore does not immediately preceed
495	* the first opcode byte.
496	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
497	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
498	/** @} */
499
500	/** @name Opcode forms
501	* @{ */
502	/** ModR/M: reg, r/m */
503	#define IEMOPFORM_RM 0
504	/** ModR/M: reg, r/m (register) */
505	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
506	/** ModR/M: reg, r/m (memory) */
507	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
508	/** ModR/M: r/m, reg */
509	#define IEMOPFORM_MR 1
510	/** ModR/M: r/m (register), reg */
511	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
512	/** ModR/M: r/m (memory), reg */
513	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
514	/** ModR/M: r/m only */
515	#define IEMOPFORM_M 2
516	/** ModR/M: r/m only (register). */
517	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
518	/** ModR/M: r/m only (memory). */
519	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
520	/** ModR/M: reg only */
521	#define IEMOPFORM_R 3
522
523	/** The r/m is a register. */
524	#define IEMOPFORM_MOD3 RT_BIT_32(8)
525	/** The r/m is a memory access. */
526	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
527	/** @} */
528
529	/**
530	* Tests if verification mode is enabled.
531	*
532	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
533	* should therefore cause the compiler to eliminate the verification branch
534	* of an if statement. */
535	#ifdef IEM_VERIFICATION_MODE_FULL
536	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
537	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
538	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
539	#else
540	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
541	#endif
542
543	/**
544	* Tests if full verification mode is enabled.
545	*
546	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
547	* should therefore cause the compiler to eliminate the verification branch
548	* of an if statement. */
549	#ifdef IEM_VERIFICATION_MODE_FULL
550	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
551	#else
552	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
553	#endif
554
555	/** @def IEM_VERIFICATION_MODE
556	* Indicates that one of the verfication modes are enabled.
557	*/
558	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
559	# define IEM_VERIFICATION_MODE
560	#endif
561
562	/**
563	* Indicates to the verifier that the given flag set is undefined.
564	*
565	* Can be invoked again to add more flags.
566	*
567	* This is a NOOP if the verifier isn't compiled in.
568	*/
569	#ifdef IEM_VERIFICATION_MODE_FULL
570	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
571	#else
572	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
573	#endif
574
575
576	/** @def IEM_DECL_IMPL_TYPE
577	* For typedef'ing an instruction implementation function.
578	*
579	* @param a_RetType The return type.
580	* @param a_Name The name of the type.
581	* @param a_ArgList The argument list enclosed in parentheses.
582	*/
583
584	/** @def IEM_DECL_IMPL_DEF
585	* For defining an instruction implementation function.
586	*
587	* @param a_RetType The return type.
588	* @param a_Name The name of the type.
589	* @param a_ArgList The argument list enclosed in parentheses.
590	*/
591
592	#if defined(__GNUC__) && defined(RT_ARCH_X86)
593	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
594	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
595	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
596	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
597
598	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
599	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
600	a_RetType (__fastcall a_Name) a_ArgList
601	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
602	a_RetType __fastcall a_Name a_ArgList
603
604	#else
605	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
606	a_RetType (VBOXCALL a_Name) a_ArgList
607	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
608	a_RetType VBOXCALL a_Name a_ArgList
609
610	#endif
611
612	/** @name Arithmetic assignment operations on bytes (binary).
613	* @{ */
614	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
615	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
616	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
617	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
618	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
619	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
620	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
621	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
622	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
623	/** @} */
624
625	/** @name Arithmetic assignment operations on words (binary).
626	* @{ */
627	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
628	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
629	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
630	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
631	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
632	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
633	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
634	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
635	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
636	/** @} */
637
638	/** @name Arithmetic assignment operations on double words (binary).
639	* @{ */
640	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
641	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
642	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
643	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
644	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
645	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
646	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
647	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
648	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
649	/** @} */
650
651	/** @name Arithmetic assignment operations on quad words (binary).
652	* @{ */
653	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
654	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
655	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
656	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
657	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
658	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
659	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
660	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
661	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
662	/** @} */
663
664	/** @name Compare operations (thrown in with the binary ops).
665	* @{ */
666	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
667	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
668	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
669	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
670	/** @} */
671
672	/** @name Test operations (thrown in with the binary ops).
673	* @{ */
674	FNIEMAIMPLBINU8 iemAImpl_test_u8;
675	FNIEMAIMPLBINU16 iemAImpl_test_u16;
676	FNIEMAIMPLBINU32 iemAImpl_test_u32;
677	FNIEMAIMPLBINU64 iemAImpl_test_u64;
678	/** @} */
679
680	/** @name Bit operations operations (thrown in with the binary ops).
681	* @{ */
682	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
683	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
684	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
685	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
686	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
687	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
688	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
689	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
690	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
691	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
692	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
693	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
694	/** @} */
695
696	/** @name Exchange memory with register operations.
697	* @{ */
698	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
699	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
700	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
701	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
702	/** @} */
703
704	/** @name Exchange and add operations.
705	* @{ */
706	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
707	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
708	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
709	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
710	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
711	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
712	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
713	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
714	/** @} */
715
716	/** @name Compare and exchange.
717	* @{ */
718	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
719	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
720	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
721	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
722	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
723	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
724	#ifdef RT_ARCH_X86
725	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
726	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
727	#else
728	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
729	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
730	#endif
731	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
732	uint32_t *pEFlags));
733	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
734	uint32_t *pEFlags));
735	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
736	uint32_t *pEFlags));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
738	uint32_t *pEFlags));
739	/** @} */
740
741	/** @name Memory ordering
742	* @{ */
743	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
744	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
745	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
746	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
747	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
748	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
749	/** @} */
750
751	/** @name Double precision shifts
752	* @{ */
753	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
754	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
755	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
756	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
757	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
758	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
759	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
760	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
761	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
762	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
763	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
764	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
765	/** @} */
766
767
768	/** @name Bit search operations (thrown in with the binary ops).
769	* @{ */
770	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
771	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
772	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
773	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
774	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
775	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
776	/** @} */
777
778	/** @name Signed multiplication operations (thrown in with the binary ops).
779	* @{ */
780	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
781	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
782	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
783	/** @} */
784
785	/** @name Arithmetic assignment operations on bytes (unary).
786	* @{ */
787	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
788	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
789	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
790	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
791	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
792	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
793	/** @} */
794
795	/** @name Arithmetic assignment operations on words (unary).
796	* @{ */
797	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
798	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
799	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
800	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
801	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
802	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
803	/** @} */
804
805	/** @name Arithmetic assignment operations on double words (unary).
806	* @{ */
807	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
808	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
809	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
810	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
811	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
812	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
813	/** @} */
814
815	/** @name Arithmetic assignment operations on quad words (unary).
816	* @{ */
817	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
818	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
819	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
820	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
821	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
822	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
823	/** @} */
824
825
826	/** @name Shift operations on bytes (Group 2).
827	* @{ */
828	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
829	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
830	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
831	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
832	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
833	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
834	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
835	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
836	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
837	/** @} */
838
839	/** @name Shift operations on words (Group 2).
840	* @{ */
841	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
842	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
843	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
844	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
845	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
846	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
847	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
848	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
849	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
850	/** @} */
851
852	/** @name Shift operations on double words (Group 2).
853	* @{ */
854	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
855	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
856	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
857	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
858	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
859	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
860	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
861	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
862	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
863	/** @} */
864
865	/** @name Shift operations on words (Group 2).
866	* @{ */
867	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
868	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
869	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
870	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
871	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
872	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
873	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
874	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
875	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
876	/** @} */
877
878	/** @name Multiplication and division operations.
879	* @{ */
880	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
881	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
882	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
883	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
884
885	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
886	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
887	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
888	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
889
890	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
891	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
892	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
893	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
894
895	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
896	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
897	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
898	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
899	/** @} */
900
901	/** @name Byte Swap.
902	* @{ */
903	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
904	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
905	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
906	/** @} */
907
908
909	/** @name FPU operations taking a 32-bit float argument
910	* @{ */
911	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
912	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
913	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
914
915	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
916	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
917	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
918
919	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
920	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
921	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
922	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
923	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
924	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
925	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
926
927	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
928	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
929	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
930	/** @} */
931
932	/** @name FPU operations taking a 64-bit float argument
933	* @{ */
934	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
935	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
936	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
937
938	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
939	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
940	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
941	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
942	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
943	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
944
945	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
946	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
947	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
948	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
949	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
950	/** @} */
951
952	/** @name FPU operations taking a 80-bit float argument
953	* @{ */
954	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
955	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
956	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
957	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
958	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
959	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
960	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
961	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
962	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
963	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
964	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
965	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
966
967	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
968	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
969
970	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
971	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
972	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
973	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
974	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
975
976	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
977	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
978	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
979	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
980	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
981
982	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
983	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
984	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
985	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
986	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
987	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
988	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
989	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
990	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
991	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
992
993	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
994	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
995	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
996	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
997
998	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
999	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1000	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1001	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1002	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1003	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1004	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1005	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1006	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1007
1008	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1009	PCRTFLOAT80U pr80Val));
1010	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1011	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1012	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1013	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1014
1015	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1016	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1017	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1018
1019	/** @} */
1020
1021	/** @name FPU operations taking a 16-bit signed integer argument
1022	* @{ */
1023	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1024	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1025	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1026
1027	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1028	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1029	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1030	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1031	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1032	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1033
1034	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1035	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1036
1037	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1038	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1039	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1040	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1041	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1042	/** @} */
1043
1044	/** @name FPU operations taking a 32-bit signed integer argument
1045	* @{ */
1046	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1047	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1048	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1049
1050	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1051	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1052	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1053	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1054	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1055	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1056
1057	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1058	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1059
1060	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1061	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1062	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1063	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1064	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1065	/** @} */
1066
1067	/** @name FPU operations taking a 64-bit signed integer argument
1068	* @{ */
1069	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1070	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1071	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1072
1073	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1074	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1075	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1076	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1077	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1078	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1079
1080	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1081	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1082
1083	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1084	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1085	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1086	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1087	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1088	/** @} */
1089
1090
1091	/** Temporary type representing a 256-bit vector register. */
1092	typedef struct {uint64_t au64[4]; } IEMVMM256;
1093	/** Temporary type pointing to a 256-bit vector register. */
1094	typedef IEMVMM256 *PIEMVMM256;
1095	/** Temporary type pointing to a const 256-bit vector register. */
1096	typedef IEMVMM256 *PCIEMVMM256;
1097
1098
1099	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1100	* @{ */
1101	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1102	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1103	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1104	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1105	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1106	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1107	/** @} */
1108
1109	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1110	* @{ */
1111	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1112	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1113	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1114	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1115	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1116	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1117	/** @} */
1118
1119	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1120	* @{ */
1121	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1122	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1123	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1124	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1125	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1126	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1127	/** @} */
1128
1129	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1130	* @{ */
1131	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1132	uint128_t const *pu128Src, uint8_t bEvil));
1133	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1134	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1135	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1136	/** @} */
1137
1138	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1139	* @{ */
1140	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1141	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1142	/** @} */
1143
1144
1145
1146	/** @name Function tables.
1147	* @{
1148	*/
1149
1150	/**
1151	* Function table for a binary operator providing implementation based on
1152	* operand size.
1153	*/
1154	typedef struct IEMOPBINSIZES
1155	{
1156	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1157	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1158	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1159	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1160	} IEMOPBINSIZES;
1161	/** Pointer to a binary operator function table. */
1162	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1163
1164
1165	/**
1166	* Function table for a unary operator providing implementation based on
1167	* operand size.
1168	*/
1169	typedef struct IEMOPUNARYSIZES
1170	{
1171	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1172	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1173	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1174	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1175	} IEMOPUNARYSIZES;
1176	/** Pointer to a unary operator function table. */
1177	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1178
1179
1180	/**
1181	* Function table for a shift operator providing implementation based on
1182	* operand size.
1183	*/
1184	typedef struct IEMOPSHIFTSIZES
1185	{
1186	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1187	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1188	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1189	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1190	} IEMOPSHIFTSIZES;
1191	/** Pointer to a shift operator function table. */
1192	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1193
1194
1195	/**
1196	* Function table for a multiplication or division operation.
1197	*/
1198	typedef struct IEMOPMULDIVSIZES
1199	{
1200	PFNIEMAIMPLMULDIVU8 pfnU8;
1201	PFNIEMAIMPLMULDIVU16 pfnU16;
1202	PFNIEMAIMPLMULDIVU32 pfnU32;
1203	PFNIEMAIMPLMULDIVU64 pfnU64;
1204	} IEMOPMULDIVSIZES;
1205	/** Pointer to a multiplication or division operation function table. */
1206	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1207
1208
1209	/**
1210	* Function table for a double precision shift operator providing implementation
1211	* based on operand size.
1212	*/
1213	typedef struct IEMOPSHIFTDBLSIZES
1214	{
1215	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1216	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1217	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1218	} IEMOPSHIFTDBLSIZES;
1219	/** Pointer to a double precision shift function table. */
1220	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1221
1222
1223	/**
1224	* Function table for media instruction taking two full sized media registers,
1225	* optionally the 2nd being a memory reference (only modifying the first op.)
1226	*/
1227	typedef struct IEMOPMEDIAF2
1228	{
1229	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1230	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1231	} IEMOPMEDIAF2;
1232	/** Pointer to a media operation function table for full sized ops. */
1233	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1234
1235	/**
1236	* Function table for media instruction taking taking one full and one lower
1237	* half media register.
1238	*/
1239	typedef struct IEMOPMEDIAF1L1
1240	{
1241	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1242	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1243	} IEMOPMEDIAF1L1;
1244	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1245	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1246
1247	/**
1248	* Function table for media instruction taking taking one full and one high half
1249	* media register.
1250	*/
1251	typedef struct IEMOPMEDIAF1H1
1252	{
1253	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1254	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1255	} IEMOPMEDIAF1H1;
1256	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1257	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1258
1259
1260	/** @} */
1261
1262
1263	/** @name C instruction implementations for anything slightly complicated.
1264	* @{ */
1265
1266	/**
1267	* For typedef'ing or declaring a C instruction implementation function taking
1268	* no extra arguments.
1269	*
1270	* @param a_Name The name of the type.
1271	*/
1272	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1273	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1274	/**
1275	* For defining a C instruction implementation function taking no extra
1276	* arguments.
1277	*
1278	* @param a_Name The name of the function
1279	*/
1280	# define IEM_CIMPL_DEF_0(a_Name) \
1281	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1282	/**
1283	* For calling a C instruction implementation function taking no extra
1284	* arguments.
1285	*
1286	* This special call macro adds default arguments to the call and allow us to
1287	* change these later.
1288	*
1289	* @param a_fn The name of the function.
1290	*/
1291	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1292
1293	/**
1294	* For typedef'ing or declaring a C instruction implementation function taking
1295	* one extra argument.
1296	*
1297	* @param a_Name The name of the type.
1298	* @param a_Type0 The argument type.
1299	* @param a_Arg0 The argument name.
1300	*/
1301	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1302	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1303	/**
1304	* For defining a C instruction implementation function taking one extra
1305	* argument.
1306	*
1307	* @param a_Name The name of the function
1308	* @param a_Type0 The argument type.
1309	* @param a_Arg0 The argument name.
1310	*/
1311	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1312	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1313	/**
1314	* For calling a C instruction implementation function taking one extra
1315	* argument.
1316	*
1317	* This special call macro adds default arguments to the call and allow us to
1318	* change these later.
1319	*
1320	* @param a_fn The name of the function.
1321	* @param a0 The name of the 1st argument.
1322	*/
1323	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1324
1325	/**
1326	* For typedef'ing or declaring a C instruction implementation function taking
1327	* two extra arguments.
1328	*
1329	* @param a_Name The name of the type.
1330	* @param a_Type0 The type of the 1st argument
1331	* @param a_Arg0 The name of the 1st argument.
1332	* @param a_Type1 The type of the 2nd argument.
1333	* @param a_Arg1 The name of the 2nd argument.
1334	*/
1335	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1336	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1337	/**
1338	* For defining a C instruction implementation function taking two extra
1339	* arguments.
1340	*
1341	* @param a_Name The name of the function.
1342	* @param a_Type0 The type of the 1st argument
1343	* @param a_Arg0 The name of the 1st argument.
1344	* @param a_Type1 The type of the 2nd argument.
1345	* @param a_Arg1 The name of the 2nd argument.
1346	*/
1347	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1348	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1349	/**
1350	* For calling a C instruction implementation function taking two extra
1351	* arguments.
1352	*
1353	* This special call macro adds default arguments to the call and allow us to
1354	* change these later.
1355	*
1356	* @param a_fn The name of the function.
1357	* @param a0 The name of the 1st argument.
1358	* @param a1 The name of the 2nd argument.
1359	*/
1360	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1361
1362	/**
1363	* For typedef'ing or declaring a C instruction implementation function taking
1364	* three extra arguments.
1365	*
1366	* @param a_Name The name of the type.
1367	* @param a_Type0 The type of the 1st argument
1368	* @param a_Arg0 The name of the 1st argument.
1369	* @param a_Type1 The type of the 2nd argument.
1370	* @param a_Arg1 The name of the 2nd argument.
1371	* @param a_Type2 The type of the 3rd argument.
1372	* @param a_Arg2 The name of the 3rd argument.
1373	*/
1374	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1375	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1376	/**
1377	* For defining a C instruction implementation function taking three extra
1378	* arguments.
1379	*
1380	* @param a_Name The name of the function.
1381	* @param a_Type0 The type of the 1st argument
1382	* @param a_Arg0 The name of the 1st argument.
1383	* @param a_Type1 The type of the 2nd argument.
1384	* @param a_Arg1 The name of the 2nd argument.
1385	* @param a_Type2 The type of the 3rd argument.
1386	* @param a_Arg2 The name of the 3rd argument.
1387	*/
1388	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1389	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1390	/**
1391	* For calling a C instruction implementation function taking three extra
1392	* arguments.
1393	*
1394	* This special call macro adds default arguments to the call and allow us to
1395	* change these later.
1396	*
1397	* @param a_fn The name of the function.
1398	* @param a0 The name of the 1st argument.
1399	* @param a1 The name of the 2nd argument.
1400	* @param a2 The name of the 3rd argument.
1401	*/
1402	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1403
1404
1405	/**
1406	* For typedef'ing or declaring a C instruction implementation function taking
1407	* four extra arguments.
1408	*
1409	* @param a_Name The name of the type.
1410	* @param a_Type0 The type of the 1st argument
1411	* @param a_Arg0 The name of the 1st argument.
1412	* @param a_Type1 The type of the 2nd argument.
1413	* @param a_Arg1 The name of the 2nd argument.
1414	* @param a_Type2 The type of the 3rd argument.
1415	* @param a_Arg2 The name of the 3rd argument.
1416	* @param a_Type3 The type of the 4th argument.
1417	* @param a_Arg3 The name of the 4th argument.
1418	*/
1419	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1420	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1421	/**
1422	* For defining a C instruction implementation function taking four extra
1423	* arguments.
1424	*
1425	* @param a_Name The name of the function.
1426	* @param a_Type0 The type of the 1st argument
1427	* @param a_Arg0 The name of the 1st argument.
1428	* @param a_Type1 The type of the 2nd argument.
1429	* @param a_Arg1 The name of the 2nd argument.
1430	* @param a_Type2 The type of the 3rd argument.
1431	* @param a_Arg2 The name of the 3rd argument.
1432	* @param a_Type3 The type of the 4th argument.
1433	* @param a_Arg3 The name of the 4th argument.
1434	*/
1435	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1436	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1437	a_Type2 a_Arg2, a_Type3 a_Arg3))
1438	/**
1439	* For calling a C instruction implementation function taking four extra
1440	* arguments.
1441	*
1442	* This special call macro adds default arguments to the call and allow us to
1443	* change these later.
1444	*
1445	* @param a_fn The name of the function.
1446	* @param a0 The name of the 1st argument.
1447	* @param a1 The name of the 2nd argument.
1448	* @param a2 The name of the 3rd argument.
1449	* @param a3 The name of the 4th argument.
1450	*/
1451	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1452
1453
1454	/**
1455	* For typedef'ing or declaring a C instruction implementation function taking
1456	* five extra arguments.
1457	*
1458	* @param a_Name The name of the type.
1459	* @param a_Type0 The type of the 1st argument
1460	* @param a_Arg0 The name of the 1st argument.
1461	* @param a_Type1 The type of the 2nd argument.
1462	* @param a_Arg1 The name of the 2nd argument.
1463	* @param a_Type2 The type of the 3rd argument.
1464	* @param a_Arg2 The name of the 3rd argument.
1465	* @param a_Type3 The type of the 4th argument.
1466	* @param a_Arg3 The name of the 4th argument.
1467	* @param a_Type4 The type of the 5th argument.
1468	* @param a_Arg4 The name of the 5th argument.
1469	*/
1470	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1471	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1472	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1473	a_Type3 a_Arg3, a_Type4 a_Arg4))
1474	/**
1475	* For defining a C instruction implementation function taking five extra
1476	* arguments.
1477	*
1478	* @param a_Name The name of the function.
1479	* @param a_Type0 The type of the 1st argument
1480	* @param a_Arg0 The name of the 1st argument.
1481	* @param a_Type1 The type of the 2nd argument.
1482	* @param a_Arg1 The name of the 2nd argument.
1483	* @param a_Type2 The type of the 3rd argument.
1484	* @param a_Arg2 The name of the 3rd argument.
1485	* @param a_Type3 The type of the 4th argument.
1486	* @param a_Arg3 The name of the 4th argument.
1487	* @param a_Type4 The type of the 5th argument.
1488	* @param a_Arg4 The name of the 5th argument.
1489	*/
1490	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1491	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1492	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1493	a_Type3 a_Arg3, a_Type4 a_Arg4))
1494	/**
1495	* For calling a C instruction implementation function taking five extra
1496	* arguments.
1497	*
1498	* This special call macro adds default arguments to the call and allow us to
1499	* change these later.
1500	*
1501	* @param a_fn The name of the function.
1502	* @param a0 The name of the 1st argument.
1503	* @param a1 The name of the 2nd argument.
1504	* @param a2 The name of the 3rd argument.
1505	* @param a3 The name of the 4th argument.
1506	* @param a4 The name of the 5th argument.
1507	*/
1508	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1509
1510	/** @} */
1511
1512
1513	/** @} */
1514
1515	RT_C_DECLS_END
1516
1517	#endif
1518

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 47413

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