IEMInternal.h@ 46727

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1	/* $Id: IEMInternal.h 46168 2013-05-19 22:58:37Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35	/** @def IEM_VERIFICATION_MODE_FULL
36	* Shorthand for:
37	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
38	*/
39	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
40	# define IEM_VERIFICATION_MODE_FULL
41	#endif
42
43
44	/** Finish and move to types.h */
45	typedef union
46	{
47	uint32_t u32;
48	} RTFLOAT32U;
49	typedef RTFLOAT32U *PRTFLOAT32U;
50	typedef RTFLOAT32U const *PCRTFLOAT32U;
51
52
53	/**
54	* Operand or addressing mode.
55	*/
56	typedef enum IEMMODE
57	{
58	IEMMODE_16BIT = 0,
59	IEMMODE_32BIT,
60	IEMMODE_64BIT
61	} IEMMODE;
62	AssertCompileSize(IEMMODE, 4);
63
64	/**
65	* Extended operand mode that includes a representation of 8-bit.
66	*
67	* This is used for packing down modes when invoking some C instruction
68	* implementations.
69	*/
70	typedef enum IEMMODEX
71	{
72	IEMMODEX_16BIT = IEMMODE_16BIT,
73	IEMMODEX_32BIT = IEMMODE_32BIT,
74	IEMMODEX_64BIT = IEMMODE_64BIT,
75	IEMMODEX_8BIT
76	} IEMMODEX;
77	AssertCompileSize(IEMMODEX, 4);
78
79
80	/**
81	* Branch types.
82	*/
83	typedef enum IEMBRANCH
84	{
85	IEMBRANCH_JUMP = 1,
86	IEMBRANCH_CALL,
87	IEMBRANCH_TRAP,
88	IEMBRANCH_SOFTWARE_INT,
89	IEMBRANCH_HARDWARE_INT
90	} IEMBRANCH;
91	AssertCompileSize(IEMBRANCH, 4);
92
93
94	/**
95	* A FPU result.
96	*/
97	typedef struct IEMFPURESULT
98	{
99	/** The output value. */
100	RTFLOAT80U r80Result;
101	/** The output status. */
102	uint16_t FSW;
103	} IEMFPURESULT;
104	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
105	/** Pointer to a FPU result. */
106	typedef IEMFPURESULT *PIEMFPURESULT;
107	/** Pointer to a const FPU result. */
108	typedef IEMFPURESULT const *PCIEMFPURESULT;
109
110
111	/**
112	* A FPU result consisting of two output values and FSW.
113	*/
114	typedef struct IEMFPURESULTTWO
115	{
116	/** The first output value. */
117	RTFLOAT80U r80Result1;
118	/** The output status. */
119	uint16_t FSW;
120	/** The second output value. */
121	RTFLOAT80U r80Result2;
122	} IEMFPURESULTTWO;
123	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
124	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
125	/** Pointer to a FPU result consisting of two output values and FSW. */
126	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
127	/** Pointer to a const FPU result consisting of two output values and FSW. */
128	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
129
130
131	#ifdef IEM_VERIFICATION_MODE_FULL
132
133	/**
134	* Verification event type.
135	*/
136	typedef enum IEMVERIFYEVENT
137	{
138	IEMVERIFYEVENT_INVALID = 0,
139	IEMVERIFYEVENT_IOPORT_READ,
140	IEMVERIFYEVENT_IOPORT_WRITE,
141	IEMVERIFYEVENT_RAM_WRITE,
142	IEMVERIFYEVENT_RAM_READ
143	} IEMVERIFYEVENT;
144
145	/** Checks if the event type is a RAM read or write. */
146	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
147
148	/**
149	* Verification event record.
150	*/
151	typedef struct IEMVERIFYEVTREC
152	{
153	/** Pointer to the next record in the list. */
154	struct IEMVERIFYEVTREC *pNext;
155	/** The event type. */
156	IEMVERIFYEVENT enmEvent;
157	/** The event data. */
158	union
159	{
160	/** IEMVERIFYEVENT_IOPORT_READ */
161	struct
162	{
163	RTIOPORT Port;
164	uint32_t cbValue;
165	} IOPortRead;
166
167	/** IEMVERIFYEVENT_IOPORT_WRITE */
168	struct
169	{
170	RTIOPORT Port;
171	uint32_t cbValue;
172	uint32_t u32Value;
173	} IOPortWrite;
174
175	/** IEMVERIFYEVENT_RAM_READ */
176	struct
177	{
178	RTGCPHYS GCPhys;
179	uint32_t cb;
180	} RamRead;
181
182	/** IEMVERIFYEVENT_RAM_WRITE */
183	struct
184	{
185	RTGCPHYS GCPhys;
186	uint32_t cb;
187	uint8_t ab[512];
188	} RamWrite;
189	} u;
190	} IEMVERIFYEVTREC;
191	/** Pointer to an IEM event verification records. */
192	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
193
194	#endif /* IEM_VERIFICATION_MODE_FULL */
195
196
197	/**
198	* The per-CPU IEM state.
199	*/
200	typedef struct IEMCPU
201	{
202	/** Pointer to the CPU context - ring-3 contex. */
203	R3PTRTYPE(PCPUMCTX) pCtxR3;
204	/** Pointer to the CPU context - ring-0 contex. */
205	R0PTRTYPE(PCPUMCTX) pCtxR0;
206	/** Pointer to the CPU context - raw-mode contex. */
207	RCPTRTYPE(PCPUMCTX) pCtxRC;
208
209	/** Offset of the VMCPU structure relative to this structure (negative). */
210	int32_t offVMCpu;
211	/** Offset of the VM structure relative to this structure (negative). */
212	int32_t offVM;
213
214	/** Whether to bypass access handlers or not. */
215	bool fBypassHandlers;
216	/** Indicates that we're interpreting patch code - RC only! */
217	bool fInPatchCode;
218	/** Explicit alignment padding. */
219	bool afAlignment0[2];
220
221	/** The flags of the current exception / interrupt. */
222	uint32_t fCurXcpt;
223	/** The current exception / interrupt. */
224	uint8_t uCurXcpt;
225	/** Exception / interrupt recursion depth. */
226	int8_t cXcptRecursions;
227	/** Explicit alignment padding. */
228	bool afAlignment1[1];
229	/** The CPL. */
230	uint8_t uCpl;
231	/** The current CPU execution mode (CS). */
232	IEMMODE enmCpuMode;
233	/** Info status code that needs to be propagated to the IEM caller.
234	* This cannot be passed internally, as it would complicate all success
235	* checks within the interpreter making the code larger and almost impossible
236	* to get right. Instead, we'll store status codes to pass on here. Each
237	* source of these codes will perform appropriate sanity checks. */
238	int32_t rcPassUp;
239
240	/** @name Statistics
241	* @{ */
242	/** The number of instructions we've executed. */
243	uint32_t cInstructions;
244	/** The number of potential exits. */
245	uint32_t cPotentialExits;
246	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
247	* This may contain uncommitted writes. */
248	uint32_t cbWritten;
249	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
250	uint32_t cRetInstrNotImplemented;
251	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
252	uint32_t cRetAspectNotImplemented;
253	/** Counts informational statuses returned (other than VINF_SUCCESS). */
254	uint32_t cRetInfStatuses;
255	/** Counts other error statuses returned. */
256	uint32_t cRetErrStatuses;
257	/** Number of times rcPassUp has been used. */
258	uint32_t cRetPassUpStatus;
259	#ifdef IEM_VERIFICATION_MODE_FULL
260	/** The Number of I/O port reads that has been performed. */
261	uint32_t cIOReads;
262	/** The Number of I/O port writes that has been performed. */
263	uint32_t cIOWrites;
264	/** Set if no comparison to REM is currently performed.
265	* This is used to skip past really slow bits. */
266	bool fNoRem;
267	/** Indicates that RAX and RDX differences should be ignored since RDTSC
268	* and RDTSCP are timing sensitive. */
269	bool fIgnoreRaxRdx;
270	/** Indicates that a MOVS instruction with overlapping source and destination
271	* was executed, causing the memory write records to be incorrrect. */
272	bool fOverlappingMovs;
273	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
274	* CPUM doesn't yet reflect. */
275	uint8_t uInjectCpl;
276	bool afAlignment2[4];
277	/** Mask of undefined eflags.
278	* The verifier will any difference in these flags. */
279	uint32_t fUndefinedEFlags;
280	/** The CS of the instruction being interpreted. */
281	RTSEL uOldCs;
282	/** The RIP of the instruction being interpreted. */
283	uint64_t uOldRip;
284	/** The physical address corresponding to abOpcodes[0]. */
285	RTGCPHYS GCPhysOpcodes;
286	#endif
287	/** @} */
288
289	/** @name Decoder state.
290	* @{ */
291
292	/** The default addressing mode . */
293	IEMMODE enmDefAddrMode;
294	/** The effective addressing mode . */
295	IEMMODE enmEffAddrMode;
296	/** The default operand mode . */
297	IEMMODE enmDefOpSize;
298	/** The effective operand mode . */
299	IEMMODE enmEffOpSize;
300
301	/** The prefix mask (IEM_OP_PRF_XXX). */
302	uint32_t fPrefixes;
303	/** The extra REX ModR/M register field bit (REX.R << 3). */
304	uint8_t uRexReg;
305	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
306	* (REX.B << 3). */
307	uint8_t uRexB;
308	/** The extra REX SIB index field bit (REX.X << 3). */
309	uint8_t uRexIndex;
310	/** The effective segment register (X86_SREG_XXX). */
311	uint8_t iEffSeg;
312
313	/** The current offset into abOpcodes. */
314	uint8_t offOpcode;
315	/** The size of what has currently been fetched into abOpcodes. */
316	uint8_t cbOpcode;
317	/** The opcode bytes. */
318	uint8_t abOpcode[15];
319	/** Offset into abOpcodes where the FPU instruction starts.
320	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
321	* instruction result is committed. */
322	uint8_t offFpuOpcode;
323
324	/** @}*/
325
326	/** Alignment padding for aMemMappings. */
327	uint8_t abAlignment2[4];
328
329	/** The number of active guest memory mappings. */
330	uint8_t cActiveMappings;
331	/** The next unused mapping index. */
332	uint8_t iNextMapping;
333	/** Records for tracking guest memory mappings. */
334	struct
335	{
336	/** The address of the mapped bytes. */
337	void *pv;
338	#if defined(IN_RC) && HC_ARCH_BITS == 64
339	uint32_t u32Alignment3; /*< Alignment padding. /
340	#endif
341	/** The access flags (IEM_ACCESS_XXX).
342	* IEM_ACCESS_INVALID if the entry is unused. */
343	uint32_t fAccess;
344	#if HC_ARCH_BITS == 64
345	uint32_t u32Alignment4; /*< Alignment padding. /
346	#endif
347	} aMemMappings[3];
348
349	/** Locking records for the mapped memory. */
350	union
351	{
352	PGMPAGEMAPLOCK Lock;
353	uint64_t au64Padding[2];
354	} aMemMappingLocks[3];
355
356	/** Bounce buffer info.
357	* This runs in parallel to aMemMappings. */
358	struct
359	{
360	/** The physical address of the first byte. */
361	RTGCPHYS GCPhysFirst;
362	/** The physical address of the second page. */
363	RTGCPHYS GCPhysSecond;
364	/** The number of bytes in the first page. */
365	uint16_t cbFirst;
366	/** The number of bytes in the second page. */
367	uint16_t cbSecond;
368	/** Whether it's unassigned memory. */
369	bool fUnassigned;
370	/** Explicit alignment padding. */
371	bool afAlignment5[3];
372	} aMemBbMappings[3];
373
374	/** Bounce buffer storage.
375	* This runs in parallel to aMemMappings and aMemBbMappings. */
376	struct
377	{
378	uint8_t ab[512];
379	} aBounceBuffers[3];
380
381	#ifdef IEM_VERIFICATION_MODE_FULL
382	/** The event verification records for what IEM did (LIFO). */
383	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
384	/** Insertion point for pIemEvtRecHead. */
385	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
386	/** The event verification records for what the other party did (FIFO). */
387	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
388	/** Insertion point for pOtherEvtRecHead. */
389	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
390	/** List of free event records. */
391	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
392	#endif
393	} IEMCPU;
394	/** Pointer to the per-CPU IEM state. */
395	typedef IEMCPU *PIEMCPU;
396
397	/** Converts a IEMCPU pointer to a VMCPU pointer.
398	* @returns VMCPU pointer.
399	* @param a_pIemCpu The IEM per CPU instance data.
400	*/
401	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
402
403	/** Converts a IEMCPU pointer to a VM pointer.
404	* @returns VM pointer.
405	* @param a_pIemCpu The IEM per CPU instance data.
406	*/
407	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
408
409	/** @name IEM_ACCESS_XXX - Access details.
410	* @{ */
411	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
412	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
413	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
414	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
415	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
416	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
417	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
418	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
419	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
420	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
421	/** The writes are partial, so if initialize the bounce buffer with the
422	* orignal RAM content. */
423	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
424	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
425	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
426	/** Read+write data alias. */
427	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
428	/** Write data alias. */
429	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
430	/** Read data alias. */
431	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
432	/** Instruction fetch alias. */
433	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
434	/** Stack write alias. */
435	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
436	/** Stack read alias. */
437	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
438	/** Stack read+write alias. */
439	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
440	/** Read system table alias. */
441	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
442	/** Read+write system table alias. */
443	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
444	/** @} */
445
446	/** @name Prefix constants (IEMCPU::fPrefixes)
447	* @{ */
448	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
449	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
450	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
451	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
452	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
453	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
454	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
455
456	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
457	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
458	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
459
460	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
461	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
462	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
463
464	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
465	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
466	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
467	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
468	/** @} */
469
470	/**
471	* Tests if verification mode is enabled.
472	*
473	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
474	* should therefore cause the compiler to eliminate the verification branch
475	* of an if statement. */
476	#ifdef IEM_VERIFICATION_MODE_FULL
477	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
478	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
479	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
480	#else
481	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
482	#endif
483
484	/**
485	* Tests if full verification mode is enabled.
486	*
487	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
488	* should therefore cause the compiler to eliminate the verification branch
489	* of an if statement. */
490	#ifdef IEM_VERIFICATION_MODE_FULL
491	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
492	#else
493	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
494	#endif
495
496	/** @def IEM_VERIFICATION_MODE
497	* Indicates that one of the verfication modes are enabled.
498	*/
499	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
500	# define IEM_VERIFICATION_MODE
501	#endif
502
503	/**
504	* Indicates to the verifier that the given flag set is undefined.
505	*
506	* Can be invoked again to add more flags.
507	*
508	* This is a NOOP if the verifier isn't compiled in.
509	*/
510	#ifdef IEM_VERIFICATION_MODE_FULL
511	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
512	#else
513	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
514	#endif
515
516
517	/** @def IEM_DECL_IMPL_TYPE
518	* For typedef'ing an instruction implementation function.
519	*
520	* @param a_RetType The return type.
521	* @param a_Name The name of the type.
522	* @param a_ArgList The argument list enclosed in parentheses.
523	*/
524
525	/** @def IEM_DECL_IMPL_DEF
526	* For defining an instruction implementation function.
527	*
528	* @param a_RetType The return type.
529	* @param a_Name The name of the type.
530	* @param a_ArgList The argument list enclosed in parentheses.
531	*/
532
533	#if defined(__GNUC__) && defined(RT_ARCH_X86)
534	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
535	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
536	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
537	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
538
539	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
540	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
541	a_RetType (__fastcall a_Name) a_ArgList
542	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
543	a_RetType __fastcall a_Name a_ArgList
544
545	#else
546	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
547	a_RetType (VBOXCALL a_Name) a_ArgList
548	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
549	a_RetType VBOXCALL a_Name a_ArgList
550
551	#endif
552
553	/** @name Arithmetic assignment operations on bytes (binary).
554	* @{ */
555	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
556	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
557	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
558	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
559	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
560	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
561	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
562	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
563	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
564	/** @} */
565
566	/** @name Arithmetic assignment operations on words (binary).
567	* @{ */
568	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
569	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
570	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
571	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
572	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
573	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
574	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
575	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
576	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
577	/** @} */
578
579	/** @name Arithmetic assignment operations on double words (binary).
580	* @{ */
581	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
582	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
583	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
584	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
585	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
586	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
587	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
588	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
589	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
590	/** @} */
591
592	/** @name Arithmetic assignment operations on quad words (binary).
593	* @{ */
594	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
595	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
596	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
597	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
598	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
599	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
600	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
601	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
602	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
603	/** @} */
604
605	/** @name Compare operations (thrown in with the binary ops).
606	* @{ */
607	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
608	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
609	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
610	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
611	/** @} */
612
613	/** @name Test operations (thrown in with the binary ops).
614	* @{ */
615	FNIEMAIMPLBINU8 iemAImpl_test_u8;
616	FNIEMAIMPLBINU16 iemAImpl_test_u16;
617	FNIEMAIMPLBINU32 iemAImpl_test_u32;
618	FNIEMAIMPLBINU64 iemAImpl_test_u64;
619	/** @} */
620
621	/** @name Bit operations operations (thrown in with the binary ops).
622	* @{ */
623	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
624	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
625	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
626	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
627	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
628	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
629	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
630	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
631	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
632	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
633	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
634	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
635	/** @} */
636
637	/** @name Exchange memory with register operations.
638	* @{ */
639	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
640	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
641	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
642	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
643	/** @} */
644
645	/** @name Exchange and add operations.
646	* @{ */
647	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
648	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
649	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
650	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
651	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
652	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
653	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
654	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
655	/** @} */
656
657	/** @name Compare and exchange.
658	* @{ */
659	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
660	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
661	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
662	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
663	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
664	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
665	#ifdef RT_ARCH_X86
666	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
667	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
668	#else
669	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
670	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
671	#endif
672	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
673	uint32_t *pEFlags));
674	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
675	uint32_t *pEFlags));
676	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
677	uint32_t *pEFlags));
678	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
679	uint32_t *pEFlags));
680	/** @} */
681
682	/** @name Double precision shifts
683	* @{ */
684	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
685	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
686	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
687	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
688	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
689	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
690	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
691	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
692	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
693	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
694	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
695	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
696	/** @} */
697
698
699	/** @name Bit search operations (thrown in with the binary ops).
700	* @{ */
701	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
702	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
703	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
704	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
705	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
706	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
707	/** @} */
708
709	/** @name Signed multiplication operations (thrown in with the binary ops).
710	* @{ */
711	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
712	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
713	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
714	/** @} */
715
716	/** @name Arithmetic assignment operations on bytes (unary).
717	* @{ */
718	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
719	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
720	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
721	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
722	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
723	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
724	/** @} */
725
726	/** @name Arithmetic assignment operations on words (unary).
727	* @{ */
728	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
729	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
730	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
731	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
732	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
733	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
734	/** @} */
735
736	/** @name Arithmetic assignment operations on double words (unary).
737	* @{ */
738	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
739	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
740	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
741	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
742	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
743	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
744	/** @} */
745
746	/** @name Arithmetic assignment operations on quad words (unary).
747	* @{ */
748	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
749	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
750	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
751	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
752	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
753	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
754	/** @} */
755
756
757	/** @name Shift operations on bytes (Group 2).
758	* @{ */
759	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
760	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
761	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
762	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
763	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
764	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
765	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
766	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
767	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
768	/** @} */
769
770	/** @name Shift operations on words (Group 2).
771	* @{ */
772	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
773	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
774	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
775	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
776	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
777	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
778	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
779	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
780	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
781	/** @} */
782
783	/** @name Shift operations on double words (Group 2).
784	* @{ */
785	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
786	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
787	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
788	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
789	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
790	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
791	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
792	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
793	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
794	/** @} */
795
796	/** @name Shift operations on words (Group 2).
797	* @{ */
798	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
799	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
800	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
801	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
802	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
803	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
804	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
805	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
806	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
807	/** @} */
808
809	/** @name Multiplication and division operations.
810	* @{ */
811	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
812	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
813	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
814	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
815
816	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
817	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
818	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
819	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
820
821	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
822	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
823	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
824	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
825
826	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
827	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
828	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
829	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
830	/** @} */
831
832	/** @name Byte Swap.
833	* @{ */
834	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
835	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
836	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
837	/** @} */
838
839
840	/** @name FPU operations taking a 32-bit float argument
841	* @{ */
842	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
843	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
844	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
845
846	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
847	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
848	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
849
850	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
851	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
852	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
853	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
854	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
855	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
856	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
857
858	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
859	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
860	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
861	/** @} */
862
863	/** @name FPU operations taking a 64-bit float argument
864	* @{ */
865	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
866	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
867	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
868
869	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
870	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
871	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
872	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
873	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
874	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
875
876	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
877	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
878	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
879	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
880	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
881	/** @} */
882
883	/** @name FPU operations taking a 80-bit float argument
884	* @{ */
885	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
886	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
887	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
888	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
889	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
890	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
891	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
892	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
893	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
894	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
895	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
896	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
897
898	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
899	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
900
901	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
902	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
903	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
904	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
905	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
906
907	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
908	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
909	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
910	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
911	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
912
913	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
914	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
915	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
916	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
917	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
918	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
919	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
920	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
921	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
922	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
923
924	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
925	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
926	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
927	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
928
929	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
930	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
931	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
932	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
933	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
934	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
935	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
936	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
937	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
938
939	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
940	PCRTFLOAT80U pr80Val));
941	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
942	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
943	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
944	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
945
946	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
947	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
948	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
949
950	/** @} */
951
952	/** @name FPU operations taking a 16-bit signed integer argument
953	* @{ */
954	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
955	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
956	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
957
958	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
959	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
960	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
961	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
962	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
963	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
964
965	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
966	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
967
968	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
969	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
970	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
971	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
972	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
973	/** @} */
974
975	/** @name FPU operations taking a 32-bit signed integer argument
976	* @{ */
977	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
978	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
979	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
980
981	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
982	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
983	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
984	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
985	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
986	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
987
988	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
989	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
990
991	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
992	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
993	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
994	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
995	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
996	/** @} */
997
998	/** @name FPU operations taking a 64-bit signed integer argument
999	* @{ */
1000	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1001	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1002	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1003
1004	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1005	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1006	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1007	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1008	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1009	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1010
1011	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1012	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1013
1014	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1015	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1016	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1017	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1018	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1019	/** @} */
1020
1021
1022	/** @name Function tables.
1023	* @{
1024	*/
1025
1026	/**
1027	* Function table for a binary operator providing implementation based on
1028	* operand size.
1029	*/
1030	typedef struct IEMOPBINSIZES
1031	{
1032	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1033	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1034	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1035	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1036	} IEMOPBINSIZES;
1037	/** Pointer to a binary operator function table. */
1038	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1039
1040
1041	/**
1042	* Function table for a unary operator providing implementation based on
1043	* operand size.
1044	*/
1045	typedef struct IEMOPUNARYSIZES
1046	{
1047	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1048	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1049	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1050	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1051	} IEMOPUNARYSIZES;
1052	/** Pointer to a unary operator function table. */
1053	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1054
1055
1056	/**
1057	* Function table for a shift operator providing implementation based on
1058	* operand size.
1059	*/
1060	typedef struct IEMOPSHIFTSIZES
1061	{
1062	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1063	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1064	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1065	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1066	} IEMOPSHIFTSIZES;
1067	/** Pointer to a shift operator function table. */
1068	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1069
1070
1071	/**
1072	* Function table for a multiplication or division operation.
1073	*/
1074	typedef struct IEMOPMULDIVSIZES
1075	{
1076	PFNIEMAIMPLMULDIVU8 pfnU8;
1077	PFNIEMAIMPLMULDIVU16 pfnU16;
1078	PFNIEMAIMPLMULDIVU32 pfnU32;
1079	PFNIEMAIMPLMULDIVU64 pfnU64;
1080	} IEMOPMULDIVSIZES;
1081	/** Pointer to a multiplication or division operation function table. */
1082	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1083
1084
1085	/**
1086	* Function table for a double precision shift operator providing implementation
1087	* based on operand size.
1088	*/
1089	typedef struct IEMOPSHIFTDBLSIZES
1090	{
1091	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1092	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1093	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1094	} IEMOPSHIFTDBLSIZES;
1095	/** Pointer to a double precision shift function table. */
1096	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1097
1098
1099	/** @} */
1100
1101
1102	/** @name C instruction implementations for anything slightly complicated.
1103	* @{ */
1104
1105	/**
1106	* For typedef'ing or declaring a C instruction implementation function taking
1107	* no extra arguments.
1108	*
1109	* @param a_Name The name of the type.
1110	*/
1111	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1112	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1113	/**
1114	* For defining a C instruction implementation function taking no extra
1115	* arguments.
1116	*
1117	* @param a_Name The name of the function
1118	*/
1119	# define IEM_CIMPL_DEF_0(a_Name) \
1120	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1121	/**
1122	* For calling a C instruction implementation function taking no extra
1123	* arguments.
1124	*
1125	* This special call macro adds default arguments to the call and allow us to
1126	* change these later.
1127	*
1128	* @param a_fn The name of the function.
1129	*/
1130	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1131
1132	/**
1133	* For typedef'ing or declaring a C instruction implementation function taking
1134	* one extra argument.
1135	*
1136	* @param a_Name The name of the type.
1137	* @param a_Type0 The argument type.
1138	* @param a_Arg0 The argument name.
1139	*/
1140	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1141	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1142	/**
1143	* For defining a C instruction implementation function taking one extra
1144	* argument.
1145	*
1146	* @param a_Name The name of the function
1147	* @param a_Type0 The argument type.
1148	* @param a_Arg0 The argument name.
1149	*/
1150	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1151	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1152	/**
1153	* For calling a C instruction implementation function taking one extra
1154	* argument.
1155	*
1156	* This special call macro adds default arguments to the call and allow us to
1157	* change these later.
1158	*
1159	* @param a_fn The name of the function.
1160	* @param a0 The name of the 1st argument.
1161	*/
1162	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1163
1164	/**
1165	* For typedef'ing or declaring a C instruction implementation function taking
1166	* two extra arguments.
1167	*
1168	* @param a_Name The name of the type.
1169	* @param a_Type0 The type of the 1st argument
1170	* @param a_Arg0 The name of the 1st argument.
1171	* @param a_Type1 The type of the 2nd argument.
1172	* @param a_Arg1 The name of the 2nd argument.
1173	*/
1174	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1175	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1176	/**
1177	* For defining a C instruction implementation function taking two extra
1178	* arguments.
1179	*
1180	* @param a_Name The name of the function.
1181	* @param a_Type0 The type of the 1st argument
1182	* @param a_Arg0 The name of the 1st argument.
1183	* @param a_Type1 The type of the 2nd argument.
1184	* @param a_Arg1 The name of the 2nd argument.
1185	*/
1186	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1187	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1188	/**
1189	* For calling a C instruction implementation function taking two extra
1190	* arguments.
1191	*
1192	* This special call macro adds default arguments to the call and allow us to
1193	* change these later.
1194	*
1195	* @param a_fn The name of the function.
1196	* @param a0 The name of the 1st argument.
1197	* @param a1 The name of the 2nd argument.
1198	*/
1199	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1200
1201	/**
1202	* For typedef'ing or declaring a C instruction implementation function taking
1203	* three extra arguments.
1204	*
1205	* @param a_Name The name of the type.
1206	* @param a_Type0 The type of the 1st argument
1207	* @param a_Arg0 The name of the 1st argument.
1208	* @param a_Type1 The type of the 2nd argument.
1209	* @param a_Arg1 The name of the 2nd argument.
1210	* @param a_Type2 The type of the 3rd argument.
1211	* @param a_Arg2 The name of the 3rd argument.
1212	*/
1213	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1214	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1215	/**
1216	* For defining a C instruction implementation function taking three extra
1217	* arguments.
1218	*
1219	* @param a_Name The name of the function.
1220	* @param a_Type0 The type of the 1st argument
1221	* @param a_Arg0 The name of the 1st argument.
1222	* @param a_Type1 The type of the 2nd argument.
1223	* @param a_Arg1 The name of the 2nd argument.
1224	* @param a_Type2 The type of the 3rd argument.
1225	* @param a_Arg2 The name of the 3rd argument.
1226	*/
1227	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1228	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1229	/**
1230	* For calling a C instruction implementation function taking three extra
1231	* arguments.
1232	*
1233	* This special call macro adds default arguments to the call and allow us to
1234	* change these later.
1235	*
1236	* @param a_fn The name of the function.
1237	* @param a0 The name of the 1st argument.
1238	* @param a1 The name of the 2nd argument.
1239	* @param a2 The name of the 3rd argument.
1240	*/
1241	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1242
1243
1244	/**
1245	* For typedef'ing or declaring a C instruction implementation function taking
1246	* four extra arguments.
1247	*
1248	* @param a_Name The name of the type.
1249	* @param a_Type0 The type of the 1st argument
1250	* @param a_Arg0 The name of the 1st argument.
1251	* @param a_Type1 The type of the 2nd argument.
1252	* @param a_Arg1 The name of the 2nd argument.
1253	* @param a_Type2 The type of the 3rd argument.
1254	* @param a_Arg2 The name of the 3rd argument.
1255	* @param a_Type3 The type of the 4th argument.
1256	* @param a_Arg3 The name of the 4th argument.
1257	*/
1258	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1259	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1260	/**
1261	* For defining a C instruction implementation function taking four extra
1262	* arguments.
1263	*
1264	* @param a_Name The name of the function.
1265	* @param a_Type0 The type of the 1st argument
1266	* @param a_Arg0 The name of the 1st argument.
1267	* @param a_Type1 The type of the 2nd argument.
1268	* @param a_Arg1 The name of the 2nd argument.
1269	* @param a_Type2 The type of the 3rd argument.
1270	* @param a_Arg2 The name of the 3rd argument.
1271	* @param a_Type3 The type of the 4th argument.
1272	* @param a_Arg3 The name of the 4th argument.
1273	*/
1274	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1275	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1276	a_Type2 a_Arg2, a_Type3 a_Arg3))
1277	/**
1278	* For calling a C instruction implementation function taking four extra
1279	* arguments.
1280	*
1281	* This special call macro adds default arguments to the call and allow us to
1282	* change these later.
1283	*
1284	* @param a_fn The name of the function.
1285	* @param a0 The name of the 1st argument.
1286	* @param a1 The name of the 2nd argument.
1287	* @param a2 The name of the 3rd argument.
1288	* @param a3 The name of the 4th argument.
1289	*/
1290	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1291
1292
1293	/**
1294	* For typedef'ing or declaring a C instruction implementation function taking
1295	* five extra arguments.
1296	*
1297	* @param a_Name The name of the type.
1298	* @param a_Type0 The type of the 1st argument
1299	* @param a_Arg0 The name of the 1st argument.
1300	* @param a_Type1 The type of the 2nd argument.
1301	* @param a_Arg1 The name of the 2nd argument.
1302	* @param a_Type2 The type of the 3rd argument.
1303	* @param a_Arg2 The name of the 3rd argument.
1304	* @param a_Type3 The type of the 4th argument.
1305	* @param a_Arg3 The name of the 4th argument.
1306	* @param a_Type4 The type of the 5th argument.
1307	* @param a_Arg4 The name of the 5th argument.
1308	*/
1309	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1310	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1311	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1312	a_Type3 a_Arg3, a_Type4 a_Arg4))
1313	/**
1314	* For defining a C instruction implementation function taking five extra
1315	* arguments.
1316	*
1317	* @param a_Name The name of the function.
1318	* @param a_Type0 The type of the 1st argument
1319	* @param a_Arg0 The name of the 1st argument.
1320	* @param a_Type1 The type of the 2nd argument.
1321	* @param a_Arg1 The name of the 2nd argument.
1322	* @param a_Type2 The type of the 3rd argument.
1323	* @param a_Arg2 The name of the 3rd argument.
1324	* @param a_Type3 The type of the 4th argument.
1325	* @param a_Arg3 The name of the 4th argument.
1326	* @param a_Type4 The type of the 5th argument.
1327	* @param a_Arg4 The name of the 5th argument.
1328	*/
1329	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1330	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1331	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1332	a_Type3 a_Arg3, a_Type4 a_Arg4))
1333	/**
1334	* For calling a C instruction implementation function taking five extra
1335	* arguments.
1336	*
1337	* This special call macro adds default arguments to the call and allow us to
1338	* change these later.
1339	*
1340	* @param a_fn The name of the function.
1341	* @param a0 The name of the 1st argument.
1342	* @param a1 The name of the 2nd argument.
1343	* @param a2 The name of the 3rd argument.
1344	* @param a3 The name of the 4th argument.
1345	* @param a4 The name of the 5th argument.
1346	*/
1347	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1348
1349	/** @} */
1350
1351
1352	/** @} */
1353
1354	RT_C_DECLS_END
1355
1356	#endif
1357

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 46727

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