1 | /* $Id: IEMInternal.h 97441 2022-11-08 00:07:49Z vboxsync $ */
|
---|
2 | /** @file
|
---|
3 | * IEM - Internal header file.
|
---|
4 | */
|
---|
5 |
|
---|
6 | /*
|
---|
7 | * Copyright (C) 2011-2022 Oracle and/or its affiliates.
|
---|
8 | *
|
---|
9 | * This file is part of VirtualBox base platform packages, as
|
---|
10 | * available from https://www.virtualbox.org.
|
---|
11 | *
|
---|
12 | * This program is free software; you can redistribute it and/or
|
---|
13 | * modify it under the terms of the GNU General Public License
|
---|
14 | * as published by the Free Software Foundation, in version 3 of the
|
---|
15 | * License.
|
---|
16 | *
|
---|
17 | * This program is distributed in the hope that it will be useful, but
|
---|
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
|
---|
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
---|
20 | * General Public License for more details.
|
---|
21 | *
|
---|
22 | * You should have received a copy of the GNU General Public License
|
---|
23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
|
---|
24 | *
|
---|
25 | * SPDX-License-Identifier: GPL-3.0-only
|
---|
26 | */
|
---|
27 |
|
---|
28 | #ifndef VMM_INCLUDED_SRC_include_IEMInternal_h
|
---|
29 | #define VMM_INCLUDED_SRC_include_IEMInternal_h
|
---|
30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
|
---|
31 | # pragma once
|
---|
32 | #endif
|
---|
33 |
|
---|
34 | #include <VBox/vmm/cpum.h>
|
---|
35 | #include <VBox/vmm/iem.h>
|
---|
36 | #include <VBox/vmm/pgm.h>
|
---|
37 | #include <VBox/vmm/stam.h>
|
---|
38 | #include <VBox/param.h>
|
---|
39 |
|
---|
40 | #include <iprt/setjmp-without-sigmask.h>
|
---|
41 |
|
---|
42 |
|
---|
43 | RT_C_DECLS_BEGIN
|
---|
44 |
|
---|
45 |
|
---|
46 | /** @defgroup grp_iem_int Internals
|
---|
47 | * @ingroup grp_iem
|
---|
48 | * @internal
|
---|
49 | * @{
|
---|
50 | */
|
---|
51 |
|
---|
52 | /** For expanding symbol in slickedit and other products tagging and
|
---|
53 | * crossreferencing IEM symbols. */
|
---|
54 | #ifndef IEM_STATIC
|
---|
55 | # define IEM_STATIC static
|
---|
56 | #endif
|
---|
57 |
|
---|
58 | /** @def IEM_WITH_SETJMP
|
---|
59 | * Enables alternative status code handling using setjmps.
|
---|
60 | *
|
---|
61 | * This adds a bit of expense via the setjmp() call since it saves all the
|
---|
62 | * non-volatile registers. However, it eliminates return code checks and allows
|
---|
63 | * for more optimal return value passing (return regs instead of stack buffer).
|
---|
64 | */
|
---|
65 | #if defined(DOXYGEN_RUNNING) || defined(RT_OS_WINDOWS) || 1
|
---|
66 | # define IEM_WITH_SETJMP
|
---|
67 | #endif
|
---|
68 |
|
---|
69 | #define IEM_IMPLEMENTS_TASKSWITCH
|
---|
70 |
|
---|
71 | /** @def IEM_WITH_3DNOW
|
---|
72 | * Includes the 3DNow decoding. */
|
---|
73 | #define IEM_WITH_3DNOW
|
---|
74 |
|
---|
75 | /** @def IEM_WITH_THREE_0F_38
|
---|
76 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
|
---|
77 | #define IEM_WITH_THREE_0F_38
|
---|
78 |
|
---|
79 | /** @def IEM_WITH_THREE_0F_3A
|
---|
80 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
|
---|
81 | #define IEM_WITH_THREE_0F_3A
|
---|
82 |
|
---|
83 | /** @def IEM_WITH_VEX
|
---|
84 | * Includes the VEX decoding. */
|
---|
85 | #define IEM_WITH_VEX
|
---|
86 |
|
---|
87 | /** @def IEM_CFG_TARGET_CPU
|
---|
88 | * The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value).
|
---|
89 | *
|
---|
90 | * By default we allow this to be configured by the user via the
|
---|
91 | * CPUM/GuestCpuName config string, but this comes at a slight cost during
|
---|
92 | * decoding. So, for applications of this code where there is no need to
|
---|
93 | * be dynamic wrt target CPU, just modify this define.
|
---|
94 | */
|
---|
95 | #if !defined(IEM_CFG_TARGET_CPU) || defined(DOXYGEN_RUNNING)
|
---|
96 | # define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC
|
---|
97 | #endif
|
---|
98 |
|
---|
99 | //#define IEM_WITH_CODE_TLB // - work in progress
|
---|
100 | //#define IEM_WITH_DATA_TLB // - work in progress
|
---|
101 |
|
---|
102 |
|
---|
103 | /** @def IEM_USE_UNALIGNED_DATA_ACCESS
|
---|
104 | * Use unaligned accesses instead of elaborate byte assembly. */
|
---|
105 | #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) || defined(DOXYGEN_RUNNING)
|
---|
106 | # define IEM_USE_UNALIGNED_DATA_ACCESS
|
---|
107 | #endif
|
---|
108 |
|
---|
109 | //#define IEM_LOG_MEMORY_WRITES
|
---|
110 |
|
---|
111 | #if !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
|
---|
112 | /** Instruction statistics. */
|
---|
113 | typedef struct IEMINSTRSTATS
|
---|
114 | {
|
---|
115 | # define IEM_DO_INSTR_STAT(a_Name, a_szDesc) uint32_t a_Name;
|
---|
116 | # include "IEMInstructionStatisticsTmpl.h"
|
---|
117 | # undef IEM_DO_INSTR_STAT
|
---|
118 | } IEMINSTRSTATS;
|
---|
119 | #else
|
---|
120 | struct IEMINSTRSTATS;
|
---|
121 | typedef struct IEMINSTRSTATS IEMINSTRSTATS;
|
---|
122 | #endif
|
---|
123 | /** Pointer to IEM instruction statistics. */
|
---|
124 | typedef IEMINSTRSTATS *PIEMINSTRSTATS;
|
---|
125 |
|
---|
126 |
|
---|
127 | /** @name IEMTARGETCPU_EFL_BEHAVIOR_XXX - IEMCPU::aidxTargetCpuEflFlavour
|
---|
128 | * @{ */
|
---|
129 | #define IEMTARGETCPU_EFL_BEHAVIOR_NATIVE 0 /**< Native x86 EFLAGS result; Intel EFLAGS when on non-x86 hosts. */
|
---|
130 | #define IEMTARGETCPU_EFL_BEHAVIOR_INTEL 1 /**< Intel EFLAGS result. */
|
---|
131 | #define IEMTARGETCPU_EFL_BEHAVIOR_AMD 2 /**< AMD EFLAGS result */
|
---|
132 | #define IEMTARGETCPU_EFL_BEHAVIOR_RESERVED 3 /**< Reserved/dummy entry slot that's the same as 0. */
|
---|
133 | #define IEMTARGETCPU_EFL_BEHAVIOR_MASK 3 /**< For masking the index before use. */
|
---|
134 | /** Selects the right variant from a_aArray.
|
---|
135 | * pVCpu is implicit in the caller context. */
|
---|
136 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT(a_aArray) \
|
---|
137 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[1] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
|
---|
138 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for when no native worker can
|
---|
139 | * be used because the host CPU does not support the operation. */
|
---|
140 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_NON_NATIVE(a_aArray) \
|
---|
141 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
|
---|
142 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for a two dimentional
|
---|
143 | * array paralleling IEMCPU::aidxTargetCpuEflFlavour and a single bit index
|
---|
144 | * into the two.
|
---|
145 | * @sa IEM_SELECT_NATIVE_OR_FALLBACK */
|
---|
146 | #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
|
---|
147 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
|
---|
148 | (a_aaArray[a_fNative][pVCpu->iem.s.aidxTargetCpuEflFlavour[a_fNative] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
|
---|
149 | #else
|
---|
150 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
|
---|
151 | (a_aaArray[0][pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
|
---|
152 | #endif
|
---|
153 | /** @} */
|
---|
154 |
|
---|
155 | /**
|
---|
156 | * Picks @a a_pfnNative or @a a_pfnFallback according to the host CPU feature
|
---|
157 | * indicator given by @a a_fCpumFeatureMember (CPUMFEATURES member).
|
---|
158 | *
|
---|
159 | * On non-x86 hosts, this will shortcut to the fallback w/o checking the
|
---|
160 | * indicator.
|
---|
161 | *
|
---|
162 | * @sa IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX
|
---|
163 | */
|
---|
164 | #if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
165 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) \
|
---|
166 | (g_CpumHostFeatures.s.a_fCpumFeatureMember ? a_pfnNative : a_pfnFallback)
|
---|
167 | #else
|
---|
168 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) (a_pfnFallback)
|
---|
169 | #endif
|
---|
170 |
|
---|
171 |
|
---|
172 | /**
|
---|
173 | * Extended operand mode that includes a representation of 8-bit.
|
---|
174 | *
|
---|
175 | * This is used for packing down modes when invoking some C instruction
|
---|
176 | * implementations.
|
---|
177 | */
|
---|
178 | typedef enum IEMMODEX
|
---|
179 | {
|
---|
180 | IEMMODEX_16BIT = IEMMODE_16BIT,
|
---|
181 | IEMMODEX_32BIT = IEMMODE_32BIT,
|
---|
182 | IEMMODEX_64BIT = IEMMODE_64BIT,
|
---|
183 | IEMMODEX_8BIT
|
---|
184 | } IEMMODEX;
|
---|
185 | AssertCompileSize(IEMMODEX, 4);
|
---|
186 |
|
---|
187 |
|
---|
188 | /**
|
---|
189 | * Branch types.
|
---|
190 | */
|
---|
191 | typedef enum IEMBRANCH
|
---|
192 | {
|
---|
193 | IEMBRANCH_JUMP = 1,
|
---|
194 | IEMBRANCH_CALL,
|
---|
195 | IEMBRANCH_TRAP,
|
---|
196 | IEMBRANCH_SOFTWARE_INT,
|
---|
197 | IEMBRANCH_HARDWARE_INT
|
---|
198 | } IEMBRANCH;
|
---|
199 | AssertCompileSize(IEMBRANCH, 4);
|
---|
200 |
|
---|
201 |
|
---|
202 | /**
|
---|
203 | * INT instruction types.
|
---|
204 | */
|
---|
205 | typedef enum IEMINT
|
---|
206 | {
|
---|
207 | /** INT n instruction (opcode 0xcd imm). */
|
---|
208 | IEMINT_INTN = 0,
|
---|
209 | /** Single byte INT3 instruction (opcode 0xcc). */
|
---|
210 | IEMINT_INT3 = IEM_XCPT_FLAGS_BP_INSTR,
|
---|
211 | /** Single byte INTO instruction (opcode 0xce). */
|
---|
212 | IEMINT_INTO = IEM_XCPT_FLAGS_OF_INSTR,
|
---|
213 | /** Single byte INT1 (ICEBP) instruction (opcode 0xf1). */
|
---|
214 | IEMINT_INT1 = IEM_XCPT_FLAGS_ICEBP_INSTR
|
---|
215 | } IEMINT;
|
---|
216 | AssertCompileSize(IEMINT, 4);
|
---|
217 |
|
---|
218 |
|
---|
219 | /**
|
---|
220 | * A FPU result.
|
---|
221 | */
|
---|
222 | typedef struct IEMFPURESULT
|
---|
223 | {
|
---|
224 | /** The output value. */
|
---|
225 | RTFLOAT80U r80Result;
|
---|
226 | /** The output status. */
|
---|
227 | uint16_t FSW;
|
---|
228 | } IEMFPURESULT;
|
---|
229 | AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
|
---|
230 | /** Pointer to a FPU result. */
|
---|
231 | typedef IEMFPURESULT *PIEMFPURESULT;
|
---|
232 | /** Pointer to a const FPU result. */
|
---|
233 | typedef IEMFPURESULT const *PCIEMFPURESULT;
|
---|
234 |
|
---|
235 |
|
---|
236 | /**
|
---|
237 | * A FPU result consisting of two output values and FSW.
|
---|
238 | */
|
---|
239 | typedef struct IEMFPURESULTTWO
|
---|
240 | {
|
---|
241 | /** The first output value. */
|
---|
242 | RTFLOAT80U r80Result1;
|
---|
243 | /** The output status. */
|
---|
244 | uint16_t FSW;
|
---|
245 | /** The second output value. */
|
---|
246 | RTFLOAT80U r80Result2;
|
---|
247 | } IEMFPURESULTTWO;
|
---|
248 | AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
|
---|
249 | AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
|
---|
250 | /** Pointer to a FPU result consisting of two output values and FSW. */
|
---|
251 | typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
|
---|
252 | /** Pointer to a const FPU result consisting of two output values and FSW. */
|
---|
253 | typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
|
---|
254 |
|
---|
255 |
|
---|
256 | /**
|
---|
257 | * IEM TLB entry.
|
---|
258 | *
|
---|
259 | * Lookup assembly:
|
---|
260 | * @code{.asm}
|
---|
261 | ; Calculate tag.
|
---|
262 | mov rax, [VA]
|
---|
263 | shl rax, 16
|
---|
264 | shr rax, 16 + X86_PAGE_SHIFT
|
---|
265 | or rax, [uTlbRevision]
|
---|
266 |
|
---|
267 | ; Do indexing.
|
---|
268 | movzx ecx, al
|
---|
269 | lea rcx, [pTlbEntries + rcx]
|
---|
270 |
|
---|
271 | ; Check tag.
|
---|
272 | cmp [rcx + IEMTLBENTRY.uTag], rax
|
---|
273 | jne .TlbMiss
|
---|
274 |
|
---|
275 | ; Check access.
|
---|
276 | mov rax, ACCESS_FLAGS | MAPPING_R3_NOT_VALID | 0xffffff00
|
---|
277 | and rax, [rcx + IEMTLBENTRY.fFlagsAndPhysRev]
|
---|
278 | cmp rax, [uTlbPhysRev]
|
---|
279 | jne .TlbMiss
|
---|
280 |
|
---|
281 | ; Calc address and we're done.
|
---|
282 | mov eax, X86_PAGE_OFFSET_MASK
|
---|
283 | and eax, [VA]
|
---|
284 | or rax, [rcx + IEMTLBENTRY.pMappingR3]
|
---|
285 | %ifdef VBOX_WITH_STATISTICS
|
---|
286 | inc qword [cTlbHits]
|
---|
287 | %endif
|
---|
288 | jmp .Done
|
---|
289 |
|
---|
290 | .TlbMiss:
|
---|
291 | mov r8d, ACCESS_FLAGS
|
---|
292 | mov rdx, [VA]
|
---|
293 | mov rcx, [pVCpu]
|
---|
294 | call iemTlbTypeMiss
|
---|
295 | .Done:
|
---|
296 |
|
---|
297 | @endcode
|
---|
298 | *
|
---|
299 | */
|
---|
300 | typedef struct IEMTLBENTRY
|
---|
301 | {
|
---|
302 | /** The TLB entry tag.
|
---|
303 | * Bits 35 thru 0 are made up of the virtual address shifted right 12 bits, this
|
---|
304 | * is ASSUMING a virtual address width of 48 bits.
|
---|
305 | *
|
---|
306 | * Bits 63 thru 36 are made up of the TLB revision (zero means invalid).
|
---|
307 | *
|
---|
308 | * The TLB lookup code uses the current TLB revision, which won't ever be zero,
|
---|
309 | * enabling an extremely cheap TLB invalidation most of the time. When the TLB
|
---|
310 | * revision wraps around though, the tags needs to be zeroed.
|
---|
311 | *
|
---|
312 | * @note Try use SHRD instruction? After seeing
|
---|
313 | * https://gmplib.org/~tege/x86-timing.pdf, maybe not.
|
---|
314 | *
|
---|
315 | * @todo This will need to be reorganized for 57-bit wide virtual address and
|
---|
316 | * PCID (currently 12 bits) and ASID (currently 6 bits) support. We'll
|
---|
317 | * have to move the TLB entry versioning entirely to the
|
---|
318 | * fFlagsAndPhysRev member then, 57 bit wide VAs means we'll only have
|
---|
319 | * 19 bits left (64 - 57 + 12 = 19) and they'll almost entire be
|
---|
320 | * consumed by PCID and ASID (12 + 6 = 18).
|
---|
321 | */
|
---|
322 | uint64_t uTag;
|
---|
323 | /** Access flags and physical TLB revision.
|
---|
324 | *
|
---|
325 | * - Bit 0 - page tables - not executable (X86_PTE_PAE_NX).
|
---|
326 | * - Bit 1 - page tables - not writable (complemented X86_PTE_RW).
|
---|
327 | * - Bit 2 - page tables - not user (complemented X86_PTE_US).
|
---|
328 | * - Bit 3 - pgm phys/virt - not directly writable.
|
---|
329 | * - Bit 4 - pgm phys page - not directly readable.
|
---|
330 | * - Bit 5 - page tables - not accessed (complemented X86_PTE_A).
|
---|
331 | * - Bit 6 - page tables - not dirty (complemented X86_PTE_D).
|
---|
332 | * - Bit 7 - tlb entry - pMappingR3 member not valid.
|
---|
333 | * - Bits 63 thru 8 are used for the physical TLB revision number.
|
---|
334 | *
|
---|
335 | * We're using complemented bit meanings here because it makes it easy to check
|
---|
336 | * whether special action is required. For instance a user mode write access
|
---|
337 | * would do a "TEST fFlags, (X86_PTE_RW | X86_PTE_US | X86_PTE_D)" and a
|
---|
338 | * non-zero result would mean special handling needed because either it wasn't
|
---|
339 | * writable, or it wasn't user, or the page wasn't dirty. A user mode read
|
---|
340 | * access would do "TEST fFlags, X86_PTE_US"; and a kernel mode read wouldn't
|
---|
341 | * need to check any PTE flag.
|
---|
342 | */
|
---|
343 | uint64_t fFlagsAndPhysRev;
|
---|
344 | /** The guest physical page address. */
|
---|
345 | uint64_t GCPhys;
|
---|
346 | /** Pointer to the ring-3 mapping. */
|
---|
347 | R3PTRTYPE(uint8_t *) pbMappingR3;
|
---|
348 | #if HC_ARCH_BITS == 32
|
---|
349 | uint32_t u32Padding1;
|
---|
350 | #endif
|
---|
351 | } IEMTLBENTRY;
|
---|
352 | AssertCompileSize(IEMTLBENTRY, 32);
|
---|
353 | /** Pointer to an IEM TLB entry. */
|
---|
354 | typedef IEMTLBENTRY *PIEMTLBENTRY;
|
---|
355 |
|
---|
356 | /** @name IEMTLBE_F_XXX - TLB entry flags (IEMTLBENTRY::fFlagsAndPhysRev)
|
---|
357 | * @{ */
|
---|
358 | #define IEMTLBE_F_PT_NO_EXEC RT_BIT_64(0) /**< Page tables: Not executable. */
|
---|
359 | #define IEMTLBE_F_PT_NO_WRITE RT_BIT_64(1) /**< Page tables: Not writable. */
|
---|
360 | #define IEMTLBE_F_PT_NO_USER RT_BIT_64(2) /**< Page tables: Not user accessible (supervisor only). */
|
---|
361 | #define IEMTLBE_F_PG_NO_WRITE RT_BIT_64(3) /**< Phys page: Not writable (access handler, ROM, whatever). */
|
---|
362 | #define IEMTLBE_F_PG_NO_READ RT_BIT_64(4) /**< Phys page: Not readable (MMIO / access handler, ROM) */
|
---|
363 | #define IEMTLBE_F_PT_NO_ACCESSED RT_BIT_64(5) /**< Phys tables: Not accessed (need to be marked accessed). */
|
---|
364 | #define IEMTLBE_F_PT_NO_DIRTY RT_BIT_64(6) /**< Page tables: Not dirty (needs to be made dirty on write). */
|
---|
365 | #define IEMTLBE_F_NO_MAPPINGR3 RT_BIT_64(7) /**< TLB entry: The IEMTLBENTRY::pMappingR3 member is invalid. */
|
---|
366 | #define IEMTLBE_F_PG_UNASSIGNED RT_BIT_64(8) /**< Phys page: Unassigned memory (not RAM, ROM, MMIO2 or MMIO). */
|
---|
367 | #define IEMTLBE_F_PHYS_REV UINT64_C(0xfffffffffffffe00) /**< Physical revision mask. @sa IEMTLB_PHYS_REV_INCR */
|
---|
368 | /** @} */
|
---|
369 |
|
---|
370 |
|
---|
371 | /**
|
---|
372 | * An IEM TLB.
|
---|
373 | *
|
---|
374 | * We've got two of these, one for data and one for instructions.
|
---|
375 | */
|
---|
376 | typedef struct IEMTLB
|
---|
377 | {
|
---|
378 | /** The TLB entries.
|
---|
379 | * We've choosen 256 because that way we can obtain the result directly from a
|
---|
380 | * 8-bit register without an additional AND instruction. */
|
---|
381 | IEMTLBENTRY aEntries[256];
|
---|
382 | /** The TLB revision.
|
---|
383 | * This is actually only 28 bits wide (see IEMTLBENTRY::uTag) and is incremented
|
---|
384 | * by adding RT_BIT_64(36) to it. When it wraps around and becomes zero, all
|
---|
385 | * the tags in the TLB must be zeroed and the revision set to RT_BIT_64(36).
|
---|
386 | * (The revision zero indicates an invalid TLB entry.)
|
---|
387 | *
|
---|
388 | * The initial value is choosen to cause an early wraparound. */
|
---|
389 | uint64_t uTlbRevision;
|
---|
390 | /** The TLB physical address revision - shadow of PGM variable.
|
---|
391 | *
|
---|
392 | * This is actually only 56 bits wide (see IEMTLBENTRY::fFlagsAndPhysRev) and is
|
---|
393 | * incremented by adding RT_BIT_64(8). When it wraps around and becomes zero,
|
---|
394 | * a rendezvous is called and each CPU wipe the IEMTLBENTRY::pMappingR3 as well
|
---|
395 | * as IEMTLBENTRY::fFlagsAndPhysRev bits 63 thru 8, 4, and 3.
|
---|
396 | *
|
---|
397 | * The initial value is choosen to cause an early wraparound. */
|
---|
398 | uint64_t volatile uTlbPhysRev;
|
---|
399 |
|
---|
400 | /* Statistics: */
|
---|
401 |
|
---|
402 | /** TLB hits (VBOX_WITH_STATISTICS only). */
|
---|
403 | uint64_t cTlbHits;
|
---|
404 | /** TLB misses. */
|
---|
405 | uint32_t cTlbMisses;
|
---|
406 | /** Slow read path. */
|
---|
407 | uint32_t cTlbSlowReadPath;
|
---|
408 | #if 0
|
---|
409 | /** TLB misses because of tag mismatch. */
|
---|
410 | uint32_t cTlbMissesTag;
|
---|
411 | /** TLB misses because of virtual access violation. */
|
---|
412 | uint32_t cTlbMissesVirtAccess;
|
---|
413 | /** TLB misses because of dirty bit. */
|
---|
414 | uint32_t cTlbMissesDirty;
|
---|
415 | /** TLB misses because of MMIO */
|
---|
416 | uint32_t cTlbMissesMmio;
|
---|
417 | /** TLB misses because of write access handlers. */
|
---|
418 | uint32_t cTlbMissesWriteHandler;
|
---|
419 | /** TLB misses because no r3(/r0) mapping. */
|
---|
420 | uint32_t cTlbMissesMapping;
|
---|
421 | #endif
|
---|
422 | /** Alignment padding. */
|
---|
423 | uint32_t au32Padding[3+5];
|
---|
424 | } IEMTLB;
|
---|
425 | AssertCompileSizeAlignment(IEMTLB, 64);
|
---|
426 | /** IEMTLB::uTlbRevision increment. */
|
---|
427 | #define IEMTLB_REVISION_INCR RT_BIT_64(36)
|
---|
428 | /** IEMTLB::uTlbRevision mask. */
|
---|
429 | #define IEMTLB_REVISION_MASK (~(RT_BIT_64(36) - 1))
|
---|
430 | /** IEMTLB::uTlbPhysRev increment.
|
---|
431 | * @sa IEMTLBE_F_PHYS_REV */
|
---|
432 | #define IEMTLB_PHYS_REV_INCR RT_BIT_64(9)
|
---|
433 | /**
|
---|
434 | * Calculates the TLB tag for a virtual address.
|
---|
435 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
---|
436 | * @param a_pTlb The TLB.
|
---|
437 | * @param a_GCPtr The virtual address.
|
---|
438 | */
|
---|
439 | #define IEMTLB_CALC_TAG(a_pTlb, a_GCPtr) ( IEMTLB_CALC_TAG_NO_REV(a_GCPtr) | (a_pTlb)->uTlbRevision )
|
---|
440 | /**
|
---|
441 | * Calculates the TLB tag for a virtual address but without TLB revision.
|
---|
442 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
---|
443 | * @param a_GCPtr The virtual address.
|
---|
444 | */
|
---|
445 | #define IEMTLB_CALC_TAG_NO_REV(a_GCPtr) ( (((a_GCPtr) << 16) >> (GUEST_PAGE_SHIFT + 16)) )
|
---|
446 | /**
|
---|
447 | * Converts a TLB tag value into a TLB index.
|
---|
448 | * @returns Index into IEMTLB::aEntries.
|
---|
449 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
---|
450 | */
|
---|
451 | #define IEMTLB_TAG_TO_INDEX(a_uTag) ( (uint8_t)(a_uTag) )
|
---|
452 | /**
|
---|
453 | * Converts a TLB tag value into a TLB index.
|
---|
454 | * @returns Index into IEMTLB::aEntries.
|
---|
455 | * @param a_pTlb The TLB.
|
---|
456 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
---|
457 | */
|
---|
458 | #define IEMTLB_TAG_TO_ENTRY(a_pTlb, a_uTag) ( &(a_pTlb)->aEntries[IEMTLB_TAG_TO_INDEX(a_uTag)] )
|
---|
459 |
|
---|
460 |
|
---|
461 | /**
|
---|
462 | * The per-CPU IEM state.
|
---|
463 | */
|
---|
464 | typedef struct IEMCPU
|
---|
465 | {
|
---|
466 | /** Info status code that needs to be propagated to the IEM caller.
|
---|
467 | * This cannot be passed internally, as it would complicate all success
|
---|
468 | * checks within the interpreter making the code larger and almost impossible
|
---|
469 | * to get right. Instead, we'll store status codes to pass on here. Each
|
---|
470 | * source of these codes will perform appropriate sanity checks. */
|
---|
471 | int32_t rcPassUp; /* 0x00 */
|
---|
472 |
|
---|
473 | /** The current CPU execution mode (CS). */
|
---|
474 | IEMMODE enmCpuMode; /* 0x04 */
|
---|
475 | /** The CPL. */
|
---|
476 | uint8_t uCpl; /* 0x05 */
|
---|
477 |
|
---|
478 | /** Whether to bypass access handlers or not. */
|
---|
479 | bool fBypassHandlers; /* 0x06 */
|
---|
480 | /** Whether to disregard the lock prefix (implied or not). */
|
---|
481 | bool fDisregardLock; /* 0x07 */
|
---|
482 |
|
---|
483 | /** @name Decoder state.
|
---|
484 | * @{ */
|
---|
485 | #ifdef IEM_WITH_CODE_TLB
|
---|
486 | /** The offset of the next instruction byte. */
|
---|
487 | uint32_t offInstrNextByte; /* 0x08 */
|
---|
488 | /** The number of bytes available at pbInstrBuf for the current instruction.
|
---|
489 | * This takes the max opcode length into account so that doesn't need to be
|
---|
490 | * checked separately. */
|
---|
491 | uint32_t cbInstrBuf; /* 0x0c */
|
---|
492 | /** Pointer to the page containing RIP, user specified buffer or abOpcode.
|
---|
493 | * This can be NULL if the page isn't mappable for some reason, in which
|
---|
494 | * case we'll do fallback stuff.
|
---|
495 | *
|
---|
496 | * If we're executing an instruction from a user specified buffer,
|
---|
497 | * IEMExecOneWithPrefetchedByPC and friends, this is not necessarily a page
|
---|
498 | * aligned pointer but pointer to the user data.
|
---|
499 | *
|
---|
500 | * For instructions crossing pages, this will start on the first page and be
|
---|
501 | * advanced to the next page by the time we've decoded the instruction. This
|
---|
502 | * therefore precludes stuff like <tt>pbInstrBuf[offInstrNextByte + cbInstrBuf - cbCurInstr]</tt>
|
---|
503 | */
|
---|
504 | uint8_t const *pbInstrBuf; /* 0x10 */
|
---|
505 | # if ARCH_BITS == 32
|
---|
506 | uint32_t uInstrBufHigh; /** The high dword of the host context pbInstrBuf member. */
|
---|
507 | # endif
|
---|
508 | /** The program counter corresponding to pbInstrBuf.
|
---|
509 | * This is set to a non-canonical address when we need to invalidate it. */
|
---|
510 | uint64_t uInstrBufPc; /* 0x18 */
|
---|
511 | /** The number of bytes available at pbInstrBuf in total (for IEMExecLots).
|
---|
512 | * This takes the CS segment limit into account. */
|
---|
513 | uint16_t cbInstrBufTotal; /* 0x20 */
|
---|
514 | /** Offset into pbInstrBuf of the first byte of the current instruction.
|
---|
515 | * Can be negative to efficiently handle cross page instructions. */
|
---|
516 | int16_t offCurInstrStart; /* 0x22 */
|
---|
517 |
|
---|
518 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
---|
519 | uint32_t fPrefixes; /* 0x24 */
|
---|
520 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
---|
521 | uint8_t uRexReg; /* 0x28 */
|
---|
522 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
---|
523 | * (REX.B << 3). */
|
---|
524 | uint8_t uRexB; /* 0x29 */
|
---|
525 | /** The extra REX SIB index field bit (REX.X << 3). */
|
---|
526 | uint8_t uRexIndex; /* 0x2a */
|
---|
527 |
|
---|
528 | /** The effective segment register (X86_SREG_XXX). */
|
---|
529 | uint8_t iEffSeg; /* 0x2b */
|
---|
530 |
|
---|
531 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
---|
532 | uint8_t offModRm; /* 0x2c */
|
---|
533 | #else
|
---|
534 | /** The size of what has currently been fetched into abOpcode. */
|
---|
535 | uint8_t cbOpcode; /* 0x08 */
|
---|
536 | /** The current offset into abOpcode. */
|
---|
537 | uint8_t offOpcode; /* 0x09 */
|
---|
538 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
---|
539 | uint8_t offModRm; /* 0x0a */
|
---|
540 |
|
---|
541 | /** The effective segment register (X86_SREG_XXX). */
|
---|
542 | uint8_t iEffSeg; /* 0x0b */
|
---|
543 |
|
---|
544 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
---|
545 | uint32_t fPrefixes; /* 0x0c */
|
---|
546 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
---|
547 | uint8_t uRexReg; /* 0x10 */
|
---|
548 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
---|
549 | * (REX.B << 3). */
|
---|
550 | uint8_t uRexB; /* 0x11 */
|
---|
551 | /** The extra REX SIB index field bit (REX.X << 3). */
|
---|
552 | uint8_t uRexIndex; /* 0x12 */
|
---|
553 |
|
---|
554 | #endif
|
---|
555 |
|
---|
556 | /** The effective operand mode. */
|
---|
557 | IEMMODE enmEffOpSize; /* 0x2d, 0x13 */
|
---|
558 | /** The default addressing mode. */
|
---|
559 | IEMMODE enmDefAddrMode; /* 0x2e, 0x14 */
|
---|
560 | /** The effective addressing mode. */
|
---|
561 | IEMMODE enmEffAddrMode; /* 0x2f, 0x15 */
|
---|
562 | /** The default operand mode. */
|
---|
563 | IEMMODE enmDefOpSize; /* 0x30, 0x16 */
|
---|
564 |
|
---|
565 | /** Prefix index (VEX.pp) for two byte and three byte tables. */
|
---|
566 | uint8_t idxPrefix; /* 0x31, 0x17 */
|
---|
567 | /** 3rd VEX/EVEX/XOP register.
|
---|
568 | * Please use IEM_GET_EFFECTIVE_VVVV to access. */
|
---|
569 | uint8_t uVex3rdReg; /* 0x32, 0x18 */
|
---|
570 | /** The VEX/EVEX/XOP length field. */
|
---|
571 | uint8_t uVexLength; /* 0x33, 0x19 */
|
---|
572 | /** Additional EVEX stuff. */
|
---|
573 | uint8_t fEvexStuff; /* 0x34, 0x1a */
|
---|
574 |
|
---|
575 | /** Explicit alignment padding. */
|
---|
576 | uint8_t abAlignment2a[1]; /* 0x35, 0x1b */
|
---|
577 | /** The FPU opcode (FOP). */
|
---|
578 | uint16_t uFpuOpcode; /* 0x36, 0x1c */
|
---|
579 | #ifndef IEM_WITH_CODE_TLB
|
---|
580 | /** Explicit alignment padding. */
|
---|
581 | uint8_t abAlignment2b[2]; /* 0x1e */
|
---|
582 | #endif
|
---|
583 |
|
---|
584 | /** The opcode bytes. */
|
---|
585 | uint8_t abOpcode[15]; /* 0x48, 0x20 */
|
---|
586 | /** Explicit alignment padding. */
|
---|
587 | #ifdef IEM_WITH_CODE_TLB
|
---|
588 | uint8_t abAlignment2c[0x48 - 0x47]; /* 0x37 */
|
---|
589 | #else
|
---|
590 | uint8_t abAlignment2c[0x48 - 0x2f]; /* 0x2f */
|
---|
591 | #endif
|
---|
592 | /** @} */
|
---|
593 |
|
---|
594 |
|
---|
595 | /** The flags of the current exception / interrupt. */
|
---|
596 | uint32_t fCurXcpt; /* 0x48, 0x48 */
|
---|
597 | /** The current exception / interrupt. */
|
---|
598 | uint8_t uCurXcpt;
|
---|
599 | /** Exception / interrupt recursion depth. */
|
---|
600 | int8_t cXcptRecursions;
|
---|
601 |
|
---|
602 | /** The number of active guest memory mappings. */
|
---|
603 | uint8_t cActiveMappings;
|
---|
604 | /** The next unused mapping index. */
|
---|
605 | uint8_t iNextMapping;
|
---|
606 | /** Records for tracking guest memory mappings. */
|
---|
607 | struct
|
---|
608 | {
|
---|
609 | /** The address of the mapped bytes. */
|
---|
610 | void *pv;
|
---|
611 | /** The access flags (IEM_ACCESS_XXX).
|
---|
612 | * IEM_ACCESS_INVALID if the entry is unused. */
|
---|
613 | uint32_t fAccess;
|
---|
614 | #if HC_ARCH_BITS == 64
|
---|
615 | uint32_t u32Alignment4; /**< Alignment padding. */
|
---|
616 | #endif
|
---|
617 | } aMemMappings[3];
|
---|
618 |
|
---|
619 | /** Locking records for the mapped memory. */
|
---|
620 | union
|
---|
621 | {
|
---|
622 | PGMPAGEMAPLOCK Lock;
|
---|
623 | uint64_t au64Padding[2];
|
---|
624 | } aMemMappingLocks[3];
|
---|
625 |
|
---|
626 | /** Bounce buffer info.
|
---|
627 | * This runs in parallel to aMemMappings. */
|
---|
628 | struct
|
---|
629 | {
|
---|
630 | /** The physical address of the first byte. */
|
---|
631 | RTGCPHYS GCPhysFirst;
|
---|
632 | /** The physical address of the second page. */
|
---|
633 | RTGCPHYS GCPhysSecond;
|
---|
634 | /** The number of bytes in the first page. */
|
---|
635 | uint16_t cbFirst;
|
---|
636 | /** The number of bytes in the second page. */
|
---|
637 | uint16_t cbSecond;
|
---|
638 | /** Whether it's unassigned memory. */
|
---|
639 | bool fUnassigned;
|
---|
640 | /** Explicit alignment padding. */
|
---|
641 | bool afAlignment5[3];
|
---|
642 | } aMemBbMappings[3];
|
---|
643 |
|
---|
644 | /* Ensure that aBounceBuffers are aligned at a 32 byte boundrary. */
|
---|
645 | uint64_t abAlignment7[1];
|
---|
646 |
|
---|
647 | /** Bounce buffer storage.
|
---|
648 | * This runs in parallel to aMemMappings and aMemBbMappings. */
|
---|
649 | struct
|
---|
650 | {
|
---|
651 | uint8_t ab[512];
|
---|
652 | } aBounceBuffers[3];
|
---|
653 |
|
---|
654 |
|
---|
655 | /** Pointer set jump buffer - ring-3 context. */
|
---|
656 | R3PTRTYPE(jmp_buf *) pJmpBufR3;
|
---|
657 | /** Pointer set jump buffer - ring-0 context. */
|
---|
658 | R0PTRTYPE(jmp_buf *) pJmpBufR0;
|
---|
659 |
|
---|
660 | /** @todo Should move this near @a fCurXcpt later. */
|
---|
661 | /** The CR2 for the current exception / interrupt. */
|
---|
662 | uint64_t uCurXcptCr2;
|
---|
663 | /** The error code for the current exception / interrupt. */
|
---|
664 | uint32_t uCurXcptErr;
|
---|
665 |
|
---|
666 | /** @name Statistics
|
---|
667 | * @{ */
|
---|
668 | /** The number of instructions we've executed. */
|
---|
669 | uint32_t cInstructions;
|
---|
670 | /** The number of potential exits. */
|
---|
671 | uint32_t cPotentialExits;
|
---|
672 | /** The number of bytes data or stack written (mostly for IEMExecOneEx).
|
---|
673 | * This may contain uncommitted writes. */
|
---|
674 | uint32_t cbWritten;
|
---|
675 | /** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
|
---|
676 | uint32_t cRetInstrNotImplemented;
|
---|
677 | /** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
|
---|
678 | uint32_t cRetAspectNotImplemented;
|
---|
679 | /** Counts informational statuses returned (other than VINF_SUCCESS). */
|
---|
680 | uint32_t cRetInfStatuses;
|
---|
681 | /** Counts other error statuses returned. */
|
---|
682 | uint32_t cRetErrStatuses;
|
---|
683 | /** Number of times rcPassUp has been used. */
|
---|
684 | uint32_t cRetPassUpStatus;
|
---|
685 | /** Number of times RZ left with instruction commit pending for ring-3. */
|
---|
686 | uint32_t cPendingCommit;
|
---|
687 | /** Number of long jumps. */
|
---|
688 | uint32_t cLongJumps;
|
---|
689 | /** @} */
|
---|
690 |
|
---|
691 | /** @name Target CPU information.
|
---|
692 | * @{ */
|
---|
693 | #if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
|
---|
694 | /** The target CPU. */
|
---|
695 | uint8_t uTargetCpu;
|
---|
696 | #else
|
---|
697 | uint8_t bTargetCpuPadding;
|
---|
698 | #endif
|
---|
699 | /** For selecting assembly works matching the target CPU EFLAGS behaviour, see
|
---|
700 | * IEMTARGETCPU_EFL_BEHAVIOR_XXX for values, with the 1st entry for when no
|
---|
701 | * native host support and the 2nd for when there is.
|
---|
702 | *
|
---|
703 | * The two values are typically indexed by a g_CpumHostFeatures bit.
|
---|
704 | *
|
---|
705 | * This is for instance used for the BSF & BSR instructions where AMD and
|
---|
706 | * Intel CPUs produce different EFLAGS. */
|
---|
707 | uint8_t aidxTargetCpuEflFlavour[2];
|
---|
708 |
|
---|
709 | /** The CPU vendor. */
|
---|
710 | CPUMCPUVENDOR enmCpuVendor;
|
---|
711 | /** @} */
|
---|
712 |
|
---|
713 | /** @name Host CPU information.
|
---|
714 | * @{ */
|
---|
715 | /** The CPU vendor. */
|
---|
716 | CPUMCPUVENDOR enmHostCpuVendor;
|
---|
717 | /** @} */
|
---|
718 |
|
---|
719 | /** Counts RDMSR \#GP(0) LogRel(). */
|
---|
720 | uint8_t cLogRelRdMsr;
|
---|
721 | /** Counts WRMSR \#GP(0) LogRel(). */
|
---|
722 | uint8_t cLogRelWrMsr;
|
---|
723 | /** Alignment padding. */
|
---|
724 | uint8_t abAlignment8[42];
|
---|
725 |
|
---|
726 | /** Data TLB.
|
---|
727 | * @remarks Must be 64-byte aligned. */
|
---|
728 | IEMTLB DataTlb;
|
---|
729 | /** Instruction TLB.
|
---|
730 | * @remarks Must be 64-byte aligned. */
|
---|
731 | IEMTLB CodeTlb;
|
---|
732 |
|
---|
733 | /** Exception statistics. */
|
---|
734 | STAMCOUNTER aStatXcpts[32];
|
---|
735 | /** Interrupt statistics. */
|
---|
736 | uint32_t aStatInts[256];
|
---|
737 |
|
---|
738 | #if defined(VBOX_WITH_STATISTICS) && !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
|
---|
739 | /** Instruction statistics for ring-0/raw-mode. */
|
---|
740 | IEMINSTRSTATS StatsRZ;
|
---|
741 | /** Instruction statistics for ring-3. */
|
---|
742 | IEMINSTRSTATS StatsR3;
|
---|
743 | #endif
|
---|
744 | } IEMCPU;
|
---|
745 | AssertCompileMemberOffset(IEMCPU, fCurXcpt, 0x48);
|
---|
746 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 8);
|
---|
747 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 16);
|
---|
748 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 32);
|
---|
749 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 64);
|
---|
750 | AssertCompileMemberAlignment(IEMCPU, DataTlb, 64);
|
---|
751 | AssertCompileMemberAlignment(IEMCPU, CodeTlb, 64);
|
---|
752 |
|
---|
753 | /** Pointer to the per-CPU IEM state. */
|
---|
754 | typedef IEMCPU *PIEMCPU;
|
---|
755 | /** Pointer to the const per-CPU IEM state. */
|
---|
756 | typedef IEMCPU const *PCIEMCPU;
|
---|
757 |
|
---|
758 |
|
---|
759 | /** @def IEM_GET_CTX
|
---|
760 | * Gets the guest CPU context for the calling EMT.
|
---|
761 | * @returns PCPUMCTX
|
---|
762 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
763 | */
|
---|
764 | #define IEM_GET_CTX(a_pVCpu) (&(a_pVCpu)->cpum.GstCtx)
|
---|
765 |
|
---|
766 | /** @def IEM_CTX_ASSERT
|
---|
767 | * Asserts that the @a a_fExtrnMbz is present in the CPU context.
|
---|
768 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
769 | * @param a_fExtrnMbz The mask of CPUMCTX_EXTRN_XXX flags that must be zero.
|
---|
770 | */
|
---|
771 | #define IEM_CTX_ASSERT(a_pVCpu, a_fExtrnMbz) AssertMsg(!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnMbz)), \
|
---|
772 | ("fExtrn=%#RX64 fExtrnMbz=%#RX64\n", (a_pVCpu)->cpum.GstCtx.fExtrn, \
|
---|
773 | (a_fExtrnMbz)))
|
---|
774 |
|
---|
775 | /** @def IEM_CTX_IMPORT_RET
|
---|
776 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
777 | *
|
---|
778 | * Will call the keep to import the bits as needed.
|
---|
779 | *
|
---|
780 | * Returns on import failure.
|
---|
781 | *
|
---|
782 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
783 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
784 | */
|
---|
785 | #define IEM_CTX_IMPORT_RET(a_pVCpu, a_fExtrnImport) \
|
---|
786 | do { \
|
---|
787 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
788 | { /* likely */ } \
|
---|
789 | else \
|
---|
790 | { \
|
---|
791 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
792 | AssertRCReturn(rcCtxImport, rcCtxImport); \
|
---|
793 | } \
|
---|
794 | } while (0)
|
---|
795 |
|
---|
796 | /** @def IEM_CTX_IMPORT_NORET
|
---|
797 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
798 | *
|
---|
799 | * Will call the keep to import the bits as needed.
|
---|
800 | *
|
---|
801 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
802 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
803 | */
|
---|
804 | #define IEM_CTX_IMPORT_NORET(a_pVCpu, a_fExtrnImport) \
|
---|
805 | do { \
|
---|
806 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
807 | { /* likely */ } \
|
---|
808 | else \
|
---|
809 | { \
|
---|
810 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
811 | AssertLogRelRC(rcCtxImport); \
|
---|
812 | } \
|
---|
813 | } while (0)
|
---|
814 |
|
---|
815 | /** @def IEM_CTX_IMPORT_JMP
|
---|
816 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
817 | *
|
---|
818 | * Will call the keep to import the bits as needed.
|
---|
819 | *
|
---|
820 | * Jumps on import failure.
|
---|
821 | *
|
---|
822 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
823 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
824 | */
|
---|
825 | #define IEM_CTX_IMPORT_JMP(a_pVCpu, a_fExtrnImport) \
|
---|
826 | do { \
|
---|
827 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
828 | { /* likely */ } \
|
---|
829 | else \
|
---|
830 | { \
|
---|
831 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
832 | AssertRCStmt(rcCtxImport, longjmp(*pVCpu->iem.s.CTX_SUFF(pJmpBuf), rcCtxImport)); \
|
---|
833 | } \
|
---|
834 | } while (0)
|
---|
835 |
|
---|
836 |
|
---|
837 |
|
---|
838 | /** @def IEM_GET_TARGET_CPU
|
---|
839 | * Gets the current IEMTARGETCPU value.
|
---|
840 | * @returns IEMTARGETCPU value.
|
---|
841 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
842 | */
|
---|
843 | #if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
|
---|
844 | # define IEM_GET_TARGET_CPU(a_pVCpu) (IEM_CFG_TARGET_CPU)
|
---|
845 | #else
|
---|
846 | # define IEM_GET_TARGET_CPU(a_pVCpu) ((a_pVCpu)->iem.s.uTargetCpu)
|
---|
847 | #endif
|
---|
848 |
|
---|
849 | /** @def IEM_GET_INSTR_LEN
|
---|
850 | * Gets the instruction length. */
|
---|
851 | #ifdef IEM_WITH_CODE_TLB
|
---|
852 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offInstrNextByte - (uint32_t)(int32_t)(a_pVCpu)->iem.s.offCurInstrStart)
|
---|
853 | #else
|
---|
854 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offOpcode)
|
---|
855 | #endif
|
---|
856 |
|
---|
857 |
|
---|
858 | /**
|
---|
859 | * Shared per-VM IEM data.
|
---|
860 | */
|
---|
861 | typedef struct IEM
|
---|
862 | {
|
---|
863 | /** The VMX APIC-access page handler type. */
|
---|
864 | PGMPHYSHANDLERTYPE hVmxApicAccessPage;
|
---|
865 | #ifndef VBOX_WITHOUT_CPUID_HOST_CALL
|
---|
866 | /** Set if the CPUID host call functionality is enabled. */
|
---|
867 | bool fCpuIdHostCall;
|
---|
868 | #endif
|
---|
869 | } IEM;
|
---|
870 |
|
---|
871 |
|
---|
872 |
|
---|
873 | /** @name IEM_ACCESS_XXX - Access details.
|
---|
874 | * @{ */
|
---|
875 | #define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
|
---|
876 | #define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
|
---|
877 | #define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
|
---|
878 | #define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
|
---|
879 | #define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
|
---|
880 | #define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
|
---|
881 | #define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
|
---|
882 | #define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
|
---|
883 | #define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
|
---|
884 | #define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
|
---|
885 | /** The writes are partial, so if initialize the bounce buffer with the
|
---|
886 | * orignal RAM content. */
|
---|
887 | #define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
|
---|
888 | /** Used in aMemMappings to indicate that the entry is bounce buffered. */
|
---|
889 | #define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
|
---|
890 | /** Bounce buffer with ring-3 write pending, first page. */
|
---|
891 | #define IEM_ACCESS_PENDING_R3_WRITE_1ST UINT32_C(0x00000400)
|
---|
892 | /** Bounce buffer with ring-3 write pending, second page. */
|
---|
893 | #define IEM_ACCESS_PENDING_R3_WRITE_2ND UINT32_C(0x00000800)
|
---|
894 | /** Not locked, accessed via the TLB. */
|
---|
895 | #define IEM_ACCESS_NOT_LOCKED UINT32_C(0x00001000)
|
---|
896 | /** Valid bit mask. */
|
---|
897 | #define IEM_ACCESS_VALID_MASK UINT32_C(0x00001fff)
|
---|
898 | /** Shift count for the TLB flags (upper word). */
|
---|
899 | #define IEM_ACCESS_SHIFT_TLB_FLAGS 16
|
---|
900 |
|
---|
901 | /** Read+write data alias. */
|
---|
902 | #define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
---|
903 | /** Write data alias. */
|
---|
904 | #define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
---|
905 | /** Read data alias. */
|
---|
906 | #define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA)
|
---|
907 | /** Instruction fetch alias. */
|
---|
908 | #define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_WHAT_CODE)
|
---|
909 | /** Stack write alias. */
|
---|
910 | #define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
---|
911 | /** Stack read alias. */
|
---|
912 | #define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_STACK)
|
---|
913 | /** Stack read+write alias. */
|
---|
914 | #define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
---|
915 | /** Read system table alias. */
|
---|
916 | #define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_SYS)
|
---|
917 | /** Read+write system table alias. */
|
---|
918 | #define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_SYS)
|
---|
919 | /** @} */
|
---|
920 |
|
---|
921 | /** @name Prefix constants (IEMCPU::fPrefixes)
|
---|
922 | * @{ */
|
---|
923 | #define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /**< CS segment prefix (0x2e). */
|
---|
924 | #define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /**< SS segment prefix (0x36). */
|
---|
925 | #define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /**< DS segment prefix (0x3e). */
|
---|
926 | #define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /**< ES segment prefix (0x26). */
|
---|
927 | #define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /**< FS segment prefix (0x64). */
|
---|
928 | #define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /**< GS segment prefix (0x65). */
|
---|
929 | #define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
|
---|
930 |
|
---|
931 | #define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /**< Operand size prefix (0x66). */
|
---|
932 | #define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /**< REX.W prefix (0x48-0x4f). */
|
---|
933 | #define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /**< Address size prefix (0x67). */
|
---|
934 |
|
---|
935 | #define IEM_OP_PRF_LOCK RT_BIT_32(16) /**< Lock prefix (0xf0). */
|
---|
936 | #define IEM_OP_PRF_REPNZ RT_BIT_32(17) /**< Repeat-not-zero prefix (0xf2). */
|
---|
937 | #define IEM_OP_PRF_REPZ RT_BIT_32(18) /**< Repeat-if-zero prefix (0xf3). */
|
---|
938 |
|
---|
939 | #define IEM_OP_PRF_REX RT_BIT_32(24) /**< Any REX prefix (0x40-0x4f). */
|
---|
940 | #define IEM_OP_PRF_REX_R RT_BIT_32(25) /**< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). */
|
---|
941 | #define IEM_OP_PRF_REX_B RT_BIT_32(26) /**< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). */
|
---|
942 | #define IEM_OP_PRF_REX_X RT_BIT_32(27) /**< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). */
|
---|
943 | /** Mask with all the REX prefix flags.
|
---|
944 | * This is generally for use when needing to undo the REX prefixes when they
|
---|
945 | * are followed legacy prefixes and therefore does not immediately preceed
|
---|
946 | * the first opcode byte.
|
---|
947 | * For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
|
---|
948 | #define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W )
|
---|
949 |
|
---|
950 | #define IEM_OP_PRF_VEX RT_BIT_32(28) /**< Indiciates VEX prefix. */
|
---|
951 | #define IEM_OP_PRF_EVEX RT_BIT_32(29) /**< Indiciates EVEX prefix. */
|
---|
952 | #define IEM_OP_PRF_XOP RT_BIT_32(30) /**< Indiciates XOP prefix. */
|
---|
953 | /** @} */
|
---|
954 |
|
---|
955 | /** @name IEMOPFORM_XXX - Opcode forms
|
---|
956 | * @note These are ORed together with IEMOPHINT_XXX.
|
---|
957 | * @{ */
|
---|
958 | /** ModR/M: reg, r/m */
|
---|
959 | #define IEMOPFORM_RM 0
|
---|
960 | /** ModR/M: reg, r/m (register) */
|
---|
961 | #define IEMOPFORM_RM_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
---|
962 | /** ModR/M: reg, r/m (memory) */
|
---|
963 | #define IEMOPFORM_RM_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
---|
964 | /** ModR/M: reg, r/m */
|
---|
965 | #define IEMOPFORM_RMI 1
|
---|
966 | /** ModR/M: reg, r/m (register) */
|
---|
967 | #define IEMOPFORM_RMI_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
---|
968 | /** ModR/M: reg, r/m (memory) */
|
---|
969 | #define IEMOPFORM_RMI_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
---|
970 | /** ModR/M: r/m, reg */
|
---|
971 | #define IEMOPFORM_MR 2
|
---|
972 | /** ModR/M: r/m (register), reg */
|
---|
973 | #define IEMOPFORM_MR_REG (IEMOPFORM_MR | IEMOPFORM_MOD3)
|
---|
974 | /** ModR/M: r/m (memory), reg */
|
---|
975 | #define IEMOPFORM_MR_MEM (IEMOPFORM_MR | IEMOPFORM_NOT_MOD3)
|
---|
976 | /** ModR/M: r/m only */
|
---|
977 | #define IEMOPFORM_M 3
|
---|
978 | /** ModR/M: r/m only (register). */
|
---|
979 | #define IEMOPFORM_M_REG (IEMOPFORM_M | IEMOPFORM_MOD3)
|
---|
980 | /** ModR/M: r/m only (memory). */
|
---|
981 | #define IEMOPFORM_M_MEM (IEMOPFORM_M | IEMOPFORM_NOT_MOD3)
|
---|
982 | /** ModR/M: reg only */
|
---|
983 | #define IEMOPFORM_R 4
|
---|
984 |
|
---|
985 | /** VEX+ModR/M: reg, r/m */
|
---|
986 | #define IEMOPFORM_VEX_RM 8
|
---|
987 | /** VEX+ModR/M: reg, r/m (register) */
|
---|
988 | #define IEMOPFORM_VEX_RM_REG (IEMOPFORM_VEX_RM | IEMOPFORM_MOD3)
|
---|
989 | /** VEX+ModR/M: reg, r/m (memory) */
|
---|
990 | #define IEMOPFORM_VEX_RM_MEM (IEMOPFORM_VEX_RM | IEMOPFORM_NOT_MOD3)
|
---|
991 | /** VEX+ModR/M: r/m, reg */
|
---|
992 | #define IEMOPFORM_VEX_MR 9
|
---|
993 | /** VEX+ModR/M: r/m (register), reg */
|
---|
994 | #define IEMOPFORM_VEX_MR_REG (IEMOPFORM_VEX_MR | IEMOPFORM_MOD3)
|
---|
995 | /** VEX+ModR/M: r/m (memory), reg */
|
---|
996 | #define IEMOPFORM_VEX_MR_MEM (IEMOPFORM_VEX_MR | IEMOPFORM_NOT_MOD3)
|
---|
997 | /** VEX+ModR/M: r/m only */
|
---|
998 | #define IEMOPFORM_VEX_M 10
|
---|
999 | /** VEX+ModR/M: r/m only (register). */
|
---|
1000 | #define IEMOPFORM_VEX_M_REG (IEMOPFORM_VEX_M | IEMOPFORM_MOD3)
|
---|
1001 | /** VEX+ModR/M: r/m only (memory). */
|
---|
1002 | #define IEMOPFORM_VEX_M_MEM (IEMOPFORM_VEX_M | IEMOPFORM_NOT_MOD3)
|
---|
1003 | /** VEX+ModR/M: reg only */
|
---|
1004 | #define IEMOPFORM_VEX_R 11
|
---|
1005 | /** VEX+ModR/M: reg, vvvv, r/m */
|
---|
1006 | #define IEMOPFORM_VEX_RVM 12
|
---|
1007 | /** VEX+ModR/M: reg, vvvv, r/m (register). */
|
---|
1008 | #define IEMOPFORM_VEX_RVM_REG (IEMOPFORM_VEX_RVM | IEMOPFORM_MOD3)
|
---|
1009 | /** VEX+ModR/M: reg, vvvv, r/m (memory). */
|
---|
1010 | #define IEMOPFORM_VEX_RVM_MEM (IEMOPFORM_VEX_RVM | IEMOPFORM_NOT_MOD3)
|
---|
1011 | /** VEX+ModR/M: reg, r/m, vvvv */
|
---|
1012 | #define IEMOPFORM_VEX_RMV 13
|
---|
1013 | /** VEX+ModR/M: reg, r/m, vvvv (register). */
|
---|
1014 | #define IEMOPFORM_VEX_RMV_REG (IEMOPFORM_VEX_RMV | IEMOPFORM_MOD3)
|
---|
1015 | /** VEX+ModR/M: reg, r/m, vvvv (memory). */
|
---|
1016 | #define IEMOPFORM_VEX_RMV_MEM (IEMOPFORM_VEX_RMV | IEMOPFORM_NOT_MOD3)
|
---|
1017 | /** VEX+ModR/M: reg, r/m, imm8 */
|
---|
1018 | #define IEMOPFORM_VEX_RMI 14
|
---|
1019 | /** VEX+ModR/M: reg, r/m, imm8 (register). */
|
---|
1020 | #define IEMOPFORM_VEX_RMI_REG (IEMOPFORM_VEX_RMI | IEMOPFORM_MOD3)
|
---|
1021 | /** VEX+ModR/M: reg, r/m, imm8 (memory). */
|
---|
1022 | #define IEMOPFORM_VEX_RMI_MEM (IEMOPFORM_VEX_RMI | IEMOPFORM_NOT_MOD3)
|
---|
1023 | /** VEX+ModR/M: r/m, vvvv, reg */
|
---|
1024 | #define IEMOPFORM_VEX_MVR 15
|
---|
1025 | /** VEX+ModR/M: r/m, vvvv, reg (register) */
|
---|
1026 | #define IEMOPFORM_VEX_MVR_REG (IEMOPFORM_VEX_MVR | IEMOPFORM_MOD3)
|
---|
1027 | /** VEX+ModR/M: r/m, vvvv, reg (memory) */
|
---|
1028 | #define IEMOPFORM_VEX_MVR_MEM (IEMOPFORM_VEX_MVR | IEMOPFORM_NOT_MOD3)
|
---|
1029 | /** VEX+ModR/M+/n: vvvv, r/m */
|
---|
1030 | #define IEMOPFORM_VEX_VM 16
|
---|
1031 | /** VEX+ModR/M+/n: vvvv, r/m (register) */
|
---|
1032 | #define IEMOPFORM_VEX_VM_REG (IEMOPFORM_VEX_VM | IEMOPFORM_MOD3)
|
---|
1033 | /** VEX+ModR/M+/n: vvvv, r/m (memory) */
|
---|
1034 | #define IEMOPFORM_VEX_VM_MEM (IEMOPFORM_VEX_VM | IEMOPFORM_NOT_MOD3)
|
---|
1035 |
|
---|
1036 | /** Fixed register instruction, no R/M. */
|
---|
1037 | #define IEMOPFORM_FIXED 32
|
---|
1038 |
|
---|
1039 | /** The r/m is a register. */
|
---|
1040 | #define IEMOPFORM_MOD3 RT_BIT_32(8)
|
---|
1041 | /** The r/m is a memory access. */
|
---|
1042 | #define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
|
---|
1043 | /** @} */
|
---|
1044 |
|
---|
1045 | /** @name IEMOPHINT_XXX - Additional Opcode Hints
|
---|
1046 | * @note These are ORed together with IEMOPFORM_XXX.
|
---|
1047 | * @{ */
|
---|
1048 | /** Ignores the operand size prefix (66h). */
|
---|
1049 | #define IEMOPHINT_IGNORES_OZ_PFX RT_BIT_32(10)
|
---|
1050 | /** Ignores REX.W (aka WIG). */
|
---|
1051 | #define IEMOPHINT_IGNORES_REXW RT_BIT_32(11)
|
---|
1052 | /** Both the operand size prefixes (66h + REX.W) are ignored. */
|
---|
1053 | #define IEMOPHINT_IGNORES_OP_SIZES (IEMOPHINT_IGNORES_OZ_PFX | IEMOPHINT_IGNORES_REXW)
|
---|
1054 | /** Allowed with the lock prefix. */
|
---|
1055 | #define IEMOPHINT_LOCK_ALLOWED RT_BIT_32(11)
|
---|
1056 | /** The VEX.L value is ignored (aka LIG). */
|
---|
1057 | #define IEMOPHINT_VEX_L_IGNORED RT_BIT_32(12)
|
---|
1058 | /** The VEX.L value must be zero (i.e. 128-bit width only). */
|
---|
1059 | #define IEMOPHINT_VEX_L_ZERO RT_BIT_32(13)
|
---|
1060 | /** The VEX.V value must be zero. */
|
---|
1061 | #define IEMOPHINT_VEX_V_ZERO RT_BIT_32(14)
|
---|
1062 |
|
---|
1063 | /** Hint to IEMAllInstructionPython.py that this macro should be skipped. */
|
---|
1064 | #define IEMOPHINT_SKIP_PYTHON RT_BIT_32(31)
|
---|
1065 | /** @} */
|
---|
1066 |
|
---|
1067 | /**
|
---|
1068 | * Possible hardware task switch sources.
|
---|
1069 | */
|
---|
1070 | typedef enum IEMTASKSWITCH
|
---|
1071 | {
|
---|
1072 | /** Task switch caused by an interrupt/exception. */
|
---|
1073 | IEMTASKSWITCH_INT_XCPT = 1,
|
---|
1074 | /** Task switch caused by a far CALL. */
|
---|
1075 | IEMTASKSWITCH_CALL,
|
---|
1076 | /** Task switch caused by a far JMP. */
|
---|
1077 | IEMTASKSWITCH_JUMP,
|
---|
1078 | /** Task switch caused by an IRET. */
|
---|
1079 | IEMTASKSWITCH_IRET
|
---|
1080 | } IEMTASKSWITCH;
|
---|
1081 | AssertCompileSize(IEMTASKSWITCH, 4);
|
---|
1082 |
|
---|
1083 | /**
|
---|
1084 | * Possible CrX load (write) sources.
|
---|
1085 | */
|
---|
1086 | typedef enum IEMACCESSCRX
|
---|
1087 | {
|
---|
1088 | /** CrX access caused by 'mov crX' instruction. */
|
---|
1089 | IEMACCESSCRX_MOV_CRX,
|
---|
1090 | /** CrX (CR0) write caused by 'lmsw' instruction. */
|
---|
1091 | IEMACCESSCRX_LMSW,
|
---|
1092 | /** CrX (CR0) write caused by 'clts' instruction. */
|
---|
1093 | IEMACCESSCRX_CLTS,
|
---|
1094 | /** CrX (CR0) read caused by 'smsw' instruction. */
|
---|
1095 | IEMACCESSCRX_SMSW
|
---|
1096 | } IEMACCESSCRX;
|
---|
1097 |
|
---|
1098 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
1099 | /** @name IEM_SLAT_FAIL_XXX - Second-level address translation failure information.
|
---|
1100 | *
|
---|
1101 | * These flags provide further context to SLAT page-walk failures that could not be
|
---|
1102 | * determined by PGM (e.g, PGM is not privy to memory access permissions).
|
---|
1103 | *
|
---|
1104 | * @{
|
---|
1105 | */
|
---|
1106 | /** Translating a nested-guest linear address failed accessing a nested-guest
|
---|
1107 | * physical address. */
|
---|
1108 | # define IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR RT_BIT_32(0)
|
---|
1109 | /** Translating a nested-guest linear address failed accessing a
|
---|
1110 | * paging-structure entry or updating accessed/dirty bits. */
|
---|
1111 | # define IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE RT_BIT_32(1)
|
---|
1112 | /** @} */
|
---|
1113 |
|
---|
1114 | DECLCALLBACK(FNPGMPHYSHANDLER) iemVmxApicAccessPageHandler;
|
---|
1115 | # ifndef IN_RING3
|
---|
1116 | DECLCALLBACK(FNPGMRZPHYSPFHANDLER) iemVmxApicAccessPagePfHandler;
|
---|
1117 | # endif
|
---|
1118 | #endif
|
---|
1119 |
|
---|
1120 | /**
|
---|
1121 | * Indicates to the verifier that the given flag set is undefined.
|
---|
1122 | *
|
---|
1123 | * Can be invoked again to add more flags.
|
---|
1124 | *
|
---|
1125 | * This is a NOOP if the verifier isn't compiled in.
|
---|
1126 | *
|
---|
1127 | * @note We're temporarily keeping this until code is converted to new
|
---|
1128 | * disassembler style opcode handling.
|
---|
1129 | */
|
---|
1130 | #define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
|
---|
1131 |
|
---|
1132 |
|
---|
1133 | /** @def IEM_DECL_IMPL_TYPE
|
---|
1134 | * For typedef'ing an instruction implementation function.
|
---|
1135 | *
|
---|
1136 | * @param a_RetType The return type.
|
---|
1137 | * @param a_Name The name of the type.
|
---|
1138 | * @param a_ArgList The argument list enclosed in parentheses.
|
---|
1139 | */
|
---|
1140 |
|
---|
1141 | /** @def IEM_DECL_IMPL_DEF
|
---|
1142 | * For defining an instruction implementation function.
|
---|
1143 | *
|
---|
1144 | * @param a_RetType The return type.
|
---|
1145 | * @param a_Name The name of the type.
|
---|
1146 | * @param a_ArgList The argument list enclosed in parentheses.
|
---|
1147 | */
|
---|
1148 |
|
---|
1149 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
---|
1150 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1151 | __attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
|
---|
1152 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1153 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
---|
1154 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1155 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
---|
1156 |
|
---|
1157 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
---|
1158 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1159 | a_RetType (__fastcall a_Name) a_ArgList
|
---|
1160 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1161 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
---|
1162 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1163 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
---|
1164 |
|
---|
1165 | #elif __cplusplus >= 201700 /* P0012R1 support */
|
---|
1166 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1167 | a_RetType (VBOXCALL a_Name) a_ArgList RT_NOEXCEPT
|
---|
1168 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1169 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
---|
1170 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1171 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
---|
1172 |
|
---|
1173 | #else
|
---|
1174 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1175 | a_RetType (VBOXCALL a_Name) a_ArgList
|
---|
1176 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1177 | a_RetType VBOXCALL a_Name a_ArgList
|
---|
1178 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1179 | a_RetType VBOXCALL a_Name a_ArgList
|
---|
1180 |
|
---|
1181 | #endif
|
---|
1182 |
|
---|
1183 | /** Defined in IEMAllAImplC.cpp but also used by IEMAllAImplA.asm. */
|
---|
1184 | RT_C_DECLS_BEGIN
|
---|
1185 | extern uint8_t const g_afParity[256];
|
---|
1186 | RT_C_DECLS_END
|
---|
1187 |
|
---|
1188 |
|
---|
1189 | /** @name Arithmetic assignment operations on bytes (binary).
|
---|
1190 | * @{ */
|
---|
1191 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t *pu8Dst, uint8_t u8Src, uint32_t *pEFlags));
|
---|
1192 | typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
|
---|
1193 | FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
|
---|
1194 | FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
|
---|
1195 | FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
|
---|
1196 | FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
|
---|
1197 | FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
|
---|
1198 | FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
|
---|
1199 | FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
|
---|
1200 | /** @} */
|
---|
1201 |
|
---|
1202 | /** @name Arithmetic assignment operations on words (binary).
|
---|
1203 | * @{ */
|
---|
1204 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pEFlags));
|
---|
1205 | typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
|
---|
1206 | FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
|
---|
1207 | FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
|
---|
1208 | FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
|
---|
1209 | FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
|
---|
1210 | FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
|
---|
1211 | FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
|
---|
1212 | FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
|
---|
1213 | /** @} */
|
---|
1214 |
|
---|
1215 | /** @name Arithmetic assignment operations on double words (binary).
|
---|
1216 | * @{ */
|
---|
1217 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t *pu32Dst, uint32_t u32Src, uint32_t *pEFlags));
|
---|
1218 | typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
|
---|
1219 | FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
|
---|
1220 | FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
|
---|
1221 | FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
|
---|
1222 | FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
|
---|
1223 | FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
|
---|
1224 | FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
|
---|
1225 | FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
|
---|
1226 | FNIEMAIMPLBINU32 iemAImpl_blsi_u32, iemAImpl_blsi_u32_fallback;
|
---|
1227 | FNIEMAIMPLBINU32 iemAImpl_blsr_u32, iemAImpl_blsr_u32_fallback;
|
---|
1228 | FNIEMAIMPLBINU32 iemAImpl_blsmsk_u32, iemAImpl_blsmsk_u32_fallback;
|
---|
1229 | /** @} */
|
---|
1230 |
|
---|
1231 | /** @name Arithmetic assignment operations on quad words (binary).
|
---|
1232 | * @{ */
|
---|
1233 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t *pu64Dst, uint64_t u64Src, uint32_t *pEFlags));
|
---|
1234 | typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
|
---|
1235 | FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
|
---|
1236 | FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
|
---|
1237 | FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
|
---|
1238 | FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
|
---|
1239 | FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
|
---|
1240 | FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
|
---|
1241 | FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
|
---|
1242 | FNIEMAIMPLBINU64 iemAImpl_blsi_u64, iemAImpl_blsi_u64_fallback;
|
---|
1243 | FNIEMAIMPLBINU64 iemAImpl_blsr_u64, iemAImpl_blsr_u64_fallback;
|
---|
1244 | FNIEMAIMPLBINU64 iemAImpl_blsmsk_u64, iemAImpl_blsmsk_u64_fallback;
|
---|
1245 | /** @} */
|
---|
1246 |
|
---|
1247 | /** @name Compare operations (thrown in with the binary ops).
|
---|
1248 | * @{ */
|
---|
1249 | FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
|
---|
1250 | FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
|
---|
1251 | FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
|
---|
1252 | FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
|
---|
1253 | /** @} */
|
---|
1254 |
|
---|
1255 | /** @name Test operations (thrown in with the binary ops).
|
---|
1256 | * @{ */
|
---|
1257 | FNIEMAIMPLBINU8 iemAImpl_test_u8;
|
---|
1258 | FNIEMAIMPLBINU16 iemAImpl_test_u16;
|
---|
1259 | FNIEMAIMPLBINU32 iemAImpl_test_u32;
|
---|
1260 | FNIEMAIMPLBINU64 iemAImpl_test_u64;
|
---|
1261 | /** @} */
|
---|
1262 |
|
---|
1263 | /** @name Bit operations operations (thrown in with the binary ops).
|
---|
1264 | * @{ */
|
---|
1265 | FNIEMAIMPLBINU16 iemAImpl_bt_u16;
|
---|
1266 | FNIEMAIMPLBINU32 iemAImpl_bt_u32;
|
---|
1267 | FNIEMAIMPLBINU64 iemAImpl_bt_u64;
|
---|
1268 | FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
|
---|
1269 | FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
|
---|
1270 | FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
|
---|
1271 | FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
|
---|
1272 | FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
|
---|
1273 | FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
|
---|
1274 | FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
|
---|
1275 | FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
|
---|
1276 | FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
|
---|
1277 | /** @} */
|
---|
1278 |
|
---|
1279 | /** @name Arithmetic three operand operations on double words (binary).
|
---|
1280 | * @{ */
|
---|
1281 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2, uint32_t *pEFlags));
|
---|
1282 | typedef FNIEMAIMPLBINVEXU32 *PFNIEMAIMPLBINVEXU32;
|
---|
1283 | FNIEMAIMPLBINVEXU32 iemAImpl_andn_u32, iemAImpl_andn_u32_fallback;
|
---|
1284 | FNIEMAIMPLBINVEXU32 iemAImpl_bextr_u32, iemAImpl_bextr_u32_fallback;
|
---|
1285 | FNIEMAIMPLBINVEXU32 iemAImpl_bzhi_u32, iemAImpl_bzhi_u32_fallback;
|
---|
1286 | /** @} */
|
---|
1287 |
|
---|
1288 | /** @name Arithmetic three operand operations on quad words (binary).
|
---|
1289 | * @{ */
|
---|
1290 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2, uint32_t *pEFlags));
|
---|
1291 | typedef FNIEMAIMPLBINVEXU64 *PFNIEMAIMPLBINVEXU64;
|
---|
1292 | FNIEMAIMPLBINVEXU64 iemAImpl_andn_u64, iemAImpl_andn_u64_fallback;
|
---|
1293 | FNIEMAIMPLBINVEXU64 iemAImpl_bextr_u64, iemAImpl_bextr_u64_fallback;
|
---|
1294 | FNIEMAIMPLBINVEXU64 iemAImpl_bzhi_u64, iemAImpl_bzhi_u64_fallback;
|
---|
1295 | /** @} */
|
---|
1296 |
|
---|
1297 | /** @name Arithmetic three operand operations on double words w/o EFLAGS (binary).
|
---|
1298 | * @{ */
|
---|
1299 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32NOEFL, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2));
|
---|
1300 | typedef FNIEMAIMPLBINVEXU32NOEFL *PFNIEMAIMPLBINVEXU32NOEFL;
|
---|
1301 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pdep_u32, iemAImpl_pdep_u32_fallback;
|
---|
1302 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pext_u32, iemAImpl_pext_u32_fallback;
|
---|
1303 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_sarx_u32, iemAImpl_sarx_u32_fallback;
|
---|
1304 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shlx_u32, iemAImpl_shlx_u32_fallback;
|
---|
1305 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shrx_u32, iemAImpl_shrx_u32_fallback;
|
---|
1306 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_rorx_u32;
|
---|
1307 | /** @} */
|
---|
1308 |
|
---|
1309 | /** @name Arithmetic three operand operations on quad words w/o EFLAGS (binary).
|
---|
1310 | * @{ */
|
---|
1311 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64NOEFL, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2));
|
---|
1312 | typedef FNIEMAIMPLBINVEXU64NOEFL *PFNIEMAIMPLBINVEXU64NOEFL;
|
---|
1313 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pdep_u64, iemAImpl_pdep_u64_fallback;
|
---|
1314 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pext_u64, iemAImpl_pext_u64_fallback;
|
---|
1315 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_sarx_u64, iemAImpl_sarx_u64_fallback;
|
---|
1316 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shlx_u64, iemAImpl_shlx_u64_fallback;
|
---|
1317 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shrx_u64, iemAImpl_shrx_u64_fallback;
|
---|
1318 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_rorx_u64;
|
---|
1319 | /** @} */
|
---|
1320 |
|
---|
1321 | /** @name MULX 32-bit and 64-bit.
|
---|
1322 | * @{ */
|
---|
1323 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU32, (uint32_t *puDst1, uint32_t *puDst2, uint32_t uSrc1, uint32_t uSrc2));
|
---|
1324 | typedef FNIEMAIMPLMULXVEXU32 *PFNIEMAIMPLMULXVEXU32;
|
---|
1325 | FNIEMAIMPLMULXVEXU32 iemAImpl_mulx_u32, iemAImpl_mulx_u32_fallback;
|
---|
1326 |
|
---|
1327 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU64, (uint64_t *puDst1, uint64_t *puDst2, uint64_t uSrc1, uint64_t uSrc2));
|
---|
1328 | typedef FNIEMAIMPLMULXVEXU64 *PFNIEMAIMPLMULXVEXU64;
|
---|
1329 | FNIEMAIMPLMULXVEXU64 iemAImpl_mulx_u64, iemAImpl_mulx_u64_fallback;
|
---|
1330 | /** @} */
|
---|
1331 |
|
---|
1332 |
|
---|
1333 | /** @name Exchange memory with register operations.
|
---|
1334 | * @{ */
|
---|
1335 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_locked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
---|
1336 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_locked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
---|
1337 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_locked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
---|
1338 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_locked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
---|
1339 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_unlocked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
---|
1340 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_unlocked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
---|
1341 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_unlocked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
---|
1342 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_unlocked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
---|
1343 | /** @} */
|
---|
1344 |
|
---|
1345 | /** @name Exchange and add operations.
|
---|
1346 | * @{ */
|
---|
1347 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
---|
1348 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
---|
1349 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
---|
1350 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
---|
1351 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
---|
1352 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
---|
1353 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
---|
1354 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
---|
1355 | /** @} */
|
---|
1356 |
|
---|
1357 | /** @name Compare and exchange.
|
---|
1358 | * @{ */
|
---|
1359 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
---|
1360 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
---|
1361 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
---|
1362 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
---|
1363 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
---|
1364 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
---|
1365 | #if ARCH_BITS == 32
|
---|
1366 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
---|
1367 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
---|
1368 | #else
|
---|
1369 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
---|
1370 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
---|
1371 | #endif
|
---|
1372 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
---|
1373 | uint32_t *pEFlags));
|
---|
1374 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
---|
1375 | uint32_t *pEFlags));
|
---|
1376 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
---|
1377 | uint32_t *pEFlags));
|
---|
1378 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
---|
1379 | uint32_t *pEFlags));
|
---|
1380 | #ifndef RT_ARCH_ARM64
|
---|
1381 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_fallback,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx,
|
---|
1382 | PRTUINT128U pu128RbxRcx, uint32_t *pEFlags));
|
---|
1383 | #endif
|
---|
1384 | /** @} */
|
---|
1385 |
|
---|
1386 | /** @name Memory ordering
|
---|
1387 | * @{ */
|
---|
1388 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
|
---|
1389 | typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
|
---|
1390 | IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
|
---|
1391 | IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
|
---|
1392 | IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
|
---|
1393 | #ifndef RT_ARCH_ARM64
|
---|
1394 | IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
|
---|
1395 | #endif
|
---|
1396 | /** @} */
|
---|
1397 |
|
---|
1398 | /** @name Double precision shifts
|
---|
1399 | * @{ */
|
---|
1400 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t *pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1401 | typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
|
---|
1402 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t *pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1403 | typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
|
---|
1404 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1405 | typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
|
---|
1406 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16, iemAImpl_shld_u16_amd, iemAImpl_shld_u16_intel;
|
---|
1407 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32, iemAImpl_shld_u32_amd, iemAImpl_shld_u32_intel;
|
---|
1408 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64, iemAImpl_shld_u64_amd, iemAImpl_shld_u64_intel;
|
---|
1409 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16, iemAImpl_shrd_u16_amd, iemAImpl_shrd_u16_intel;
|
---|
1410 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32, iemAImpl_shrd_u32_amd, iemAImpl_shrd_u32_intel;
|
---|
1411 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64, iemAImpl_shrd_u64_amd, iemAImpl_shrd_u64_intel;
|
---|
1412 | /** @} */
|
---|
1413 |
|
---|
1414 |
|
---|
1415 | /** @name Bit search operations (thrown in with the binary ops).
|
---|
1416 | * @{ */
|
---|
1417 | FNIEMAIMPLBINU16 iemAImpl_bsf_u16, iemAImpl_bsf_u16_amd, iemAImpl_bsf_u16_intel;
|
---|
1418 | FNIEMAIMPLBINU32 iemAImpl_bsf_u32, iemAImpl_bsf_u32_amd, iemAImpl_bsf_u32_intel;
|
---|
1419 | FNIEMAIMPLBINU64 iemAImpl_bsf_u64, iemAImpl_bsf_u64_amd, iemAImpl_bsf_u64_intel;
|
---|
1420 | FNIEMAIMPLBINU16 iemAImpl_bsr_u16, iemAImpl_bsr_u16_amd, iemAImpl_bsr_u16_intel;
|
---|
1421 | FNIEMAIMPLBINU32 iemAImpl_bsr_u32, iemAImpl_bsr_u32_amd, iemAImpl_bsr_u32_intel;
|
---|
1422 | FNIEMAIMPLBINU64 iemAImpl_bsr_u64, iemAImpl_bsr_u64_amd, iemAImpl_bsr_u64_intel;
|
---|
1423 | FNIEMAIMPLBINU16 iemAImpl_lzcnt_u16, iemAImpl_lzcnt_u16_amd, iemAImpl_lzcnt_u16_intel;
|
---|
1424 | FNIEMAIMPLBINU32 iemAImpl_lzcnt_u32, iemAImpl_lzcnt_u32_amd, iemAImpl_lzcnt_u32_intel;
|
---|
1425 | FNIEMAIMPLBINU64 iemAImpl_lzcnt_u64, iemAImpl_lzcnt_u64_amd, iemAImpl_lzcnt_u64_intel;
|
---|
1426 | FNIEMAIMPLBINU16 iemAImpl_tzcnt_u16, iemAImpl_tzcnt_u16_amd, iemAImpl_tzcnt_u16_intel;
|
---|
1427 | FNIEMAIMPLBINU32 iemAImpl_tzcnt_u32, iemAImpl_tzcnt_u32_amd, iemAImpl_tzcnt_u32_intel;
|
---|
1428 | FNIEMAIMPLBINU64 iemAImpl_tzcnt_u64, iemAImpl_tzcnt_u64_amd, iemAImpl_tzcnt_u64_intel;
|
---|
1429 | FNIEMAIMPLBINU16 iemAImpl_popcnt_u16, iemAImpl_popcnt_u16_fallback;
|
---|
1430 | FNIEMAIMPLBINU32 iemAImpl_popcnt_u32, iemAImpl_popcnt_u32_fallback;
|
---|
1431 | FNIEMAIMPLBINU64 iemAImpl_popcnt_u64, iemAImpl_popcnt_u64_fallback;
|
---|
1432 | /** @} */
|
---|
1433 |
|
---|
1434 | /** @name Signed multiplication operations (thrown in with the binary ops).
|
---|
1435 | * @{ */
|
---|
1436 | FNIEMAIMPLBINU16 iemAImpl_imul_two_u16, iemAImpl_imul_two_u16_amd, iemAImpl_imul_two_u16_intel;
|
---|
1437 | FNIEMAIMPLBINU32 iemAImpl_imul_two_u32, iemAImpl_imul_two_u32_amd, iemAImpl_imul_two_u32_intel;
|
---|
1438 | FNIEMAIMPLBINU64 iemAImpl_imul_two_u64, iemAImpl_imul_two_u64_amd, iemAImpl_imul_two_u64_intel;
|
---|
1439 | /** @} */
|
---|
1440 |
|
---|
1441 | /** @name Arithmetic assignment operations on bytes (unary).
|
---|
1442 | * @{ */
|
---|
1443 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t *pu8Dst, uint32_t *pEFlags));
|
---|
1444 | typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
|
---|
1445 | FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
|
---|
1446 | FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
|
---|
1447 | FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
|
---|
1448 | FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
|
---|
1449 | /** @} */
|
---|
1450 |
|
---|
1451 | /** @name Arithmetic assignment operations on words (unary).
|
---|
1452 | * @{ */
|
---|
1453 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t *pu16Dst, uint32_t *pEFlags));
|
---|
1454 | typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
|
---|
1455 | FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
|
---|
1456 | FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
|
---|
1457 | FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
|
---|
1458 | FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
|
---|
1459 | /** @} */
|
---|
1460 |
|
---|
1461 | /** @name Arithmetic assignment operations on double words (unary).
|
---|
1462 | * @{ */
|
---|
1463 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t *pu32Dst, uint32_t *pEFlags));
|
---|
1464 | typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
|
---|
1465 | FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
|
---|
1466 | FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
|
---|
1467 | FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
|
---|
1468 | FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
|
---|
1469 | /** @} */
|
---|
1470 |
|
---|
1471 | /** @name Arithmetic assignment operations on quad words (unary).
|
---|
1472 | * @{ */
|
---|
1473 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t *pu64Dst, uint32_t *pEFlags));
|
---|
1474 | typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
|
---|
1475 | FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
|
---|
1476 | FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
|
---|
1477 | FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
|
---|
1478 | FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
|
---|
1479 | /** @} */
|
---|
1480 |
|
---|
1481 |
|
---|
1482 | /** @name Shift operations on bytes (Group 2).
|
---|
1483 | * @{ */
|
---|
1484 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t *pu8Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
1485 | typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
|
---|
1486 | FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8, iemAImpl_rol_u8_amd, iemAImpl_rol_u8_intel;
|
---|
1487 | FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8, iemAImpl_ror_u8_amd, iemAImpl_ror_u8_intel;
|
---|
1488 | FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8, iemAImpl_rcl_u8_amd, iemAImpl_rcl_u8_intel;
|
---|
1489 | FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8, iemAImpl_rcr_u8_amd, iemAImpl_rcr_u8_intel;
|
---|
1490 | FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8, iemAImpl_shl_u8_amd, iemAImpl_shl_u8_intel;
|
---|
1491 | FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8, iemAImpl_shr_u8_amd, iemAImpl_shr_u8_intel;
|
---|
1492 | FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8, iemAImpl_sar_u8_amd, iemAImpl_sar_u8_intel;
|
---|
1493 | /** @} */
|
---|
1494 |
|
---|
1495 | /** @name Shift operations on words (Group 2).
|
---|
1496 | * @{ */
|
---|
1497 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t *pu16Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
1498 | typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
|
---|
1499 | FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16, iemAImpl_rol_u16_amd, iemAImpl_rol_u16_intel;
|
---|
1500 | FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16, iemAImpl_ror_u16_amd, iemAImpl_ror_u16_intel;
|
---|
1501 | FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16, iemAImpl_rcl_u16_amd, iemAImpl_rcl_u16_intel;
|
---|
1502 | FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16, iemAImpl_rcr_u16_amd, iemAImpl_rcr_u16_intel;
|
---|
1503 | FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16, iemAImpl_shl_u16_amd, iemAImpl_shl_u16_intel;
|
---|
1504 | FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16, iemAImpl_shr_u16_amd, iemAImpl_shr_u16_intel;
|
---|
1505 | FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16, iemAImpl_sar_u16_amd, iemAImpl_sar_u16_intel;
|
---|
1506 | /** @} */
|
---|
1507 |
|
---|
1508 | /** @name Shift operations on double words (Group 2).
|
---|
1509 | * @{ */
|
---|
1510 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t *pu32Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
1511 | typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
|
---|
1512 | FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32, iemAImpl_rol_u32_amd, iemAImpl_rol_u32_intel;
|
---|
1513 | FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32, iemAImpl_ror_u32_amd, iemAImpl_ror_u32_intel;
|
---|
1514 | FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32, iemAImpl_rcl_u32_amd, iemAImpl_rcl_u32_intel;
|
---|
1515 | FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32, iemAImpl_rcr_u32_amd, iemAImpl_rcr_u32_intel;
|
---|
1516 | FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32, iemAImpl_shl_u32_amd, iemAImpl_shl_u32_intel;
|
---|
1517 | FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32, iemAImpl_shr_u32_amd, iemAImpl_shr_u32_intel;
|
---|
1518 | FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32, iemAImpl_sar_u32_amd, iemAImpl_sar_u32_intel;
|
---|
1519 | /** @} */
|
---|
1520 |
|
---|
1521 | /** @name Shift operations on words (Group 2).
|
---|
1522 | * @{ */
|
---|
1523 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t *pu64Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
1524 | typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
|
---|
1525 | FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64, iemAImpl_rol_u64_amd, iemAImpl_rol_u64_intel;
|
---|
1526 | FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64, iemAImpl_ror_u64_amd, iemAImpl_ror_u64_intel;
|
---|
1527 | FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64, iemAImpl_rcl_u64_amd, iemAImpl_rcl_u64_intel;
|
---|
1528 | FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64, iemAImpl_rcr_u64_amd, iemAImpl_rcr_u64_intel;
|
---|
1529 | FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64, iemAImpl_shl_u64_amd, iemAImpl_shl_u64_intel;
|
---|
1530 | FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64, iemAImpl_shr_u64_amd, iemAImpl_shr_u64_intel;
|
---|
1531 | FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64, iemAImpl_sar_u64_amd, iemAImpl_sar_u64_intel;
|
---|
1532 | /** @} */
|
---|
1533 |
|
---|
1534 | /** @name Multiplication and division operations.
|
---|
1535 | * @{ */
|
---|
1536 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t *pu16AX, uint8_t u8FactorDivisor, uint32_t *pEFlags));
|
---|
1537 | typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
|
---|
1538 | FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_mul_u8_amd, iemAImpl_mul_u8_intel;
|
---|
1539 | FNIEMAIMPLMULDIVU8 iemAImpl_imul_u8, iemAImpl_imul_u8_amd, iemAImpl_imul_u8_intel;
|
---|
1540 | FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_div_u8_amd, iemAImpl_div_u8_intel;
|
---|
1541 | FNIEMAIMPLMULDIVU8 iemAImpl_idiv_u8, iemAImpl_idiv_u8_amd, iemAImpl_idiv_u8_intel;
|
---|
1542 |
|
---|
1543 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t *pu16AX, uint16_t *pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
|
---|
1544 | typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
|
---|
1545 | FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_mul_u16_amd, iemAImpl_mul_u16_intel;
|
---|
1546 | FNIEMAIMPLMULDIVU16 iemAImpl_imul_u16, iemAImpl_imul_u16_amd, iemAImpl_imul_u16_intel;
|
---|
1547 | FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_div_u16_amd, iemAImpl_div_u16_intel;
|
---|
1548 | FNIEMAIMPLMULDIVU16 iemAImpl_idiv_u16, iemAImpl_idiv_u16_amd, iemAImpl_idiv_u16_intel;
|
---|
1549 |
|
---|
1550 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t *pu32EAX, uint32_t *pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
|
---|
1551 | typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
|
---|
1552 | FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_mul_u32_amd, iemAImpl_mul_u32_intel;
|
---|
1553 | FNIEMAIMPLMULDIVU32 iemAImpl_imul_u32, iemAImpl_imul_u32_amd, iemAImpl_imul_u32_intel;
|
---|
1554 | FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_div_u32_amd, iemAImpl_div_u32_intel;
|
---|
1555 | FNIEMAIMPLMULDIVU32 iemAImpl_idiv_u32, iemAImpl_idiv_u32_amd, iemAImpl_idiv_u32_intel;
|
---|
1556 |
|
---|
1557 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
|
---|
1558 | typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
|
---|
1559 | FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_mul_u64_amd, iemAImpl_mul_u64_intel;
|
---|
1560 | FNIEMAIMPLMULDIVU64 iemAImpl_imul_u64, iemAImpl_imul_u64_amd, iemAImpl_imul_u64_intel;
|
---|
1561 | FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_div_u64_amd, iemAImpl_div_u64_intel;
|
---|
1562 | FNIEMAIMPLMULDIVU64 iemAImpl_idiv_u64, iemAImpl_idiv_u64_amd, iemAImpl_idiv_u64_intel;
|
---|
1563 | /** @} */
|
---|
1564 |
|
---|
1565 | /** @name Byte Swap.
|
---|
1566 | * @{ */
|
---|
1567 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
|
---|
1568 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
|
---|
1569 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
|
---|
1570 | /** @} */
|
---|
1571 |
|
---|
1572 | /** @name Misc.
|
---|
1573 | * @{ */
|
---|
1574 | FNIEMAIMPLBINU16 iemAImpl_arpl;
|
---|
1575 | /** @} */
|
---|
1576 |
|
---|
1577 | /** @name RDRAND and RDSEED
|
---|
1578 | * @{ */
|
---|
1579 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU16,(uint16_t *puDst, uint32_t *pEFlags));
|
---|
1580 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU32,(uint32_t *puDst, uint32_t *pEFlags));
|
---|
1581 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU64,(uint64_t *puDst, uint32_t *pEFlags));
|
---|
1582 | typedef FNIEMAIMPLRDRANDSEEDU16 *FNIEMAIMPLPRDRANDSEEDU16;
|
---|
1583 | typedef FNIEMAIMPLRDRANDSEEDU32 *FNIEMAIMPLPRDRANDSEEDU32;
|
---|
1584 | typedef FNIEMAIMPLRDRANDSEEDU64 *FNIEMAIMPLPRDRANDSEEDU64;
|
---|
1585 |
|
---|
1586 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdrand_u16, iemAImpl_rdrand_u16_fallback;
|
---|
1587 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdrand_u32, iemAImpl_rdrand_u32_fallback;
|
---|
1588 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdrand_u64, iemAImpl_rdrand_u64_fallback;
|
---|
1589 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdseed_u16, iemAImpl_rdseed_u16_fallback;
|
---|
1590 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdseed_u32, iemAImpl_rdseed_u32_fallback;
|
---|
1591 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdseed_u64, iemAImpl_rdseed_u64_fallback;
|
---|
1592 | /** @} */
|
---|
1593 |
|
---|
1594 | /** @name FPU operations taking a 32-bit float argument
|
---|
1595 | * @{ */
|
---|
1596 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
1597 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
---|
1598 | typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
|
---|
1599 |
|
---|
1600 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
1601 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
---|
1602 | typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
|
---|
1603 |
|
---|
1604 | FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
|
---|
1605 | FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
|
---|
1606 | FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
|
---|
1607 | FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
|
---|
1608 | FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
|
---|
1609 | FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
|
---|
1610 | FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
|
---|
1611 |
|
---|
1612 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
|
---|
1613 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
1614 | PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
|
---|
1615 | /** @} */
|
---|
1616 |
|
---|
1617 | /** @name FPU operations taking a 64-bit float argument
|
---|
1618 | * @{ */
|
---|
1619 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
1620 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
---|
1621 | typedef FNIEMAIMPLFPUR64FSW *PFNIEMAIMPLFPUR64FSW;
|
---|
1622 |
|
---|
1623 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
1624 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
---|
1625 | typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
|
---|
1626 |
|
---|
1627 | FNIEMAIMPLFPUR64FSW iemAImpl_fcom_r80_by_r64;
|
---|
1628 | FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
|
---|
1629 | FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
|
---|
1630 | FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
|
---|
1631 | FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
|
---|
1632 | FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
|
---|
1633 | FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
|
---|
1634 |
|
---|
1635 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
|
---|
1636 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
1637 | PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
|
---|
1638 | /** @} */
|
---|
1639 |
|
---|
1640 | /** @name FPU operations taking a 80-bit float argument
|
---|
1641 | * @{ */
|
---|
1642 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
1643 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
1644 | typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
|
---|
1645 | FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
|
---|
1646 | FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
|
---|
1647 | FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
|
---|
1648 | FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
|
---|
1649 | FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
|
---|
1650 | FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
|
---|
1651 | FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
|
---|
1652 | FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
|
---|
1653 | FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
|
---|
1654 |
|
---|
1655 | FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80, iemAImpl_fpatan_r80_by_r80_amd, iemAImpl_fpatan_r80_by_r80_intel;
|
---|
1656 | FNIEMAIMPLFPUR80 iemAImpl_fyl2x_r80_by_r80, iemAImpl_fyl2x_r80_by_r80_amd, iemAImpl_fyl2x_r80_by_r80_intel;
|
---|
1657 | FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80, iemAImpl_fyl2xp1_r80_by_r80_amd, iemAImpl_fyl2xp1_r80_by_r80_intel;
|
---|
1658 |
|
---|
1659 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
1660 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
1661 | typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
|
---|
1662 | FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
|
---|
1663 | FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
|
---|
1664 |
|
---|
1665 | typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
|
---|
1666 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
1667 | typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
|
---|
1668 | FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
|
---|
1669 | FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
|
---|
1670 |
|
---|
1671 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
---|
1672 | typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
|
---|
1673 | FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
|
---|
1674 | FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
|
---|
1675 | FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80, iemAImpl_f2xm1_r80_amd, iemAImpl_f2xm1_r80_intel;
|
---|
1676 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
|
---|
1677 | FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
|
---|
1678 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80, iemAImpl_fsin_r80_amd, iemAImpl_fsin_r80_intel;
|
---|
1679 | FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80, iemAImpl_fcos_r80_amd, iemAImpl_fcos_r80_intel;
|
---|
1680 |
|
---|
1681 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
|
---|
1682 | typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
|
---|
1683 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
|
---|
1684 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
|
---|
1685 |
|
---|
1686 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
|
---|
1687 | typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
|
---|
1688 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
|
---|
1689 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
|
---|
1690 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
|
---|
1691 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
|
---|
1692 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
|
---|
1693 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
|
---|
1694 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
|
---|
1695 |
|
---|
1696 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
|
---|
1697 | PCRTFLOAT80U pr80Val));
|
---|
1698 | typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
|
---|
1699 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80, iemAImpl_fptan_r80_r80_amd, iemAImpl_fptan_r80_r80_intel;
|
---|
1700 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
|
---|
1701 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80, iemAImpl_fsincos_r80_r80_amd, iemAImpl_fsincos_r80_r80_intel;
|
---|
1702 |
|
---|
1703 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
---|
1704 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
1705 | PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
|
---|
1706 |
|
---|
1707 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_d80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTPBCD80U pd80Val));
|
---|
1708 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_d80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
1709 | PRTPBCD80U pd80Dst, PCRTFLOAT80U pr80Src));
|
---|
1710 |
|
---|
1711 | /** @} */
|
---|
1712 |
|
---|
1713 | /** @name FPU operations taking a 16-bit signed integer argument
|
---|
1714 | * @{ */
|
---|
1715 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
1716 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
---|
1717 | typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
|
---|
1718 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI16,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
1719 | int16_t *pi16Dst, PCRTFLOAT80U pr80Src));
|
---|
1720 | typedef FNIEMAIMPLFPUSTR80TOI16 *PFNIEMAIMPLFPUSTR80TOI16;
|
---|
1721 |
|
---|
1722 | FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
|
---|
1723 | FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
|
---|
1724 | FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
|
---|
1725 | FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
|
---|
1726 | FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
|
---|
1727 | FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
|
---|
1728 |
|
---|
1729 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
1730 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
---|
1731 | typedef FNIEMAIMPLFPUI16FSW *PFNIEMAIMPLFPUI16FSW;
|
---|
1732 | FNIEMAIMPLFPUI16FSW iemAImpl_ficom_r80_by_i16;
|
---|
1733 |
|
---|
1734 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
|
---|
1735 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fist_r80_to_i16;
|
---|
1736 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fistt_r80_to_i16, iemAImpl_fistt_r80_to_i16_amd, iemAImpl_fistt_r80_to_i16_intel;
|
---|
1737 | /** @} */
|
---|
1738 |
|
---|
1739 | /** @name FPU operations taking a 32-bit signed integer argument
|
---|
1740 | * @{ */
|
---|
1741 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
1742 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
---|
1743 | typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
|
---|
1744 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI32,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
1745 | int32_t *pi32Dst, PCRTFLOAT80U pr80Src));
|
---|
1746 | typedef FNIEMAIMPLFPUSTR80TOI32 *PFNIEMAIMPLFPUSTR80TOI32;
|
---|
1747 |
|
---|
1748 | FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
|
---|
1749 | FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
|
---|
1750 | FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
|
---|
1751 | FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
|
---|
1752 | FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
|
---|
1753 | FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
|
---|
1754 |
|
---|
1755 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
1756 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
---|
1757 | typedef FNIEMAIMPLFPUI32FSW *PFNIEMAIMPLFPUI32FSW;
|
---|
1758 | FNIEMAIMPLFPUI32FSW iemAImpl_ficom_r80_by_i32;
|
---|
1759 |
|
---|
1760 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
|
---|
1761 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fist_r80_to_i32;
|
---|
1762 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fistt_r80_to_i32;
|
---|
1763 | /** @} */
|
---|
1764 |
|
---|
1765 | /** @name FPU operations taking a 64-bit signed integer argument
|
---|
1766 | * @{ */
|
---|
1767 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI64,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
1768 | int64_t *pi64Dst, PCRTFLOAT80U pr80Src));
|
---|
1769 | typedef FNIEMAIMPLFPUSTR80TOI64 *PFNIEMAIMPLFPUSTR80TOI64;
|
---|
1770 |
|
---|
1771 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
|
---|
1772 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fist_r80_to_i64;
|
---|
1773 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fistt_r80_to_i64;
|
---|
1774 | /** @} */
|
---|
1775 |
|
---|
1776 |
|
---|
1777 | /** Temporary type representing a 256-bit vector register. */
|
---|
1778 | typedef struct { uint64_t au64[4]; } IEMVMM256;
|
---|
1779 | /** Temporary type pointing to a 256-bit vector register. */
|
---|
1780 | typedef IEMVMM256 *PIEMVMM256;
|
---|
1781 | /** Temporary type pointing to a const 256-bit vector register. */
|
---|
1782 | typedef IEMVMM256 *PCIEMVMM256;
|
---|
1783 |
|
---|
1784 |
|
---|
1785 | /** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
|
---|
1786 | * @{ */
|
---|
1787 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc));
|
---|
1788 | typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
|
---|
1789 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
1790 | typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
|
---|
1791 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U128,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
|
---|
1792 | typedef FNIEMAIMPLMEDIAF3U128 *PFNIEMAIMPLMEDIAF3U128;
|
---|
1793 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U256,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
|
---|
1794 | typedef FNIEMAIMPLMEDIAF3U256 *PFNIEMAIMPLMEDIAF3U256;
|
---|
1795 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U64,(uint64_t *puDst, uint64_t const *puSrc));
|
---|
1796 | typedef FNIEMAIMPLMEDIAOPTF2U64 *PFNIEMAIMPLMEDIAOPTF2U64;
|
---|
1797 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128,(PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
1798 | typedef FNIEMAIMPLMEDIAOPTF2U128 *PFNIEMAIMPLMEDIAOPTF2U128;
|
---|
1799 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
|
---|
1800 | typedef FNIEMAIMPLMEDIAOPTF3U128 *PFNIEMAIMPLMEDIAOPTF3U128;
|
---|
1801 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
|
---|
1802 | typedef FNIEMAIMPLMEDIAOPTF3U256 *PFNIEMAIMPLMEDIAOPTF3U256;
|
---|
1803 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U256,(PRTUINT256U puDst, PCRTUINT256U puSrc));
|
---|
1804 | typedef FNIEMAIMPLMEDIAOPTF2U256 *PFNIEMAIMPLMEDIAOPTF2U256;
|
---|
1805 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback;
|
---|
1806 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64;
|
---|
1807 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
|
---|
1808 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64;
|
---|
1809 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64;
|
---|
1810 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64;
|
---|
1811 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddd_u64;
|
---|
1812 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddq_u64;
|
---|
1813 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64;
|
---|
1814 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64;
|
---|
1815 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubd_u64;
|
---|
1816 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubq_u64;
|
---|
1817 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddwd_u64;
|
---|
1818 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64;
|
---|
1819 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminub_u64, iemAImpl_pmaxub_u64;
|
---|
1820 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64;
|
---|
1821 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback;
|
---|
1822 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback;
|
---|
1823 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback;
|
---|
1824 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback;
|
---|
1825 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback;
|
---|
1826 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback;
|
---|
1827 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddw_u64, iemAImpl_phaddw_u64_fallback;
|
---|
1828 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddd_u64, iemAImpl_phaddd_u64_fallback;
|
---|
1829 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubw_u64, iemAImpl_phsubw_u64_fallback;
|
---|
1830 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubd_u64, iemAImpl_phsubd_u64_fallback;
|
---|
1831 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddsw_u64, iemAImpl_phaddsw_u64_fallback;
|
---|
1832 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubsw_u64, iemAImpl_phsubsw_u64_fallback;
|
---|
1833 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddubsw_u64, iemAImpl_pmaddubsw_u64_fallback;
|
---|
1834 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmulhrsw_u64, iemAImpl_pmulhrsw_u64_fallback;
|
---|
1835 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmuludq_u64;
|
---|
1836 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64;
|
---|
1837 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64;
|
---|
1838 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllq_u64, iemAImpl_psrlq_u64;
|
---|
1839 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packsswb_u64, iemAImpl_packuswb_u64;
|
---|
1840 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packssdw_u64;
|
---|
1841 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmulhuw_u64;
|
---|
1842 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pavgb_u64, iemAImpl_pavgw_u64;
|
---|
1843 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psadbw_u64;
|
---|
1844 |
|
---|
1845 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback;
|
---|
1846 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128;
|
---|
1847 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
|
---|
1848 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback;
|
---|
1849 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128;
|
---|
1850 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback;
|
---|
1851 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128;
|
---|
1852 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128;
|
---|
1853 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddd_u128;
|
---|
1854 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddq_u128;
|
---|
1855 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128;
|
---|
1856 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128;
|
---|
1857 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubd_u128;
|
---|
1858 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubq_u128;
|
---|
1859 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmullw_u128, iemAImpl_pmullw_u128_fallback;
|
---|
1860 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhw_u128;
|
---|
1861 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback;
|
---|
1862 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddwd_u128;
|
---|
1863 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminub_u128;
|
---|
1864 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback;
|
---|
1865 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback;
|
---|
1866 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback;
|
---|
1867 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback;
|
---|
1868 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsw_u128, iemAImpl_pminsw_u128_fallback;
|
---|
1869 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxub_u128;
|
---|
1870 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback;
|
---|
1871 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback;
|
---|
1872 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback;
|
---|
1873 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsw_u128;
|
---|
1874 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback;
|
---|
1875 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback;
|
---|
1876 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback;
|
---|
1877 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback;
|
---|
1878 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback;
|
---|
1879 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback;
|
---|
1880 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback;
|
---|
1881 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback;
|
---|
1882 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback;
|
---|
1883 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback;
|
---|
1884 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback;
|
---|
1885 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback;
|
---|
1886 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback;
|
---|
1887 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback;
|
---|
1888 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback;
|
---|
1889 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmuludq_u128;
|
---|
1890 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128;
|
---|
1891 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128;
|
---|
1892 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllw_u128, iemAImpl_psrlw_u128, iemAImpl_psraw_u128;
|
---|
1893 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pslld_u128, iemAImpl_psrld_u128, iemAImpl_psrad_u128;
|
---|
1894 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllq_u128, iemAImpl_psrlq_u128;
|
---|
1895 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulhuw_u128;
|
---|
1896 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pavgb_u128, iemAImpl_pavgw_u128;
|
---|
1897 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psadbw_u128;
|
---|
1898 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmuldq_u128, iemAImpl_pmuldq_u128_fallback;
|
---|
1899 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpcklps_u128, iemAImpl_unpcklpd_u128;
|
---|
1900 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpckhps_u128, iemAImpl_unpckhpd_u128;
|
---|
1901 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phminposuw_u128, iemAImpl_phminposuw_u128_fallback;
|
---|
1902 |
|
---|
1903 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback;
|
---|
1904 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback;
|
---|
1905 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpandn_u128, iemAImpl_vpandn_u128_fallback;
|
---|
1906 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpor_u128, iemAImpl_vpor_u128_fallback;
|
---|
1907 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpxor_u128, iemAImpl_vpxor_u128_fallback;
|
---|
1908 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqb_u128, iemAImpl_vpcmpeqb_u128_fallback;
|
---|
1909 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback;
|
---|
1910 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback;
|
---|
1911 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback;
|
---|
1912 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback;
|
---|
1913 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback;
|
---|
1914 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback;
|
---|
1915 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback;
|
---|
1916 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddb_u128, iemAImpl_vpaddb_u128_fallback;
|
---|
1917 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddw_u128, iemAImpl_vpaddw_u128_fallback;
|
---|
1918 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddd_u128, iemAImpl_vpaddd_u128_fallback;
|
---|
1919 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddq_u128, iemAImpl_vpaddq_u128_fallback;
|
---|
1920 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubb_u128, iemAImpl_vpsubb_u128_fallback;
|
---|
1921 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubw_u128, iemAImpl_vpsubw_u128_fallback;
|
---|
1922 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubd_u128, iemAImpl_vpsubd_u128_fallback;
|
---|
1923 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubq_u128, iemAImpl_vpsubq_u128_fallback;
|
---|
1924 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminub_u128, iemAImpl_vpminub_u128_fallback;
|
---|
1925 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminuw_u128, iemAImpl_vpminuw_u128_fallback;
|
---|
1926 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminud_u128, iemAImpl_vpminud_u128_fallback;
|
---|
1927 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsb_u128, iemAImpl_vpminsb_u128_fallback;
|
---|
1928 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsw_u128, iemAImpl_vpminsw_u128_fallback;
|
---|
1929 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsd_u128, iemAImpl_vpminsd_u128_fallback;
|
---|
1930 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxub_u128, iemAImpl_vpmaxub_u128_fallback;
|
---|
1931 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxuw_u128, iemAImpl_vpmaxuw_u128_fallback;
|
---|
1932 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxud_u128, iemAImpl_vpmaxud_u128_fallback;
|
---|
1933 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsb_u128, iemAImpl_vpmaxsb_u128_fallback;
|
---|
1934 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsw_u128, iemAImpl_vpmaxsw_u128_fallback;
|
---|
1935 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsd_u128, iemAImpl_vpmaxsd_u128_fallback;
|
---|
1936 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpacksswb_u128, iemAImpl_vpacksswb_u128_fallback;
|
---|
1937 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackssdw_u128, iemAImpl_vpackssdw_u128_fallback;
|
---|
1938 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackuswb_u128, iemAImpl_vpackuswb_u128_fallback;
|
---|
1939 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackusdw_u128, iemAImpl_vpackusdw_u128_fallback;
|
---|
1940 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmullw_u128, iemAImpl_vpmullw_u128_fallback;
|
---|
1941 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulld_u128, iemAImpl_vpmulld_u128_fallback;
|
---|
1942 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhw_u128, iemAImpl_vpmulhw_u128_fallback;
|
---|
1943 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhuw_u128, iemAImpl_vpmulhuw_u128_fallback;
|
---|
1944 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgb_u128, iemAImpl_vpavgb_u128_fallback;
|
---|
1945 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgw_u128, iemAImpl_vpavgw_u128_fallback;
|
---|
1946 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignb_u128, iemAImpl_vpsignb_u128_fallback;
|
---|
1947 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignw_u128, iemAImpl_vpsignw_u128_fallback;
|
---|
1948 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignd_u128, iemAImpl_vpsignd_u128_fallback;
|
---|
1949 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddw_u128, iemAImpl_vphaddw_u128_fallback;
|
---|
1950 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddd_u128, iemAImpl_vphaddd_u128_fallback;
|
---|
1951 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubw_u128, iemAImpl_vphsubw_u128_fallback;
|
---|
1952 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubd_u128, iemAImpl_vphsubd_u128_fallback;
|
---|
1953 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddsw_u128, iemAImpl_vphaddsw_u128_fallback;
|
---|
1954 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubsw_u128, iemAImpl_vphsubsw_u128_fallback;
|
---|
1955 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaddubsw_u128, iemAImpl_vpmaddubsw_u128_fallback;
|
---|
1956 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhrsw_u128, iemAImpl_vpmulhrsw_u128_fallback;
|
---|
1957 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsadbw_u128, iemAImpl_vpsadbw_u128_fallback;
|
---|
1958 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuldq_u128, iemAImpl_vpmuldq_u128_fallback;
|
---|
1959 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuludq_u128, iemAImpl_vpmuludq_u128_fallback;
|
---|
1960 |
|
---|
1961 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsb_u128, iemAImpl_vpabsb_u128_fallback;
|
---|
1962 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsw_u128, iemAImpl_vpabsd_u128_fallback;
|
---|
1963 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsd_u128, iemAImpl_vpabsw_u128_fallback;
|
---|
1964 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vphminposuw_u128, iemAImpl_vphminposuw_u128_fallback;
|
---|
1965 |
|
---|
1966 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback;
|
---|
1967 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback;
|
---|
1968 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpandn_u256, iemAImpl_vpandn_u256_fallback;
|
---|
1969 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpor_u256, iemAImpl_vpor_u256_fallback;
|
---|
1970 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpxor_u256, iemAImpl_vpxor_u256_fallback;
|
---|
1971 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqb_u256, iemAImpl_vpcmpeqb_u256_fallback;
|
---|
1972 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback;
|
---|
1973 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback;
|
---|
1974 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback;
|
---|
1975 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback;
|
---|
1976 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback;
|
---|
1977 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback;
|
---|
1978 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback;
|
---|
1979 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddb_u256, iemAImpl_vpaddb_u256_fallback;
|
---|
1980 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddw_u256, iemAImpl_vpaddw_u256_fallback;
|
---|
1981 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddd_u256, iemAImpl_vpaddd_u256_fallback;
|
---|
1982 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddq_u256, iemAImpl_vpaddq_u256_fallback;
|
---|
1983 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubb_u256, iemAImpl_vpsubb_u256_fallback;
|
---|
1984 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubw_u256, iemAImpl_vpsubw_u256_fallback;
|
---|
1985 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubd_u256, iemAImpl_vpsubd_u256_fallback;
|
---|
1986 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubq_u256, iemAImpl_vpsubq_u256_fallback;
|
---|
1987 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminub_u256, iemAImpl_vpminub_u256_fallback;
|
---|
1988 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminuw_u256, iemAImpl_vpminuw_u256_fallback;
|
---|
1989 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminud_u256, iemAImpl_vpminud_u256_fallback;
|
---|
1990 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsb_u256, iemAImpl_vpminsb_u256_fallback;
|
---|
1991 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsw_u256, iemAImpl_vpminsw_u256_fallback;
|
---|
1992 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsd_u256, iemAImpl_vpminsd_u256_fallback;
|
---|
1993 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxub_u256, iemAImpl_vpmaxub_u256_fallback;
|
---|
1994 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxuw_u256, iemAImpl_vpmaxuw_u256_fallback;
|
---|
1995 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxud_u256, iemAImpl_vpmaxud_u256_fallback;
|
---|
1996 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsb_u256, iemAImpl_vpmaxsb_u256_fallback;
|
---|
1997 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsw_u256, iemAImpl_vpmaxsw_u256_fallback;
|
---|
1998 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsd_u256, iemAImpl_vpmaxsd_u256_fallback;
|
---|
1999 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpacksswb_u256, iemAImpl_vpacksswb_u256_fallback;
|
---|
2000 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackssdw_u256, iemAImpl_vpackssdw_u256_fallback;
|
---|
2001 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackuswb_u256, iemAImpl_vpackuswb_u256_fallback;
|
---|
2002 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackusdw_u256, iemAImpl_vpackusdw_u256_fallback;
|
---|
2003 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmullw_u256, iemAImpl_vpmullw_u256_fallback;
|
---|
2004 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulld_u256, iemAImpl_vpmulld_u256_fallback;
|
---|
2005 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhw_u256, iemAImpl_vpmulhw_u256_fallback;
|
---|
2006 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhuw_u256, iemAImpl_vpmulhuw_u256_fallback;
|
---|
2007 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgb_u256, iemAImpl_vpavgb_u256_fallback;
|
---|
2008 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgw_u256, iemAImpl_vpavgw_u256_fallback;
|
---|
2009 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignb_u256, iemAImpl_vpsignb_u256_fallback;
|
---|
2010 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignw_u256, iemAImpl_vpsignw_u256_fallback;
|
---|
2011 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignd_u256, iemAImpl_vpsignd_u256_fallback;
|
---|
2012 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddw_u256, iemAImpl_vphaddw_u256_fallback;
|
---|
2013 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddd_u256, iemAImpl_vphaddd_u256_fallback;
|
---|
2014 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubw_u256, iemAImpl_vphsubw_u256_fallback;
|
---|
2015 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubd_u256, iemAImpl_vphsubd_u256_fallback;
|
---|
2016 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddsw_u256, iemAImpl_vphaddsw_u256_fallback;
|
---|
2017 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubsw_u256, iemAImpl_vphsubsw_u256_fallback;
|
---|
2018 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaddubsw_u256, iemAImpl_vpmaddubsw_u256_fallback;
|
---|
2019 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhrsw_u256, iemAImpl_vpmulhrsw_u256_fallback;
|
---|
2020 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsadbw_u256, iemAImpl_vpsadbw_u256_fallback;
|
---|
2021 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuldq_u256, iemAImpl_vpmuldq_u256_fallback;
|
---|
2022 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuludq_u256, iemAImpl_vpmuludq_u256_fallback;
|
---|
2023 |
|
---|
2024 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsb_u256, iemAImpl_vpabsb_u256_fallback;
|
---|
2025 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsw_u256, iemAImpl_vpabsw_u256_fallback;
|
---|
2026 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsd_u256, iemAImpl_vpabsd_u256_fallback;
|
---|
2027 | /** @} */
|
---|
2028 |
|
---|
2029 | /** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
|
---|
2030 | * @{ */
|
---|
2031 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
|
---|
2032 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
|
---|
2033 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpcklbw_u128, iemAImpl_vpunpcklbw_u128_fallback,
|
---|
2034 | iemAImpl_vpunpcklwd_u128, iemAImpl_vpunpcklwd_u128_fallback,
|
---|
2035 | iemAImpl_vpunpckldq_u128, iemAImpl_vpunpckldq_u128_fallback,
|
---|
2036 | iemAImpl_vpunpcklqdq_u128, iemAImpl_vpunpcklqdq_u128_fallback,
|
---|
2037 | iemAImpl_vunpcklps_u128, iemAImpl_vunpcklps_u128_fallback,
|
---|
2038 | iemAImpl_vunpcklpd_u128, iemAImpl_vunpcklpd_u128_fallback,
|
---|
2039 | iemAImpl_vunpckhps_u128, iemAImpl_vunpckhps_u128_fallback,
|
---|
2040 | iemAImpl_vunpckhpd_u128, iemAImpl_vunpckhpd_u128_fallback;
|
---|
2041 |
|
---|
2042 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpcklbw_u256, iemAImpl_vpunpcklbw_u256_fallback,
|
---|
2043 | iemAImpl_vpunpcklwd_u256, iemAImpl_vpunpcklwd_u256_fallback,
|
---|
2044 | iemAImpl_vpunpckldq_u256, iemAImpl_vpunpckldq_u256_fallback,
|
---|
2045 | iemAImpl_vpunpcklqdq_u256, iemAImpl_vpunpcklqdq_u256_fallback,
|
---|
2046 | iemAImpl_vunpcklps_u256, iemAImpl_vunpcklps_u256_fallback,
|
---|
2047 | iemAImpl_vunpcklpd_u256, iemAImpl_vunpcklpd_u256_fallback,
|
---|
2048 | iemAImpl_vunpckhps_u256, iemAImpl_vunpckhps_u256_fallback,
|
---|
2049 | iemAImpl_vunpckhpd_u256, iemAImpl_vunpckhpd_u256_fallback;
|
---|
2050 | /** @} */
|
---|
2051 |
|
---|
2052 | /** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
|
---|
2053 | * @{ */
|
---|
2054 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
|
---|
2055 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
|
---|
2056 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpckhbw_u128, iemAImpl_vpunpckhbw_u128_fallback,
|
---|
2057 | iemAImpl_vpunpckhwd_u128, iemAImpl_vpunpckhwd_u128_fallback,
|
---|
2058 | iemAImpl_vpunpckhdq_u128, iemAImpl_vpunpckhdq_u128_fallback,
|
---|
2059 | iemAImpl_vpunpckhqdq_u128, iemAImpl_vpunpckhqdq_u128_fallback;
|
---|
2060 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpckhbw_u256, iemAImpl_vpunpckhbw_u256_fallback,
|
---|
2061 | iemAImpl_vpunpckhwd_u256, iemAImpl_vpunpckhwd_u256_fallback,
|
---|
2062 | iemAImpl_vpunpckhdq_u256, iemAImpl_vpunpckhdq_u256_fallback,
|
---|
2063 | iemAImpl_vpunpckhqdq_u256, iemAImpl_vpunpckhqdq_u256_fallback;
|
---|
2064 | /** @} */
|
---|
2065 |
|
---|
2066 | /** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
|
---|
2067 | * @{ */
|
---|
2068 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2069 | typedef FNIEMAIMPLMEDIAPSHUFU128 *PFNIEMAIMPLMEDIAPSHUFU128;
|
---|
2070 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU256,(PRTUINT256U puDst, PCRTUINT256U puSrc, uint8_t bEvil));
|
---|
2071 | typedef FNIEMAIMPLMEDIAPSHUFU256 *PFNIEMAIMPLMEDIAPSHUFU256;
|
---|
2072 | IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw_u64,(uint64_t *puDst, uint64_t const *puSrc, uint8_t bEvil));
|
---|
2073 | FNIEMAIMPLMEDIAPSHUFU128 iemAImpl_pshufhw_u128, iemAImpl_pshuflw_u128, iemAImpl_pshufd_u128;
|
---|
2074 | #ifndef IEM_WITHOUT_ASSEMBLY
|
---|
2075 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256, iemAImpl_vpshuflw_u256, iemAImpl_vpshufd_u256;
|
---|
2076 | #endif
|
---|
2077 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256_fallback, iemAImpl_vpshuflw_u256_fallback, iemAImpl_vpshufd_u256_fallback;
|
---|
2078 | /** @} */
|
---|
2079 |
|
---|
2080 | /** @name Media (SSE/MMX/AVX) operation: Shift Immediate Stuff (evil)
|
---|
2081 | * @{ */
|
---|
2082 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU64,(uint64_t *puDst, uint8_t bShift));
|
---|
2083 | typedef FNIEMAIMPLMEDIAPSHIFTU64 *PFNIEMAIMPLMEDIAPSHIFTU64;
|
---|
2084 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU128,(PRTUINT128U puDst, uint8_t bShift));
|
---|
2085 | typedef FNIEMAIMPLMEDIAPSHIFTU128 *PFNIEMAIMPLMEDIAPSHIFTU128;
|
---|
2086 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU256,(PRTUINT256U puDst, uint8_t bShift));
|
---|
2087 | typedef FNIEMAIMPLMEDIAPSHIFTU256 *PFNIEMAIMPLMEDIAPSHIFTU256;
|
---|
2088 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psllw_imm_u64, iemAImpl_pslld_imm_u64, iemAImpl_psllq_imm_u64;
|
---|
2089 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psrlw_imm_u64, iemAImpl_psrld_imm_u64, iemAImpl_psrlq_imm_u64;
|
---|
2090 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psraw_imm_u64, iemAImpl_psrad_imm_u64;
|
---|
2091 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psllw_imm_u128, iemAImpl_pslld_imm_u128, iemAImpl_psllq_imm_u128;
|
---|
2092 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psrlw_imm_u128, iemAImpl_psrld_imm_u128, iemAImpl_psrlq_imm_u128;
|
---|
2093 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psraw_imm_u128, iemAImpl_psrad_imm_u128;
|
---|
2094 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_pslldq_imm_u128, iemAImpl_psrldq_imm_u128;
|
---|
2095 | /** @} */
|
---|
2096 |
|
---|
2097 | /** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
|
---|
2098 | * @{ */
|
---|
2099 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(uint64_t *pu64Dst, uint64_t const *puSrc));
|
---|
2100 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(uint64_t *pu64Dst, PCRTUINT128U puSrc));
|
---|
2101 | #ifndef IEM_WITHOUT_ASSEMBLY
|
---|
2102 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
---|
2103 | #endif
|
---|
2104 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256_fallback,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
---|
2105 | /** @} */
|
---|
2106 |
|
---|
2107 | /** @name Media (SSE/MMX/AVX) operations: Variable Blend Packed Bytes/R32/R64.
|
---|
2108 | * @{ */
|
---|
2109 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puMask));
|
---|
2110 | typedef FNIEMAIMPLBLENDU128 *PFNIEMAIMPLBLENDU128;
|
---|
2111 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, PCRTUINT128U puMask));
|
---|
2112 | typedef FNIEMAIMPLAVXBLENDU128 *PFNIEMAIMPLAVXBLENDU128;
|
---|
2113 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, PCRTUINT256U puMask));
|
---|
2114 | typedef FNIEMAIMPLAVXBLENDU256 *PFNIEMAIMPLAVXBLENDU256;
|
---|
2115 |
|
---|
2116 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128;
|
---|
2117 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128_fallback;
|
---|
2118 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128;
|
---|
2119 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128_fallback;
|
---|
2120 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256;
|
---|
2121 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256_fallback;
|
---|
2122 |
|
---|
2123 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128;
|
---|
2124 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128_fallback;
|
---|
2125 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128;
|
---|
2126 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128_fallback;
|
---|
2127 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256;
|
---|
2128 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256_fallback;
|
---|
2129 |
|
---|
2130 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128;
|
---|
2131 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128_fallback;
|
---|
2132 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128;
|
---|
2133 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128_fallback;
|
---|
2134 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256;
|
---|
2135 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256_fallback;
|
---|
2136 | /** @} */
|
---|
2137 |
|
---|
2138 |
|
---|
2139 | /** @name Media (SSE/MMX/AVX) operation: Sort this later
|
---|
2140 | * @{ */
|
---|
2141 | IEM_DECL_IMPL_DEF(void, iemAImpl_movsldup,(PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
2142 | IEM_DECL_IMPL_DEF(void, iemAImpl_movshdup,(PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
2143 | IEM_DECL_IMPL_DEF(void, iemAImpl_movddup,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2144 |
|
---|
2145 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2146 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2147 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2148 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2149 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2150 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2151 |
|
---|
2152 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2153 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2154 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2155 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2156 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2157 |
|
---|
2158 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2159 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2160 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2161 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2162 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2163 |
|
---|
2164 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2165 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2166 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2167 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2168 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2169 |
|
---|
2170 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2171 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2172 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2173 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2174 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2175 |
|
---|
2176 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2177 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2178 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2179 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2180 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2181 |
|
---|
2182 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2183 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2184 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2185 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2186 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2187 |
|
---|
2188 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2189 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2190 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2191 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2192 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2193 |
|
---|
2194 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2195 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2196 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2197 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2198 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2199 |
|
---|
2200 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2201 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2202 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2203 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2204 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2205 |
|
---|
2206 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2207 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2208 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2209 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2210 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2211 |
|
---|
2212 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2213 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2214 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2215 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2216 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2217 |
|
---|
2218 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2219 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2220 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2221 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2222 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2223 |
|
---|
2224 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2225 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2226 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2227 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2228 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2229 |
|
---|
2230 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2231 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2232 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2233 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2234 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2235 |
|
---|
2236 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2237 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64_fallback,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2238 |
|
---|
2239 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u64,(uint64_t *pu64Dst, uint16_t u16Src, uint8_t bEvil));
|
---|
2240 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u128,(PRTUINT128U puDst, uint16_t u16Src, uint8_t bEvil));
|
---|
2241 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
---|
2242 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
---|
2243 |
|
---|
2244 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u64,(uint16_t *pu16Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2245 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2246 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2247 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128_fallback,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2248 |
|
---|
2249 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2250 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2251 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2252 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2253 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2254 |
|
---|
2255 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2256 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2257 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2258 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2259 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2260 |
|
---|
2261 |
|
---|
2262 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2263 | typedef FNIEMAIMPLMEDIAOPTF2U128IMM8 *PFNIEMAIMPLMEDIAOPTF2U128IMM8;
|
---|
2264 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2265 | typedef FNIEMAIMPLMEDIAOPTF3U128IMM8 *PFNIEMAIMPLMEDIAOPTF3U128IMM8;
|
---|
2266 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256IMM8,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2267 | typedef FNIEMAIMPLMEDIAOPTF3U256IMM8 *PFNIEMAIMPLMEDIAOPTF3U256IMM8;
|
---|
2268 |
|
---|
2269 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_palignr_u128, iemAImpl_palignr_u128_fallback;
|
---|
2270 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pblendw_u128, iemAImpl_pblendw_u128_fallback;
|
---|
2271 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendps_u128, iemAImpl_blendps_u128_fallback;
|
---|
2272 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendpd_u128, iemAImpl_blendpd_u128_fallback;
|
---|
2273 |
|
---|
2274 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpalignr_u128, iemAImpl_vpalignr_u128_fallback;
|
---|
2275 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpblendw_u128, iemAImpl_vpblendw_u128_fallback;
|
---|
2276 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendps_u128, iemAImpl_vblendps_u128_fallback;
|
---|
2277 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendpd_u128, iemAImpl_vblendpd_u128_fallback;
|
---|
2278 |
|
---|
2279 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpalignr_u256, iemAImpl_vpalignr_u256_fallback;
|
---|
2280 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpblendw_u256, iemAImpl_vpblendw_u256_fallback;
|
---|
2281 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendps_u256, iemAImpl_vblendps_u256_fallback;
|
---|
2282 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendpd_u256, iemAImpl_vblendpd_u256_fallback;
|
---|
2283 |
|
---|
2284 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesimc_u128, iemAImpl_aesimc_u128_fallback;
|
---|
2285 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenc_u128, iemAImpl_aesenc_u128_fallback;
|
---|
2286 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenclast_u128, iemAImpl_aesenclast_u128_fallback;
|
---|
2287 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdec_u128, iemAImpl_aesdec_u128_fallback;
|
---|
2288 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdeclast_u128, iemAImpl_aesdeclast_u128_fallback;
|
---|
2289 |
|
---|
2290 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesimc_u128, iemAImpl_vaesimc_u128_fallback;
|
---|
2291 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenc_u128, iemAImpl_vaesenc_u128_fallback;
|
---|
2292 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenclast_u128, iemAImpl_vaesenclast_u128_fallback;
|
---|
2293 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdec_u128, iemAImpl_vaesdec_u128_fallback;
|
---|
2294 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdeclast_u128, iemAImpl_vaesdeclast_u128_fallback;
|
---|
2295 |
|
---|
2296 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_aeskeygenassist_u128, iemAImpl_aeskeygenassist_u128_fallback;
|
---|
2297 |
|
---|
2298 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vaeskeygenassist_u128, iemAImpl_vaeskeygenassist_u128_fallback;
|
---|
2299 |
|
---|
2300 |
|
---|
2301 | typedef struct IEMPCMPISTRISRC
|
---|
2302 | {
|
---|
2303 | RTUINT128U uSrc1;
|
---|
2304 | RTUINT128U uSrc2;
|
---|
2305 | } IEMPCMPISTRISRC;
|
---|
2306 | typedef IEMPCMPISTRISRC *PIEMPCMPISTRISRC;
|
---|
2307 | typedef const IEMPCMPISTRISRC *PCIEMPCMPISTRISRC;
|
---|
2308 |
|
---|
2309 | IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRISRC pSrc, uint8_t bEvil));
|
---|
2310 | IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRISRC pSrc, uint8_t bEvil));
|
---|
2311 |
|
---|
2312 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pclmulqdq_u128, iemAImpl_pclmulqdq_u128_fallback;
|
---|
2313 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpclmulqdq_u128, iemAImpl_vpclmulqdq_u128_fallback;
|
---|
2314 | /** @} */
|
---|
2315 |
|
---|
2316 | /** @name Media Odds and Ends
|
---|
2317 | * @{ */
|
---|
2318 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U8,(uint32_t *puDst, uint8_t uSrc));
|
---|
2319 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U16,(uint32_t *puDst, uint16_t uSrc));
|
---|
2320 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U32,(uint32_t *puDst, uint32_t uSrc));
|
---|
2321 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U64,(uint32_t *puDst, uint64_t uSrc));
|
---|
2322 | FNIEMAIMPLCR32U8 iemAImpl_crc32_u8, iemAImpl_crc32_u8_fallback;
|
---|
2323 | FNIEMAIMPLCR32U16 iemAImpl_crc32_u16, iemAImpl_crc32_u16_fallback;
|
---|
2324 | FNIEMAIMPLCR32U32 iemAImpl_crc32_u32, iemAImpl_crc32_u32_fallback;
|
---|
2325 | FNIEMAIMPLCR32U64 iemAImpl_crc32_u64, iemAImpl_crc32_u64_fallback;
|
---|
2326 |
|
---|
2327 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL128,(PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint32_t *pEFlags));
|
---|
2328 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL256,(PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint32_t *pEFlags));
|
---|
2329 | FNIEMAIMPLF2EFL128 iemAImpl_ptest_u128;
|
---|
2330 | FNIEMAIMPLF2EFL256 iemAImpl_vptest_u256, iemAImpl_vptest_u256_fallback;
|
---|
2331 |
|
---|
2332 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
---|
2333 | typedef FNIEMAIMPLSSEF2I32U64 *PFNIEMAIMPLSSEF2I32U64;
|
---|
2334 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
---|
2335 | typedef FNIEMAIMPLSSEF2I64U64 *PFNIEMAIMPLSSEF2I64U64;
|
---|
2336 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
---|
2337 | typedef FNIEMAIMPLSSEF2I32U32 *PFNIEMAIMPLSSEF2I32U32;
|
---|
2338 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
---|
2339 | typedef FNIEMAIMPLSSEF2I64U32 *PFNIEMAIMPLSSEF2I64U32;
|
---|
2340 |
|
---|
2341 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvttsd2si_i32_r64;
|
---|
2342 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvtsd2si_i32_r64;
|
---|
2343 |
|
---|
2344 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvttsd2si_i64_r64;
|
---|
2345 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvtsd2si_i64_r64;
|
---|
2346 |
|
---|
2347 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvttss2si_i32_r32;
|
---|
2348 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvtss2si_i32_r32;
|
---|
2349 |
|
---|
2350 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvttss2si_i64_r32;
|
---|
2351 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvtss2si_i64_r32;
|
---|
2352 |
|
---|
2353 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int32_t *pi32Src));
|
---|
2354 | typedef FNIEMAIMPLSSEF2R32I32 *PFNIEMAIMPLSSEF2R32I32;
|
---|
2355 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int64_t *pi64Src));
|
---|
2356 | typedef FNIEMAIMPLSSEF2R32I64 *PFNIEMAIMPLSSEF2R32I64;
|
---|
2357 |
|
---|
2358 | FNIEMAIMPLSSEF2R32I32 iemAImpl_cvtsi2ss_r32_i32;
|
---|
2359 | FNIEMAIMPLSSEF2R32I64 iemAImpl_cvtsi2ss_r32_i64;
|
---|
2360 |
|
---|
2361 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int32_t *pi32Src));
|
---|
2362 | typedef FNIEMAIMPLSSEF2R64I32 *PFNIEMAIMPLSSEF2R64I32;
|
---|
2363 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int64_t *pi64Src));
|
---|
2364 | typedef FNIEMAIMPLSSEF2R64I64 *PFNIEMAIMPLSSEF2R64I64;
|
---|
2365 |
|
---|
2366 | FNIEMAIMPLSSEF2R64I32 iemAImpl_cvtsi2sd_r64_i32;
|
---|
2367 | FNIEMAIMPLSSEF2R64I64 iemAImpl_cvtsi2sd_r64_i64;
|
---|
2368 |
|
---|
2369 |
|
---|
2370 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFLMXCSR128,(uint32_t *pfMxcsr, uint32_t *pfEFlags, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
2371 | typedef FNIEMAIMPLF2EFLMXCSR128 *PFNIEMAIMPLF2EFLMXCSR128;
|
---|
2372 |
|
---|
2373 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomiss_u128;
|
---|
2374 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomiss_u128, iemAImpl_vucomiss_u128_fallback;
|
---|
2375 |
|
---|
2376 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomisd_u128;
|
---|
2377 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomisd_u128, iemAImpl_vucomisd_u128_fallback;
|
---|
2378 |
|
---|
2379 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comiss_u128;
|
---|
2380 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomiss_u128, iemAImpl_vcomiss_u128_fallback;
|
---|
2381 |
|
---|
2382 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comisd_u128;
|
---|
2383 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomisd_u128, iemAImpl_vcomisd_u128_fallback;
|
---|
2384 |
|
---|
2385 |
|
---|
2386 | typedef struct IEMMEDIAF2XMMSRC
|
---|
2387 | {
|
---|
2388 | X86XMMREG uSrc1;
|
---|
2389 | X86XMMREG uSrc2;
|
---|
2390 | } IEMMEDIAF2XMMSRC;
|
---|
2391 | typedef IEMMEDIAF2XMMSRC *PIEMMEDIAF2XMMSRC;
|
---|
2392 | typedef const IEMMEDIAF2XMMSRC *PCIEMMEDIAF2XMMSRC;
|
---|
2393 |
|
---|
2394 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRF2XMMIMM8,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC puSrc, uint8_t bEvil));
|
---|
2395 | typedef FNIEMAIMPLMXCSRF2XMMIMM8 *PFNIEMAIMPLMXCSRF2XMMIMM8;
|
---|
2396 |
|
---|
2397 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpps_u128;
|
---|
2398 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmppd_u128;
|
---|
2399 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpss_u128;
|
---|
2400 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpsd_u128;
|
---|
2401 |
|
---|
2402 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U128,(uint32_t *pfMxcsr, uint64_t *pu64Dst, PCX86XMMREG pSrc));
|
---|
2403 | typedef FNIEMAIMPLMXCSRU64U128 *PFNIEMAIMPLMXCSRU64U128;
|
---|
2404 |
|
---|
2405 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvtpd2pi_u128;
|
---|
2406 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvttpd2pi_u128;
|
---|
2407 |
|
---|
2408 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU128U64,(uint32_t *pfMxcsr, PX86XMMREG pDst, uint64_t u64Src));
|
---|
2409 | typedef FNIEMAIMPLMXCSRU128U64 *PFNIEMAIMPLMXCSRU128U64;
|
---|
2410 |
|
---|
2411 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2ps_u128;
|
---|
2412 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2pd_u128;
|
---|
2413 |
|
---|
2414 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U64,(uint32_t *pfMxcsr, uint64_t *pu64Dst, uint64_t u64Src));
|
---|
2415 | typedef FNIEMAIMPLMXCSRU64U64 *PFNIEMAIMPLMXCSRU64U64;
|
---|
2416 |
|
---|
2417 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvtps2pi_u128;
|
---|
2418 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvttps2pi_u128;
|
---|
2419 |
|
---|
2420 | /** @} */
|
---|
2421 |
|
---|
2422 |
|
---|
2423 | /** @name Function tables.
|
---|
2424 | * @{
|
---|
2425 | */
|
---|
2426 |
|
---|
2427 | /**
|
---|
2428 | * Function table for a binary operator providing implementation based on
|
---|
2429 | * operand size.
|
---|
2430 | */
|
---|
2431 | typedef struct IEMOPBINSIZES
|
---|
2432 | {
|
---|
2433 | PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
|
---|
2434 | PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
|
---|
2435 | PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
|
---|
2436 | PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
|
---|
2437 | } IEMOPBINSIZES;
|
---|
2438 | /** Pointer to a binary operator function table. */
|
---|
2439 | typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
|
---|
2440 |
|
---|
2441 |
|
---|
2442 | /**
|
---|
2443 | * Function table for a unary operator providing implementation based on
|
---|
2444 | * operand size.
|
---|
2445 | */
|
---|
2446 | typedef struct IEMOPUNARYSIZES
|
---|
2447 | {
|
---|
2448 | PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
|
---|
2449 | PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
|
---|
2450 | PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
|
---|
2451 | PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
|
---|
2452 | } IEMOPUNARYSIZES;
|
---|
2453 | /** Pointer to a unary operator function table. */
|
---|
2454 | typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
|
---|
2455 |
|
---|
2456 |
|
---|
2457 | /**
|
---|
2458 | * Function table for a shift operator providing implementation based on
|
---|
2459 | * operand size.
|
---|
2460 | */
|
---|
2461 | typedef struct IEMOPSHIFTSIZES
|
---|
2462 | {
|
---|
2463 | PFNIEMAIMPLSHIFTU8 pfnNormalU8;
|
---|
2464 | PFNIEMAIMPLSHIFTU16 pfnNormalU16;
|
---|
2465 | PFNIEMAIMPLSHIFTU32 pfnNormalU32;
|
---|
2466 | PFNIEMAIMPLSHIFTU64 pfnNormalU64;
|
---|
2467 | } IEMOPSHIFTSIZES;
|
---|
2468 | /** Pointer to a shift operator function table. */
|
---|
2469 | typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
|
---|
2470 |
|
---|
2471 |
|
---|
2472 | /**
|
---|
2473 | * Function table for a multiplication or division operation.
|
---|
2474 | */
|
---|
2475 | typedef struct IEMOPMULDIVSIZES
|
---|
2476 | {
|
---|
2477 | PFNIEMAIMPLMULDIVU8 pfnU8;
|
---|
2478 | PFNIEMAIMPLMULDIVU16 pfnU16;
|
---|
2479 | PFNIEMAIMPLMULDIVU32 pfnU32;
|
---|
2480 | PFNIEMAIMPLMULDIVU64 pfnU64;
|
---|
2481 | } IEMOPMULDIVSIZES;
|
---|
2482 | /** Pointer to a multiplication or division operation function table. */
|
---|
2483 | typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
|
---|
2484 |
|
---|
2485 |
|
---|
2486 | /**
|
---|
2487 | * Function table for a double precision shift operator providing implementation
|
---|
2488 | * based on operand size.
|
---|
2489 | */
|
---|
2490 | typedef struct IEMOPSHIFTDBLSIZES
|
---|
2491 | {
|
---|
2492 | PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
|
---|
2493 | PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
|
---|
2494 | PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
|
---|
2495 | } IEMOPSHIFTDBLSIZES;
|
---|
2496 | /** Pointer to a double precision shift function table. */
|
---|
2497 | typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
|
---|
2498 |
|
---|
2499 |
|
---|
2500 | /**
|
---|
2501 | * Function table for media instruction taking two full sized media source
|
---|
2502 | * registers and one full sized destination register (AVX).
|
---|
2503 | */
|
---|
2504 | typedef struct IEMOPMEDIAF3
|
---|
2505 | {
|
---|
2506 | PFNIEMAIMPLMEDIAF3U128 pfnU128;
|
---|
2507 | PFNIEMAIMPLMEDIAF3U256 pfnU256;
|
---|
2508 | } IEMOPMEDIAF3;
|
---|
2509 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
2510 | typedef IEMOPMEDIAF3 const *PCIEMOPMEDIAF3;
|
---|
2511 |
|
---|
2512 | /** @def IEMOPMEDIAF3_INIT_VARS_EX
|
---|
2513 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
2514 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
2515 | * functions are only used once and the function table need not be public. */
|
---|
2516 | #ifndef TST_IEM_CHECK_MC
|
---|
2517 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
2518 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2519 | static IEMOPMEDIAF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
2520 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2521 | # else
|
---|
2522 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2523 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2524 | # endif
|
---|
2525 | #else
|
---|
2526 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
2527 | #endif
|
---|
2528 | /** @def IEMOPMEDIAF3_INIT_VARS
|
---|
2529 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
2530 | * @sa IEMOPMEDIAF3_INIT_VARS_EX */
|
---|
2531 | #define IEMOPMEDIAF3_INIT_VARS(a_InstrNm) \
|
---|
2532 | IEMOPMEDIAF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
2533 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
2534 |
|
---|
2535 | /**
|
---|
2536 | * Function table for media instruction taking two full sized media source
|
---|
2537 | * registers and one full sized destination register, but no additional state
|
---|
2538 | * (AVX).
|
---|
2539 | */
|
---|
2540 | typedef struct IEMOPMEDIAOPTF3
|
---|
2541 | {
|
---|
2542 | PFNIEMAIMPLMEDIAOPTF3U128 pfnU128;
|
---|
2543 | PFNIEMAIMPLMEDIAOPTF3U256 pfnU256;
|
---|
2544 | } IEMOPMEDIAOPTF3;
|
---|
2545 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
2546 | typedef IEMOPMEDIAOPTF3 const *PCIEMOPMEDIAOPTF3;
|
---|
2547 |
|
---|
2548 | /** @def IEMOPMEDIAOPTF3_INIT_VARS_EX
|
---|
2549 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
2550 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
2551 | * functions are only used once and the function table need not be public. */
|
---|
2552 | #ifndef TST_IEM_CHECK_MC
|
---|
2553 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
2554 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2555 | static IEMOPMEDIAOPTF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
2556 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2557 | # else
|
---|
2558 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2559 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2560 | # endif
|
---|
2561 | #else
|
---|
2562 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
2563 | #endif
|
---|
2564 | /** @def IEMOPMEDIAOPTF3_INIT_VARS
|
---|
2565 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
2566 | * @sa IEMOPMEDIAOPTF3_INIT_VARS_EX */
|
---|
2567 | #define IEMOPMEDIAOPTF3_INIT_VARS(a_InstrNm) \
|
---|
2568 | IEMOPMEDIAOPTF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
2569 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
2570 |
|
---|
2571 | /**
|
---|
2572 | * Function table for media instruction taking one full sized media source
|
---|
2573 | * registers and one full sized destination register, but no additional state
|
---|
2574 | * (AVX).
|
---|
2575 | */
|
---|
2576 | typedef struct IEMOPMEDIAOPTF2
|
---|
2577 | {
|
---|
2578 | PFNIEMAIMPLMEDIAOPTF2U128 pfnU128;
|
---|
2579 | PFNIEMAIMPLMEDIAOPTF2U256 pfnU256;
|
---|
2580 | } IEMOPMEDIAOPTF2;
|
---|
2581 | /** Pointer to a media operation function table for 2 full sized ops (AVX). */
|
---|
2582 | typedef IEMOPMEDIAOPTF2 const *PCIEMOPMEDIAOPTF2;
|
---|
2583 |
|
---|
2584 | /** @def IEMOPMEDIAOPTF2_INIT_VARS_EX
|
---|
2585 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
2586 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
2587 | * functions are only used once and the function table need not be public. */
|
---|
2588 | #ifndef TST_IEM_CHECK_MC
|
---|
2589 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
2590 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2591 | static IEMOPMEDIAOPTF2 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
2592 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2593 | # else
|
---|
2594 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2595 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2596 | # endif
|
---|
2597 | #else
|
---|
2598 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
2599 | #endif
|
---|
2600 | /** @def IEMOPMEDIAOPTF2_INIT_VARS
|
---|
2601 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
2602 | * @sa IEMOPMEDIAOPTF2_INIT_VARS_EX */
|
---|
2603 | #define IEMOPMEDIAOPTF2_INIT_VARS(a_InstrNm) \
|
---|
2604 | IEMOPMEDIAOPTF2_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
2605 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
2606 |
|
---|
2607 | /**
|
---|
2608 | * Function table for media instruction taking two full sized media source
|
---|
2609 | * registers and one full sized destination register and an 8-bit immediate, but no additional state
|
---|
2610 | * (AVX).
|
---|
2611 | */
|
---|
2612 | typedef struct IEMOPMEDIAOPTF3IMM8
|
---|
2613 | {
|
---|
2614 | PFNIEMAIMPLMEDIAOPTF3U128IMM8 pfnU128;
|
---|
2615 | PFNIEMAIMPLMEDIAOPTF3U256IMM8 pfnU256;
|
---|
2616 | } IEMOPMEDIAOPTF3IMM8;
|
---|
2617 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
2618 | typedef IEMOPMEDIAOPTF3IMM8 const *PCIEMOPMEDIAOPTF3IMM8;
|
---|
2619 |
|
---|
2620 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX
|
---|
2621 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
2622 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
2623 | * functions are only used once and the function table need not be public. */
|
---|
2624 | #ifndef TST_IEM_CHECK_MC
|
---|
2625 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
2626 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2627 | static IEMOPMEDIAOPTF3IMM8 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
2628 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2629 | # else
|
---|
2630 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2631 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2632 | # endif
|
---|
2633 | #else
|
---|
2634 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
2635 | #endif
|
---|
2636 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS
|
---|
2637 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
2638 | * @sa IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX */
|
---|
2639 | #define IEMOPMEDIAOPTF3IMM8_INIT_VARS(a_InstrNm) \
|
---|
2640 | IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
2641 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
2642 | /** @} */
|
---|
2643 |
|
---|
2644 |
|
---|
2645 | /**
|
---|
2646 | * Function table for blend type instruction taking three full sized media source
|
---|
2647 | * registers and one full sized destination register, but no additional state
|
---|
2648 | * (AVX).
|
---|
2649 | */
|
---|
2650 | typedef struct IEMOPBLENDOP
|
---|
2651 | {
|
---|
2652 | PFNIEMAIMPLAVXBLENDU128 pfnU128;
|
---|
2653 | PFNIEMAIMPLAVXBLENDU256 pfnU256;
|
---|
2654 | } IEMOPBLENDOP;
|
---|
2655 | /** Pointer to a media operation function table for 4 full sized ops (AVX). */
|
---|
2656 | typedef IEMOPBLENDOP const *PCIEMOPBLENDOP;
|
---|
2657 |
|
---|
2658 | /** @def IEMOPBLENDOP_INIT_VARS_EX
|
---|
2659 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
2660 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
2661 | * functions are only used once and the function table need not be public. */
|
---|
2662 | #ifndef TST_IEM_CHECK_MC
|
---|
2663 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
2664 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2665 | static IEMOPBLENDOP const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
2666 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2667 | # else
|
---|
2668 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
2669 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
2670 | # endif
|
---|
2671 | #else
|
---|
2672 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
2673 | #endif
|
---|
2674 | /** @def IEMOPBLENDOP_INIT_VARS
|
---|
2675 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
2676 | * @sa IEMOPBLENDOP_INIT_VARS_EX */
|
---|
2677 | #define IEMOPBLENDOP_INIT_VARS(a_InstrNm) \
|
---|
2678 | IEMOPBLENDOP_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
2679 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
2680 |
|
---|
2681 |
|
---|
2682 | /** @name SSE/AVX single/double precision floating point operations.
|
---|
2683 | * @{ */
|
---|
2684 | /**
|
---|
2685 | * A SSE result.
|
---|
2686 | */
|
---|
2687 | typedef struct IEMSSERESULT
|
---|
2688 | {
|
---|
2689 | /** The output value. */
|
---|
2690 | X86XMMREG uResult;
|
---|
2691 | /** The output status. */
|
---|
2692 | uint32_t MXCSR;
|
---|
2693 | } IEMSSERESULT;
|
---|
2694 | AssertCompileMemberOffset(IEMSSERESULT, MXCSR, 128 / 8);
|
---|
2695 | /** Pointer to a SSE result. */
|
---|
2696 | typedef IEMSSERESULT *PIEMSSERESULT;
|
---|
2697 | /** Pointer to a const SSE result. */
|
---|
2698 | typedef IEMSSERESULT const *PCIEMSSERESULT;
|
---|
2699 |
|
---|
2700 |
|
---|
2701 | /**
|
---|
2702 | * A AVX128 result.
|
---|
2703 | */
|
---|
2704 | typedef struct IEMAVX128RESULT
|
---|
2705 | {
|
---|
2706 | /** The output value. */
|
---|
2707 | X86XMMREG uResult;
|
---|
2708 | /** The output status. */
|
---|
2709 | uint32_t MXCSR;
|
---|
2710 | } IEMAVX128RESULT;
|
---|
2711 | AssertCompileMemberOffset(IEMAVX128RESULT, MXCSR, 128 / 8);
|
---|
2712 | /** Pointer to a AVX128 result. */
|
---|
2713 | typedef IEMAVX128RESULT *PIEMAVX128RESULT;
|
---|
2714 | /** Pointer to a const AVX128 result. */
|
---|
2715 | typedef IEMAVX128RESULT const *PCIEMAVX128RESULT;
|
---|
2716 |
|
---|
2717 |
|
---|
2718 | /**
|
---|
2719 | * A AVX256 result.
|
---|
2720 | */
|
---|
2721 | typedef struct IEMAVX256RESULT
|
---|
2722 | {
|
---|
2723 | /** The output value. */
|
---|
2724 | X86YMMREG uResult;
|
---|
2725 | /** The output status. */
|
---|
2726 | uint32_t MXCSR;
|
---|
2727 | } IEMAVX256RESULT;
|
---|
2728 | AssertCompileMemberOffset(IEMAVX256RESULT, MXCSR, 256 / 8);
|
---|
2729 | /** Pointer to a AVX256 result. */
|
---|
2730 | typedef IEMAVX256RESULT *PIEMAVX256RESULT;
|
---|
2731 | /** Pointer to a const AVX256 result. */
|
---|
2732 | typedef IEMAVX256RESULT const *PCIEMAVX256RESULT;
|
---|
2733 |
|
---|
2734 |
|
---|
2735 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
2736 | typedef FNIEMAIMPLFPSSEF2U128 *PFNIEMAIMPLFPSSEF2U128;
|
---|
2737 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R32,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
---|
2738 | typedef FNIEMAIMPLFPSSEF2U128R32 *PFNIEMAIMPLFPSSEF2U128R32;
|
---|
2739 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R64,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
---|
2740 | typedef FNIEMAIMPLFPSSEF2U128R64 *PFNIEMAIMPLFPSSEF2U128R64;
|
---|
2741 |
|
---|
2742 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
2743 | typedef FNIEMAIMPLFPAVXF3U128 *PFNIEMAIMPLFPAVXF3U128;
|
---|
2744 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R32,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
---|
2745 | typedef FNIEMAIMPLFPAVXF3U128R32 *PFNIEMAIMPLFPAVXF3U128R32;
|
---|
2746 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R64,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
---|
2747 | typedef FNIEMAIMPLFPAVXF3U128R64 *PFNIEMAIMPLFPAVXF3U128R64;
|
---|
2748 |
|
---|
2749 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U256,(PX86XSAVEAREA pExtState, PIEMAVX256RESULT pResult, PCX86YMMREG puSrc1, PCX86YMMREG puSrc2));
|
---|
2750 | typedef FNIEMAIMPLFPAVXF3U256 *PFNIEMAIMPLFPAVXF3U256;
|
---|
2751 |
|
---|
2752 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addps_u128;
|
---|
2753 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addpd_u128;
|
---|
2754 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulps_u128;
|
---|
2755 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulpd_u128;
|
---|
2756 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subps_u128;
|
---|
2757 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subpd_u128;
|
---|
2758 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minps_u128;
|
---|
2759 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minpd_u128;
|
---|
2760 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divps_u128;
|
---|
2761 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divpd_u128;
|
---|
2762 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxps_u128;
|
---|
2763 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxpd_u128;
|
---|
2764 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddps_u128;
|
---|
2765 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddpd_u128;
|
---|
2766 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubps_u128;
|
---|
2767 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubpd_u128;
|
---|
2768 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtps_u128;
|
---|
2769 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtpd_u128;
|
---|
2770 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubps_u128;
|
---|
2771 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubpd_u128;
|
---|
2772 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2ps_u128;
|
---|
2773 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2pd_u128;
|
---|
2774 |
|
---|
2775 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2ps_u128;
|
---|
2776 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2dq_u128;
|
---|
2777 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttps2dq_u128;
|
---|
2778 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttpd2dq_u128;
|
---|
2779 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2pd_u128;
|
---|
2780 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2dq_u128;
|
---|
2781 |
|
---|
2782 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_addss_u128_r32;
|
---|
2783 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_addsd_u128_r64;
|
---|
2784 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_mulss_u128_r32;
|
---|
2785 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_mulsd_u128_r64;
|
---|
2786 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_subss_u128_r32;
|
---|
2787 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_subsd_u128_r64;
|
---|
2788 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_minss_u128_r32;
|
---|
2789 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_minsd_u128_r64;
|
---|
2790 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_divss_u128_r32;
|
---|
2791 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_divsd_u128_r64;
|
---|
2792 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_maxss_u128_r32;
|
---|
2793 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_maxsd_u128_r64;
|
---|
2794 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_cvtss2sd_u128_r32;
|
---|
2795 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_cvtsd2ss_u128_r64;
|
---|
2796 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_sqrtss_u128_r32;
|
---|
2797 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_sqrtsd_u128_r64;
|
---|
2798 |
|
---|
2799 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddps_u128, iemAImpl_vaddps_u128_fallback;
|
---|
2800 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddpd_u128, iemAImpl_vaddpd_u128_fallback;
|
---|
2801 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulps_u128, iemAImpl_vmulps_u128_fallback;
|
---|
2802 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulpd_u128, iemAImpl_vmulpd_u128_fallback;
|
---|
2803 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubps_u128, iemAImpl_vsubps_u128_fallback;
|
---|
2804 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubpd_u128, iemAImpl_vsubpd_u128_fallback;
|
---|
2805 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminps_u128, iemAImpl_vminps_u128_fallback;
|
---|
2806 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminpd_u128, iemAImpl_vminpd_u128_fallback;
|
---|
2807 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivps_u128, iemAImpl_vdivps_u128_fallback;
|
---|
2808 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivpd_u128, iemAImpl_vdivpd_u128_fallback;
|
---|
2809 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxps_u128, iemAImpl_vmaxps_u128_fallback;
|
---|
2810 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxpd_u128, iemAImpl_vmaxpd_u128_fallback;
|
---|
2811 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddps_u128, iemAImpl_vhaddps_u128_fallback;
|
---|
2812 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddpd_u128, iemAImpl_vhaddpd_u128_fallback;
|
---|
2813 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubps_u128, iemAImpl_vhsubps_u128_fallback;
|
---|
2814 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubpd_u128, iemAImpl_vhsubpd_u128_fallback;
|
---|
2815 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtps_u128, iemAImpl_vsqrtps_u128_fallback;
|
---|
2816 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtpd_u128, iemAImpl_vsqrtpd_u128_fallback;
|
---|
2817 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubps_u128, iemAImpl_vaddsubps_u128_fallback;
|
---|
2818 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubpd_u128, iemAImpl_vaddsubpd_u128_fallback;
|
---|
2819 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtpd2ps_u128, iemAImpl_vcvtpd2ps_u128_fallback;
|
---|
2820 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtps2pd_u128, iemAImpl_vcvtps2pd_u128_fallback;
|
---|
2821 |
|
---|
2822 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vaddss_u128_r32, iemAImpl_vaddss_u128_r32_fallback;
|
---|
2823 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vaddsd_u128_r64, iemAImpl_vaddsd_u128_r64_fallback;
|
---|
2824 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmulss_u128_r32, iemAImpl_vmulss_u128_r32_fallback;
|
---|
2825 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmulsd_u128_r64, iemAImpl_vmulsd_u128_r64_fallback;
|
---|
2826 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsubss_u128_r32, iemAImpl_vsubss_u128_r32_fallback;
|
---|
2827 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsubsd_u128_r64, iemAImpl_vsubsd_u128_r64_fallback;
|
---|
2828 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vminss_u128_r32, iemAImpl_vminss_u128_r32_fallback;
|
---|
2829 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vminsd_u128_r64, iemAImpl_vminsd_u128_r64_fallback;
|
---|
2830 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vdivss_u128_r32, iemAImpl_vdivss_u128_r32_fallback;
|
---|
2831 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vdivsd_u128_r64, iemAImpl_vdivsd_u128_r64_fallback;
|
---|
2832 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmaxss_u128_r32, iemAImpl_vmaxss_u128_r32_fallback;
|
---|
2833 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmaxsd_u128_r64, iemAImpl_vmaxsd_u128_r64_fallback;
|
---|
2834 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsqrtss_u128_r32, iemAImpl_vsqrtss_u128_r32_fallback;
|
---|
2835 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsqrtsd_u128_r64, iemAImpl_vsqrtsd_u128_r64_fallback;
|
---|
2836 |
|
---|
2837 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddps_u256, iemAImpl_vaddps_u256_fallback;
|
---|
2838 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddpd_u256, iemAImpl_vaddpd_u256_fallback;
|
---|
2839 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulps_u256, iemAImpl_vmulps_u256_fallback;
|
---|
2840 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulpd_u256, iemAImpl_vmulpd_u256_fallback;
|
---|
2841 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubps_u256, iemAImpl_vsubps_u256_fallback;
|
---|
2842 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubpd_u256, iemAImpl_vsubpd_u256_fallback;
|
---|
2843 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminps_u256, iemAImpl_vminps_u256_fallback;
|
---|
2844 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminpd_u256, iemAImpl_vminpd_u256_fallback;
|
---|
2845 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivps_u256, iemAImpl_vdivps_u256_fallback;
|
---|
2846 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivpd_u256, iemAImpl_vdivpd_u256_fallback;
|
---|
2847 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxps_u256, iemAImpl_vmaxps_u256_fallback;
|
---|
2848 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxpd_u256, iemAImpl_vmaxpd_u256_fallback;
|
---|
2849 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddps_u256, iemAImpl_vhaddps_u256_fallback;
|
---|
2850 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddpd_u256, iemAImpl_vhaddpd_u256_fallback;
|
---|
2851 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubps_u256, iemAImpl_vhsubps_u256_fallback;
|
---|
2852 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubpd_u256, iemAImpl_vhsubpd_u256_fallback;
|
---|
2853 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubps_u256, iemAImpl_vhaddsubps_u256_fallback;
|
---|
2854 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubpd_u256, iemAImpl_vhaddsubpd_u256_fallback;
|
---|
2855 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtpd2ps_u256, iemAImpl_vcvtpd2ps_u256_fallback;
|
---|
2856 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtps2pd_u256, iemAImpl_vcvtps2pd_u256_fallback;
|
---|
2857 | /** @} */
|
---|
2858 |
|
---|
2859 | /** @name C instruction implementations for anything slightly complicated.
|
---|
2860 | * @{ */
|
---|
2861 |
|
---|
2862 | /**
|
---|
2863 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
2864 | * no extra arguments.
|
---|
2865 | *
|
---|
2866 | * @param a_Name The name of the type.
|
---|
2867 | */
|
---|
2868 | # define IEM_CIMPL_DECL_TYPE_0(a_Name) \
|
---|
2869 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
2870 | /**
|
---|
2871 | * For defining a C instruction implementation function taking no extra
|
---|
2872 | * arguments.
|
---|
2873 | *
|
---|
2874 | * @param a_Name The name of the function
|
---|
2875 | */
|
---|
2876 | # define IEM_CIMPL_DEF_0(a_Name) \
|
---|
2877 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
2878 | /**
|
---|
2879 | * Prototype version of IEM_CIMPL_DEF_0.
|
---|
2880 | */
|
---|
2881 | # define IEM_CIMPL_PROTO_0(a_Name) \
|
---|
2882 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
2883 | /**
|
---|
2884 | * For calling a C instruction implementation function taking no extra
|
---|
2885 | * arguments.
|
---|
2886 | *
|
---|
2887 | * This special call macro adds default arguments to the call and allow us to
|
---|
2888 | * change these later.
|
---|
2889 | *
|
---|
2890 | * @param a_fn The name of the function.
|
---|
2891 | */
|
---|
2892 | # define IEM_CIMPL_CALL_0(a_fn) a_fn(pVCpu, cbInstr)
|
---|
2893 |
|
---|
2894 | /**
|
---|
2895 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
2896 | * one extra argument.
|
---|
2897 | *
|
---|
2898 | * @param a_Name The name of the type.
|
---|
2899 | * @param a_Type0 The argument type.
|
---|
2900 | * @param a_Arg0 The argument name.
|
---|
2901 | */
|
---|
2902 | # define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
|
---|
2903 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
2904 | /**
|
---|
2905 | * For defining a C instruction implementation function taking one extra
|
---|
2906 | * argument.
|
---|
2907 | *
|
---|
2908 | * @param a_Name The name of the function
|
---|
2909 | * @param a_Type0 The argument type.
|
---|
2910 | * @param a_Arg0 The argument name.
|
---|
2911 | */
|
---|
2912 | # define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
|
---|
2913 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
2914 | /**
|
---|
2915 | * Prototype version of IEM_CIMPL_DEF_1.
|
---|
2916 | */
|
---|
2917 | # define IEM_CIMPL_PROTO_1(a_Name, a_Type0, a_Arg0) \
|
---|
2918 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
2919 | /**
|
---|
2920 | * For calling a C instruction implementation function taking one extra
|
---|
2921 | * argument.
|
---|
2922 | *
|
---|
2923 | * This special call macro adds default arguments to the call and allow us to
|
---|
2924 | * change these later.
|
---|
2925 | *
|
---|
2926 | * @param a_fn The name of the function.
|
---|
2927 | * @param a0 The name of the 1st argument.
|
---|
2928 | */
|
---|
2929 | # define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pVCpu, cbInstr, (a0))
|
---|
2930 |
|
---|
2931 | /**
|
---|
2932 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
2933 | * two extra arguments.
|
---|
2934 | *
|
---|
2935 | * @param a_Name The name of the type.
|
---|
2936 | * @param a_Type0 The type of the 1st argument
|
---|
2937 | * @param a_Arg0 The name of the 1st argument.
|
---|
2938 | * @param a_Type1 The type of the 2nd argument.
|
---|
2939 | * @param a_Arg1 The name of the 2nd argument.
|
---|
2940 | */
|
---|
2941 | # define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
2942 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
2943 | /**
|
---|
2944 | * For defining a C instruction implementation function taking two extra
|
---|
2945 | * arguments.
|
---|
2946 | *
|
---|
2947 | * @param a_Name The name of the function.
|
---|
2948 | * @param a_Type0 The type of the 1st argument
|
---|
2949 | * @param a_Arg0 The name of the 1st argument.
|
---|
2950 | * @param a_Type1 The type of the 2nd argument.
|
---|
2951 | * @param a_Arg1 The name of the 2nd argument.
|
---|
2952 | */
|
---|
2953 | # define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
2954 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
2955 | /**
|
---|
2956 | * Prototype version of IEM_CIMPL_DEF_2.
|
---|
2957 | */
|
---|
2958 | # define IEM_CIMPL_PROTO_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
2959 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
2960 | /**
|
---|
2961 | * For calling a C instruction implementation function taking two extra
|
---|
2962 | * arguments.
|
---|
2963 | *
|
---|
2964 | * This special call macro adds default arguments to the call and allow us to
|
---|
2965 | * change these later.
|
---|
2966 | *
|
---|
2967 | * @param a_fn The name of the function.
|
---|
2968 | * @param a0 The name of the 1st argument.
|
---|
2969 | * @param a1 The name of the 2nd argument.
|
---|
2970 | */
|
---|
2971 | # define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pVCpu, cbInstr, (a0), (a1))
|
---|
2972 |
|
---|
2973 | /**
|
---|
2974 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
2975 | * three extra arguments.
|
---|
2976 | *
|
---|
2977 | * @param a_Name The name of the type.
|
---|
2978 | * @param a_Type0 The type of the 1st argument
|
---|
2979 | * @param a_Arg0 The name of the 1st argument.
|
---|
2980 | * @param a_Type1 The type of the 2nd argument.
|
---|
2981 | * @param a_Arg1 The name of the 2nd argument.
|
---|
2982 | * @param a_Type2 The type of the 3rd argument.
|
---|
2983 | * @param a_Arg2 The name of the 3rd argument.
|
---|
2984 | */
|
---|
2985 | # define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
2986 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
2987 | /**
|
---|
2988 | * For defining a C instruction implementation function taking three extra
|
---|
2989 | * arguments.
|
---|
2990 | *
|
---|
2991 | * @param a_Name The name of the function.
|
---|
2992 | * @param a_Type0 The type of the 1st argument
|
---|
2993 | * @param a_Arg0 The name of the 1st argument.
|
---|
2994 | * @param a_Type1 The type of the 2nd argument.
|
---|
2995 | * @param a_Arg1 The name of the 2nd argument.
|
---|
2996 | * @param a_Type2 The type of the 3rd argument.
|
---|
2997 | * @param a_Arg2 The name of the 3rd argument.
|
---|
2998 | */
|
---|
2999 | # define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
3000 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
3001 | /**
|
---|
3002 | * Prototype version of IEM_CIMPL_DEF_3.
|
---|
3003 | */
|
---|
3004 | # define IEM_CIMPL_PROTO_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
3005 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
3006 | /**
|
---|
3007 | * For calling a C instruction implementation function taking three extra
|
---|
3008 | * arguments.
|
---|
3009 | *
|
---|
3010 | * This special call macro adds default arguments to the call and allow us to
|
---|
3011 | * change these later.
|
---|
3012 | *
|
---|
3013 | * @param a_fn The name of the function.
|
---|
3014 | * @param a0 The name of the 1st argument.
|
---|
3015 | * @param a1 The name of the 2nd argument.
|
---|
3016 | * @param a2 The name of the 3rd argument.
|
---|
3017 | */
|
---|
3018 | # define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pVCpu, cbInstr, (a0), (a1), (a2))
|
---|
3019 |
|
---|
3020 |
|
---|
3021 | /**
|
---|
3022 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3023 | * four extra arguments.
|
---|
3024 | *
|
---|
3025 | * @param a_Name The name of the type.
|
---|
3026 | * @param a_Type0 The type of the 1st argument
|
---|
3027 | * @param a_Arg0 The name of the 1st argument.
|
---|
3028 | * @param a_Type1 The type of the 2nd argument.
|
---|
3029 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3030 | * @param a_Type2 The type of the 3rd argument.
|
---|
3031 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3032 | * @param a_Type3 The type of the 4th argument.
|
---|
3033 | * @param a_Arg3 The name of the 4th argument.
|
---|
3034 | */
|
---|
3035 | # define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3036 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3037 | /**
|
---|
3038 | * For defining a C instruction implementation function taking four extra
|
---|
3039 | * arguments.
|
---|
3040 | *
|
---|
3041 | * @param a_Name The name of the function.
|
---|
3042 | * @param a_Type0 The type of the 1st argument
|
---|
3043 | * @param a_Arg0 The name of the 1st argument.
|
---|
3044 | * @param a_Type1 The type of the 2nd argument.
|
---|
3045 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3046 | * @param a_Type2 The type of the 3rd argument.
|
---|
3047 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3048 | * @param a_Type3 The type of the 4th argument.
|
---|
3049 | * @param a_Arg3 The name of the 4th argument.
|
---|
3050 | */
|
---|
3051 | # define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3052 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3053 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3054 | /**
|
---|
3055 | * Prototype version of IEM_CIMPL_DEF_4.
|
---|
3056 | */
|
---|
3057 | # define IEM_CIMPL_PROTO_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3058 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3059 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3060 | /**
|
---|
3061 | * For calling a C instruction implementation function taking four extra
|
---|
3062 | * arguments.
|
---|
3063 | *
|
---|
3064 | * This special call macro adds default arguments to the call and allow us to
|
---|
3065 | * change these later.
|
---|
3066 | *
|
---|
3067 | * @param a_fn The name of the function.
|
---|
3068 | * @param a0 The name of the 1st argument.
|
---|
3069 | * @param a1 The name of the 2nd argument.
|
---|
3070 | * @param a2 The name of the 3rd argument.
|
---|
3071 | * @param a3 The name of the 4th argument.
|
---|
3072 | */
|
---|
3073 | # define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3))
|
---|
3074 |
|
---|
3075 |
|
---|
3076 | /**
|
---|
3077 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3078 | * five extra arguments.
|
---|
3079 | *
|
---|
3080 | * @param a_Name The name of the type.
|
---|
3081 | * @param a_Type0 The type of the 1st argument
|
---|
3082 | * @param a_Arg0 The name of the 1st argument.
|
---|
3083 | * @param a_Type1 The type of the 2nd argument.
|
---|
3084 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3085 | * @param a_Type2 The type of the 3rd argument.
|
---|
3086 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3087 | * @param a_Type3 The type of the 4th argument.
|
---|
3088 | * @param a_Arg3 The name of the 4th argument.
|
---|
3089 | * @param a_Type4 The type of the 5th argument.
|
---|
3090 | * @param a_Arg4 The name of the 5th argument.
|
---|
3091 | */
|
---|
3092 | # define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3093 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, \
|
---|
3094 | a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
|
---|
3095 | a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3096 | /**
|
---|
3097 | * For defining a C instruction implementation function taking five extra
|
---|
3098 | * arguments.
|
---|
3099 | *
|
---|
3100 | * @param a_Name The name of the function.
|
---|
3101 | * @param a_Type0 The type of the 1st argument
|
---|
3102 | * @param a_Arg0 The name of the 1st argument.
|
---|
3103 | * @param a_Type1 The type of the 2nd argument.
|
---|
3104 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3105 | * @param a_Type2 The type of the 3rd argument.
|
---|
3106 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3107 | * @param a_Type3 The type of the 4th argument.
|
---|
3108 | * @param a_Arg3 The name of the 4th argument.
|
---|
3109 | * @param a_Type4 The type of the 5th argument.
|
---|
3110 | * @param a_Arg4 The name of the 5th argument.
|
---|
3111 | */
|
---|
3112 | # define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3113 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3114 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3115 | /**
|
---|
3116 | * Prototype version of IEM_CIMPL_DEF_5.
|
---|
3117 | */
|
---|
3118 | # define IEM_CIMPL_PROTO_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3119 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3120 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3121 | /**
|
---|
3122 | * For calling a C instruction implementation function taking five extra
|
---|
3123 | * arguments.
|
---|
3124 | *
|
---|
3125 | * This special call macro adds default arguments to the call and allow us to
|
---|
3126 | * change these later.
|
---|
3127 | *
|
---|
3128 | * @param a_fn The name of the function.
|
---|
3129 | * @param a0 The name of the 1st argument.
|
---|
3130 | * @param a1 The name of the 2nd argument.
|
---|
3131 | * @param a2 The name of the 3rd argument.
|
---|
3132 | * @param a3 The name of the 4th argument.
|
---|
3133 | * @param a4 The name of the 5th argument.
|
---|
3134 | */
|
---|
3135 | # define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
|
---|
3136 |
|
---|
3137 | /** @} */
|
---|
3138 |
|
---|
3139 |
|
---|
3140 | /** @name Opcode Decoder Function Types.
|
---|
3141 | * @{ */
|
---|
3142 |
|
---|
3143 | /** @typedef PFNIEMOP
|
---|
3144 | * Pointer to an opcode decoder function.
|
---|
3145 | */
|
---|
3146 |
|
---|
3147 | /** @def FNIEMOP_DEF
|
---|
3148 | * Define an opcode decoder function.
|
---|
3149 | *
|
---|
3150 | * We're using macors for this so that adding and removing parameters as well as
|
---|
3151 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL
|
---|
3152 | *
|
---|
3153 | * @param a_Name The function name.
|
---|
3154 | */
|
---|
3155 |
|
---|
3156 | /** @typedef PFNIEMOPRM
|
---|
3157 | * Pointer to an opcode decoder function with RM byte.
|
---|
3158 | */
|
---|
3159 |
|
---|
3160 | /** @def FNIEMOPRM_DEF
|
---|
3161 | * Define an opcode decoder function with RM byte.
|
---|
3162 | *
|
---|
3163 | * We're using macors for this so that adding and removing parameters as well as
|
---|
3164 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL_1
|
---|
3165 | *
|
---|
3166 | * @param a_Name The function name.
|
---|
3167 | */
|
---|
3168 |
|
---|
3169 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
---|
3170 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3171 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3172 | # define FNIEMOP_DEF(a_Name) \
|
---|
3173 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu)
|
---|
3174 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3175 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
---|
3176 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3177 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
---|
3178 |
|
---|
3179 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
---|
3180 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3181 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3182 | # define FNIEMOP_DEF(a_Name) \
|
---|
3183 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu) RT_NO_THROW_DEF
|
---|
3184 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3185 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) RT_NO_THROW_DEF
|
---|
3186 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3187 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) RT_NO_THROW_DEF
|
---|
3188 |
|
---|
3189 | #elif defined(__GNUC__)
|
---|
3190 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3191 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3192 | # define FNIEMOP_DEF(a_Name) \
|
---|
3193 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu)
|
---|
3194 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3195 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
---|
3196 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3197 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
---|
3198 |
|
---|
3199 | #else
|
---|
3200 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3201 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3202 | # define FNIEMOP_DEF(a_Name) \
|
---|
3203 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu) RT_NO_THROW_DEF
|
---|
3204 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3205 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) RT_NO_THROW_DEF
|
---|
3206 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3207 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) RT_NO_THROW_DEF
|
---|
3208 |
|
---|
3209 | #endif
|
---|
3210 | #define FNIEMOPRM_DEF(a_Name) FNIEMOP_DEF_1(a_Name, uint8_t, bRm)
|
---|
3211 |
|
---|
3212 | /**
|
---|
3213 | * Call an opcode decoder function.
|
---|
3214 | *
|
---|
3215 | * We're using macors for this so that adding and removing parameters can be
|
---|
3216 | * done as we please. See FNIEMOP_DEF.
|
---|
3217 | */
|
---|
3218 | #define FNIEMOP_CALL(a_pfn) (a_pfn)(pVCpu)
|
---|
3219 |
|
---|
3220 | /**
|
---|
3221 | * Call a common opcode decoder function taking one extra argument.
|
---|
3222 | *
|
---|
3223 | * We're using macors for this so that adding and removing parameters can be
|
---|
3224 | * done as we please. See FNIEMOP_DEF_1.
|
---|
3225 | */
|
---|
3226 | #define FNIEMOP_CALL_1(a_pfn, a0) (a_pfn)(pVCpu, a0)
|
---|
3227 |
|
---|
3228 | /**
|
---|
3229 | * Call a common opcode decoder function taking one extra argument.
|
---|
3230 | *
|
---|
3231 | * We're using macors for this so that adding and removing parameters can be
|
---|
3232 | * done as we please. See FNIEMOP_DEF_1.
|
---|
3233 | */
|
---|
3234 | #define FNIEMOP_CALL_2(a_pfn, a0, a1) (a_pfn)(pVCpu, a0, a1)
|
---|
3235 | /** @} */
|
---|
3236 |
|
---|
3237 |
|
---|
3238 | /** @name Misc Helpers
|
---|
3239 | * @{ */
|
---|
3240 |
|
---|
3241 | /** Used to shut up GCC warnings about variables that 'may be used uninitialized'
|
---|
3242 | * due to GCC lacking knowledge about the value range of a switch. */
|
---|
3243 | #if RT_CPLUSPLUS_PREREQ(202000)
|
---|
3244 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: [[unlikely]] AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
---|
3245 | #else
|
---|
3246 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
---|
3247 | #endif
|
---|
3248 |
|
---|
3249 | /** Variant of IEM_NOT_REACHED_DEFAULT_CASE_RET that returns a custom value. */
|
---|
3250 | #if RT_CPLUSPLUS_PREREQ(202000)
|
---|
3251 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: [[unlikely]] AssertFailedReturn(a_RetValue)
|
---|
3252 | #else
|
---|
3253 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: AssertFailedReturn(a_RetValue)
|
---|
3254 | #endif
|
---|
3255 |
|
---|
3256 | /**
|
---|
3257 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
---|
3258 | * occation.
|
---|
3259 | */
|
---|
3260 | #ifdef LOG_ENABLED
|
---|
3261 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
---|
3262 | do { \
|
---|
3263 | /*Log*/ LogAlways(("%s: returning IEM_RETURN_ASPECT_NOT_IMPLEMENTED (line %d)\n", __FUNCTION__, __LINE__)); \
|
---|
3264 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
---|
3265 | } while (0)
|
---|
3266 | #else
|
---|
3267 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
---|
3268 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
---|
3269 | #endif
|
---|
3270 |
|
---|
3271 | /**
|
---|
3272 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
---|
3273 | * occation using the supplied logger statement.
|
---|
3274 | *
|
---|
3275 | * @param a_LoggerArgs What to log on failure.
|
---|
3276 | */
|
---|
3277 | #ifdef LOG_ENABLED
|
---|
3278 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
---|
3279 | do { \
|
---|
3280 | LogAlways((LOG_FN_FMT ": ", __PRETTY_FUNCTION__)); LogAlways(a_LoggerArgs); \
|
---|
3281 | /*LogFunc(a_LoggerArgs);*/ \
|
---|
3282 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
---|
3283 | } while (0)
|
---|
3284 | #else
|
---|
3285 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
---|
3286 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
---|
3287 | #endif
|
---|
3288 |
|
---|
3289 | /**
|
---|
3290 | * Check if we're currently executing in real or virtual 8086 mode.
|
---|
3291 | *
|
---|
3292 | * @returns @c true if it is, @c false if not.
|
---|
3293 | * @param a_pVCpu The IEM state of the current CPU.
|
---|
3294 | */
|
---|
3295 | #define IEM_IS_REAL_OR_V86_MODE(a_pVCpu) (CPUMIsGuestInRealOrV86ModeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3296 |
|
---|
3297 | /**
|
---|
3298 | * Check if we're currently executing in virtual 8086 mode.
|
---|
3299 | *
|
---|
3300 | * @returns @c true if it is, @c false if not.
|
---|
3301 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3302 | */
|
---|
3303 | #define IEM_IS_V86_MODE(a_pVCpu) (CPUMIsGuestInV86ModeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3304 |
|
---|
3305 | /**
|
---|
3306 | * Check if we're currently executing in long mode.
|
---|
3307 | *
|
---|
3308 | * @returns @c true if it is, @c false if not.
|
---|
3309 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3310 | */
|
---|
3311 | #define IEM_IS_LONG_MODE(a_pVCpu) (CPUMIsGuestInLongModeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3312 |
|
---|
3313 | /**
|
---|
3314 | * Check if we're currently executing in a 64-bit code segment.
|
---|
3315 | *
|
---|
3316 | * @returns @c true if it is, @c false if not.
|
---|
3317 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3318 | */
|
---|
3319 | #define IEM_IS_64BIT_CODE(a_pVCpu) (CPUMIsGuestIn64BitCodeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3320 |
|
---|
3321 | /**
|
---|
3322 | * Check if we're currently executing in real mode.
|
---|
3323 | *
|
---|
3324 | * @returns @c true if it is, @c false if not.
|
---|
3325 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3326 | */
|
---|
3327 | #define IEM_IS_REAL_MODE(a_pVCpu) (CPUMIsGuestInRealModeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3328 |
|
---|
3329 | /**
|
---|
3330 | * Returns a (const) pointer to the CPUMFEATURES for the guest CPU.
|
---|
3331 | * @returns PCCPUMFEATURES
|
---|
3332 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3333 | */
|
---|
3334 | #define IEM_GET_GUEST_CPU_FEATURES(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->cpum.ro.GuestFeatures))
|
---|
3335 |
|
---|
3336 | /**
|
---|
3337 | * Returns a (const) pointer to the CPUMFEATURES for the host CPU.
|
---|
3338 | * @returns PCCPUMFEATURES
|
---|
3339 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3340 | */
|
---|
3341 | #define IEM_GET_HOST_CPU_FEATURES(a_pVCpu) (&g_CpumHostFeatures.s)
|
---|
3342 |
|
---|
3343 | /**
|
---|
3344 | * Evaluates to true if we're presenting an Intel CPU to the guest.
|
---|
3345 | */
|
---|
3346 | #define IEM_IS_GUEST_CPU_INTEL(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL )
|
---|
3347 |
|
---|
3348 | /**
|
---|
3349 | * Evaluates to true if we're presenting an AMD CPU to the guest.
|
---|
3350 | */
|
---|
3351 | #define IEM_IS_GUEST_CPU_AMD(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_AMD || (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_HYGON )
|
---|
3352 |
|
---|
3353 | /**
|
---|
3354 | * Check if the address is canonical.
|
---|
3355 | */
|
---|
3356 | #define IEM_IS_CANONICAL(a_u64Addr) X86_IS_CANONICAL(a_u64Addr)
|
---|
3357 |
|
---|
3358 | /** Checks if the ModR/M byte is in register mode or not. */
|
---|
3359 | #define IEM_IS_MODRM_REG_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT) )
|
---|
3360 | /** Checks if the ModR/M byte is in memory mode or not. */
|
---|
3361 | #define IEM_IS_MODRM_MEM_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT) )
|
---|
3362 |
|
---|
3363 | /**
|
---|
3364 | * Gets the register (reg) part of a ModR/M encoding, with REX.R added in.
|
---|
3365 | *
|
---|
3366 | * For use during decoding.
|
---|
3367 | */
|
---|
3368 | #define IEM_GET_MODRM_REG(a_pVCpu, a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | (a_pVCpu)->iem.s.uRexReg )
|
---|
3369 | /**
|
---|
3370 | * Gets the r/m part of a ModR/M encoding as a register index, with REX.B added in.
|
---|
3371 | *
|
---|
3372 | * For use during decoding.
|
---|
3373 | */
|
---|
3374 | #define IEM_GET_MODRM_RM(a_pVCpu, a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) | (a_pVCpu)->iem.s.uRexB )
|
---|
3375 |
|
---|
3376 | /**
|
---|
3377 | * Gets the register (reg) part of a ModR/M encoding, without REX.R.
|
---|
3378 | *
|
---|
3379 | * For use during decoding.
|
---|
3380 | */
|
---|
3381 | #define IEM_GET_MODRM_REG_8(a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) )
|
---|
3382 | /**
|
---|
3383 | * Gets the r/m part of a ModR/M encoding as a register index, without REX.B.
|
---|
3384 | *
|
---|
3385 | * For use during decoding.
|
---|
3386 | */
|
---|
3387 | #define IEM_GET_MODRM_RM_8(a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) )
|
---|
3388 |
|
---|
3389 | /**
|
---|
3390 | * Gets the effective VEX.VVVV value.
|
---|
3391 | *
|
---|
3392 | * The 4th bit is ignored if not 64-bit code.
|
---|
3393 | * @returns effective V-register value.
|
---|
3394 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3395 | */
|
---|
3396 | #define IEM_GET_EFFECTIVE_VVVV(a_pVCpu) \
|
---|
3397 | ((a_pVCpu)->iem.s.enmCpuMode == IEMMODE_64BIT ? (a_pVCpu)->iem.s.uVex3rdReg : (a_pVCpu)->iem.s.uVex3rdReg & 7)
|
---|
3398 |
|
---|
3399 |
|
---|
3400 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
3401 |
|
---|
3402 | /**
|
---|
3403 | * Check if the guest has entered VMX root operation.
|
---|
3404 | */
|
---|
3405 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (CPUMIsGuestInVmxRootMode(IEM_GET_CTX(a_pVCpu)))
|
---|
3406 |
|
---|
3407 | /**
|
---|
3408 | * Check if the guest has entered VMX non-root operation.
|
---|
3409 | */
|
---|
3410 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) (CPUMIsGuestInVmxNonRootMode(IEM_GET_CTX(a_pVCpu)))
|
---|
3411 |
|
---|
3412 | /**
|
---|
3413 | * Check if the nested-guest has the given Pin-based VM-execution control set.
|
---|
3414 | */
|
---|
3415 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_PinCtl) \
|
---|
3416 | (CPUMIsGuestVmxPinCtlsSet(IEM_GET_CTX(a_pVCpu), (a_PinCtl)))
|
---|
3417 |
|
---|
3418 | /**
|
---|
3419 | * Check if the nested-guest has the given Processor-based VM-execution control set.
|
---|
3420 | */
|
---|
3421 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_ProcCtl) \
|
---|
3422 | (CPUMIsGuestVmxProcCtlsSet(IEM_GET_CTX(a_pVCpu), (a_ProcCtl)))
|
---|
3423 |
|
---|
3424 | /**
|
---|
3425 | * Check if the nested-guest has the given Secondary Processor-based VM-execution
|
---|
3426 | * control set.
|
---|
3427 | */
|
---|
3428 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_ProcCtl2) \
|
---|
3429 | (CPUMIsGuestVmxProcCtls2Set(IEM_GET_CTX(a_pVCpu), (a_ProcCtl2)))
|
---|
3430 |
|
---|
3431 | /** Gets the guest-physical address of the shadows VMCS for the given VCPU. */
|
---|
3432 | # define IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysShadowVmcs)
|
---|
3433 |
|
---|
3434 | /** Whether a shadow VMCS is present for the given VCPU. */
|
---|
3435 | # define IEM_VMX_HAS_SHADOW_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
---|
3436 |
|
---|
3437 | /** Gets the VMXON region pointer. */
|
---|
3438 | # define IEM_VMX_GET_VMXON_PTR(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmxon)
|
---|
3439 |
|
---|
3440 | /** Gets the guest-physical address of the current VMCS for the given VCPU. */
|
---|
3441 | # define IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs)
|
---|
3442 |
|
---|
3443 | /** Whether a current VMCS is present for the given VCPU. */
|
---|
3444 | # define IEM_VMX_HAS_CURRENT_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
---|
3445 |
|
---|
3446 | /** Assigns the guest-physical address of the current VMCS for the given VCPU. */
|
---|
3447 | # define IEM_VMX_SET_CURRENT_VMCS(a_pVCpu, a_GCPhysVmcs) \
|
---|
3448 | do \
|
---|
3449 | { \
|
---|
3450 | Assert((a_GCPhysVmcs) != NIL_RTGCPHYS); \
|
---|
3451 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = (a_GCPhysVmcs); \
|
---|
3452 | } while (0)
|
---|
3453 |
|
---|
3454 | /** Clears any current VMCS for the given VCPU. */
|
---|
3455 | # define IEM_VMX_CLEAR_CURRENT_VMCS(a_pVCpu) \
|
---|
3456 | do \
|
---|
3457 | { \
|
---|
3458 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = NIL_RTGCPHYS; \
|
---|
3459 | } while (0)
|
---|
3460 |
|
---|
3461 | /**
|
---|
3462 | * Invokes the VMX VM-exit handler for an instruction intercept.
|
---|
3463 | */
|
---|
3464 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) \
|
---|
3465 | do { return iemVmxVmexitInstr((a_pVCpu), (a_uExitReason), (a_cbInstr)); } while (0)
|
---|
3466 |
|
---|
3467 | /**
|
---|
3468 | * Invokes the VMX VM-exit handler for an instruction intercept where the
|
---|
3469 | * instruction provides additional VM-exit information.
|
---|
3470 | */
|
---|
3471 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) \
|
---|
3472 | do { return iemVmxVmexitInstrNeedsInfo((a_pVCpu), (a_uExitReason), (a_uInstrId), (a_cbInstr)); } while (0)
|
---|
3473 |
|
---|
3474 | /**
|
---|
3475 | * Invokes the VMX VM-exit handler for a task switch.
|
---|
3476 | */
|
---|
3477 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) \
|
---|
3478 | do { return iemVmxVmexitTaskSwitch((a_pVCpu), (a_enmTaskSwitch), (a_SelNewTss), (a_cbInstr)); } while (0)
|
---|
3479 |
|
---|
3480 | /**
|
---|
3481 | * Invokes the VMX VM-exit handler for MWAIT.
|
---|
3482 | */
|
---|
3483 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) \
|
---|
3484 | do { return iemVmxVmexitInstrMwait((a_pVCpu), (a_fMonitorArmed), (a_cbInstr)); } while (0)
|
---|
3485 |
|
---|
3486 | /**
|
---|
3487 | * Invokes the VMX VM-exit handler for EPT faults.
|
---|
3488 | */
|
---|
3489 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) \
|
---|
3490 | do { return iemVmxVmexitEpt(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr); } while (0)
|
---|
3491 |
|
---|
3492 | /**
|
---|
3493 | * Invokes the VMX VM-exit handler.
|
---|
3494 | */
|
---|
3495 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) \
|
---|
3496 | do { return iemVmxVmexit((a_pVCpu), (a_uExitReason), (a_uExitQual)); } while (0)
|
---|
3497 |
|
---|
3498 | #else
|
---|
3499 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (false)
|
---|
3500 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) (false)
|
---|
3501 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
---|
3502 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
---|
3503 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_cbInstr) (false)
|
---|
3504 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3505 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3506 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3507 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3508 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3509 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) do { return VERR_VMX_IPE_1; } while (0)
|
---|
3510 |
|
---|
3511 | #endif
|
---|
3512 |
|
---|
3513 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
---|
3514 | /**
|
---|
3515 | * Check if an SVM control/instruction intercept is set.
|
---|
3516 | */
|
---|
3517 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) \
|
---|
3518 | (CPUMIsGuestSvmCtrlInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_Intercept)))
|
---|
3519 |
|
---|
3520 | /**
|
---|
3521 | * Check if an SVM read CRx intercept is set.
|
---|
3522 | */
|
---|
3523 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
---|
3524 | (CPUMIsGuestSvmReadCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
---|
3525 |
|
---|
3526 | /**
|
---|
3527 | * Check if an SVM write CRx intercept is set.
|
---|
3528 | */
|
---|
3529 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
---|
3530 | (CPUMIsGuestSvmWriteCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
---|
3531 |
|
---|
3532 | /**
|
---|
3533 | * Check if an SVM read DRx intercept is set.
|
---|
3534 | */
|
---|
3535 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
---|
3536 | (CPUMIsGuestSvmReadDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
---|
3537 |
|
---|
3538 | /**
|
---|
3539 | * Check if an SVM write DRx intercept is set.
|
---|
3540 | */
|
---|
3541 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
---|
3542 | (CPUMIsGuestSvmWriteDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
---|
3543 |
|
---|
3544 | /**
|
---|
3545 | * Check if an SVM exception intercept is set.
|
---|
3546 | */
|
---|
3547 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) \
|
---|
3548 | (CPUMIsGuestSvmXcptInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uVector)))
|
---|
3549 |
|
---|
3550 | /**
|
---|
3551 | * Invokes the SVM \#VMEXIT handler for the nested-guest.
|
---|
3552 | */
|
---|
3553 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \
|
---|
3554 | do { return iemSvmVmexit((a_pVCpu), (a_uExitCode), (a_uExitInfo1), (a_uExitInfo2)); } while (0)
|
---|
3555 |
|
---|
3556 | /**
|
---|
3557 | * Invokes the 'MOV CRx' SVM \#VMEXIT handler after constructing the
|
---|
3558 | * corresponding decode assist information.
|
---|
3559 | */
|
---|
3560 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) \
|
---|
3561 | do \
|
---|
3562 | { \
|
---|
3563 | uint64_t uExitInfo1; \
|
---|
3564 | if ( IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmDecodeAssists \
|
---|
3565 | && (a_enmAccessCrX) == IEMACCESSCRX_MOV_CRX) \
|
---|
3566 | uExitInfo1 = SVM_EXIT1_MOV_CRX_MASK | ((a_iGReg) & 7); \
|
---|
3567 | else \
|
---|
3568 | uExitInfo1 = 0; \
|
---|
3569 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, uExitInfo1, 0); \
|
---|
3570 | } while (0)
|
---|
3571 |
|
---|
3572 | /** Check and handles SVM nested-guest instruction intercept and updates
|
---|
3573 | * NRIP if needed.
|
---|
3574 | */
|
---|
3575 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \
|
---|
3576 | do \
|
---|
3577 | { \
|
---|
3578 | if (IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept)) \
|
---|
3579 | { \
|
---|
3580 | IEM_SVM_UPDATE_NRIP(a_pVCpu); \
|
---|
3581 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2); \
|
---|
3582 | } \
|
---|
3583 | } while (0)
|
---|
3584 |
|
---|
3585 | /** Checks and handles SVM nested-guest CR0 read intercept. */
|
---|
3586 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2) \
|
---|
3587 | do \
|
---|
3588 | { \
|
---|
3589 | if (!IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, 0)) \
|
---|
3590 | { /* probably likely */ } \
|
---|
3591 | else \
|
---|
3592 | { \
|
---|
3593 | IEM_SVM_UPDATE_NRIP(a_pVCpu); \
|
---|
3594 | IEM_SVM_VMEXIT_RET(a_pVCpu, SVM_EXIT_READ_CR0, a_uExitInfo1, a_uExitInfo2); \
|
---|
3595 | } \
|
---|
3596 | } while (0)
|
---|
3597 |
|
---|
3598 | /**
|
---|
3599 | * Updates the NextRIP (NRI) field in the nested-guest VMCB.
|
---|
3600 | */
|
---|
3601 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu) \
|
---|
3602 | do { \
|
---|
3603 | if (IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmNextRipSave) \
|
---|
3604 | CPUMGuestSvmUpdateNRip(a_pVCpu, IEM_GET_CTX(a_pVCpu), IEM_GET_INSTR_LEN(a_pVCpu)); \
|
---|
3605 | } while (0)
|
---|
3606 |
|
---|
3607 | #else
|
---|
3608 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) (false)
|
---|
3609 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
---|
3610 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
---|
3611 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
---|
3612 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
---|
3613 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) (false)
|
---|
3614 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) do { return VERR_SVM_IPE_1; } while (0)
|
---|
3615 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) do { return VERR_SVM_IPE_1; } while (0)
|
---|
3616 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, a_uExitInfo1, a_uExitInfo2) do { } while (0)
|
---|
3617 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2) do { } while (0)
|
---|
3618 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu) do { } while (0)
|
---|
3619 |
|
---|
3620 | #endif
|
---|
3621 |
|
---|
3622 | /** @} */
|
---|
3623 |
|
---|
3624 |
|
---|
3625 |
|
---|
3626 | /**
|
---|
3627 | * Selector descriptor table entry as fetched by iemMemFetchSelDesc.
|
---|
3628 | */
|
---|
3629 | typedef union IEMSELDESC
|
---|
3630 | {
|
---|
3631 | /** The legacy view. */
|
---|
3632 | X86DESC Legacy;
|
---|
3633 | /** The long mode view. */
|
---|
3634 | X86DESC64 Long;
|
---|
3635 | } IEMSELDESC;
|
---|
3636 | /** Pointer to a selector descriptor table entry. */
|
---|
3637 | typedef IEMSELDESC *PIEMSELDESC;
|
---|
3638 |
|
---|
3639 | /** @name Raising Exceptions.
|
---|
3640 | * @{ */
|
---|
3641 | VBOXSTRICTRC iemTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, uint32_t uNextEip, uint32_t fFlags,
|
---|
3642 | uint16_t uErr, uint64_t uCr2, RTSEL SelTSS, PIEMSELDESC pNewDescTSS) RT_NOEXCEPT;
|
---|
3643 |
|
---|
3644 | VBOXSTRICTRC iemRaiseXcptOrInt(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector, uint32_t fFlags,
|
---|
3645 | uint16_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
---|
3646 | #ifdef IEM_WITH_SETJMP
|
---|
3647 | DECL_NO_RETURN(void) iemRaiseXcptOrIntJmp(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector,
|
---|
3648 | uint32_t fFlags, uint16_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
---|
3649 | #endif
|
---|
3650 | VBOXSTRICTRC iemRaiseDivideError(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3651 | VBOXSTRICTRC iemRaiseDebugException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3652 | VBOXSTRICTRC iemRaiseBoundRangeExceeded(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3653 | VBOXSTRICTRC iemRaiseUndefinedOpcode(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3654 | VBOXSTRICTRC iemRaiseDeviceNotAvailable(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3655 | VBOXSTRICTRC iemRaiseTaskSwitchFaultWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
3656 | VBOXSTRICTRC iemRaiseTaskSwitchFaultCurrentTSS(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3657 | VBOXSTRICTRC iemRaiseTaskSwitchFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3658 | VBOXSTRICTRC iemRaiseTaskSwitchFaultBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
3659 | /*VBOXSTRICTRC iemRaiseSelectorNotPresent(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;*/
|
---|
3660 | VBOXSTRICTRC iemRaiseSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
3661 | VBOXSTRICTRC iemRaiseSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
3662 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
3663 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
3664 | VBOXSTRICTRC iemRaiseGeneralProtectionFault(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
3665 | VBOXSTRICTRC iemRaiseGeneralProtectionFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3666 | #ifdef IEM_WITH_SETJMP
|
---|
3667 | DECL_NO_RETURN(void) iemRaiseGeneralProtectionFault0Jmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3668 | #endif
|
---|
3669 | VBOXSTRICTRC iemRaiseGeneralProtectionFaultBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
---|
3670 | VBOXSTRICTRC iemRaiseNotCanonical(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3671 | VBOXSTRICTRC iemRaiseSelectorBounds(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3672 | #ifdef IEM_WITH_SETJMP
|
---|
3673 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3674 | #endif
|
---|
3675 | VBOXSTRICTRC iemRaiseSelectorBoundsBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
---|
3676 | #ifdef IEM_WITH_SETJMP
|
---|
3677 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsBySelectorJmp(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
---|
3678 | #endif
|
---|
3679 | VBOXSTRICTRC iemRaiseSelectorInvalidAccess(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3680 | #ifdef IEM_WITH_SETJMP
|
---|
3681 | DECL_NO_RETURN(void) iemRaiseSelectorInvalidAccessJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3682 | #endif
|
---|
3683 | VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) RT_NOEXCEPT;
|
---|
3684 | #ifdef IEM_WITH_SETJMP
|
---|
3685 | DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) RT_NOEXCEPT;
|
---|
3686 | #endif
|
---|
3687 | VBOXSTRICTRC iemRaiseMathFault(PVMCPUCC pVCpu);
|
---|
3688 | VBOXSTRICTRC iemRaiseAlignmentCheckException(PVMCPUCC pVCpu);
|
---|
3689 | #ifdef IEM_WITH_SETJMP
|
---|
3690 | DECL_NO_RETURN(void) iemRaiseAlignmentCheckExceptionJmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3691 | #endif
|
---|
3692 | VBOXSTRICTRC iemRaiseSimdFpException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3693 |
|
---|
3694 | IEM_CIMPL_DEF_0(iemCImplRaiseDivideError);
|
---|
3695 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidLockPrefix);
|
---|
3696 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidOpcode);
|
---|
3697 |
|
---|
3698 | /**
|
---|
3699 | * Macro for calling iemCImplRaiseDivideError().
|
---|
3700 | *
|
---|
3701 | * This enables us to add/remove arguments and force different levels of
|
---|
3702 | * inlining as we wish.
|
---|
3703 | *
|
---|
3704 | * @return Strict VBox status code.
|
---|
3705 | */
|
---|
3706 | #define IEMOP_RAISE_DIVIDE_ERROR() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseDivideError)
|
---|
3707 |
|
---|
3708 | /**
|
---|
3709 | * Macro for calling iemCImplRaiseInvalidLockPrefix().
|
---|
3710 | *
|
---|
3711 | * This enables us to add/remove arguments and force different levels of
|
---|
3712 | * inlining as we wish.
|
---|
3713 | *
|
---|
3714 | * @return Strict VBox status code.
|
---|
3715 | */
|
---|
3716 | #define IEMOP_RAISE_INVALID_LOCK_PREFIX() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseInvalidLockPrefix)
|
---|
3717 |
|
---|
3718 | /**
|
---|
3719 | * Macro for calling iemCImplRaiseInvalidOpcode().
|
---|
3720 | *
|
---|
3721 | * This enables us to add/remove arguments and force different levels of
|
---|
3722 | * inlining as we wish.
|
---|
3723 | *
|
---|
3724 | * @return Strict VBox status code.
|
---|
3725 | */
|
---|
3726 | #define IEMOP_RAISE_INVALID_OPCODE() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseInvalidOpcode)
|
---|
3727 | /** @} */
|
---|
3728 |
|
---|
3729 | /** @name Register Access.
|
---|
3730 | * @{ */
|
---|
3731 | VBOXSTRICTRC iemRegRipRelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr,
|
---|
3732 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
---|
3733 | VBOXSTRICTRC iemRegRipRelativeJumpS16AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int16_t offNextInstr) RT_NOEXCEPT;
|
---|
3734 | VBOXSTRICTRC iemRegRipRelativeJumpS32AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int32_t offNextInstr,
|
---|
3735 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
---|
3736 | VBOXSTRICTRC iemRegRipJump(PVMCPUCC pVCpu, uint64_t uNewRip) RT_NOEXCEPT;
|
---|
3737 | /** @} */
|
---|
3738 |
|
---|
3739 | /** @name FPU access and helpers.
|
---|
3740 | * @{ */
|
---|
3741 | void iemFpuPushResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult) RT_NOEXCEPT;
|
---|
3742 | void iemFpuPushResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3743 | void iemFpuPushResultTwo(PVMCPUCC pVCpu, PIEMFPURESULTTWO pResult) RT_NOEXCEPT;
|
---|
3744 | void iemFpuStoreResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg) RT_NOEXCEPT;
|
---|
3745 | void iemFpuStoreResultThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg) RT_NOEXCEPT;
|
---|
3746 | void iemFpuStoreResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
---|
3747 | uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3748 | void iemFpuStoreResultWithMemOpThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
---|
3749 | uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3750 | void iemFpuUpdateOpcodeAndIp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3751 | void iemFpuUpdateFSW(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
---|
3752 | void iemFpuUpdateFSWThenPop(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
---|
3753 | void iemFpuUpdateFSWWithMemOp(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3754 | void iemFpuUpdateFSWThenPopPop(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
---|
3755 | void iemFpuUpdateFSWWithMemOpThenPop(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3756 | void iemFpuStackUnderflow(PVMCPUCC pVCpu, uint8_t iStReg) RT_NOEXCEPT;
|
---|
3757 | void iemFpuStackUnderflowWithMemOp(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3758 | void iemFpuStackUnderflowThenPop(PVMCPUCC pVCpu, uint8_t iStReg) RT_NOEXCEPT;
|
---|
3759 | void iemFpuStackUnderflowWithMemOpThenPop(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3760 | void iemFpuStackUnderflowThenPopPop(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3761 | void iemFpuStackPushUnderflow(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3762 | void iemFpuStackPushUnderflowTwo(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3763 | void iemFpuStackPushOverflow(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3764 | void iemFpuStackPushOverflowWithMemOp(PVMCPUCC pVCpu, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
---|
3765 | /** @} */
|
---|
3766 |
|
---|
3767 | /** @name SSE+AVX SIMD access and helpers.
|
---|
3768 | * @{ */
|
---|
3769 | void iemSseStoreResult(PVMCPUCC pVCpu, PCIEMSSERESULT pResult, uint8_t iXmmReg) RT_NOEXCEPT;
|
---|
3770 | void iemSseUpdateMxcsr(PVMCPUCC pVCpu, uint32_t fMxcsr) RT_NOEXCEPT;
|
---|
3771 | /** @} */
|
---|
3772 |
|
---|
3773 | /** @name Memory access.
|
---|
3774 | * @{ */
|
---|
3775 |
|
---|
3776 | /** Report a \#GP instead of \#AC and do not restrict to ring-3 */
|
---|
3777 | #define IEM_MEMMAP_F_ALIGN_GP RT_BIT_32(16)
|
---|
3778 | /** SSE access that should report a \#GP instead of \#AC, unless MXCSR.MM=1
|
---|
3779 | * when it works like normal \#AC. Always used with IEM_MEMMAP_F_ALIGN_GP. */
|
---|
3780 | #define IEM_MEMMAP_F_ALIGN_SSE RT_BIT_32(17)
|
---|
3781 | /** If \#AC is applicable, raise it. Always used with IEM_MEMMAP_F_ALIGN_GP.
|
---|
3782 | * Users include FXSAVE & FXRSTOR. */
|
---|
3783 | #define IEM_MEMMAP_F_ALIGN_GP_OR_AC RT_BIT_32(18)
|
---|
3784 |
|
---|
3785 | VBOXSTRICTRC iemMemMap(PVMCPUCC pVCpu, void **ppvMem, size_t cbMem, uint8_t iSegReg, RTGCPTR GCPtrMem,
|
---|
3786 | uint32_t fAccess, uint32_t uAlignCtl) RT_NOEXCEPT;
|
---|
3787 | VBOXSTRICTRC iemMemCommitAndUnmap(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3788 | #ifndef IN_RING3
|
---|
3789 | VBOXSTRICTRC iemMemCommitAndUnmapPostponeTroubleToR3(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
---|
3790 | #endif
|
---|
3791 | void iemMemRollback(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3792 | VBOXSTRICTRC iemMemApplySegment(PVMCPUCC pVCpu, uint32_t fAccess, uint8_t iSegReg, size_t cbMem, PRTGCPTR pGCPtrMem) RT_NOEXCEPT;
|
---|
3793 | VBOXSTRICTRC iemMemMarkSelDescAccessed(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
3794 | VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT;
|
---|
3795 |
|
---|
3796 | #ifdef IEM_WITH_CODE_TLB
|
---|
3797 | void iemOpcodeFetchBytesJmp(PVMCPUCC pVCpu, size_t cbDst, void *pvDst) RT_NOEXCEPT;
|
---|
3798 | #else
|
---|
3799 | VBOXSTRICTRC iemOpcodeFetchMoreBytes(PVMCPUCC pVCpu, size_t cbMin) RT_NOEXCEPT;
|
---|
3800 | #endif
|
---|
3801 | #ifdef IEM_WITH_SETJMP
|
---|
3802 | uint8_t iemOpcodeGetNextU8SlowJmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3803 | uint16_t iemOpcodeGetNextU16SlowJmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3804 | uint32_t iemOpcodeGetNextU32SlowJmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3805 | uint64_t iemOpcodeGetNextU64SlowJmp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
3806 | #else
|
---|
3807 | VBOXSTRICTRC iemOpcodeGetNextU8Slow(PVMCPUCC pVCpu, uint8_t *pb) RT_NOEXCEPT;
|
---|
3808 | VBOXSTRICTRC iemOpcodeGetNextS8SxU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
---|
3809 | VBOXSTRICTRC iemOpcodeGetNextS8SxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
3810 | VBOXSTRICTRC iemOpcodeGetNextS8SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
3811 | VBOXSTRICTRC iemOpcodeGetNextU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
---|
3812 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
3813 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
3814 | VBOXSTRICTRC iemOpcodeGetNextU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
3815 | VBOXSTRICTRC iemOpcodeGetNextU32ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
3816 | VBOXSTRICTRC iemOpcodeGetNextS32SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
3817 | VBOXSTRICTRC iemOpcodeGetNextU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
3818 | #endif
|
---|
3819 |
|
---|
3820 | VBOXSTRICTRC iemMemFetchDataU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3821 | VBOXSTRICTRC iemMemFetchDataU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3822 | VBOXSTRICTRC iemMemFetchDataU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3823 | VBOXSTRICTRC iemMemFetchDataU32_ZX_U64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3824 | VBOXSTRICTRC iemMemFetchDataU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3825 | VBOXSTRICTRC iemMemFetchDataU64AlignedU128(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3826 | VBOXSTRICTRC iemMemFetchDataR80(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3827 | VBOXSTRICTRC iemMemFetchDataD80(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3828 | VBOXSTRICTRC iemMemFetchDataU128(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3829 | VBOXSTRICTRC iemMemFetchDataU128AlignedSse(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3830 | VBOXSTRICTRC iemMemFetchDataU256(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3831 | VBOXSTRICTRC iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3832 | VBOXSTRICTRC iemMemFetchDataXdtr(PVMCPUCC pVCpu, uint16_t *pcbLimit, PRTGCPTR pGCPtrBase, uint8_t iSegReg,
|
---|
3833 | RTGCPTR GCPtrMem, IEMMODE enmOpSize) RT_NOEXCEPT;
|
---|
3834 | #ifdef IEM_WITH_SETJMP
|
---|
3835 | uint8_t iemMemFetchDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3836 | uint16_t iemMemFetchDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3837 | uint32_t iemMemFetchDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3838 | uint64_t iemMemFetchDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3839 | uint64_t iemMemFetchDataU64AlignedU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3840 | void iemMemFetchDataR80Jmp(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3841 | void iemMemFetchDataD80Jmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3842 | void iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3843 | void iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3844 | void iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3845 | void iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3846 | #endif
|
---|
3847 |
|
---|
3848 | VBOXSTRICTRC iemMemFetchSysU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3849 | VBOXSTRICTRC iemMemFetchSysU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3850 | VBOXSTRICTRC iemMemFetchSysU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3851 | VBOXSTRICTRC iemMemFetchSysU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3852 | VBOXSTRICTRC iemMemFetchSelDesc(PVMCPUCC pVCpu, PIEMSELDESC pDesc, uint16_t uSel, uint8_t uXcpt) RT_NOEXCEPT;
|
---|
3853 |
|
---|
3854 | VBOXSTRICTRC iemMemStoreDataU8(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) RT_NOEXCEPT;
|
---|
3855 | VBOXSTRICTRC iemMemStoreDataU16(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) RT_NOEXCEPT;
|
---|
3856 | VBOXSTRICTRC iemMemStoreDataU32(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) RT_NOEXCEPT;
|
---|
3857 | VBOXSTRICTRC iemMemStoreDataU64(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) RT_NOEXCEPT;
|
---|
3858 | VBOXSTRICTRC iemMemStoreDataU128(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
3859 | VBOXSTRICTRC iemMemStoreDataU128AlignedSse(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
3860 | VBOXSTRICTRC iemMemStoreDataU256(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
3861 | VBOXSTRICTRC iemMemStoreDataU256AlignedAvx(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
3862 | VBOXSTRICTRC iemMemStoreDataXdtr(PVMCPUCC pVCpu, uint16_t cbLimit, RTGCPTR GCPtrBase, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
3863 | #ifdef IEM_WITH_SETJMP
|
---|
3864 | void iemMemStoreDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) RT_NOEXCEPT;
|
---|
3865 | void iemMemStoreDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) RT_NOEXCEPT;
|
---|
3866 | void iemMemStoreDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) RT_NOEXCEPT;
|
---|
3867 | void iemMemStoreDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) RT_NOEXCEPT;
|
---|
3868 | void iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
3869 | void iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
3870 | void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
3871 | void iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
3872 | #endif
|
---|
3873 |
|
---|
3874 | VBOXSTRICTRC iemMemStackPushBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
---|
3875 | void **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
---|
3876 | VBOXSTRICTRC iemMemStackPushCommitSpecial(PVMCPUCC pVCpu, void *pvMem, uint64_t uNewRsp) RT_NOEXCEPT;
|
---|
3877 | VBOXSTRICTRC iemMemStackPushU16(PVMCPUCC pVCpu, uint16_t u16Value) RT_NOEXCEPT;
|
---|
3878 | VBOXSTRICTRC iemMemStackPushU32(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
---|
3879 | VBOXSTRICTRC iemMemStackPushU64(PVMCPUCC pVCpu, uint64_t u64Value) RT_NOEXCEPT;
|
---|
3880 | VBOXSTRICTRC iemMemStackPushU16Ex(PVMCPUCC pVCpu, uint16_t u16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3881 | VBOXSTRICTRC iemMemStackPushU32Ex(PVMCPUCC pVCpu, uint32_t u32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3882 | VBOXSTRICTRC iemMemStackPushU64Ex(PVMCPUCC pVCpu, uint64_t u64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3883 | VBOXSTRICTRC iemMemStackPushU32SReg(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
---|
3884 | VBOXSTRICTRC iemMemStackPopBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
---|
3885 | void const **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
---|
3886 | VBOXSTRICTRC iemMemStackPopContinueSpecial(PVMCPUCC pVCpu, size_t off, size_t cbMem,
|
---|
3887 | void const **ppvMem, uint64_t uCurNewRsp) RT_NOEXCEPT;
|
---|
3888 | VBOXSTRICTRC iemMemStackPopDoneSpecial(PVMCPUCC pVCpu, void const *pvMem) RT_NOEXCEPT;
|
---|
3889 | VBOXSTRICTRC iemMemStackPopU16(PVMCPUCC pVCpu, uint16_t *pu16Value) RT_NOEXCEPT;
|
---|
3890 | VBOXSTRICTRC iemMemStackPopU32(PVMCPUCC pVCpu, uint32_t *pu32Value) RT_NOEXCEPT;
|
---|
3891 | VBOXSTRICTRC iemMemStackPopU64(PVMCPUCC pVCpu, uint64_t *pu64Value) RT_NOEXCEPT;
|
---|
3892 | VBOXSTRICTRC iemMemStackPopU16Ex(PVMCPUCC pVCpu, uint16_t *pu16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3893 | VBOXSTRICTRC iemMemStackPopU32Ex(PVMCPUCC pVCpu, uint32_t *pu32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3894 | VBOXSTRICTRC iemMemStackPopU64Ex(PVMCPUCC pVCpu, uint64_t *pu64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
3895 | /** @} */
|
---|
3896 |
|
---|
3897 | /** @name IEMAllCImpl.cpp
|
---|
3898 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/'
|
---|
3899 | * @{ */
|
---|
3900 | IEM_CIMPL_PROTO_0(iemCImpl_popa_16);
|
---|
3901 | IEM_CIMPL_PROTO_0(iemCImpl_popa_32);
|
---|
3902 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_16);
|
---|
3903 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_32);
|
---|
3904 | IEM_CIMPL_PROTO_1(iemCImpl_pushf, IEMMODE, enmEffOpSize);
|
---|
3905 | IEM_CIMPL_PROTO_1(iemCImpl_popf, IEMMODE, enmEffOpSize);
|
---|
3906 | IEM_CIMPL_PROTO_1(iemCImpl_call_16, uint16_t, uNewPC);
|
---|
3907 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_16, int16_t, offDisp);
|
---|
3908 | IEM_CIMPL_PROTO_1(iemCImpl_call_32, uint32_t, uNewPC);
|
---|
3909 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_32, int32_t, offDisp);
|
---|
3910 | IEM_CIMPL_PROTO_1(iemCImpl_call_64, uint64_t, uNewPC);
|
---|
3911 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_64, int64_t, offDisp);
|
---|
3912 | IEM_CIMPL_PROTO_4(iemCImpl_BranchTaskSegment, uint16_t, uSel, IEMBRANCH, enmBranch, IEMMODE, enmEffOpSize, PIEMSELDESC, pDesc);
|
---|
3913 | IEM_CIMPL_PROTO_4(iemCImpl_BranchTaskGate, uint16_t, uSel, IEMBRANCH, enmBranch, IEMMODE, enmEffOpSize, PIEMSELDESC, pDesc);
|
---|
3914 | IEM_CIMPL_PROTO_4(iemCImpl_BranchCallGate, uint16_t, uSel, IEMBRANCH, enmBranch, IEMMODE, enmEffOpSize, PIEMSELDESC, pDesc);
|
---|
3915 | IEM_CIMPL_PROTO_4(iemCImpl_BranchSysSel, uint16_t, uSel, IEMBRANCH, enmBranch, IEMMODE, enmEffOpSize, PIEMSELDESC, pDesc);
|
---|
3916 | IEM_CIMPL_PROTO_3(iemCImpl_FarJmp, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
---|
3917 | IEM_CIMPL_PROTO_3(iemCImpl_callf, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
---|
3918 | IEM_CIMPL_PROTO_2(iemCImpl_retf, IEMMODE, enmEffOpSize, uint16_t, cbPop);
|
---|
3919 | IEM_CIMPL_PROTO_2(iemCImpl_retn, IEMMODE, enmEffOpSize, uint16_t, cbPop);
|
---|
3920 | IEM_CIMPL_PROTO_3(iemCImpl_enter, IEMMODE, enmEffOpSize, uint16_t, cbFrame, uint8_t, cParameters);
|
---|
3921 | IEM_CIMPL_PROTO_1(iemCImpl_leave, IEMMODE, enmEffOpSize);
|
---|
3922 | IEM_CIMPL_PROTO_2(iemCImpl_int, uint8_t, u8Int, IEMINT, enmInt);
|
---|
3923 | IEM_CIMPL_PROTO_1(iemCImpl_iret_real_v8086, IEMMODE, enmEffOpSize);
|
---|
3924 | IEM_CIMPL_PROTO_4(iemCImpl_iret_prot_v8086, uint32_t, uNewEip, uint16_t, uNewCs, uint32_t, uNewFlags, uint64_t, uNewRsp);
|
---|
3925 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot_NestedTask, IEMMODE, enmEffOpSize);
|
---|
3926 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot, IEMMODE, enmEffOpSize);
|
---|
3927 | IEM_CIMPL_PROTO_1(iemCImpl_iret_64bit, IEMMODE, enmEffOpSize);
|
---|
3928 | IEM_CIMPL_PROTO_1(iemCImpl_iret, IEMMODE, enmEffOpSize);
|
---|
3929 | IEM_CIMPL_PROTO_0(iemCImpl_loadall286);
|
---|
3930 | IEM_CIMPL_PROTO_0(iemCImpl_syscall);
|
---|
3931 | IEM_CIMPL_PROTO_0(iemCImpl_sysret);
|
---|
3932 | IEM_CIMPL_PROTO_0(iemCImpl_sysenter);
|
---|
3933 | IEM_CIMPL_PROTO_1(iemCImpl_sysexit, IEMMODE, enmEffOpSize);
|
---|
3934 | IEM_CIMPL_PROTO_2(iemCImpl_LoadSReg, uint8_t, iSegReg, uint16_t, uSel);
|
---|
3935 | IEM_CIMPL_PROTO_2(iemCImpl_load_SReg, uint8_t, iSegReg, uint16_t, uSel);
|
---|
3936 | IEM_CIMPL_PROTO_2(iemCImpl_pop_Sreg, uint8_t, iSegReg, IEMMODE, enmEffOpSize);
|
---|
3937 | IEM_CIMPL_PROTO_5(iemCImpl_load_SReg_Greg, uint16_t, uSel, uint64_t, offSeg, uint8_t, iSegReg, uint8_t, iGReg, IEMMODE, enmEffOpSize);
|
---|
3938 | IEM_CIMPL_PROTO_2(iemCImpl_VerX, uint16_t, uSel, bool, fWrite);
|
---|
3939 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u64, uint64_t *, pu64Dst, uint16_t, uSel, bool, fIsLar);
|
---|
3940 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u16, uint16_t *, pu16Dst, uint16_t, uSel, bool, fIsLar);
|
---|
3941 | IEM_CIMPL_PROTO_3(iemCImpl_lgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
---|
3942 | IEM_CIMPL_PROTO_2(iemCImpl_sgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
3943 | IEM_CIMPL_PROTO_3(iemCImpl_lidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
---|
3944 | IEM_CIMPL_PROTO_2(iemCImpl_sidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
3945 | IEM_CIMPL_PROTO_1(iemCImpl_lldt, uint16_t, uNewLdt);
|
---|
3946 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
3947 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
3948 | IEM_CIMPL_PROTO_1(iemCImpl_ltr, uint16_t, uNewTr);
|
---|
3949 | IEM_CIMPL_PROTO_2(iemCImpl_str_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
3950 | IEM_CIMPL_PROTO_2(iemCImpl_str_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
3951 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Cd, uint8_t, iGReg, uint8_t, iCrReg);
|
---|
3952 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
3953 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
3954 | IEM_CIMPL_PROTO_4(iemCImpl_load_CrX, uint8_t, iCrReg, uint64_t, uNewCrX, IEMACCESSCRX, enmAccessCrX, uint8_t, iGReg);
|
---|
3955 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Cd_Rd, uint8_t, iCrReg, uint8_t, iGReg);
|
---|
3956 | IEM_CIMPL_PROTO_2(iemCImpl_lmsw, uint16_t, u16NewMsw, RTGCPTR, GCPtrEffDst);
|
---|
3957 | IEM_CIMPL_PROTO_0(iemCImpl_clts);
|
---|
3958 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Dd, uint8_t, iGReg, uint8_t, iDrReg);
|
---|
3959 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Dd_Rd, uint8_t, iDrReg, uint8_t, iGReg);
|
---|
3960 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Td, uint8_t, iGReg, uint8_t, iTrReg);
|
---|
3961 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Td_Rd, uint8_t, iTrReg, uint8_t, iGReg);
|
---|
3962 | IEM_CIMPL_PROTO_1(iemCImpl_invlpg, RTGCPTR, GCPtrPage);
|
---|
3963 | IEM_CIMPL_PROTO_3(iemCImpl_invpcid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvpcidDesc, uint64_t, uInvpcidType);
|
---|
3964 | IEM_CIMPL_PROTO_0(iemCImpl_invd);
|
---|
3965 | IEM_CIMPL_PROTO_0(iemCImpl_wbinvd);
|
---|
3966 | IEM_CIMPL_PROTO_0(iemCImpl_rsm);
|
---|
3967 | IEM_CIMPL_PROTO_0(iemCImpl_rdtsc);
|
---|
3968 | IEM_CIMPL_PROTO_0(iemCImpl_rdtscp);
|
---|
3969 | IEM_CIMPL_PROTO_0(iemCImpl_rdpmc);
|
---|
3970 | IEM_CIMPL_PROTO_0(iemCImpl_rdmsr);
|
---|
3971 | IEM_CIMPL_PROTO_0(iemCImpl_wrmsr);
|
---|
3972 | IEM_CIMPL_PROTO_3(iemCImpl_in, uint16_t, u16Port, bool, fImm, uint8_t, cbReg);
|
---|
3973 | IEM_CIMPL_PROTO_1(iemCImpl_in_eAX_DX, uint8_t, cbReg);
|
---|
3974 | IEM_CIMPL_PROTO_3(iemCImpl_out, uint16_t, u16Port, bool, fImm, uint8_t, cbReg);
|
---|
3975 | IEM_CIMPL_PROTO_1(iemCImpl_out_DX_eAX, uint8_t, cbReg);
|
---|
3976 | IEM_CIMPL_PROTO_0(iemCImpl_cli);
|
---|
3977 | IEM_CIMPL_PROTO_0(iemCImpl_sti);
|
---|
3978 | IEM_CIMPL_PROTO_0(iemCImpl_hlt);
|
---|
3979 | IEM_CIMPL_PROTO_1(iemCImpl_monitor, uint8_t, iEffSeg);
|
---|
3980 | IEM_CIMPL_PROTO_0(iemCImpl_mwait);
|
---|
3981 | IEM_CIMPL_PROTO_0(iemCImpl_swapgs);
|
---|
3982 | IEM_CIMPL_PROTO_0(iemCImpl_cpuid);
|
---|
3983 | IEM_CIMPL_PROTO_1(iemCImpl_aad, uint8_t, bImm);
|
---|
3984 | IEM_CIMPL_PROTO_1(iemCImpl_aam, uint8_t, bImm);
|
---|
3985 | IEM_CIMPL_PROTO_0(iemCImpl_daa);
|
---|
3986 | IEM_CIMPL_PROTO_0(iemCImpl_das);
|
---|
3987 | IEM_CIMPL_PROTO_0(iemCImpl_aaa);
|
---|
3988 | IEM_CIMPL_PROTO_0(iemCImpl_aas);
|
---|
3989 | IEM_CIMPL_PROTO_3(iemCImpl_bound_16, int16_t, idxArray, int16_t, idxLowerBound, int16_t, idxUpperBound);
|
---|
3990 | IEM_CIMPL_PROTO_3(iemCImpl_bound_32, int32_t, idxArray, int32_t, idxLowerBound, int32_t, idxUpperBound);
|
---|
3991 | IEM_CIMPL_PROTO_0(iemCImpl_xgetbv);
|
---|
3992 | IEM_CIMPL_PROTO_0(iemCImpl_xsetbv);
|
---|
3993 | IEM_CIMPL_PROTO_4(iemCImpl_cmpxchg16b_fallback_rendezvous, PRTUINT128U, pu128Dst, PRTUINT128U, pu128RaxRdx,
|
---|
3994 | PRTUINT128U, pu128RbxRcx, uint32_t *, pEFlags);
|
---|
3995 | IEM_CIMPL_PROTO_2(iemCImpl_clflush_clflushopt, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
3996 | IEM_CIMPL_PROTO_1(iemCImpl_finit, bool, fCheckXcpts);
|
---|
3997 | IEM_CIMPL_PROTO_3(iemCImpl_fxsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
3998 | IEM_CIMPL_PROTO_3(iemCImpl_fxrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
3999 | IEM_CIMPL_PROTO_3(iemCImpl_xsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4000 | IEM_CIMPL_PROTO_3(iemCImpl_xrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4001 | IEM_CIMPL_PROTO_2(iemCImpl_stmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4002 | IEM_CIMPL_PROTO_2(iemCImpl_vstmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4003 | IEM_CIMPL_PROTO_2(iemCImpl_ldmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4004 | IEM_CIMPL_PROTO_3(iemCImpl_fnstenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4005 | IEM_CIMPL_PROTO_3(iemCImpl_fnsave, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4006 | IEM_CIMPL_PROTO_3(iemCImpl_fldenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
---|
4007 | IEM_CIMPL_PROTO_3(iemCImpl_frstor, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
---|
4008 | IEM_CIMPL_PROTO_1(iemCImpl_fldcw, uint16_t, u16Fcw);
|
---|
4009 | IEM_CIMPL_PROTO_1(iemCImpl_fxch_underflow, uint8_t, iStReg);
|
---|
4010 | IEM_CIMPL_PROTO_3(iemCImpl_fcomi_fucomi, uint8_t, iStReg, PFNIEMAIMPLFPUR80EFL, pfnAImpl, bool, fPop);
|
---|
4011 | /** @} */
|
---|
4012 |
|
---|
4013 | /** @name IEMAllCImplStrInstr.cpp.h
|
---|
4014 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/' -e 's/RT_CONCAT4(//' \
|
---|
4015 | * -e 's/,ADDR_SIZE)/64/g' -e 's/,OP_SIZE,/64/g' -e 's/,OP_rAX,/rax/g' IEMAllCImplStrInstr.cpp.h
|
---|
4016 | * @{ */
|
---|
4017 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr16, uint8_t, iEffSeg);
|
---|
4018 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr16, uint8_t, iEffSeg);
|
---|
4019 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m16);
|
---|
4020 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m16);
|
---|
4021 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr16, uint8_t, iEffSeg);
|
---|
4022 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m16);
|
---|
4023 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m16, int8_t, iEffSeg);
|
---|
4024 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr16, bool, fIoChecked);
|
---|
4025 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr16, bool, fIoChecked);
|
---|
4026 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4027 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4028 |
|
---|
4029 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr16, uint8_t, iEffSeg);
|
---|
4030 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr16, uint8_t, iEffSeg);
|
---|
4031 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m16);
|
---|
4032 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m16);
|
---|
4033 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr16, uint8_t, iEffSeg);
|
---|
4034 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m16);
|
---|
4035 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m16, int8_t, iEffSeg);
|
---|
4036 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr16, bool, fIoChecked);
|
---|
4037 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr16, bool, fIoChecked);
|
---|
4038 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4039 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4040 |
|
---|
4041 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr16, uint8_t, iEffSeg);
|
---|
4042 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr16, uint8_t, iEffSeg);
|
---|
4043 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m16);
|
---|
4044 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m16);
|
---|
4045 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr16, uint8_t, iEffSeg);
|
---|
4046 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m16);
|
---|
4047 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m16, int8_t, iEffSeg);
|
---|
4048 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr16, bool, fIoChecked);
|
---|
4049 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr16, bool, fIoChecked);
|
---|
4050 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4051 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4052 |
|
---|
4053 |
|
---|
4054 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr32, uint8_t, iEffSeg);
|
---|
4055 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr32, uint8_t, iEffSeg);
|
---|
4056 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m32);
|
---|
4057 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m32);
|
---|
4058 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr32, uint8_t, iEffSeg);
|
---|
4059 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m32);
|
---|
4060 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m32, int8_t, iEffSeg);
|
---|
4061 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr32, bool, fIoChecked);
|
---|
4062 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr32, bool, fIoChecked);
|
---|
4063 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4064 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4065 |
|
---|
4066 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr32, uint8_t, iEffSeg);
|
---|
4067 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr32, uint8_t, iEffSeg);
|
---|
4068 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m32);
|
---|
4069 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m32);
|
---|
4070 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr32, uint8_t, iEffSeg);
|
---|
4071 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m32);
|
---|
4072 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m32, int8_t, iEffSeg);
|
---|
4073 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr32, bool, fIoChecked);
|
---|
4074 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr32, bool, fIoChecked);
|
---|
4075 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4076 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4077 |
|
---|
4078 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr32, uint8_t, iEffSeg);
|
---|
4079 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr32, uint8_t, iEffSeg);
|
---|
4080 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m32);
|
---|
4081 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m32);
|
---|
4082 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr32, uint8_t, iEffSeg);
|
---|
4083 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m32);
|
---|
4084 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m32, int8_t, iEffSeg);
|
---|
4085 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr32, bool, fIoChecked);
|
---|
4086 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr32, bool, fIoChecked);
|
---|
4087 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4088 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4089 |
|
---|
4090 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr32, uint8_t, iEffSeg);
|
---|
4091 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr32, uint8_t, iEffSeg);
|
---|
4092 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m32);
|
---|
4093 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m32);
|
---|
4094 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr32, uint8_t, iEffSeg);
|
---|
4095 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m32);
|
---|
4096 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m32, int8_t, iEffSeg);
|
---|
4097 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr32, bool, fIoChecked);
|
---|
4098 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr32, bool, fIoChecked);
|
---|
4099 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4100 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4101 |
|
---|
4102 |
|
---|
4103 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr64, uint8_t, iEffSeg);
|
---|
4104 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr64, uint8_t, iEffSeg);
|
---|
4105 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m64);
|
---|
4106 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m64);
|
---|
4107 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr64, uint8_t, iEffSeg);
|
---|
4108 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m64);
|
---|
4109 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m64, int8_t, iEffSeg);
|
---|
4110 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr64, bool, fIoChecked);
|
---|
4111 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr64, bool, fIoChecked);
|
---|
4112 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4113 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4114 |
|
---|
4115 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr64, uint8_t, iEffSeg);
|
---|
4116 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr64, uint8_t, iEffSeg);
|
---|
4117 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m64);
|
---|
4118 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m64);
|
---|
4119 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr64, uint8_t, iEffSeg);
|
---|
4120 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m64);
|
---|
4121 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m64, int8_t, iEffSeg);
|
---|
4122 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr64, bool, fIoChecked);
|
---|
4123 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr64, bool, fIoChecked);
|
---|
4124 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4125 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4126 |
|
---|
4127 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr64, uint8_t, iEffSeg);
|
---|
4128 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr64, uint8_t, iEffSeg);
|
---|
4129 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m64);
|
---|
4130 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m64);
|
---|
4131 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr64, uint8_t, iEffSeg);
|
---|
4132 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m64);
|
---|
4133 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m64, int8_t, iEffSeg);
|
---|
4134 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr64, bool, fIoChecked);
|
---|
4135 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr64, bool, fIoChecked);
|
---|
4136 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4137 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4138 |
|
---|
4139 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr64, uint8_t, iEffSeg);
|
---|
4140 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr64, uint8_t, iEffSeg);
|
---|
4141 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m64);
|
---|
4142 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m64);
|
---|
4143 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr64, uint8_t, iEffSeg);
|
---|
4144 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m64);
|
---|
4145 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m64, int8_t, iEffSeg);
|
---|
4146 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr64, bool, fIoChecked);
|
---|
4147 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr64, bool, fIoChecked);
|
---|
4148 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4149 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4150 | /** @} */
|
---|
4151 |
|
---|
4152 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
4153 | VBOXSTRICTRC iemVmxVmexit(PVMCPUCC pVCpu, uint32_t uExitReason, uint64_t u64ExitQual) RT_NOEXCEPT;
|
---|
4154 | VBOXSTRICTRC iemVmxVmexitInstr(PVMCPUCC pVCpu, uint32_t uExitReason, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4155 | VBOXSTRICTRC iemVmxVmexitInstrNeedsInfo(PVMCPUCC pVCpu, uint32_t uExitReason, VMXINSTRID uInstrId, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4156 | VBOXSTRICTRC iemVmxVmexitTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, RTSEL SelNewTss, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4157 | VBOXSTRICTRC iemVmxVmexitEvent(PVMCPUCC pVCpu, uint8_t uVector, uint32_t fFlags, uint32_t uErrCode, uint64_t uCr2, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4158 | VBOXSTRICTRC iemVmxVmexitEventDoubleFault(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4159 | VBOXSTRICTRC iemVmxVmexitEpt(PVMCPUCC pVCpu, PPGMPTWALK pWalk, uint32_t fAccess, uint32_t fSlatFail, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4160 | VBOXSTRICTRC iemVmxVmexitPreemptTimer(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4161 | VBOXSTRICTRC iemVmxVmexitInstrMwait(PVMCPUCC pVCpu, bool fMonitorHwArmed, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4162 | VBOXSTRICTRC iemVmxVmexitInstrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port,
|
---|
4163 | bool fImm, uint8_t cbAccess, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4164 | VBOXSTRICTRC iemVmxVmexitInstrStrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port, uint8_t cbAccess,
|
---|
4165 | bool fRep, VMXEXITINSTRINFO ExitInstrInfo, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4166 | VBOXSTRICTRC iemVmxVmexitInstrMovDrX(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint8_t iDrReg, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4167 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4168 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4169 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr3(PVMCPUCC pVCpu, uint64_t uNewCr3, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4170 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr3(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4171 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr0Cr4(PVMCPUCC pVCpu, uint8_t iCrReg, uint64_t *puNewCrX, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4172 | VBOXSTRICTRC iemVmxVmexitInstrClts(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4173 | VBOXSTRICTRC iemVmxVmexitInstrLmsw(PVMCPUCC pVCpu, uint32_t uGuestCr0, uint16_t *pu16NewMsw,
|
---|
4174 | RTGCPTR GCPtrEffDst, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4175 | VBOXSTRICTRC iemVmxVmexitInstrInvlpg(PVMCPUCC pVCpu, RTGCPTR GCPtrPage, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4176 | VBOXSTRICTRC iemVmxApicWriteEmulation(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4177 | VBOXSTRICTRC iemVmxVirtApicAccessUnused(PVMCPUCC pVCpu, PRTGCPHYS pGCPhysAccess, size_t cbAccess, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4178 | uint32_t iemVmxVirtApicReadRaw32(PVMCPUCC pVCpu, uint16_t offReg) RT_NOEXCEPT;
|
---|
4179 | void iemVmxVirtApicWriteRaw32(PVMCPUCC pVCpu, uint16_t offReg, uint32_t uReg) RT_NOEXCEPT;
|
---|
4180 | VBOXSTRICTRC iemVmxInvvpid(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t iEffSeg, RTGCPTR GCPtrInvvpidDesc,
|
---|
4181 | uint64_t u64InvvpidType, PCVMXVEXITINFO pExitInfo) RT_NOEXCEPT;
|
---|
4182 | bool iemVmxIsRdmsrWrmsrInterceptSet(PCVMCPU pVCpu, uint32_t uExitReason, uint32_t idMsr) RT_NOEXCEPT;
|
---|
4183 | IEM_CIMPL_PROTO_0(iemCImpl_vmxoff);
|
---|
4184 | IEM_CIMPL_PROTO_2(iemCImpl_vmxon, uint8_t, iEffSeg, RTGCPTR, GCPtrVmxon);
|
---|
4185 | IEM_CIMPL_PROTO_0(iemCImpl_vmlaunch);
|
---|
4186 | IEM_CIMPL_PROTO_0(iemCImpl_vmresume);
|
---|
4187 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrld, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4188 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrst, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4189 | IEM_CIMPL_PROTO_2(iemCImpl_vmclear, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4190 | IEM_CIMPL_PROTO_2(iemCImpl_vmwrite_reg, uint64_t, u64Val, uint64_t, u64VmcsField);
|
---|
4191 | IEM_CIMPL_PROTO_3(iemCImpl_vmwrite_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrVal, uint32_t, u64VmcsField);
|
---|
4192 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg64, uint64_t *, pu64Dst, uint64_t, u64VmcsField);
|
---|
4193 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg32, uint32_t *, pu32Dst, uint32_t, u32VmcsField);
|
---|
4194 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg64, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u64VmcsField);
|
---|
4195 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg32, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u32VmcsField);
|
---|
4196 | IEM_CIMPL_PROTO_3(iemCImpl_invvpid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvvpidDesc, uint64_t, uInvvpidType);
|
---|
4197 | IEM_CIMPL_PROTO_3(iemCImpl_invept, uint8_t, iEffSeg, RTGCPTR, GCPtrInveptDesc, uint64_t, uInveptType);
|
---|
4198 | IEM_CIMPL_PROTO_0(iemCImpl_vmx_pause);
|
---|
4199 | #endif
|
---|
4200 |
|
---|
4201 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
---|
4202 | VBOXSTRICTRC iemSvmVmexit(PVMCPUCC pVCpu, uint64_t uExitCode, uint64_t uExitInfo1, uint64_t uExitInfo2) RT_NOEXCEPT;
|
---|
4203 | VBOXSTRICTRC iemHandleSvmEventIntercept(PVMCPUCC pVCpu, uint8_t u8Vector, uint32_t fFlags, uint32_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
---|
4204 | VBOXSTRICTRC iemSvmHandleIOIntercept(PVMCPUCC pVCpu, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg,
|
---|
4205 | uint8_t cAddrSizeBits, uint8_t iEffSeg, bool fRep, bool fStrIo, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4206 | VBOXSTRICTRC iemSvmHandleMsrIntercept(PVMCPUCC pVCpu, uint32_t idMsr, bool fWrite) RT_NOEXCEPT;
|
---|
4207 | IEM_CIMPL_PROTO_0(iemCImpl_vmrun);
|
---|
4208 | IEM_CIMPL_PROTO_0(iemCImpl_vmload);
|
---|
4209 | IEM_CIMPL_PROTO_0(iemCImpl_vmsave);
|
---|
4210 | IEM_CIMPL_PROTO_0(iemCImpl_clgi);
|
---|
4211 | IEM_CIMPL_PROTO_0(iemCImpl_stgi);
|
---|
4212 | IEM_CIMPL_PROTO_0(iemCImpl_invlpga);
|
---|
4213 | IEM_CIMPL_PROTO_0(iemCImpl_skinit);
|
---|
4214 | IEM_CIMPL_PROTO_0(iemCImpl_svm_pause);
|
---|
4215 | #endif
|
---|
4216 |
|
---|
4217 | IEM_CIMPL_PROTO_0(iemCImpl_vmcall); /* vmx */
|
---|
4218 | IEM_CIMPL_PROTO_0(iemCImpl_vmmcall); /* svm */
|
---|
4219 | IEM_CIMPL_PROTO_1(iemCImpl_Hypercall, uint16_t, uDisOpcode); /* both */
|
---|
4220 |
|
---|
4221 |
|
---|
4222 | extern const PFNIEMOP g_apfnOneByteMap[256];
|
---|
4223 |
|
---|
4224 | /** @} */
|
---|
4225 |
|
---|
4226 | RT_C_DECLS_END
|
---|
4227 |
|
---|
4228 | #endif /* !VMM_INCLUDED_SRC_include_IEMInternal_h */
|
---|
4229 |
|
---|