IEMInternal.h@ 55909

Last change on this file since 55909 was 55229, checked in by vboxsync, 10 years ago
CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 63.4 KB

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1	/* $Id: IEMInternal.h 55229 2015-04-14 06:35:43Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** @def IEM_VERIFICATION_MODE_FULL
37	* Shorthand for:
38	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
39	*/
40	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
41	# define IEM_VERIFICATION_MODE_FULL
42	#endif
43
44
45	/** Finish and move to types.h */
46	typedef union
47	{
48	uint32_t u32;
49	} RTFLOAT32U;
50	typedef RTFLOAT32U *PRTFLOAT32U;
51	typedef RTFLOAT32U const *PCRTFLOAT32U;
52
53
54	/**
55	* Extended operand mode that includes a representation of 8-bit.
56	*
57	* This is used for packing down modes when invoking some C instruction
58	* implementations.
59	*/
60	typedef enum IEMMODEX
61	{
62	IEMMODEX_16BIT = IEMMODE_16BIT,
63	IEMMODEX_32BIT = IEMMODE_32BIT,
64	IEMMODEX_64BIT = IEMMODE_64BIT,
65	IEMMODEX_8BIT
66	} IEMMODEX;
67	AssertCompileSize(IEMMODEX, 4);
68
69
70	/**
71	* Branch types.
72	*/
73	typedef enum IEMBRANCH
74	{
75	IEMBRANCH_JUMP = 1,
76	IEMBRANCH_CALL,
77	IEMBRANCH_TRAP,
78	IEMBRANCH_SOFTWARE_INT,
79	IEMBRANCH_HARDWARE_INT
80	} IEMBRANCH;
81	AssertCompileSize(IEMBRANCH, 4);
82
83
84	/**
85	* A FPU result.
86	*/
87	typedef struct IEMFPURESULT
88	{
89	/** The output value. */
90	RTFLOAT80U r80Result;
91	/** The output status. */
92	uint16_t FSW;
93	} IEMFPURESULT;
94	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
95	/** Pointer to a FPU result. */
96	typedef IEMFPURESULT *PIEMFPURESULT;
97	/** Pointer to a const FPU result. */
98	typedef IEMFPURESULT const *PCIEMFPURESULT;
99
100
101	/**
102	* A FPU result consisting of two output values and FSW.
103	*/
104	typedef struct IEMFPURESULTTWO
105	{
106	/** The first output value. */
107	RTFLOAT80U r80Result1;
108	/** The output status. */
109	uint16_t FSW;
110	/** The second output value. */
111	RTFLOAT80U r80Result2;
112	} IEMFPURESULTTWO;
113	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
114	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
115	/** Pointer to a FPU result consisting of two output values and FSW. */
116	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
117	/** Pointer to a const FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
119
120
121	#ifdef IEM_VERIFICATION_MODE_FULL
122
123	/**
124	* Verification event type.
125	*/
126	typedef enum IEMVERIFYEVENT
127	{
128	IEMVERIFYEVENT_INVALID = 0,
129	IEMVERIFYEVENT_IOPORT_READ,
130	IEMVERIFYEVENT_IOPORT_WRITE,
131	IEMVERIFYEVENT_RAM_WRITE,
132	IEMVERIFYEVENT_RAM_READ
133	} IEMVERIFYEVENT;
134
135	/** Checks if the event type is a RAM read or write. */
136	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
137
138	/**
139	* Verification event record.
140	*/
141	typedef struct IEMVERIFYEVTREC
142	{
143	/** Pointer to the next record in the list. */
144	struct IEMVERIFYEVTREC *pNext;
145	/** The event type. */
146	IEMVERIFYEVENT enmEvent;
147	/** The event data. */
148	union
149	{
150	/** IEMVERIFYEVENT_IOPORT_READ */
151	struct
152	{
153	RTIOPORT Port;
154	uint32_t cbValue;
155	} IOPortRead;
156
157	/** IEMVERIFYEVENT_IOPORT_WRITE */
158	struct
159	{
160	RTIOPORT Port;
161	uint32_t cbValue;
162	uint32_t u32Value;
163	} IOPortWrite;
164
165	/** IEMVERIFYEVENT_RAM_READ */
166	struct
167	{
168	RTGCPHYS GCPhys;
169	uint32_t cb;
170	} RamRead;
171
172	/** IEMVERIFYEVENT_RAM_WRITE */
173	struct
174	{
175	RTGCPHYS GCPhys;
176	uint32_t cb;
177	uint8_t ab[512];
178	} RamWrite;
179	} u;
180	} IEMVERIFYEVTREC;
181	/** Pointer to an IEM event verification records. */
182	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
183
184	#endif /* IEM_VERIFICATION_MODE_FULL */
185
186
187	/**
188	* The per-CPU IEM state.
189	*/
190	typedef struct IEMCPU
191	{
192	/** Pointer to the CPU context - ring-3 context. */
193	R3PTRTYPE(PCPUMCTX) pCtxR3;
194	/** Pointer to the CPU context - ring-0 context. */
195	R0PTRTYPE(PCPUMCTX) pCtxR0;
196	/** Pointer to the CPU context - raw-mode context. */
197	RCPTRTYPE(PCPUMCTX) pCtxRC;
198
199	/** Offset of the VMCPU structure relative to this structure (negative). */
200	int32_t offVMCpu;
201	/** Offset of the VM structure relative to this structure (negative). */
202	int32_t offVM;
203
204	/** Whether to bypass access handlers or not. */
205	bool fBypassHandlers;
206	/** Indicates that we're interpreting patch code - RC only! */
207	bool fInPatchCode;
208	/** Explicit alignment padding. */
209	bool afAlignment0[2];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE_FULL
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
264	bool fProblematicMemory;
265	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
266	* CPUM doesn't yet reflect. */
267	uint8_t uInjectCpl;
268	bool afAlignment2[3];
269	/** Mask of undefined eflags.
270	* The verifier will any difference in these flags. */
271	uint32_t fUndefinedEFlags;
272	/** The CS of the instruction being interpreted. */
273	RTSEL uOldCs;
274	/** The RIP of the instruction being interpreted. */
275	uint64_t uOldRip;
276	/** The physical address corresponding to abOpcodes[0]. */
277	RTGCPHYS GCPhysOpcodes;
278	#endif
279	/** @} */
280
281	/** @name Decoder state.
282	* @{ */
283
284	/** The default addressing mode . */
285	IEMMODE enmDefAddrMode;
286	/** The effective addressing mode . */
287	IEMMODE enmEffAddrMode;
288	/** The default operand mode . */
289	IEMMODE enmDefOpSize;
290	/** The effective operand mode . */
291	IEMMODE enmEffOpSize;
292
293	/** The prefix mask (IEM_OP_PRF_XXX). */
294	uint32_t fPrefixes;
295	/** The extra REX ModR/M register field bit (REX.R << 3). */
296	uint8_t uRexReg;
297	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
298	* (REX.B << 3). */
299	uint8_t uRexB;
300	/** The extra REX SIB index field bit (REX.X << 3). */
301	uint8_t uRexIndex;
302	/** The effective segment register (X86_SREG_XXX). */
303	uint8_t iEffSeg;
304
305	/** The current offset into abOpcodes. */
306	uint8_t offOpcode;
307	/** The size of what has currently been fetched into abOpcodes. */
308	uint8_t cbOpcode;
309	/** The opcode bytes. */
310	uint8_t abOpcode[15];
311	/** Offset into abOpcodes where the FPU instruction starts.
312	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
313	* instruction result is committed. */
314	uint8_t offFpuOpcode;
315
316	/** @}*/
317
318	/** Alignment padding for aMemMappings. */
319	uint8_t abAlignment2[4];
320
321	/** The number of active guest memory mappings. */
322	uint8_t cActiveMappings;
323	/** The next unused mapping index. */
324	uint8_t iNextMapping;
325	/** Records for tracking guest memory mappings. */
326	struct
327	{
328	/** The address of the mapped bytes. */
329	void *pv;
330	#if defined(IN_RC) && HC_ARCH_BITS == 64
331	uint32_t u32Alignment3; /*< Alignment padding. /
332	#endif
333	/** The access flags (IEM_ACCESS_XXX).
334	* IEM_ACCESS_INVALID if the entry is unused. */
335	uint32_t fAccess;
336	#if HC_ARCH_BITS == 64
337	uint32_t u32Alignment4; /*< Alignment padding. /
338	#endif
339	} aMemMappings[3];
340
341	/** Locking records for the mapped memory. */
342	union
343	{
344	PGMPAGEMAPLOCK Lock;
345	uint64_t au64Padding[2];
346	} aMemMappingLocks[3];
347
348	/** Bounce buffer info.
349	* This runs in parallel to aMemMappings. */
350	struct
351	{
352	/** The physical address of the first byte. */
353	RTGCPHYS GCPhysFirst;
354	/** The physical address of the second page. */
355	RTGCPHYS GCPhysSecond;
356	/** The number of bytes in the first page. */
357	uint16_t cbFirst;
358	/** The number of bytes in the second page. */
359	uint16_t cbSecond;
360	/** Whether it's unassigned memory. */
361	bool fUnassigned;
362	/** Explicit alignment padding. */
363	bool afAlignment5[3];
364	} aMemBbMappings[3];
365
366	/** Bounce buffer storage.
367	* This runs in parallel to aMemMappings and aMemBbMappings. */
368	struct
369	{
370	uint8_t ab[512];
371	} aBounceBuffers[3];
372
373	/** @name Target CPU information.
374	* @{ */
375	/** The CPU vendor. */
376	CPUMCPUVENDOR enmCpuVendor;
377	/** @} */
378
379	/** @name Host CPU information.
380	* @{ */
381	/** The CPU vendor. */
382	CPUMCPUVENDOR enmHostCpuVendor;
383	/** @} */
384
385	#ifdef IEM_VERIFICATION_MODE_FULL
386	/** The event verification records for what IEM did (LIFO). */
387	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
388	/** Insertion point for pIemEvtRecHead. */
389	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
390	/** The event verification records for what the other party did (FIFO). */
391	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
392	/** Insertion point for pOtherEvtRecHead. */
393	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
394	/** List of free event records. */
395	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
396	#endif
397	} IEMCPU;
398	/** Pointer to the per-CPU IEM state. */
399	typedef IEMCPU *PIEMCPU;
400	/** Pointer to the const per-CPU IEM state. */
401	typedef IEMCPU const *PCIEMCPU;
402
403	/** Converts a IEMCPU pointer to a VMCPU pointer.
404	* @returns VMCPU pointer.
405	* @param a_pIemCpu The IEM per CPU instance data.
406	*/
407	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
408
409	/** Converts a IEMCPU pointer to a VM pointer.
410	* @returns VM pointer.
411	* @param a_pIemCpu The IEM per CPU instance data.
412	*/
413	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
414
415	/** @name IEM_ACCESS_XXX - Access details.
416	* @{ */
417	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
418	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
419	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
420	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
421	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
422	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
423	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
424	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
425	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
426	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
427	/** The writes are partial, so if initialize the bounce buffer with the
428	* orignal RAM content. */
429	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
430	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
431	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
432	/** Read+write data alias. */
433	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
434	/** Write data alias. */
435	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
436	/** Read data alias. */
437	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
438	/** Instruction fetch alias. */
439	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
440	/** Stack write alias. */
441	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
442	/** Stack read alias. */
443	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
444	/** Stack read+write alias. */
445	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
446	/** Read system table alias. */
447	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
448	/** Read+write system table alias. */
449	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
450	/** @} */
451
452	/** @name Prefix constants (IEMCPU::fPrefixes)
453	* @{ */
454	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
455	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
456	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
457	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
458	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
459	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
460	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
461
462	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
463	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
464	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
465
466	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
467	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
468	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
469
470	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
471	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
472	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
473	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
474	/** Mask with all the REX prefix flags.
475	* This is generally for use when needing to undo the REX prefixes when they
476	* are followed legacy prefixes and therefore does not immediately preceed
477	* the first opcode byte.
478	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
479	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
480	/** @} */
481
482	/** @name Opcode forms
483	* @{ */
484	/** ModR/M: reg, r/m */
485	#define IEMOPFORM_RM 0
486	/** ModR/M: reg, r/m (register) */
487	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
488	/** ModR/M: reg, r/m (memory) */
489	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
490	/** ModR/M: r/m, reg */
491	#define IEMOPFORM_MR 1
492	/** ModR/M: r/m (register), reg */
493	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
494	/** ModR/M: r/m (memory), reg */
495	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
496	/** ModR/M: r/m only */
497	#define IEMOPFORM_M 2
498	/** ModR/M: r/m only (register). */
499	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
500	/** ModR/M: r/m only (memory). */
501	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
502	/** ModR/M: reg only */
503	#define IEMOPFORM_R 3
504
505	/** Fixed register instruction, no R/M. */
506	#define IEMOPFORM_FIXED 4
507
508	/** The r/m is a register. */
509	#define IEMOPFORM_MOD3 RT_BIT_32(8)
510	/** The r/m is a memory access. */
511	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
512	/** @} */
513
514	/**
515	* Possible hardware task switch sources.
516	*/
517	typedef enum IEMTASKSWITCH
518	{
519	/** Task switch caused by an interrupt/exception. */
520	IEMTASKSWITCH_INT_XCPT = 1,
521	/** Task switch caused by a far CALL. */
522	IEMTASKSWITCH_CALL,
523	/** Task switch caused by a far JMP. */
524	IEMTASKSWITCH_JUMP,
525	/** Task switch caused by an IRET. */
526	IEMTASKSWITCH_IRET
527	} IEMTASKSWITCH;
528	AssertCompileSize(IEMTASKSWITCH, 4);
529
530
531	/**
532	* Tests if verification mode is enabled.
533	*
534	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
535	* should therefore cause the compiler to eliminate the verification branch
536	* of an if statement. */
537	#ifdef IEM_VERIFICATION_MODE_FULL
538	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
539	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
540	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
541	#else
542	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
543	#endif
544
545	/**
546	* Tests if full verification mode is enabled.
547	*
548	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
549	* should therefore cause the compiler to eliminate the verification branch
550	* of an if statement. */
551	#ifdef IEM_VERIFICATION_MODE_FULL
552	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
553	#else
554	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
555	#endif
556
557	/**
558	* Tests if full verification mode is enabled again REM.
559	*
560	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
561	* should therefore cause the compiler to eliminate the verification branch
562	* of an if statement. */
563	#ifdef IEM_VERIFICATION_MODE_FULL
564	# ifdef IEM_VERIFICATION_MODE_FULL_HM
565	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
566	# else
567	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
568	# endif
569	#else
570	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
571	#endif
572
573	/** @def IEM_VERIFICATION_MODE
574	* Indicates that one of the verfication modes are enabled.
575	*/
576	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
577	# define IEM_VERIFICATION_MODE
578	#endif
579
580	/**
581	* Indicates to the verifier that the given flag set is undefined.
582	*
583	* Can be invoked again to add more flags.
584	*
585	* This is a NOOP if the verifier isn't compiled in.
586	*/
587	#ifdef IEM_VERIFICATION_MODE_FULL
588	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
589	#else
590	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
591	#endif
592
593
594	/** @def IEM_DECL_IMPL_TYPE
595	* For typedef'ing an instruction implementation function.
596	*
597	* @param a_RetType The return type.
598	* @param a_Name The name of the type.
599	* @param a_ArgList The argument list enclosed in parentheses.
600	*/
601
602	/** @def IEM_DECL_IMPL_DEF
603	* For defining an instruction implementation function.
604	*
605	* @param a_RetType The return type.
606	* @param a_Name The name of the type.
607	* @param a_ArgList The argument list enclosed in parentheses.
608	*/
609
610	#if defined(__GNUC__) && defined(RT_ARCH_X86)
611	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
612	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
613	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
614	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
615
616	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
617	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
618	a_RetType (__fastcall a_Name) a_ArgList
619	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
620	a_RetType __fastcall a_Name a_ArgList
621
622	#else
623	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
624	a_RetType (VBOXCALL a_Name) a_ArgList
625	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
626	a_RetType VBOXCALL a_Name a_ArgList
627
628	#endif
629
630	/** @name Arithmetic assignment operations on bytes (binary).
631	* @{ */
632	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
633	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
634	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
635	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
636	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
637	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
638	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
639	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
640	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
641	/** @} */
642
643	/** @name Arithmetic assignment operations on words (binary).
644	* @{ */
645	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
646	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
647	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
648	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
649	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
650	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
651	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
652	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
653	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
654	/** @} */
655
656	/** @name Arithmetic assignment operations on double words (binary).
657	* @{ */
658	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
659	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
660	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
661	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
662	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
663	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
664	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
665	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
666	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
667	/** @} */
668
669	/** @name Arithmetic assignment operations on quad words (binary).
670	* @{ */
671	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
672	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
673	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
674	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
675	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
676	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
677	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
678	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
679	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
680	/** @} */
681
682	/** @name Compare operations (thrown in with the binary ops).
683	* @{ */
684	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
685	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
686	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
687	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
688	/** @} */
689
690	/** @name Test operations (thrown in with the binary ops).
691	* @{ */
692	FNIEMAIMPLBINU8 iemAImpl_test_u8;
693	FNIEMAIMPLBINU16 iemAImpl_test_u16;
694	FNIEMAIMPLBINU32 iemAImpl_test_u32;
695	FNIEMAIMPLBINU64 iemAImpl_test_u64;
696	/** @} */
697
698	/** @name Bit operations operations (thrown in with the binary ops).
699	* @{ */
700	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
701	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
702	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
703	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
704	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
705	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
706	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
707	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
708	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
709	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
710	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
711	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
712	/** @} */
713
714	/** @name Exchange memory with register operations.
715	* @{ */
716	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
717	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
718	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
719	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
720	/** @} */
721
722	/** @name Exchange and add operations.
723	* @{ */
724	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
725	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
726	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
727	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
728	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
729	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
730	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
731	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
732	/** @} */
733
734	/** @name Compare and exchange.
735	* @{ */
736	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
738	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
739	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
740	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
741	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
742	#ifdef RT_ARCH_X86
743	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
744	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
745	#else
746	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
747	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
748	#endif
749	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
750	uint32_t *pEFlags));
751	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
752	uint32_t *pEFlags));
753	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
754	uint32_t *pEFlags));
755	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
756	uint32_t *pEFlags));
757	/** @} */
758
759	/** @name Memory ordering
760	* @{ */
761	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
762	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
763	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
764	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
765	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
766	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
767	/** @} */
768
769	/** @name Double precision shifts
770	* @{ */
771	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
772	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
773	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
774	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
775	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
776	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
777	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
778	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
779	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
780	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
781	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
782	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
783	/** @} */
784
785
786	/** @name Bit search operations (thrown in with the binary ops).
787	* @{ */
788	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
789	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
790	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
791	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
792	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
793	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
794	/** @} */
795
796	/** @name Signed multiplication operations (thrown in with the binary ops).
797	* @{ */
798	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
799	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
800	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
801	/** @} */
802
803	/** @name Arithmetic assignment operations on bytes (unary).
804	* @{ */
805	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
806	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
807	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
808	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
809	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
810	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
811	/** @} */
812
813	/** @name Arithmetic assignment operations on words (unary).
814	* @{ */
815	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
816	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
817	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
818	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
819	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
820	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
821	/** @} */
822
823	/** @name Arithmetic assignment operations on double words (unary).
824	* @{ */
825	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
826	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
827	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
828	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
829	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
830	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
831	/** @} */
832
833	/** @name Arithmetic assignment operations on quad words (unary).
834	* @{ */
835	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
836	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
837	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
838	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
839	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
840	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
841	/** @} */
842
843
844	/** @name Shift operations on bytes (Group 2).
845	* @{ */
846	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
847	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
848	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
849	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
850	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
851	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
852	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
853	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
854	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
855	/** @} */
856
857	/** @name Shift operations on words (Group 2).
858	* @{ */
859	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
860	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
861	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
862	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
863	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
864	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
865	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
866	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
867	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
868	/** @} */
869
870	/** @name Shift operations on double words (Group 2).
871	* @{ */
872	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
873	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
874	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
875	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
876	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
877	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
878	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
879	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
880	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
881	/** @} */
882
883	/** @name Shift operations on words (Group 2).
884	* @{ */
885	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
886	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
887	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
888	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
889	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
890	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
891	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
892	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
893	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
894	/** @} */
895
896	/** @name Multiplication and division operations.
897	* @{ */
898	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
899	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
900	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
901	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
902
903	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
904	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
905	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
906	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
907
908	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
909	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
910	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
911	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
912
913	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
914	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
915	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
916	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
917	/** @} */
918
919	/** @name Byte Swap.
920	* @{ */
921	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
922	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
923	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
924	/** @} */
925
926	/** @name Misc.
927	* @{ */
928	FNIEMAIMPLBINU16 iemAImpl_arpl;
929	/** @} */
930
931
932	/** @name FPU operations taking a 32-bit float argument
933	* @{ */
934	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
935	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
936	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
937
938	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
939	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
940	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
941
942	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
943	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
944	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
945	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
946	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
947	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
948	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
949
950	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
951	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
952	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
953	/** @} */
954
955	/** @name FPU operations taking a 64-bit float argument
956	* @{ */
957	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
958	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
959	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
960
961	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
962	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
963	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
964	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
965	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
966	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
967
968	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
969	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
970	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
971	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
972	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
973	/** @} */
974
975	/** @name FPU operations taking a 80-bit float argument
976	* @{ */
977	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
978	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
979	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
980	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
981	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
982	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
983	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
984	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
985	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
986	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
987	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
988	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
989
990	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
991	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
992
993	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
994	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
995	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
996	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
997	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
998
999	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1000	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1001	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1002	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1003	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1004
1005	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1006	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1007	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1008	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1009	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1010	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1011	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1012	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1013	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1014	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1015
1016	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1017	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1018	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1019	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1020
1021	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1022	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1023	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1024	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1025	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1026	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1027	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1028	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1029	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1030
1031	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1032	PCRTFLOAT80U pr80Val));
1033	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1034	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1035	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1036	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1037
1038	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1039	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1040	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1041
1042	/** @} */
1043
1044	/** @name FPU operations taking a 16-bit signed integer argument
1045	* @{ */
1046	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1047	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1048	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1049
1050	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1051	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1052	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1053	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1054	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1055	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1056
1057	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1058	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1059
1060	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1061	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1062	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1063	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1064	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1065	/** @} */
1066
1067	/** @name FPU operations taking a 32-bit signed integer argument
1068	* @{ */
1069	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1070	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1071	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1072
1073	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1074	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1075	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1076	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1077	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1078	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1079
1080	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1081	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1082
1083	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1084	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1085	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1086	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1087	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1088	/** @} */
1089
1090	/** @name FPU operations taking a 64-bit signed integer argument
1091	* @{ */
1092	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1093	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1094	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1095
1096	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1097	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1098	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1099	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1100	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1101	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1102
1103	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1104	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1105
1106	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1107	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1108	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1109	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1110	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1111	/** @} */
1112
1113
1114	/** Temporary type representing a 256-bit vector register. */
1115	typedef struct {uint64_t au64[4]; } IEMVMM256;
1116	/** Temporary type pointing to a 256-bit vector register. */
1117	typedef IEMVMM256 *PIEMVMM256;
1118	/** Temporary type pointing to a const 256-bit vector register. */
1119	typedef IEMVMM256 *PCIEMVMM256;
1120
1121
1122	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1123	* @{ */
1124	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1125	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1126	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1127	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1128	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1129	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1130	/** @} */
1131
1132	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1133	* @{ */
1134	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1135	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1136	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1137	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1138	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1139	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1140	/** @} */
1141
1142	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1143	* @{ */
1144	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1145	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1146	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1147	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1148	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1149	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1150	/** @} */
1151
1152	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1153	* @{ */
1154	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1155	uint128_t const *pu128Src, uint8_t bEvil));
1156	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1157	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1158	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1159	/** @} */
1160
1161	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1162	* @{ */
1163	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1164	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1165	/** @} */
1166
1167
1168
1169	/** @name Function tables.
1170	* @{
1171	*/
1172
1173	/**
1174	* Function table for a binary operator providing implementation based on
1175	* operand size.
1176	*/
1177	typedef struct IEMOPBINSIZES
1178	{
1179	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1180	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1181	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1182	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1183	} IEMOPBINSIZES;
1184	/** Pointer to a binary operator function table. */
1185	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1186
1187
1188	/**
1189	* Function table for a unary operator providing implementation based on
1190	* operand size.
1191	*/
1192	typedef struct IEMOPUNARYSIZES
1193	{
1194	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1195	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1196	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1197	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1198	} IEMOPUNARYSIZES;
1199	/** Pointer to a unary operator function table. */
1200	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1201
1202
1203	/**
1204	* Function table for a shift operator providing implementation based on
1205	* operand size.
1206	*/
1207	typedef struct IEMOPSHIFTSIZES
1208	{
1209	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1210	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1211	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1212	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1213	} IEMOPSHIFTSIZES;
1214	/** Pointer to a shift operator function table. */
1215	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1216
1217
1218	/**
1219	* Function table for a multiplication or division operation.
1220	*/
1221	typedef struct IEMOPMULDIVSIZES
1222	{
1223	PFNIEMAIMPLMULDIVU8 pfnU8;
1224	PFNIEMAIMPLMULDIVU16 pfnU16;
1225	PFNIEMAIMPLMULDIVU32 pfnU32;
1226	PFNIEMAIMPLMULDIVU64 pfnU64;
1227	} IEMOPMULDIVSIZES;
1228	/** Pointer to a multiplication or division operation function table. */
1229	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1230
1231
1232	/**
1233	* Function table for a double precision shift operator providing implementation
1234	* based on operand size.
1235	*/
1236	typedef struct IEMOPSHIFTDBLSIZES
1237	{
1238	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1239	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1240	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1241	} IEMOPSHIFTDBLSIZES;
1242	/** Pointer to a double precision shift function table. */
1243	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1244
1245
1246	/**
1247	* Function table for media instruction taking two full sized media registers,
1248	* optionally the 2nd being a memory reference (only modifying the first op.)
1249	*/
1250	typedef struct IEMOPMEDIAF2
1251	{
1252	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1253	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1254	} IEMOPMEDIAF2;
1255	/** Pointer to a media operation function table for full sized ops. */
1256	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1257
1258	/**
1259	* Function table for media instruction taking taking one full and one lower
1260	* half media register.
1261	*/
1262	typedef struct IEMOPMEDIAF1L1
1263	{
1264	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1265	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1266	} IEMOPMEDIAF1L1;
1267	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1268	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1269
1270	/**
1271	* Function table for media instruction taking taking one full and one high half
1272	* media register.
1273	*/
1274	typedef struct IEMOPMEDIAF1H1
1275	{
1276	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1277	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1278	} IEMOPMEDIAF1H1;
1279	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1280	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1281
1282
1283	/** @} */
1284
1285
1286	/** @name C instruction implementations for anything slightly complicated.
1287	* @{ */
1288
1289	/**
1290	* For typedef'ing or declaring a C instruction implementation function taking
1291	* no extra arguments.
1292	*
1293	* @param a_Name The name of the type.
1294	*/
1295	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1296	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1297	/**
1298	* For defining a C instruction implementation function taking no extra
1299	* arguments.
1300	*
1301	* @param a_Name The name of the function
1302	*/
1303	# define IEM_CIMPL_DEF_0(a_Name) \
1304	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1305	/**
1306	* For calling a C instruction implementation function taking no extra
1307	* arguments.
1308	*
1309	* This special call macro adds default arguments to the call and allow us to
1310	* change these later.
1311	*
1312	* @param a_fn The name of the function.
1313	*/
1314	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1315
1316	/**
1317	* For typedef'ing or declaring a C instruction implementation function taking
1318	* one extra argument.
1319	*
1320	* @param a_Name The name of the type.
1321	* @param a_Type0 The argument type.
1322	* @param a_Arg0 The argument name.
1323	*/
1324	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1325	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1326	/**
1327	* For defining a C instruction implementation function taking one extra
1328	* argument.
1329	*
1330	* @param a_Name The name of the function
1331	* @param a_Type0 The argument type.
1332	* @param a_Arg0 The argument name.
1333	*/
1334	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1335	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1336	/**
1337	* For calling a C instruction implementation function taking one extra
1338	* argument.
1339	*
1340	* This special call macro adds default arguments to the call and allow us to
1341	* change these later.
1342	*
1343	* @param a_fn The name of the function.
1344	* @param a0 The name of the 1st argument.
1345	*/
1346	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1347
1348	/**
1349	* For typedef'ing or declaring a C instruction implementation function taking
1350	* two extra arguments.
1351	*
1352	* @param a_Name The name of the type.
1353	* @param a_Type0 The type of the 1st argument
1354	* @param a_Arg0 The name of the 1st argument.
1355	* @param a_Type1 The type of the 2nd argument.
1356	* @param a_Arg1 The name of the 2nd argument.
1357	*/
1358	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1359	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1360	/**
1361	* For defining a C instruction implementation function taking two extra
1362	* arguments.
1363	*
1364	* @param a_Name The name of the function.
1365	* @param a_Type0 The type of the 1st argument
1366	* @param a_Arg0 The name of the 1st argument.
1367	* @param a_Type1 The type of the 2nd argument.
1368	* @param a_Arg1 The name of the 2nd argument.
1369	*/
1370	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1371	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1372	/**
1373	* For calling a C instruction implementation function taking two extra
1374	* arguments.
1375	*
1376	* This special call macro adds default arguments to the call and allow us to
1377	* change these later.
1378	*
1379	* @param a_fn The name of the function.
1380	* @param a0 The name of the 1st argument.
1381	* @param a1 The name of the 2nd argument.
1382	*/
1383	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1384
1385	/**
1386	* For typedef'ing or declaring a C instruction implementation function taking
1387	* three extra arguments.
1388	*
1389	* @param a_Name The name of the type.
1390	* @param a_Type0 The type of the 1st argument
1391	* @param a_Arg0 The name of the 1st argument.
1392	* @param a_Type1 The type of the 2nd argument.
1393	* @param a_Arg1 The name of the 2nd argument.
1394	* @param a_Type2 The type of the 3rd argument.
1395	* @param a_Arg2 The name of the 3rd argument.
1396	*/
1397	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1398	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1399	/**
1400	* For defining a C instruction implementation function taking three extra
1401	* arguments.
1402	*
1403	* @param a_Name The name of the function.
1404	* @param a_Type0 The type of the 1st argument
1405	* @param a_Arg0 The name of the 1st argument.
1406	* @param a_Type1 The type of the 2nd argument.
1407	* @param a_Arg1 The name of the 2nd argument.
1408	* @param a_Type2 The type of the 3rd argument.
1409	* @param a_Arg2 The name of the 3rd argument.
1410	*/
1411	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1412	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1413	/**
1414	* For calling a C instruction implementation function taking three extra
1415	* arguments.
1416	*
1417	* This special call macro adds default arguments to the call and allow us to
1418	* change these later.
1419	*
1420	* @param a_fn The name of the function.
1421	* @param a0 The name of the 1st argument.
1422	* @param a1 The name of the 2nd argument.
1423	* @param a2 The name of the 3rd argument.
1424	*/
1425	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1426
1427
1428	/**
1429	* For typedef'ing or declaring a C instruction implementation function taking
1430	* four extra arguments.
1431	*
1432	* @param a_Name The name of the type.
1433	* @param a_Type0 The type of the 1st argument
1434	* @param a_Arg0 The name of the 1st argument.
1435	* @param a_Type1 The type of the 2nd argument.
1436	* @param a_Arg1 The name of the 2nd argument.
1437	* @param a_Type2 The type of the 3rd argument.
1438	* @param a_Arg2 The name of the 3rd argument.
1439	* @param a_Type3 The type of the 4th argument.
1440	* @param a_Arg3 The name of the 4th argument.
1441	*/
1442	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1443	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1444	/**
1445	* For defining a C instruction implementation function taking four extra
1446	* arguments.
1447	*
1448	* @param a_Name The name of the function.
1449	* @param a_Type0 The type of the 1st argument
1450	* @param a_Arg0 The name of the 1st argument.
1451	* @param a_Type1 The type of the 2nd argument.
1452	* @param a_Arg1 The name of the 2nd argument.
1453	* @param a_Type2 The type of the 3rd argument.
1454	* @param a_Arg2 The name of the 3rd argument.
1455	* @param a_Type3 The type of the 4th argument.
1456	* @param a_Arg3 The name of the 4th argument.
1457	*/
1458	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1459	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1460	a_Type2 a_Arg2, a_Type3 a_Arg3))
1461	/**
1462	* For calling a C instruction implementation function taking four extra
1463	* arguments.
1464	*
1465	* This special call macro adds default arguments to the call and allow us to
1466	* change these later.
1467	*
1468	* @param a_fn The name of the function.
1469	* @param a0 The name of the 1st argument.
1470	* @param a1 The name of the 2nd argument.
1471	* @param a2 The name of the 3rd argument.
1472	* @param a3 The name of the 4th argument.
1473	*/
1474	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1475
1476
1477	/**
1478	* For typedef'ing or declaring a C instruction implementation function taking
1479	* five extra arguments.
1480	*
1481	* @param a_Name The name of the type.
1482	* @param a_Type0 The type of the 1st argument
1483	* @param a_Arg0 The name of the 1st argument.
1484	* @param a_Type1 The type of the 2nd argument.
1485	* @param a_Arg1 The name of the 2nd argument.
1486	* @param a_Type2 The type of the 3rd argument.
1487	* @param a_Arg2 The name of the 3rd argument.
1488	* @param a_Type3 The type of the 4th argument.
1489	* @param a_Arg3 The name of the 4th argument.
1490	* @param a_Type4 The type of the 5th argument.
1491	* @param a_Arg4 The name of the 5th argument.
1492	*/
1493	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1494	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1495	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1496	a_Type3 a_Arg3, a_Type4 a_Arg4))
1497	/**
1498	* For defining a C instruction implementation function taking five extra
1499	* arguments.
1500	*
1501	* @param a_Name The name of the function.
1502	* @param a_Type0 The type of the 1st argument
1503	* @param a_Arg0 The name of the 1st argument.
1504	* @param a_Type1 The type of the 2nd argument.
1505	* @param a_Arg1 The name of the 2nd argument.
1506	* @param a_Type2 The type of the 3rd argument.
1507	* @param a_Arg2 The name of the 3rd argument.
1508	* @param a_Type3 The type of the 4th argument.
1509	* @param a_Arg3 The name of the 4th argument.
1510	* @param a_Type4 The type of the 5th argument.
1511	* @param a_Arg4 The name of the 5th argument.
1512	*/
1513	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1514	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1515	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1516	a_Type3 a_Arg3, a_Type4 a_Arg4))
1517	/**
1518	* For calling a C instruction implementation function taking five extra
1519	* arguments.
1520	*
1521	* This special call macro adds default arguments to the call and allow us to
1522	* change these later.
1523	*
1524	* @param a_fn The name of the function.
1525	* @param a0 The name of the 1st argument.
1526	* @param a1 The name of the 2nd argument.
1527	* @param a2 The name of the 3rd argument.
1528	* @param a3 The name of the 4th argument.
1529	* @param a4 The name of the 5th argument.
1530	*/
1531	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1532
1533	/** @} */
1534
1535
1536	/** @} */
1537
1538	RT_C_DECLS_END
1539
1540	#endif
1541

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 55909

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