1 | ;$Id: HMInternal.mac 96407 2022-08-22 17:43:14Z vboxsync $
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2 | ;; @file
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3 | ; HM - Internal header file.
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2022 Oracle and/or its affiliates.
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8 | ;
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9 | ; This file is part of VirtualBox base platform packages, as
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10 | ; available from https://www.virtualbox.org.
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11 | ;
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12 | ; This program is free software; you can redistribute it and/or
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13 | ; modify it under the terms of the GNU General Public License
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14 | ; as published by the Free Software Foundation, in version 3 of the
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15 | ; License.
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16 | ;
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17 | ; This program is distributed in the hope that it will be useful, but
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18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | ; General Public License for more details.
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21 | ;
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22 | ; You should have received a copy of the GNU General Public License
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23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | ;
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25 | ; SPDX-License-Identifier: GPL-3.0-only
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26 | ;
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27 |
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28 | %ifndef VMX_VMCS_GUEST_FIELD_ES
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29 | %include "VBox/vmm/hm_vmx.mac" ; For VMXRESTOREHOST
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30 | %endif
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31 |
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32 | struc VMXVMCSINFOSHARED
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33 | .fWasInRealMode resb 1
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34 | alignb 8
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35 | .RealMode.AttrCS resd 1
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36 | .RealMode.AttrDS resd 1
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37 | .RealMode.AttrES resd 1
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38 | .RealMode.AttrFS resd 1
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39 | .RealMode.AttrGS resd 1
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40 | .RealMode.AttrSS resd 1
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41 | .RealMode.Eflags resd 1 ; should be EFlags?
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42 | .RealMode.fRealOnV86Active resb 1
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43 |
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44 | alignb 8
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45 | .au64LbrFromIpMsr resq 32
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46 | .au64LbrToIpMsr resq 32
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47 | .au64LbrInfoMsr resq 32
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48 | .u64LbrTosMsr resq 1
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49 | .u64LerFromIpMsr resq 1
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50 | .u64LerToIpMsr resq 1
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51 | endstruc
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52 |
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53 |
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54 | struc VMXVMCSINFO
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55 | .pShared RTR0PTR_RES 1
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56 |
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57 | .HCPhysEPTP RTHCPHYS_RES 1
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58 | .fVmcsState resd 1
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59 | .fShadowVmcsState resd 1
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60 | .idHostCpuState resd 1
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61 | .idHostCpuExec resd 1
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62 | .cEntryMsrLoad resd 1
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63 | .cExitMsrStore resd 1
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64 | .cExitMsrLoad resd 1
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65 |
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66 | .u32PinCtls resd 1
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67 | .u32ProcCtls resd 1
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68 | .u32ProcCtls2 resd 1
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69 | .u64ProcCtls3 resq 1
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70 | .u32EntryCtls resd 1
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71 | .u32ExitCtls resd 1
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72 | .u32XcptBitmap resd 1
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73 | .u32XcptPFMask resd 1
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74 | .u32XcptPFMatch resd 1
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75 |
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76 | alignb 8
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77 | .u64TscOffset resq 1
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78 | .u64VmcsLinkPtr resq 1
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79 | .u64Cr0Mask resq 1
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80 | .u64Cr4Mask resq 1
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81 | .uHostRip resq 1
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82 | .uHostRsp resq 1
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83 |
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84 | .pvVmcs RTR0PTR_RES 1
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85 | .pvShadowVmcs RTR0PTR_RES 1
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86 | .pbVirtApic RTR0PTR_RES 1
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87 | .pvMsrBitmap RTR0PTR_RES 1
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88 | .pvGuestMsrLoad RTR0PTR_RES 1
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89 | .pvGuestMsrStore RTR0PTR_RES 1
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90 | .pvHostMsrLoad RTR0PTR_RES 1
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91 |
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92 | alignb 8
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93 | .HCPhysVmcs RTHCPHYS_RES 1
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94 | .HCPhysShadowVmcs RTHCPHYS_RES 1
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95 | .HCPhysVirtApic RTHCPHYS_RES 1
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96 | .HCPhysMsrBitmap RTHCPHYS_RES 1
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97 | .HCPhysGuestMsrLoad RTHCPHYS_RES 1
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98 | .HCPhysGuestMsrStore RTHCPHYS_RES 1
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99 | .HCPhysHostMsrLoad RTHCPHYS_RES 1
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100 |
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101 | .hMemObj RTR0PTR_RES 1
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102 | endstruc
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103 |
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104 | %define VMX_RESTORE_HOST_SEL_DS 0001h ;RT_BIT(0)
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105 | %define VMX_RESTORE_HOST_SEL_ES 0002h ;RT_BIT(1)
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106 | %define VMX_RESTORE_HOST_SEL_FS 0004h ;RT_BIT(2)
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107 | %define VMX_RESTORE_HOST_SEL_GS 0008h ;RT_BIT(3)
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108 | %define VMX_RESTORE_HOST_SEL_TR 0010h ;RT_BIT(4)
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109 | %define VMX_RESTORE_HOST_GDTR 0020h ;RT_BIT(5)
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110 | %define VMX_RESTORE_HOST_IDTR 0040h ;RT_BIT(6)
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111 | %define VMX_RESTORE_HOST_GDT_READ_ONLY 0080h ;RT_BIT(7)
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112 | %define VMX_RESTORE_HOST_GDT_NEED_WRITABLE 0100h ;RT_BIT(8)
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113 | %define VMX_RESTORE_HOST_CAN_USE_WRFSBASE_AND_WRGSBASE 0200h ;RT_BIT(9)
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114 | %define VMX_RESTORE_HOST_REQUIRED 0400h ;RT_BIT(10) - must be the highest bit!
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115 | struc VMXRESTOREHOST
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116 | .uHostSelDS resw 1
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117 | .uHostSelES resw 1
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118 | .uHostSelFS resw 1
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119 | .HostGdtr resb 10
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120 | .uHostSelGS resw 1
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121 | .uHostSelTR resw 1
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122 | .uHostSelSS resw 1
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123 | .HostGdtrRw resb 10
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124 | .uHostSelCS resw 1
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125 | .abPadding1 resb 4
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126 | .HostIdtr resb 10
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127 | alignb 8
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128 | .uHostFSBase resq 1
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129 | .uHostGSBase resq 1
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130 | endstruc
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131 |
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132 | struc HMCPUVMX
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133 | .VmcsInfo resb VMXVMCSINFOSHARED_size
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134 | .VmcsInfoNstGst resb VMXVMCSINFOSHARED_size
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135 | .fSwitchedToNstGstVmcsCopyForRing3 resb 1
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136 | .fMergedNstGstCtls resb 1
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137 | .fCopiedNstGstToShadowVmcs resb 1
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138 | .fSwitchedNstGstFlushTlb resb 1
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139 |
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140 | alignb 8
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141 | .u64GstMsrApicBase resq 1
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142 |
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143 | .LastError.idCurrentCpu resd 1
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144 | .LastError.idEnteredCpu resd 1
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145 | .LastError.HCPhysCurrentVmcs resq 1
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146 | .LastError.u32VmcsRev resd 1
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147 | .LastError.u32InstrError resd 1
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148 | .LastError.u32ExitReason resd 1
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149 | .LastError.u32GuestIntrState resd 1
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150 | endstruc
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151 |
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152 | struc HMCPUSVM
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153 | .fEmulateLongModeSysEnterExit resb 1
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154 |
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155 | alignb 8
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156 | .NstGstVmcbCache resb 40
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157 | endstruc
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158 |
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159 | struc HMCPU
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160 | .fCheckedTLBFlush resb 1
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161 | .fActive resb 1
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162 | .fUseDebugLoop resb 1
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163 |
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164 | .fGIMTrapXcptUD resb 1
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165 | .fTrapXcptGpForLovelyMesaDrv resb 1
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166 | .fSingleInstruction resb 1
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167 | alignb 8
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168 |
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169 | .u32HMError resd 1
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170 | .rcLastExitToR3 resd 1
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171 | alignb 8
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172 | .fCtxChanged resq 1
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173 |
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174 | alignb 8
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175 | .vmx resb HMCPUVMX_size
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176 | alignb 8
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177 | .svm resb HMCPUSVM_size
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178 |
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179 | .Event.fPending resd 1
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180 | .Event.u32ErrCode resd 1
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181 | .Event.cbInstr resd 1
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182 | alignb 8
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183 | .Event.u64IntInfo resq 1
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184 | .Event.GCPtrFaultAddress RTGCPTR_RES 1
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185 |
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186 | .enmShadowMode resd 1
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187 | alignb 8
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188 | .aPdpes resq 4
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189 |
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190 | .StatVmxWriteHostRip resq 1
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191 | .StatVmxWriteHostRsp resq 1
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192 |
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193 | ; The remainer is disassembly state and statistics.
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194 | endstruc
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195 |
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196 | struc HMR0CPUVMX
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197 | .pfnStartVm RTR0PTR_RES 1
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198 | .uTscDeadline resq 1
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199 | .uTscDeadlineVersion resq 1
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200 |
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201 |
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202 | .VmcsInfo resb VMXVMCSINFO_size
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203 | .VmcsInfoNstGst resb VMXVMCSINFO_size
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204 | .fSwitchedToNstGstVmcs resb 1
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205 | alignb 8
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206 | .pVmxTransient RTR0PTR_RES 1
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207 |
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208 | .u64HostMsrLStar resq 1
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209 | .u64HostMsrStar resq 1
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210 | .u64HostMsrSfMask resq 1
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211 | .u64HostMsrKernelGsBase resq 1
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212 | .fLazyMsrs resd 1
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213 | .fUpdatedHostAutoMsrs resb 1
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214 | alignb 4
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215 | .fRestoreHostFlags resd 1
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216 | alignb 8
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217 | .RestoreHost resb VMXRESTOREHOST_size
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218 | endstruc
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219 |
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220 | struc HMR0CPUSVM
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221 | .pfnVMRun RTR0PTR_RES 1
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222 |
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223 | alignb 8
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224 | .HCPhysVmcbHost RTHCPHYS_RES 1
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225 |
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226 | alignb 8
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227 | .hMemObjVmcbHost RTR0PTR_RES 1
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228 |
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229 | alignb 8
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230 | .HCPhysVmcb RTHCPHYS_RES 1
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231 | .hMemObjVmcb RTR0PTR_RES 1
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232 | .pVmcb RTR0PTR_RES 1
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233 |
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234 | alignb 8
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235 | .HCPhysMsrBitmap RTHCPHYS_RES 1
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236 | .hMemObjMsrBitmap RTR0PTR_RES 1
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237 | .pvMsrBitmap RTR0PTR_RES 1
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238 |
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239 | .fSyncVTpr resb 1
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240 |
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241 | alignb 8
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242 | .pSvmTransient RTR0PTR_RES 1
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243 | .u64HostTscAux resq 1
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244 |
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245 | alignb 8
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246 | .DisState resb 0d8h
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247 | endstruc
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248 |
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249 | struc HMR0PERVCPU
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250 | .cWorldSwitchExits resd 1
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251 | .cTlbFlushes resd 1
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252 | .idLastCpu resd 1
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253 | .idEnteredCpu resd 1
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254 | .uCurrentAsid resd 1
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255 |
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256 | .fForceTLBFlush resb 1
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257 | .fLeaveDone resb 1
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258 | .fUsingHyperDR7 resb 1
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259 | .fUsingDebugLoop resb 1
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260 | .fDebugWantRdTscExit resb 1
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261 | .fLoadSaveGuestXcr0 resb 1
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262 | .fClearTrapFlag resb 1
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263 |
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264 | alignb 4
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265 | .fWorldSwitcher resd 1
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266 | .uTscExit resq 1
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267 |
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268 | alignb 8
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269 | .vmx resb HMR0CPUVMX_size
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270 | alignb 8
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271 | .svm resb HMR0CPUSVM_size
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272 | endstruc
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273 |
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274 | %define HM_WSF_IBPB_EXIT RT_BIT_32(0)
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275 | %define HM_WSF_IBPB_ENTRY RT_BIT_32(1)
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276 | %define HM_WSF_L1D_ENTRY RT_BIT_32(2)
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277 | %define HM_WSF_MDS_ENTRY RT_BIT_32(3)
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278 |
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