1 | /* $Id: EMHandleRCTmpl.h 98103 2023-01-17 14:15:46Z vboxsync $ */
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2 | /** @file
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3 | * EM - emR3[Raw|Hm|Nem]HandleRC template.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | #ifndef VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h
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29 | #define VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h
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30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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31 | # pragma once
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32 | #endif
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33 |
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34 | #if defined(EMHANDLERC_WITH_PATM) + defined(EMHANDLERC_WITH_HM) + defined(EMHANDLERC_WITH_NEM) != 1
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35 | # error "Exactly one of these must be defined: EMHANDLERC_WITH_PATM, EMHANDLERC_WITH_HM, EMHANDLERC_WITH_NEM"
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36 | #endif
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37 |
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38 |
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39 | /**
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40 | * Process a subset of the raw-mode, HM and NEM return codes.
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41 | *
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42 | * Since we have to share this with raw-mode single stepping, this inline
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43 | * function has been created to avoid code duplication.
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44 | *
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45 | * @returns VINF_SUCCESS if it's ok to continue raw mode.
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46 | * @returns VBox status code to return to the EM main loop.
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47 | *
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48 | * @param pVM The cross context VM structure.
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49 | * @param pVCpu The cross context virtual CPU structure.
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50 | * @param rc The return code.
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51 | */
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52 | #if defined(EMHANDLERC_WITH_HM) || defined(DOXYGEN_RUNNING)
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53 | int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
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54 | #elif defined(EMHANDLERC_WITH_NEM)
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55 | int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
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56 | #endif
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57 | {
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58 | switch (rc)
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59 | {
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60 | /*
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61 | * Common & simple ones.
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62 | */
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63 | case VINF_SUCCESS:
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64 | break;
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65 | case VINF_EM_RESCHEDULE_RAW:
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66 | case VINF_EM_RESCHEDULE_HM:
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67 | case VINF_EM_RAW_INTERRUPT:
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68 | case VINF_EM_RAW_TO_R3:
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69 | case VINF_EM_RAW_TIMER_PENDING:
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70 | case VINF_EM_PENDING_REQUEST:
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71 | rc = VINF_SUCCESS;
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72 | break;
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73 |
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74 | #ifndef EMHANDLERC_WITH_NEM
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75 | /*
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76 | * Conflict or out of page tables.
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77 | *
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78 | * VM_FF_PGM_SYNC_CR3 is set by the hypervisor and all we need to
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79 | * do here is to execute the pending forced actions.
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80 | */
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81 | case VINF_PGM_SYNC_CR3:
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82 | AssertMsg(VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL),
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83 | ("VINF_PGM_SYNC_CR3 and no VMCPU_FF_PGM_SYNC_CR3*!\n"));
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84 | rc = VINF_SUCCESS;
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85 | break;
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86 |
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87 | /*
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88 | * PGM pool flush pending (guest SMP only).
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89 | */
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90 | /** @todo jumping back and forth between ring 0 and 3 can burn a lot of cycles
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91 | * if the EMT thread that's supposed to handle the flush is currently not active
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92 | * (e.g. waiting to be scheduled) -> fix this properly!
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93 | *
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94 | * bird: Since the clearing is global and done via a rendezvous any CPU can do
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95 | * it. They would have to choose who to call VMMR3EmtRendezvous and send
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96 | * the rest to VMMR3EmtRendezvousFF ... Hmm ... that's not going to work
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97 | * all that well since the latter will race the setup done by the
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98 | * first. Guess that means we need some new magic in that area for
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99 | * handling this case. :/
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100 | */
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101 | case VINF_PGM_POOL_FLUSH_PENDING:
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102 | rc = VINF_SUCCESS;
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103 | break;
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104 | #endif /* !EMHANDLERC_WITH_NEM */
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105 |
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106 | /*
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107 | * I/O Port access - emulate the instruction.
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108 | */
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109 | case VINF_IOM_R3_IOPORT_READ:
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110 | case VINF_IOM_R3_IOPORT_WRITE:
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111 | case VINF_EM_RESUME_R3_HISTORY_EXEC: /* Resume EMHistoryExec after VMCPU_FF_IOM. */
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112 | rc = emR3ExecuteIOInstruction(pVM, pVCpu);
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113 | break;
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114 |
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115 | /*
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116 | * Execute pending I/O Port access.
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117 | */
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118 | case VINF_EM_PENDING_R3_IOPORT_WRITE:
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119 | rc = VBOXSTRICTRC_TODO(emR3ExecutePendingIoPortWrite(pVM, pVCpu));
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120 | break;
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121 | case VINF_EM_PENDING_R3_IOPORT_READ:
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122 | rc = VBOXSTRICTRC_TODO(emR3ExecutePendingIoPortRead(pVM, pVCpu));
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123 | break;
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124 |
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125 | /*
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126 | * Memory mapped I/O access - emulate the instruction.
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127 | */
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128 | case VINF_IOM_R3_MMIO_READ:
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129 | case VINF_IOM_R3_MMIO_WRITE:
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130 | case VINF_IOM_R3_MMIO_READ_WRITE:
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131 | rc = emR3ExecuteInstruction(pVM, pVCpu, "MMIO");
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132 | break;
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133 |
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134 | /*
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135 | * Machine specific register access - emulate the instruction.
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136 | */
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137 | case VINF_CPUM_R3_MSR_READ:
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138 | case VINF_CPUM_R3_MSR_WRITE:
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139 | rc = emR3ExecuteInstruction(pVM, pVCpu, "MSR");
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140 | break;
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141 |
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142 | /*
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143 | * GIM hypercall.
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144 | */
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145 | case VINF_GIM_R3_HYPERCALL:
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146 | rc = emR3ExecuteInstruction(pVM, pVCpu, "Hypercall");
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147 | break;
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148 |
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149 | #ifdef EMHANDLERC_WITH_HM
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150 | case VINF_EM_HM_PATCH_TPR_INSTR:
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151 | rc = HMR3PatchTprInstr(pVM, pVCpu);
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152 | break;
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153 | #endif
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154 |
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155 | case VINF_EM_RAW_GUEST_TRAP:
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156 | case VINF_EM_RAW_EMULATE_INSTR:
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157 | AssertMsg(!TRPMHasTrap(pVCpu), ("trap=%#x\n", TRPMGetTrapNo(pVCpu))); /* We're directly executing instructions below without respecting any pending traps! */
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158 | rc = emR3ExecuteInstruction(pVM, pVCpu, "EMUL: ");
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159 | break;
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160 |
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161 | case VINF_EM_RAW_INJECT_TRPM_EVENT:
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162 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_XCPT_MASK);
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163 | rc = VBOXSTRICTRC_VAL(IEMInjectTrpmEvent(pVCpu));
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164 | /* The following condition should be removed when IEM_IMPLEMENTS_TASKSWITCH becomes true. */
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165 | if (rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED)
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166 | rc = emR3ExecuteInstruction(pVM, pVCpu, "EVENT: ");
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167 | break;
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168 |
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169 | case VINF_EM_EMULATE_SPLIT_LOCK:
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170 | rc = VBOXSTRICTRC_TODO(emR3ExecuteSplitLockInstruction(pVM, pVCpu));
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171 | break;
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172 |
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173 |
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174 | /*
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175 | * Up a level.
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176 | */
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177 | case VINF_EM_TERMINATE:
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178 | case VINF_EM_OFF:
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179 | case VINF_EM_RESET:
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180 | case VINF_EM_SUSPEND:
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181 | case VINF_EM_HALT:
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182 | case VINF_EM_RESUME:
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183 | case VINF_EM_NO_MEMORY:
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184 | case VINF_EM_RESCHEDULE:
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185 | case VINF_EM_RESCHEDULE_REM:
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186 | case VINF_EM_WAIT_SIPI:
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187 | break;
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188 |
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189 | /*
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190 | * Up a level and invoke the debugger.
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191 | */
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192 | case VINF_EM_DBG_STEPPED:
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193 | case VINF_EM_DBG_BREAKPOINT:
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194 | case VINF_EM_DBG_STEP:
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195 | case VINF_EM_DBG_HYPER_BREAKPOINT:
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196 | case VINF_EM_DBG_HYPER_STEPPED:
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197 | case VINF_EM_DBG_HYPER_ASSERTION:
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198 | case VINF_EM_DBG_STOP:
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199 | case VINF_EM_DBG_EVENT:
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200 | break;
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201 |
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202 | /*
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203 | * Up a level, dump and debug.
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204 | */
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205 | case VERR_TRPM_DONT_PANIC:
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206 | case VERR_TRPM_PANIC:
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207 | case VERR_VMM_RING0_ASSERTION:
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208 | case VINF_EM_TRIPLE_FAULT:
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209 | case VERR_VMM_HYPER_CR3_MISMATCH:
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210 | case VERR_VMM_RING3_CALL_DISABLED:
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211 | case VERR_IEM_INSTR_NOT_IMPLEMENTED:
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212 | case VERR_IEM_ASPECT_NOT_IMPLEMENTED:
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213 | case VERR_EM_GUEST_CPU_HANG:
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214 | break;
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215 |
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216 | #ifdef EMHANDLERC_WITH_HM
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217 | /*
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218 | * Up a level, after Hm have done some release logging.
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219 | */
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220 | case VERR_VMX_INVALID_VMCS_FIELD:
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221 | case VERR_VMX_INVALID_VMCS_PTR:
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222 | case VERR_VMX_INVALID_VMXON_PTR:
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223 | case VERR_VMX_UNEXPECTED_INTERRUPTION_EXIT_TYPE:
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224 | case VERR_VMX_UNEXPECTED_EXCEPTION:
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225 | case VERR_VMX_UNEXPECTED_EXIT:
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226 | case VERR_VMX_INVALID_GUEST_STATE:
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227 | case VERR_VMX_UNABLE_TO_START_VM:
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228 | case VERR_SVM_UNKNOWN_EXIT:
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229 | case VERR_SVM_UNEXPECTED_EXIT:
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230 | case VERR_SVM_UNEXPECTED_PATCH_TYPE:
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231 | case VERR_SVM_UNEXPECTED_XCPT_EXIT:
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232 | HMR3CheckError(pVM, rc);
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233 | break;
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234 |
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235 | /* Up a level; fatal */
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236 | case VERR_VMX_IN_VMX_ROOT_MODE:
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237 | case VERR_SVM_IN_USE:
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238 | case VERR_SVM_UNABLE_TO_START_VM:
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239 | break;
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240 | #endif
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241 |
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242 | #ifdef EMHANDLERC_WITH_NEM
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243 | /* Fatal stuff, up a level. */
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244 | case VERR_NEM_IPE_0:
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245 | case VERR_NEM_IPE_1:
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246 | case VERR_NEM_IPE_2:
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247 | case VERR_NEM_IPE_3:
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248 | case VERR_NEM_IPE_4:
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249 | case VERR_NEM_IPE_5:
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250 | case VERR_NEM_IPE_6:
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251 | case VERR_NEM_IPE_7:
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252 | case VERR_NEM_IPE_8:
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253 | case VERR_NEM_IPE_9:
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254 | break;
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255 | #endif
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256 |
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257 | /*
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258 | * These two should be handled via the force flag already, but just in
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259 | * case they end up here deal with it.
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260 | */
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261 | case VINF_IOM_R3_IOPORT_COMMIT_WRITE:
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262 | case VINF_IOM_R3_MMIO_COMMIT_WRITE:
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263 | AssertFailed();
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264 | rc = VBOXSTRICTRC_TODO(IOMR3ProcessForceFlag(pVM, pVCpu, rc));
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265 | break;
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266 |
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267 | /*
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268 | * Anything which is not known to us means an internal error
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269 | * and the termination of the VM!
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270 | */
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271 | default:
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272 | AssertMsgFailed(("Unknown GC return code: %Rra\n", rc));
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273 | break;
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274 | }
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275 | return rc;
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276 | }
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277 |
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278 | #endif /* !VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h */
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279 |
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