VirtualBox

source: vbox/trunk/src/VBox/VMM/include/EMHandleRCTmpl.h@ 99132

Last change on this file since 99132 was 99051, checked in by vboxsync, 21 months ago

VMM: More ARMv8 x86/amd64 separation work, VBoxVMMArm compiles and links now, bugref:10385
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1/* $Id: EMHandleRCTmpl.h 99051 2023-03-19 16:40:06Z vboxsync $ */
2/** @file
3 * EM - emR3[Raw|Hm|Nem]HandleRC template.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28#ifndef VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h
29#define VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h
30#ifndef RT_WITHOUT_PRAGMA_ONCE
31# pragma once
32#endif
33
34#if defined(EMHANDLERC_WITH_PATM) + defined(EMHANDLERC_WITH_HM) + defined(EMHANDLERC_WITH_NEM) != 1
35# error "Exactly one of these must be defined: EMHANDLERC_WITH_PATM, EMHANDLERC_WITH_HM, EMHANDLERC_WITH_NEM"
36#endif
37
38
39/**
40 * Process a subset of the raw-mode, HM and NEM return codes.
41 *
42 * Since we have to share this with raw-mode single stepping, this inline
43 * function has been created to avoid code duplication.
44 *
45 * @returns VINF_SUCCESS if it's ok to continue raw mode.
46 * @returns VBox status code to return to the EM main loop.
47 *
48 * @param pVM The cross context VM structure.
49 * @param pVCpu The cross context virtual CPU structure.
50 * @param rc The return code.
51 */
52#if defined(EMHANDLERC_WITH_HM) || defined(DOXYGEN_RUNNING)
53int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
54#elif defined(EMHANDLERC_WITH_NEM)
55int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
56#endif
57{
58 switch (rc)
59 {
60 /*
61 * Common & simple ones.
62 */
63 case VINF_SUCCESS:
64 break;
65 case VINF_EM_RESCHEDULE_RAW:
66 case VINF_EM_RESCHEDULE_HM:
67 case VINF_EM_RAW_INTERRUPT:
68 case VINF_EM_RAW_TO_R3:
69 case VINF_EM_RAW_TIMER_PENDING:
70 case VINF_EM_PENDING_REQUEST:
71 rc = VINF_SUCCESS;
72 break;
73
74#ifndef EMHANDLERC_WITH_NEM
75 /*
76 * Conflict or out of page tables.
77 *
78 * VM_FF_PGM_SYNC_CR3 is set by the hypervisor and all we need to
79 * do here is to execute the pending forced actions.
80 */
81 case VINF_PGM_SYNC_CR3:
82 AssertMsg(VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL),
83 ("VINF_PGM_SYNC_CR3 and no VMCPU_FF_PGM_SYNC_CR3*!\n"));
84 rc = VINF_SUCCESS;
85 break;
86
87 /*
88 * PGM pool flush pending (guest SMP only).
89 */
90 /** @todo jumping back and forth between ring 0 and 3 can burn a lot of cycles
91 * if the EMT thread that's supposed to handle the flush is currently not active
92 * (e.g. waiting to be scheduled) -> fix this properly!
93 *
94 * bird: Since the clearing is global and done via a rendezvous any CPU can do
95 * it. They would have to choose who to call VMMR3EmtRendezvous and send
96 * the rest to VMMR3EmtRendezvousFF ... Hmm ... that's not going to work
97 * all that well since the latter will race the setup done by the
98 * first. Guess that means we need some new magic in that area for
99 * handling this case. :/
100 */
101 case VINF_PGM_POOL_FLUSH_PENDING:
102 rc = VINF_SUCCESS;
103 break;
104#endif /* !EMHANDLERC_WITH_NEM */
105
106 /*
107 * I/O Port access - emulate the instruction.
108 */
109 case VINF_IOM_R3_IOPORT_READ:
110 case VINF_IOM_R3_IOPORT_WRITE:
111 case VINF_EM_RESUME_R3_HISTORY_EXEC: /* Resume EMHistoryExec after VMCPU_FF_IOM. */
112 rc = emR3ExecuteIOInstruction(pVM, pVCpu);
113 break;
114
115#if !defined(VBOX_VMM_TARGET_ARMV8)
116 /*
117 * Execute pending I/O Port access.
118 */
119 case VINF_EM_PENDING_R3_IOPORT_WRITE:
120 rc = VBOXSTRICTRC_TODO(emR3ExecutePendingIoPortWrite(pVM, pVCpu));
121 break;
122 case VINF_EM_PENDING_R3_IOPORT_READ:
123 rc = VBOXSTRICTRC_TODO(emR3ExecutePendingIoPortRead(pVM, pVCpu));
124 break;
125#endif
126
127 /*
128 * Memory mapped I/O access - emulate the instruction.
129 */
130 case VINF_IOM_R3_MMIO_READ:
131 case VINF_IOM_R3_MMIO_WRITE:
132 case VINF_IOM_R3_MMIO_READ_WRITE:
133 rc = emR3ExecuteInstruction(pVM, pVCpu, "MMIO");
134 break;
135
136 /*
137 * Machine specific register access - emulate the instruction.
138 */
139 case VINF_CPUM_R3_MSR_READ:
140 case VINF_CPUM_R3_MSR_WRITE:
141 rc = emR3ExecuteInstruction(pVM, pVCpu, "MSR");
142 break;
143
144 /*
145 * GIM hypercall.
146 */
147 case VINF_GIM_R3_HYPERCALL:
148 rc = emR3ExecuteInstruction(pVM, pVCpu, "Hypercall");
149 break;
150
151#ifdef EMHANDLERC_WITH_HM
152 case VINF_EM_HM_PATCH_TPR_INSTR:
153 rc = HMR3PatchTprInstr(pVM, pVCpu);
154 break;
155#endif
156
157 case VINF_EM_RAW_GUEST_TRAP:
158 case VINF_EM_RAW_EMULATE_INSTR:
159 AssertMsg(!TRPMHasTrap(pVCpu), ("trap=%#x\n", TRPMGetTrapNo(pVCpu))); /* We're directly executing instructions below without respecting any pending traps! */
160 rc = emR3ExecuteInstruction(pVM, pVCpu, "EMUL: ");
161 break;
162
163 case VINF_EM_RAW_INJECT_TRPM_EVENT:
164 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_XCPT_MASK);
165 rc = VBOXSTRICTRC_VAL(IEMInjectTrpmEvent(pVCpu));
166 /* The following condition should be removed when IEM_IMPLEMENTS_TASKSWITCH becomes true. */
167 if (rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED)
168 rc = emR3ExecuteInstruction(pVM, pVCpu, "EVENT: ");
169 break;
170
171#if !defined(VBOX_VMM_TARGET_ARMV8)
172 case VINF_EM_EMULATE_SPLIT_LOCK:
173 rc = VBOXSTRICTRC_TODO(emR3ExecuteSplitLockInstruction(pVM, pVCpu));
174 break;
175#endif
176
177
178 /*
179 * Up a level.
180 */
181 case VINF_EM_TERMINATE:
182 case VINF_EM_OFF:
183 case VINF_EM_RESET:
184 case VINF_EM_SUSPEND:
185 case VINF_EM_HALT:
186 case VINF_EM_RESUME:
187 case VINF_EM_NO_MEMORY:
188 case VINF_EM_RESCHEDULE:
189 case VINF_EM_RESCHEDULE_REM:
190 case VINF_EM_WAIT_SIPI:
191 break;
192
193 /*
194 * Up a level and invoke the debugger.
195 */
196 case VINF_EM_DBG_STEPPED:
197 case VINF_EM_DBG_BREAKPOINT:
198 case VINF_EM_DBG_STEP:
199 case VINF_EM_DBG_HYPER_BREAKPOINT:
200 case VINF_EM_DBG_HYPER_STEPPED:
201 case VINF_EM_DBG_HYPER_ASSERTION:
202 case VINF_EM_DBG_STOP:
203 case VINF_EM_DBG_EVENT:
204 break;
205
206 /*
207 * Up a level, dump and debug.
208 */
209 case VERR_TRPM_DONT_PANIC:
210 case VERR_TRPM_PANIC:
211 case VERR_VMM_RING0_ASSERTION:
212 case VINF_EM_TRIPLE_FAULT:
213 case VERR_VMM_HYPER_CR3_MISMATCH:
214 case VERR_VMM_RING3_CALL_DISABLED:
215 case VERR_IEM_INSTR_NOT_IMPLEMENTED:
216 case VERR_IEM_ASPECT_NOT_IMPLEMENTED:
217 case VERR_EM_GUEST_CPU_HANG:
218 break;
219
220#ifdef EMHANDLERC_WITH_HM
221 /*
222 * Up a level, after Hm have done some release logging.
223 */
224 case VERR_VMX_INVALID_VMCS_FIELD:
225 case VERR_VMX_INVALID_VMCS_PTR:
226 case VERR_VMX_INVALID_VMXON_PTR:
227 case VERR_VMX_UNEXPECTED_INTERRUPTION_EXIT_TYPE:
228 case VERR_VMX_UNEXPECTED_EXCEPTION:
229 case VERR_VMX_UNEXPECTED_EXIT:
230 case VERR_VMX_INVALID_GUEST_STATE:
231 case VERR_VMX_UNABLE_TO_START_VM:
232 case VERR_SVM_UNKNOWN_EXIT:
233 case VERR_SVM_UNEXPECTED_EXIT:
234 case VERR_SVM_UNEXPECTED_PATCH_TYPE:
235 case VERR_SVM_UNEXPECTED_XCPT_EXIT:
236 HMR3CheckError(pVM, rc);
237 break;
238
239 /* Up a level; fatal */
240 case VERR_VMX_IN_VMX_ROOT_MODE:
241 case VERR_SVM_IN_USE:
242 case VERR_SVM_UNABLE_TO_START_VM:
243 break;
244#endif
245
246#ifdef EMHANDLERC_WITH_NEM
247 /* Fatal stuff, up a level. */
248 case VERR_NEM_IPE_0:
249 case VERR_NEM_IPE_1:
250 case VERR_NEM_IPE_2:
251 case VERR_NEM_IPE_3:
252 case VERR_NEM_IPE_4:
253 case VERR_NEM_IPE_5:
254 case VERR_NEM_IPE_6:
255 case VERR_NEM_IPE_7:
256 case VERR_NEM_IPE_8:
257 case VERR_NEM_IPE_9:
258 break;
259#endif
260
261 /*
262 * These two should be handled via the force flag already, but just in
263 * case they end up here deal with it.
264 */
265 case VINF_IOM_R3_IOPORT_COMMIT_WRITE:
266 case VINF_IOM_R3_MMIO_COMMIT_WRITE:
267 AssertFailed();
268 rc = VBOXSTRICTRC_TODO(IOMR3ProcessForceFlag(pVM, pVCpu, rc));
269 break;
270
271 /*
272 * Anything which is not known to us means an internal error
273 * and the termination of the VM!
274 */
275 default:
276 AssertMsgFailed(("Unknown GC return code: %Rra\n", rc));
277 break;
278 }
279 return rc;
280}
281
282#endif /* !VMM_INCLUDED_SRC_include_EMHandleRCTmpl_h */
283
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