VirtualBox

source: vbox/trunk/src/VBox/VMM/include/CPUMInternal.mac@ 58600

Last change on this file since 58600 was 57446, checked in by vboxsync, 9 years ago

VMM: Removing VBOX_WITH_HYBRID_32BIT_KERNEL and other 32-bit darwin fun.

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1; $Id: CPUMInternal.mac 57446 2015-08-18 17:33:53Z vboxsync $
2;; @file
3; CPUM - Internal header file (asm).
4;
5
6;
7; Copyright (C) 2006-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17
18%include "VBox/asmdefs.mac"
19%include "VBox/vmm/cpum.mac"
20
21;;
22; CPU info
23struc CPUMINFO
24 .cMsrRanges resd 1 ; uint32_t
25 .fMsrMask resd 1 ; uint32_t
26 .cCpuIdLeaves resd 1 ; uint32_t
27 .iFirstExtCpuIdLeaf resd 1 ; uint32_t
28 .uPadding resd 1 ; uint32_t
29 .enmUnknownCpuIdMethod resd 1 ; CPUMUNKNOWNCPUID
30 .DefCpuId resb CPUMCPUID_size ; CPUMCPUID
31 .uScalableBusFreq resq 1 ; uint64_t
32 .paMsrRangesR0 RTR0PTR_RES 1 ; R0PTRTYPE(PCPUMMSRRANGE)
33 .paCpuIdLeavesR0 RTR0PTR_RES 1 ; R0PTRTYPE(PCPUMCPUIDLEAF)
34 .paMsrRangesR3 RTR3PTR_RES 1 ; R3PTRTYPE(PCPUMMSRRANGE)
35 .paCpuIdLeavesR3 RTR3PTR_RES 1 ; R3PTRTYPE(PCPUMCPUIDLEAF)
36 .paMsrRangesRC RTRCPTR_RES 1 ; RCPTRTYPE(PCPUMMSRRANGE)
37 .paCpuIdLeavesRC RTRCPTR_RES 1 ; RCPTRTYPE(PCPUMCPUIDLEAF)
38endstruc
39
40
41%define CPUM_USED_FPU RT_BIT(0)
42%define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
43%define CPUM_USED_MANUAL_XMM_RESTORE RT_BIT(2)
44%define CPUM_USE_SYSENTER RT_BIT(3)
45%define CPUM_USE_SYSCALL RT_BIT(4)
46%define CPUM_USE_DEBUG_REGS_HOST RT_BIT(5)
47%define CPUM_USED_DEBUG_REGS_HOST RT_BIT(6)
48%define CPUM_USE_DEBUG_REGS_HYPER RT_BIT(7)
49%define CPUM_USED_DEBUG_REGS_HYPER RT_BIT(8)
50%define CPUM_USED_DEBUG_REGS_GUEST RT_BIT(9)
51%define CPUM_SYNC_FPU_STATE RT_BIT(16)
52%define CPUM_SYNC_DEBUG_REGS_GUEST RT_BIT(17)
53%define CPUM_SYNC_DEBUG_REGS_HYPER RT_BIT(18)
54%define CPUM_USE_FFXSR_LEAKY RT_BIT(19)
55%define CPUM_USE_SUPPORTS_LONGMODE RT_BIT(20)
56
57%define CPUM_HANDLER_DS 1
58%define CPUM_HANDLER_ES 2
59%define CPUM_HANDLER_FS 3
60%define CPUM_HANDLER_GS 4
61%define CPUM_HANDLER_IRET 5
62%define CPUM_HANDLER_TYPEMASK 0ffh
63%define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
64
65
66struc CPUM
67 ;...
68 .offCPUMCPU0 resd 1
69 .fHostUseFlags resd 1
70
71 ; CR4 masks
72 .CR4.AndMask resd 1
73 .CR4.OrMask resd 1
74 ; entered rawmode?
75 .u8PortableCpuIdLevel resb 1
76 .fPendingRestore resb 1
77
78 alignb 8
79 .fXStateGuestMask resq 1
80 .fXStateHostMask resq 1
81
82 alignb 64
83 .HostFeatures resb 32
84 .GuestFeatures resb 32
85 .GuestInfo resb RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*12
86
87 ; Patch manager saved state compatability CPUID leaf arrays
88 .aGuestCpuIdPatmStd resb 16*6
89 .aGuestCpuIdPatmExt resb 16*10
90 .aGuestCpuIdPatmCentaur resb 16*4
91
92 alignb 8
93 .cMsrWrites resq 1
94 .cMsrWritesToIgnoredBits resq 1
95 .cMsrWritesRaiseGp resq 1
96 .cMsrWritesUnknown resq 1
97 .cMsrReads resq 1
98 .cMsrReadsRaiseGp resq 1
99 .cMsrReadsUnknown resq 1
100endstruc
101
102struc CPUMCPU
103 ;
104 ; Guest context state
105 ; (Identical to the .Hyper chunk below.)
106 ;
107 .Guest resq 0
108 .Guest.eax resq 1
109 .Guest.ecx resq 1
110 .Guest.edx resq 1
111 .Guest.ebx resq 1
112 .Guest.esp resq 1
113 .Guest.ebp resq 1
114 .Guest.esi resq 1
115 .Guest.edi resq 1
116 .Guest.r8 resq 1
117 .Guest.r9 resq 1
118 .Guest.r10 resq 1
119 .Guest.r11 resq 1
120 .Guest.r12 resq 1
121 .Guest.r13 resq 1
122 .Guest.r14 resq 1
123 .Guest.r15 resq 1
124 .Guest.es.Sel resw 1
125 .Guest.es.PaddingSel resw 1
126 .Guest.es.ValidSel resw 1
127 .Guest.es.fFlags resw 1
128 .Guest.es.u64Base resq 1
129 .Guest.es.u32Limit resd 1
130 .Guest.es.Attr resd 1
131 .Guest.cs.Sel resw 1
132 .Guest.cs.PaddingSel resw 1
133 .Guest.cs.ValidSel resw 1
134 .Guest.cs.fFlags resw 1
135 .Guest.cs.u64Base resq 1
136 .Guest.cs.u32Limit resd 1
137 .Guest.cs.Attr resd 1
138 .Guest.ss.Sel resw 1
139 .Guest.ss.PaddingSel resw 1
140 .Guest.ss.ValidSel resw 1
141 .Guest.ss.fFlags resw 1
142 .Guest.ss.u64Base resq 1
143 .Guest.ss.u32Limit resd 1
144 .Guest.ss.Attr resd 1
145 .Guest.ds.Sel resw 1
146 .Guest.ds.PaddingSel resw 1
147 .Guest.ds.ValidSel resw 1
148 .Guest.ds.fFlags resw 1
149 .Guest.ds.u64Base resq 1
150 .Guest.ds.u32Limit resd 1
151 .Guest.ds.Attr resd 1
152 .Guest.fs.Sel resw 1
153 .Guest.fs.PaddingSel resw 1
154 .Guest.fs.ValidSel resw 1
155 .Guest.fs.fFlags resw 1
156 .Guest.fs.u64Base resq 1
157 .Guest.fs.u32Limit resd 1
158 .Guest.fs.Attr resd 1
159 .Guest.gs.Sel resw 1
160 .Guest.gs.PaddingSel resw 1
161 .Guest.gs.ValidSel resw 1
162 .Guest.gs.fFlags resw 1
163 .Guest.gs.u64Base resq 1
164 .Guest.gs.u32Limit resd 1
165 .Guest.gs.Attr resd 1
166 .Guest.eip resq 1
167 .Guest.eflags resq 1
168 .Guest.cr0 resq 1
169 .Guest.cr2 resq 1
170 .Guest.cr3 resq 1
171 .Guest.cr4 resq 1
172 .Guest.dr resq 8
173 .Guest.gdtrPadding resw 3
174 .Guest.gdtr resw 0
175 .Guest.gdtr.cbGdt resw 1
176 .Guest.gdtr.pGdt resq 1
177 .Guest.idtrPadding resw 3
178 .Guest.idtr resw 0
179 .Guest.idtr.cbIdt resw 1
180 .Guest.idtr.pIdt resq 1
181 .Guest.ldtr.Sel resw 1
182 .Guest.ldtr.PaddingSel resw 1
183 .Guest.ldtr.ValidSel resw 1
184 .Guest.ldtr.fFlags resw 1
185 .Guest.ldtr.u64Base resq 1
186 .Guest.ldtr.u32Limit resd 1
187 .Guest.ldtr.Attr resd 1
188 .Guest.tr.Sel resw 1
189 .Guest.tr.PaddingSel resw 1
190 .Guest.tr.ValidSel resw 1
191 .Guest.tr.fFlags resw 1
192 .Guest.tr.u64Base resq 1
193 .Guest.tr.u32Limit resd 1
194 .Guest.tr.Attr resd 1
195 .Guest.SysEnter.cs resb 8
196 .Guest.SysEnter.eip resb 8
197 .Guest.SysEnter.esp resb 8
198 .Guest.msrEFER resb 8
199 .Guest.msrSTAR resb 8
200 .Guest.msrPAT resb 8
201 .Guest.msrLSTAR resb 8
202 .Guest.msrCSTAR resb 8
203 .Guest.msrSFMASK resb 8
204 .Guest.msrKERNELGSBASE resb 8
205 .Guest.msrApicBase resb 8
206 .Guest.aXcr resq 2
207 .Guest.fXStateMask resq 1
208 .Guest.pXStateR0 RTR0PTR_RES 1
209 .Guest.pXStateR3 RTR3PTR_RES 1
210 .Guest.pXStateRC RTRCPTR_RES 1
211 .Guest.aoffXState resw 64
212
213 alignb 64
214 .GuestMsrs resq 0
215 .GuestMsrs.au64 resq 64
216
217 ;
218 ; Other stuff.
219 ;
220 .fUseFlags resd 1
221 .fChanged resd 1
222 .offCPUM resd 1
223 .u32RetCode resd 1
224
225%ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
226 .pvApicBase RTR0PTR_RES 1
227 .fApicDisVectors resd 1
228 .fX2Apic resb 1
229%else
230 .abPadding3 resb (RTR0PTR_CB + 4 + 1)
231%endif
232
233 .fRawEntered resb 1
234 .fRemEntered resb 1
235
236 .abPadding2 resb (64 - 16 - RTR0PTR_CB - 4 - 1 - 2)
237
238 ;
239 ; Host context state
240 ;
241 alignb 64
242 .Host resb 0
243%if HC_ARCH_BITS == 64
244 ;.Host.rax resq 1 - scratch
245 .Host.rbx resq 1
246 ;.Host.rcx resq 1 - scratch
247 ;.Host.rdx resq 1 - scratch
248 .Host.rdi resq 1
249 .Host.rsi resq 1
250 .Host.rbp resq 1
251 .Host.rsp resq 1
252 ;.Host.r8 resq 1 - scratch
253 ;.Host.r9 resq 1 - scratch
254 .Host.r10 resq 1
255 .Host.r11 resq 1
256 .Host.r12 resq 1
257 .Host.r13 resq 1
258 .Host.r14 resq 1
259 .Host.r15 resq 1
260 ;.Host.rip resd 1 - scratch
261 .Host.rflags resq 1
262%endif
263%if HC_ARCH_BITS == 32
264 ;.Host.eax resd 1 - scratch
265 .Host.ebx resd 1
266 ;.Host.edx resd 1 - scratch
267 ;.Host.ecx resd 1 - scratch
268 .Host.edi resd 1
269 .Host.esi resd 1
270 .Host.ebp resd 1
271 .Host.eflags resd 1
272 ;.Host.eip resd 1 - scratch
273 ; lss pair!
274 .Host.esp resd 1
275%endif
276 .Host.ss resw 1
277 .Host.ssPadding resw 1
278 .Host.gs resw 1
279 .Host.gsPadding resw 1
280 .Host.fs resw 1
281 .Host.fsPadding resw 1
282 .Host.es resw 1
283 .Host.esPadding resw 1
284 .Host.ds resw 1
285 .Host.dsPadding resw 1
286 .Host.cs resw 1
287 .Host.csPadding resw 1
288
289%if HC_ARCH_BITS == 32
290 .Host.cr0 resd 1
291 ;.Host.cr2 resd 1 - scratch
292 .Host.cr3 resd 1
293 .Host.cr4 resd 1
294
295 .Host.dr0 resd 1
296 .Host.dr1 resd 1
297 .Host.dr2 resd 1
298 .Host.dr3 resd 1
299 .Host.dr6 resd 1
300 .Host.dr7 resd 1
301
302 .Host.gdtr resb 6 ; GDT limit + linear address
303 .Host.gdtrPadding resw 1
304 .Host.idtr resb 6 ; IDT limit + linear address
305 .Host.idtrPadding resw 1
306 .Host.ldtr resw 1
307 .Host.ldtrPadding resw 1
308 .Host.tr resw 1
309 .Host.trPadding resw 1
310
311 .Host.SysEnterPadding resd 1
312 .Host.SysEnter.cs resq 1
313 .Host.SysEnter.eip resq 1
314 .Host.SysEnter.esp resq 1
315 .Host.efer resq 1
316 .Host.auPadding resb (20)
317
318%else ; 64-bit
319
320 .Host.cr0 resq 1
321 ;.Host.cr2 resq 1 - scratch
322 .Host.cr3 resq 1
323 .Host.cr4 resq 1
324 .Host.cr8 resq 1
325
326 .Host.dr0 resq 1
327 .Host.dr1 resq 1
328 .Host.dr2 resq 1
329 .Host.dr3 resq 1
330 .Host.dr6 resq 1
331 .Host.dr7 resq 1
332
333 .Host.gdtr resb 10 ; GDT limit + linear address
334 .Host.gdtrPadding resw 1
335 .Host.idtr resb 10 ; IDT limit + linear address
336 .Host.idtrPadding resw 1
337 .Host.ldtr resw 1
338 .Host.ldtrPadding resw 1
339 .Host.tr resw 1
340 .Host.trPadding resw 1
341
342 .Host.SysEnter.cs resq 1
343 .Host.SysEnter.eip resq 1
344 .Host.SysEnter.esp resq 1
345 .Host.FSbase resq 1
346 .Host.GSbase resq 1
347 .Host.efer resq 1
348 .Host.auPadding resb 4
349%endif ; 64-bit
350 .Host.pXStateRC RTRCPTR_RES 1
351 alignb RTR0PTR_CB
352 .Host.pXStateR0 RTR0PTR_RES 1
353 .Host.pXStateR3 RTR3PTR_RES 1
354 alignb 8
355 .Host.xcr0 resq 1
356 .Host.fXStateMask resq 1
357
358 ;
359 ; Hypervisor Context (same as .Guest above).
360 ;
361 alignb 64
362 .Hyper resq 0
363 .Hyper.eax resq 1
364 .Hyper.ecx resq 1
365 .Hyper.edx resq 1
366 .Hyper.ebx resq 1
367 .Hyper.esp resq 1
368 .Hyper.ebp resq 1
369 .Hyper.esi resq 1
370 .Hyper.edi resq 1
371 .Hyper.r8 resq 1
372 .Hyper.r9 resq 1
373 .Hyper.r10 resq 1
374 .Hyper.r11 resq 1
375 .Hyper.r12 resq 1
376 .Hyper.r13 resq 1
377 .Hyper.r14 resq 1
378 .Hyper.r15 resq 1
379 .Hyper.es.Sel resw 1
380 .Hyper.es.PaddingSel resw 1
381 .Hyper.es.ValidSel resw 1
382 .Hyper.es.fFlags resw 1
383 .Hyper.es.u64Base resq 1
384 .Hyper.es.u32Limit resd 1
385 .Hyper.es.Attr resd 1
386 .Hyper.cs.Sel resw 1
387 .Hyper.cs.PaddingSel resw 1
388 .Hyper.cs.ValidSel resw 1
389 .Hyper.cs.fFlags resw 1
390 .Hyper.cs.u64Base resq 1
391 .Hyper.cs.u32Limit resd 1
392 .Hyper.cs.Attr resd 1
393 .Hyper.ss.Sel resw 1
394 .Hyper.ss.PaddingSel resw 1
395 .Hyper.ss.ValidSel resw 1
396 .Hyper.ss.fFlags resw 1
397 .Hyper.ss.u64Base resq 1
398 .Hyper.ss.u32Limit resd 1
399 .Hyper.ss.Attr resd 1
400 .Hyper.ds.Sel resw 1
401 .Hyper.ds.PaddingSel resw 1
402 .Hyper.ds.ValidSel resw 1
403 .Hyper.ds.fFlags resw 1
404 .Hyper.ds.u64Base resq 1
405 .Hyper.ds.u32Limit resd 1
406 .Hyper.ds.Attr resd 1
407 .Hyper.fs.Sel resw 1
408 .Hyper.fs.PaddingSel resw 1
409 .Hyper.fs.ValidSel resw 1
410 .Hyper.fs.fFlags resw 1
411 .Hyper.fs.u64Base resq 1
412 .Hyper.fs.u32Limit resd 1
413 .Hyper.fs.Attr resd 1
414 .Hyper.gs.Sel resw 1
415 .Hyper.gs.PaddingSel resw 1
416 .Hyper.gs.ValidSel resw 1
417 .Hyper.gs.fFlags resw 1
418 .Hyper.gs.u64Base resq 1
419 .Hyper.gs.u32Limit resd 1
420 .Hyper.gs.Attr resd 1
421 .Hyper.eip resq 1
422 .Hyper.eflags resq 1
423 .Hyper.cr0 resq 1
424 .Hyper.cr2 resq 1
425 .Hyper.cr3 resq 1
426 .Hyper.cr4 resq 1
427 .Hyper.dr resq 8
428 .Hyper.gdtrPadding resw 3
429 .Hyper.gdtr resw 0
430 .Hyper.gdtr.cbGdt resw 1
431 .Hyper.gdtr.pGdt resq 1
432 .Hyper.idtrPadding resw 3
433 .Hyper.idtr resw 0
434 .Hyper.idtr.cbIdt resw 1
435 .Hyper.idtr.pIdt resq 1
436 .Hyper.ldtr.Sel resw 1
437 .Hyper.ldtr.PaddingSel resw 1
438 .Hyper.ldtr.ValidSel resw 1
439 .Hyper.ldtr.fFlags resw 1
440 .Hyper.ldtr.u64Base resq 1
441 .Hyper.ldtr.u32Limit resd 1
442 .Hyper.ldtr.Attr resd 1
443 .Hyper.tr.Sel resw 1
444 .Hyper.tr.PaddingSel resw 1
445 .Hyper.tr.ValidSel resw 1
446 .Hyper.tr.fFlags resw 1
447 .Hyper.tr.u64Base resq 1
448 .Hyper.tr.u32Limit resd 1
449 .Hyper.tr.Attr resd 1
450 .Hyper.SysEnter.cs resb 8
451 .Hyper.SysEnter.eip resb 8
452 .Hyper.SysEnter.esp resb 8
453 .Hyper.msrEFER resb 8
454 .Hyper.msrSTAR resb 8
455 .Hyper.msrPAT resb 8
456 .Hyper.msrLSTAR resb 8
457 .Hyper.msrCSTAR resb 8
458 .Hyper.msrSFMASK resb 8
459 .Hyper.msrKERNELGSBASE resb 8
460 .Hyper.msrApicBase resb 8
461 .Hyper.aXcr resq 2
462 .Hyper.fXStateMask resq 1
463 .Hyper.pXStateR0 RTR0PTR_RES 1
464 .Hyper.pXStateR3 RTR3PTR_RES 1
465 .Hyper.pXStateRC RTRCPTR_RES 1
466 .Hyper.aoffXState resw 64
467 alignb 64
468
469%ifdef VBOX_WITH_CRASHDUMP_MAGIC
470 .aMagic resb 56
471 .uMagic resq 1
472%endif
473endstruc
474
475
476;;
477; Converts the CPUM pointer to CPUMCPU
478; @param %1 register name
479%macro CPUMCPU_FROM_CPUM 1
480 add %1, dword [%1 + CPUM.offCPUMCPU0]
481%endmacro
482
483;;
484; Converts the CPUM pointer to CPUMCPU
485; @param %1 register name (CPUM)
486; @param %2 register name (CPUMCPU offset)
487%macro CPUMCPU_FROM_CPUM_WITH_OFFSET 2
488 add %1, %2
489%endmacro
490
491;;
492; Converts the CPUMCPU pointer to CPUM
493; @param %1 register name
494%macro CPUM_FROM_CPUMCPU 1
495 sub %1, dword [%1 + CPUMCPU.offCPUM]
496%endmacro
497
498;;
499; Converts the CPUMCPU pointer to CPUM
500; @param %1 register name (CPUM)
501; @param %2 register name (CPUMCPU offset)
502%macro CPUM_FROM_CPUMCPU_WITH_OFFSET 2
503 sub %1, %2
504%endmacro
505
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