VMMTests.cpp@ 13820

Last change on this file since 13820 was 13820, checked in by vboxsync, 16 years ago
VMM: %VG* inspection - an awfaul lot of these, hope I got it all right...
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1	/* $Id: VMMTests.cpp 13820 2008-11-05 00:55:49Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core, Tests.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	//#define NO_SUPCALLR0VMM
23
24	/*******************************************************************************
25	* Header Files *
26	*******************************************************************************/
27	#define LOG_GROUP LOG_GROUP_VMM
28	#include <VBox/vmm.h>
29	#include <VBox/pdm.h>
30	#include <VBox/cpum.h>
31	#include <VBox/mm.h>
32	#include <VBox/trpm.h>
33	#include <VBox/selm.h>
34	#include "VMMInternal.h"
35	#include <VBox/vm.h>
36	#include <VBox/err.h>
37	#include <VBox/param.h>
38	#include <VBox/x86.h>
39	#include <VBox/hwaccm.h>
40
41	#include <iprt/assert.h>
42	#include <iprt/asm.h>
43	#include <iprt/time.h>
44	#include <iprt/stream.h>
45	#include <iprt/string.h>
46
47
48	/**
49	* Performs a testcase.
50	*
51	* @returns return value from the test.
52	* @param pVM The VM handle.
53	* @param enmTestcase The testcase operation to perform.
54	* @param uVariation The testcase variation id.
55	*/
56	static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
57	{
58	RTRCPTR RCPtrEP;
59	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
60	if (RT_FAILURE(rc))
61	return rc;
62
63	CPUMHyperSetCtxCore(pVM, NULL);
64	memset(pVM->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE);
65	CPUMSetHyperESP(pVM, pVM->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
66	CPUMPushHyper(pVM, uVariation);
67	CPUMPushHyper(pVM, enmTestcase);
68	CPUMPushHyper(pVM, pVM->pVMGC);
69	CPUMPushHyper(pVM, 3 * sizeof(RTRCPTR)); /* stack frame size */
70	CPUMPushHyper(pVM, RCPtrEP); /* what to call */
71	CPUMSetHyperEIP(pVM, pVM->vmm.s.pfnCallTrampolineRC);
72	rc = SUPCallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN);
73	if (RT_LIKELY(rc == VINF_SUCCESS))
74	rc = pVM->vmm.s.iLastGZRc;
75	return rc;
76	}
77
78
79	/**
80	* Performs a trap test.
81	*
82	* @returns Return value from the trap test.
83	* @param pVM The VM handle.
84	* @param u8Trap The trap number to test.
85	* @param uVariation The testcase variation.
86	* @param rcExpect The expected result.
87	* @param u32Eax The expected eax value.
88	* @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
89	* @param pszDesc The test description.
90	*/
91	static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char pszFaultEIP, const char pszDesc)
92	{
93	RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
94
95	RTRCPTR RCPtrEP;
96	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
97	if (RT_FAILURE(rc))
98	return rc;
99
100	CPUMHyperSetCtxCore(pVM, NULL);
101	memset(pVM->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE);
102	CPUMSetHyperESP(pVM, pVM->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
103	CPUMPushHyper(pVM, uVariation);
104	CPUMPushHyper(pVM, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
105	CPUMPushHyper(pVM, pVM->pVMGC);
106	CPUMPushHyper(pVM, 3 * sizeof(RTRCPTR)); /* stack frame size */
107	CPUMPushHyper(pVM, RCPtrEP); /* what to call */
108	CPUMSetHyperEIP(pVM, pVM->vmm.s.pfnCallTrampolineRC);
109	rc = SUPCallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN);
110	if (RT_LIKELY(rc == VINF_SUCCESS))
111	rc = pVM->vmm.s.iLastGZRc;
112	bool fDump = false;
113	if (rc != rcExpect)
114	{
115	RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
116	if (rc != VERR_NOT_IMPLEMENTED)
117	fDump = true;
118	}
119	else if ( rcExpect != VINF_SUCCESS
120	&& u8Trap != 8 /* double fault doesn't dare set TrapNo. */
121	&& u8Trap != 3 /* guest only, we're not in guest. */
122	&& u8Trap != 1 /* guest only, we're not in guest. */
123	&& u8Trap != TRPMGetTrapNo(pVM))
124	{
125	RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVM), u8Trap);
126	fDump = true;
127	}
128	else if (pszFaultEIP)
129	{
130	RTRCPTR RCPtrFault;
131	int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
132	if (RT_FAILURE(rc2))
133	RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
134	else if (RCPtrFault != CPUMGetHyperEIP(pVM))
135	{
136	RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVM), RCPtrFault, pszFaultEIP);
137	fDump = true;
138	}
139	}
140	else if (rcExpect != VINF_SUCCESS)
141	{
142	if (CPUMGetHyperSS(pVM) == SELMGetHyperDS(pVM))
143	RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVM), SELMGetHyperDS(pVM));
144	if (CPUMGetHyperES(pVM) == SELMGetHyperDS(pVM))
145	RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVM), SELMGetHyperDS(pVM));
146	if (CPUMGetHyperDS(pVM) == SELMGetHyperDS(pVM))
147	RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVM), SELMGetHyperDS(pVM));
148	if (CPUMGetHyperFS(pVM) == SELMGetHyperDS(pVM))
149	RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVM), SELMGetHyperDS(pVM));
150	if (CPUMGetHyperGS(pVM) == SELMGetHyperDS(pVM))
151	RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVM), SELMGetHyperDS(pVM));
152	if (CPUMGetHyperEDI(pVM) == 0x01234567)
153	RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVM), 0x01234567);
154	if (CPUMGetHyperESI(pVM) == 0x42000042)
155	RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVM), 0x42000042);
156	if (CPUMGetHyperEBP(pVM) == 0xffeeddcc)
157	RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVM), 0xffeeddcc);
158	if (CPUMGetHyperEBX(pVM) == 0x89abcdef)
159	RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVM), 0x89abcdef);
160	if (CPUMGetHyperECX(pVM) == 0xffffaaaa)
161	RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVM), 0xffffaaaa);
162	if (CPUMGetHyperEDX(pVM) == 0x77778888)
163	RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVM), 0x77778888);
164	if (CPUMGetHyperEAX(pVM) == u32Eax)
165	RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVM), u32Eax);
166	}
167	if (fDump)
168	VMMR3FatalDump(pVM, rc);
169	return rc;
170	}
171
172
173	/* execute the switch. */
174	VMMR3DECL(int) VMMDoTest(PVM pVM)
175	{
176	#if 1
177	#ifdef NO_SUPCALLR0VMM
178	RTPrintf("NO_SUPCALLR0VMM\n");
179	return VINF_SUCCESS;
180	#endif
181
182	/*
183	* Setup stack for calling VMMGCEntry().
184	*/
185	RTRCPTR RCPtrEP;
186	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
187	if (RT_SUCCESS(rc))
188	{
189	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
190
191	/*
192	* Test various crashes which we must be able to recover from.
193	*/
194	vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
195	vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
196
197	#if defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
198	vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
199	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
200	bool f;
201	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
202	#if !defined(DEBUG_bird)
203	if (RT_SUCCESS(rc) && f)
204	#endif
205	{
206	/* see tripple fault warnings in SELM and VMMGC.cpp. */
207	vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
208	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
209	}
210	#endif
211
212	vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
213	///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
214	//vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
215
216	vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
217	vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
218	vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
219	vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
220
221	/*
222	* Set a debug register and perform a context switch.
223	*/
224	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
225	if (rc != VINF_SUCCESS)
226	{
227	RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
228	return rc;
229	}
230
231	/* a harmless breakpoint */
232	RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
233	DBGFADDRESS Addr;
234	DBGFR3AddrFromFlat(pVM, &Addr, 0x10000);
235	RTUINT iBp0;
236	rc = DBGFR3BpSetReg(pVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
237	AssertReleaseRC(rc);
238	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
239	if (rc != VINF_SUCCESS)
240	{
241	RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
242	return rc;
243	}
244
245	/* a bad one at VMMGCEntry */
246	RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
247	DBGFR3AddrFromFlat(pVM, &Addr, RCPtrEP);
248	RTUINT iBp1;
249	rc = DBGFR3BpSetReg(pVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
250	AssertReleaseRC(rc);
251	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
252	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
253	{
254	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
255	return rc;
256	}
257
258	/* resume the breakpoint */
259	RTPrintf("VMM: resuming hyper after breakpoint\n");
260	CPUMSetHyperEFlags(pVM, CPUMGetHyperEFlags(pVM) \| X86_EFL_RF);
261	rc = VMMR3ResumeHyper(pVM);
262	if (rc != VINF_SUCCESS)
263	{
264	RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc\n", rc);
265	return rc;
266	}
267
268	/* engage the breakpoint again and try single stepping. */
269	RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
270	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
271	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
272	{
273	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
274	return rc;
275	}
276
277	RTGCUINTREG OldPc = CPUMGetHyperEIP(pVM);
278	RTPrintf("%RGr=>", OldPc);
279	unsigned i;
280	for (i = 0; i < 8; i++)
281	{
282	CPUMSetHyperEFlags(pVM, CPUMGetHyperEFlags(pVM) \| X86_EFL_TF \| X86_EFL_RF);
283	rc = VMMR3ResumeHyper(pVM);
284	if (rc != VINF_EM_DBG_HYPER_STEPPED)
285	{
286	RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
287	return rc;
288	}
289	RTGCUINTREG Pc = CPUMGetHyperEIP(pVM);
290	RTPrintf("%RGr=>", Pc);
291	if (Pc == OldPc)
292	{
293	RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
294	return VERR_GENERAL_FAILURE;
295	}
296	OldPc = Pc;
297	}
298	RTPrintf("ok\n");
299
300	/* done, clear it */
301	if ( RT_FAILURE(DBGFR3BpClear(pVM, iBp0))
302	\|\| RT_FAILURE(DBGFR3BpClear(pVM, iBp1)))
303	{
304	RTPrintf("VMM: Failed to clear breakpoints!\n");
305	return VERR_GENERAL_FAILURE;
306	}
307	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
308	if (rc != VINF_SUCCESS)
309	{
310	RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
311	return rc;
312	}
313
314	/*
315	* Interrupt masking.
316	*/
317	RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
318	for (i = 0; i < 10000; i++)
319	{
320	uint64_t StartTick = ASMReadTSC();
321	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
322	if (rc != VINF_SUCCESS)
323	{
324	RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
325	return rc;
326	}
327	uint64_t Ticks = ASMReadTSC() - StartTick;
328	if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
329	RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
330	}
331
332	/*
333	* Interrupt forwarding.
334	*/
335	CPUMHyperSetCtxCore(pVM, NULL);
336	CPUMSetHyperESP(pVM, pVM->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
337	CPUMPushHyper(pVM, 0);
338	CPUMPushHyper(pVM, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
339	CPUMPushHyper(pVM, pVM->pVMGC);
340	CPUMPushHyper(pVM, 3 * sizeof(RTRCPTR)); /* stack frame size */
341	CPUMPushHyper(pVM, RCPtrEP); /* what to call */
342	CPUMSetHyperEIP(pVM, pVM->vmm.s.pfnCallTrampolineRC);
343	Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
344
345	/*
346	* Switch and do da thing.
347	*/
348	RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
349	i = 0;
350	uint64_t tsBegin = RTTimeNanoTS();
351	uint64_t TickStart = ASMReadTSC();
352	do
353	{
354	rc = SUPCallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN);
355	if (RT_LIKELY(rc == VINF_SUCCESS))
356	rc = pVM->vmm.s.iLastGZRc;
357	if (RT_FAILURE(rc))
358	{
359	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
360	VMMR3FatalDump(pVM, rc);
361	return rc;
362	}
363	i++;
364	if (!(i % 32))
365	Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
366	i, CPUMGetHyperESI(pVM), CPUMGetHyperEDI(pVM), CPUMGetHyperEBX(pVM)));
367	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
368	uint64_t TickEnd = ASMReadTSC();
369	uint64_t tsEnd = RTTimeNanoTS();
370
371	uint64_t Elapsed = tsEnd - tsBegin;
372	uint64_t PerIteration = Elapsed / (uint64_t)i;
373	uint64_t cTicksElapsed = TickEnd - TickStart;
374	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
375
376	RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
377	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
378	Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
379	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
380
381	/*
382	* These forced actions are not necessary for the test and trigger breakpoints too.
383	*/
384	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
385	VM_FF_CLEAR(pVM, VM_FF_SELM_SYNC_TSS);
386
387	/*
388	* Profile switching.
389	*/
390	RTPrintf("VMM: profiling switcher...\n");
391	Log(("VMM: profiling switcher...\n"));
392	uint64_t TickMin = ~0;
393	tsBegin = RTTimeNanoTS();
394	TickStart = ASMReadTSC();
395	for (i = 0; i < 1000000; i++)
396	{
397	CPUMHyperSetCtxCore(pVM, NULL);
398	CPUMSetHyperESP(pVM, pVM->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
399	CPUMPushHyper(pVM, 0);
400	CPUMPushHyper(pVM, VMMGC_DO_TESTCASE_NOP);
401	CPUMPushHyper(pVM, pVM->pVMGC);
402	CPUMPushHyper(pVM, 3 * sizeof(RTRCPTR)); /* stack frame size */
403	CPUMPushHyper(pVM, RCPtrEP); /* what to call */
404	CPUMSetHyperEIP(pVM, pVM->vmm.s.pfnCallTrampolineRC);
405
406	uint64_t TickThisStart = ASMReadTSC();
407	rc = SUPCallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN);
408	if (RT_LIKELY(rc == VINF_SUCCESS))
409	rc = pVM->vmm.s.iLastGZRc;
410	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
411	if (RT_FAILURE(rc))
412	{
413	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
414	VMMR3FatalDump(pVM, rc);
415	return rc;
416	}
417	if (TickThisElapsed < TickMin)
418	TickMin = TickThisElapsed;
419	}
420	TickEnd = ASMReadTSC();
421	tsEnd = RTTimeNanoTS();
422
423	Elapsed = tsEnd - tsBegin;
424	PerIteration = Elapsed / (uint64_t)i;
425	cTicksElapsed = TickEnd - TickStart;
426	cTicksPerIteration = cTicksElapsed / (uint64_t)i;
427
428	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
429	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
430	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
431	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
432
433	rc = VINF_SUCCESS;
434	}
435	else
436	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
437	#endif
438	return rc;
439	}
440
441	#define SYNC_SEL(pHyperCtx, reg) \
442	if (pHyperCtx->reg) \
443	{ \
444	SELMSELINFO selInfo; \
445	int rc = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg, &selInfo); \
446	AssertRC(rc); \
447	\
448	pHyperCtx->reg##Hid.u64Base = selInfo.GCPtrBase; \
449	pHyperCtx->reg##Hid.u32Limit = selInfo.cbLimit; \
450	pHyperCtx->reg##Hid.Attr.n.u1Present = selInfo.Raw.Gen.u1Present; \
451	pHyperCtx->reg##Hid.Attr.n.u1DefBig = selInfo.Raw.Gen.u1DefBig; \
452	pHyperCtx->reg##Hid.Attr.n.u1Granularity = selInfo.Raw.Gen.u1Granularity; \
453	pHyperCtx->reg##Hid.Attr.n.u4Type = selInfo.Raw.Gen.u4Type; \
454	pHyperCtx->reg##Hid.Attr.n.u2Dpl = selInfo.Raw.Gen.u2Dpl; \
455	pHyperCtx->reg##Hid.Attr.n.u1DescType = selInfo.Raw.Gen.u1DescType; \
456	pHyperCtx->reg##Hid.Attr.n.u1Long = selInfo.Raw.Gen.u1Long; \
457	}
458
459	/* execute the switch. */
460	VMMR3DECL(int) VMMDoHwAccmTest(PVM pVM)
461	{
462	uint32_t i;
463	int rc;
464	PCPUMCTX pHyperCtx, pGuestCtx;
465	RTGCPHYS CR3Phys = 0x0; /* fake address */
466
467	if (!HWACCMR3IsAllowed(pVM))
468	{
469	RTPrintf("VMM: Hardware accelerated test not available!\n");
470	return VERR_ACCESS_DENIED;
471	}
472
473	/*
474	* These forced actions are not necessary for the test and trigger breakpoints too.
475	*/
476	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
477	VM_FF_CLEAR(pVM, VM_FF_SELM_SYNC_TSS);
478
479	/* Enable mapping of the hypervisor into the shadow page table. */
480	PGMR3ChangeShwPDMappings(pVM, true);
481
482	CPUMQueryHyperCtxPtr(pVM, &pHyperCtx);
483
484	pHyperCtx->cr0 = X86_CR0_PE \| X86_CR0_WP \| X86_CR0_PG \| X86_CR0_TS \| X86_CR0_ET \| X86_CR0_NE \| X86_CR0_MP;
485	pHyperCtx->cr4 = X86_CR4_PGE \| X86_CR4_OSFSXR \| X86_CR4_OSXMMEEXCPT;
486	PGMChangeMode(pVM, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
487	PGMSyncCR3(pVM, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
488
489	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
490	VM_FF_CLEAR(pVM, VM_FF_TIMER);
491	VM_FF_CLEAR(pVM, VM_FF_REQUEST);
492
493	/*
494	* Setup stack for calling VMMGCEntry().
495	*/
496	RTRCPTR RCPtrEP;
497	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
498	if (RT_SUCCESS(rc))
499	{
500	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
501
502	CPUMQueryHyperCtxPtr(pVM, &pHyperCtx);
503
504	/* Fill in hidden selector registers for the hypervisor state. */
505	SYNC_SEL(pHyperCtx, cs);
506	SYNC_SEL(pHyperCtx, ds);
507	SYNC_SEL(pHyperCtx, es);
508	SYNC_SEL(pHyperCtx, fs);
509	SYNC_SEL(pHyperCtx, gs);
510	SYNC_SEL(pHyperCtx, ss);
511	SYNC_SEL(pHyperCtx, tr);
512
513	/*
514	* Profile switching.
515	*/
516	RTPrintf("VMM: profiling switcher...\n");
517	Log(("VMM: profiling switcher...\n"));
518	uint64_t TickMin = ~0;
519	uint64_t tsBegin = RTTimeNanoTS();
520	uint64_t TickStart = ASMReadTSC();
521	for (i = 0; i < 1000000; i++)
522	{
523	CPUMHyperSetCtxCore(pVM, NULL);
524
525	CPUMSetHyperESP(pVM, pVM->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
526	CPUMPushHyper(pVM, 0);
527	CPUMPushHyper(pVM, VMMGC_DO_TESTCASE_HWACCM_NOP);
528	CPUMPushHyper(pVM, pVM->pVMGC);
529	CPUMPushHyper(pVM, 3 * sizeof(RTRCPTR)); /* stack frame size */
530	CPUMPushHyper(pVM, RCPtrEP); /* what to call */
531	CPUMSetHyperEIP(pVM, pVM->vmm.s.pfnCallTrampolineRC);
532
533	CPUMQueryHyperCtxPtr(pVM, &pHyperCtx);
534	pGuestCtx = CPUMQueryGuestCtxPtr(pVM);
535
536	/* Copy the hypervisor context to make sure we have a valid guest context. */
537	pGuestCtx = pHyperCtx;
538	pGuestCtx->cr3 = CR3Phys;
539
540	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
541	VM_FF_CLEAR(pVM, VM_FF_TIMER);
542
543	uint64_t TickThisStart = ASMReadTSC();
544	rc = SUPCallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN);
545	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
546	if (RT_FAILURE(rc))
547	{
548	Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
549	VMMR3FatalDump(pVM, rc);
550	return rc;
551	}
552	if (TickThisElapsed < TickMin)
553	TickMin = TickThisElapsed;
554	}
555	uint64_t TickEnd = ASMReadTSC();
556	uint64_t tsEnd = RTTimeNanoTS();
557
558	uint64_t Elapsed = tsEnd - tsBegin;
559	uint64_t PerIteration = Elapsed / (uint64_t)i;
560	uint64_t cTicksElapsed = TickEnd - TickStart;
561	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
562
563	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
564	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
565	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
566	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
567
568	rc = VINF_SUCCESS;
569	}
570	else
571	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
572
573	return rc;
574	}
575

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source: vbox/trunk/src/VBox/VMM/VMMTests.cpp@ 13820

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