VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac@ 5999

Last change on this file since 5999 was 5999, checked in by vboxsync, 17 years ago

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1; $Id: PAEand32Bit.mac 5999 2007-12-07 15:05:06Z vboxsync $
2;; @file
3; VMM - World Switchers, template for PAE and 32-Bit.
4;
5
6;
7; Copyright (C) 2006-2007 innotek GmbH
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17
18;%define DEBUG_STUFF 1
19
20;*******************************************************************************
21;* Header Files *
22;*******************************************************************************
23%include "VBox/asmdefs.mac"
24%include "VBox/x86.mac"
25%include "VBox/cpum.mac"
26%include "VBox/stam.mac"
27%include "VBox/vm.mac"
28%include "CPUMInternal.mac"
29%include "VMMSwitcher/VMMSwitcher.mac"
30
31%undef NEED_ID
32%ifdef NEED_PAE_ON_32BIT_HOST
33%define NEED_ID
34%endif
35%ifdef NEED_32BIT_ON_PAE_HOST
36%define NEED_ID
37%endif
38
39
40
41;
42; Start the fixup records
43; We collect the fixups in the .data section as we go along
44; It is therefore VITAL that no-one is using the .data section
45; for anything else between 'Start' and 'End'.
46;
47BEGINDATA
48GLOBALNAME Fixups
49
50
51
52BEGINCODE
53GLOBALNAME Start
54
55;;
56; The C interface.
57;
58BEGINPROC vmmR0HostToGuest
59
60%ifdef DEBUG_STUFF
61 COM_S_NEWLINE
62 COM_S_CHAR '^'
63%endif
64
65%ifdef VBOX_WITH_STATISTICS
66 ;
67 ; Switcher stats.
68 ;
69 FIXUP FIX_HC_VM_OFF, 1, VM.StatSwitcherToGC
70 mov edx, 0ffffffffh
71 STAM_PROFILE_ADV_START edx
72%endif
73
74 ;
75 ; Call worker.
76 ;
77 FIXUP FIX_HC_CPUM_OFF, 1, 0
78 mov edx, 0ffffffffh
79 push cs ; allow for far return and restore cs correctly.
80 call NAME(vmmR0HostToGuestAsm)
81
82%ifdef VBOX_WITH_STATISTICS
83 ;
84 ; Switcher stats.
85 ;
86 FIXUP FIX_HC_VM_OFF, 1, VM.StatSwitcherToHC
87 mov edx, 0ffffffffh
88 STAM_PROFILE_ADV_STOP edx
89%endif
90
91 ret
92ENDPROC vmmR0HostToGuest
93
94
95
96; *****************************************************************************
97; vmmR0HostToGuestAsm
98;
99; Phase one of the switch from host to guest context (host MMU context)
100;
101; INPUT:
102; - edx virtual address of CPUM structure (valid in host context)
103;
104; USES/DESTROYS:
105; - eax, ecx, edx
106;
107; ASSUMPTION:
108; - current CS and DS selectors are wide open
109;
110; *****************************************************************************
111ALIGNCODE(16)
112BEGINPROC vmmR0HostToGuestAsm
113 ;;
114 ;; Save CPU host context
115 ;; Skip eax, edx and ecx as these are not preserved over calls.
116 ;;
117 ; general registers.
118 mov [edx + CPUM.Host.ebx], ebx
119 mov [edx + CPUM.Host.edi], edi
120 mov [edx + CPUM.Host.esi], esi
121 mov [edx + CPUM.Host.esp], esp
122 mov [edx + CPUM.Host.ebp], ebp
123 ; selectors.
124 mov [edx + CPUM.Host.ds], ds
125 mov [edx + CPUM.Host.es], es
126 mov [edx + CPUM.Host.fs], fs
127 mov [edx + CPUM.Host.gs], gs
128 mov [edx + CPUM.Host.ss], ss
129 ; special registers.
130 sldt [edx + CPUM.Host.ldtr]
131 sidt [edx + CPUM.Host.idtr]
132 sgdt [edx + CPUM.Host.gdtr]
133 str [edx + CPUM.Host.tr]
134 ; flags
135 pushfd
136 pop dword [edx + CPUM.Host.eflags]
137
138 FIXUP FIX_NO_SYSENTER_JMP, 0, htg_no_sysenter - NAME(Start) ; this will insert a jmp htg_no_sysenter if host doesn't use sysenter.
139 ; save MSR_IA32_SYSENTER_CS register.
140 mov ecx, MSR_IA32_SYSENTER_CS
141 mov ebx, edx ; save edx
142 rdmsr ; edx:eax <- MSR[ecx]
143 mov [ebx + CPUM.Host.SysEnter.cs], eax
144 mov [ebx + CPUM.Host.SysEnter.cs + 4], edx
145 xor eax, eax ; load 0:0 to cause #GP upon sysenter
146 xor edx, edx
147 wrmsr
148 xchg ebx, edx ; restore edx
149 jmp short htg_no_sysenter
150
151ALIGNCODE(16)
152htg_no_sysenter:
153
154 ;; handle use flags.
155 mov esi, [edx + CPUM.fUseFlags] ; esi == use flags.
156 and esi, ~CPUM_USED_FPU ; Clear CPUM_USED_* flags. ;;@todo FPU check can be optimized to use cr0 flags!
157 mov [edx + CPUM.fUseFlags], esi
158
159 ; debug registers.
160 test esi, CPUM_USE_DEBUG_REGS | CPUM_USE_DEBUG_REGS_HOST
161 jz htg_debug_regs_no
162 jmp htg_debug_regs_save_dr7and6
163htg_debug_regs_no:
164
165 ; control registers.
166 mov eax, cr0
167 mov [edx + CPUM.Host.cr0], eax
168 ;mov eax, cr2 ; assume host os don't suff things in cr2. (safe)
169 ;mov [edx + CPUM.Host.cr2], eax
170 mov eax, cr3
171 mov [edx + CPUM.Host.cr3], eax
172 mov eax, cr4
173 mov [edx + CPUM.Host.cr4], eax
174
175 ;;
176 ;; Start switching to VMM context.
177 ;;
178
179 ;
180 ; Change CR0 and CR4 so we can correctly emulate FPU/MMX/SSE[23] exceptions
181 ; Also disable WP. (eax==cr4 now)
182 ; Note! X86_CR4_PSE and X86_CR4_PAE are important if the host thinks so :-)
183 ; Note! X86_CR4_VMXE must not be touched in case the CPU is in vmx root mode
184 ;
185 and eax, X86_CR4_MCE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_VMXE
186 mov ecx, [edx + CPUM.Guest.cr4]
187 ;; @todo Switcher cleanup: Determin base CR4 during CPUMR0Init / VMMR3SelectSwitcher putting it
188 ; in CPUM.Hyper.cr4 (which isn't currently being used). That should
189 ; simplify this operation a bit (and improve locality of the data).
190
191 ;
192 ; CR4.AndMask and CR4.OrMask are set in CPUMR3Init based on the presence of
193 ; FXSAVE support on the host CPU
194 ;
195 and ecx, [edx + CPUM.CR4.AndMask]
196 or eax, ecx
197 or eax, [edx + CPUM.CR4.OrMask]
198 mov cr4, eax
199
200 mov eax, [edx + CPUM.Guest.cr0]
201 and eax, X86_CR0_EM
202 or eax, X86_CR0_PE | X86_CR0_PG | X86_CR0_TS | X86_CR0_ET | X86_CR0_NE | X86_CR0_MP
203 mov cr0, eax
204
205 ; Load new gdt so we can do far jump to guest code after cr3 reload.
206 lgdt [edx + CPUM.Hyper.gdtr]
207 DEBUG_CHAR('1') ; trashes esi
208
209 ;;
210 ;; Load Intermediate memory context.
211 ;;
212 FIXUP SWITCHER_FIX_INTER_CR3_HC, 1
213 mov eax, 0ffffffffh
214 mov cr3, eax
215 DEBUG_CHAR('2') ; trashes esi
216
217%ifdef NEED_ID
218 ;;
219 ;; Jump to identity mapped location
220 ;;
221 FIXUP FIX_HC_2_ID_NEAR_REL, 1, NAME(IDEnterTarget) - NAME(Start)
222 jmp near NAME(IDEnterTarget)
223
224 ; We're now on identity mapped pages!
225ALIGNCODE(16)
226GLOBALNAME IDEnterTarget
227 DEBUG_CHAR('3')
228 mov edx, cr4
229%ifdef NEED_PAE_ON_32BIT_HOST
230 or edx, X86_CR4_PAE
231%else
232 and edx, ~X86_CR4_PAE
233%endif
234 mov eax, cr0
235 and eax, ~X86_CR0_PG
236 mov cr0, eax
237 DEBUG_CHAR('4')
238 mov cr4, edx
239 FIXUP SWITCHER_FIX_INTER_CR3_GC, 1
240 mov edx, 0ffffffffh
241 mov cr3, edx
242 or eax, X86_CR0_PG
243 DEBUG_CHAR('5')
244 mov cr0, eax
245 DEBUG_CHAR('6')
246%endif
247
248 ;;
249 ;; Jump to guest code mapping of the code and load the Hypervisor CS.
250 ;;
251 FIXUP FIX_GC_FAR32, 1, NAME(FarJmpGCTarget) - NAME(Start)
252 jmp 0fff8h:0deadfaceh
253
254
255 ;;
256 ;; When we arrive at this label we're at the
257 ;; guest code mapping of the switching code.
258 ;;
259ALIGNCODE(16)
260GLOBALNAME FarJmpGCTarget
261 DEBUG_CHAR('-')
262 ; load final cr3 and do far jump to load cs.
263 FIXUP SWITCHER_FIX_HYPER_CR3, 1
264 mov eax, 0ffffffffh
265 mov cr3, eax
266 DEBUG_CHAR('0')
267
268 ;;
269 ;; We're in VMM MMU context and VMM CS is loaded.
270 ;; Setup the rest of the VMM state.
271 ;;
272 FIXUP FIX_GC_CPUM_OFF, 1, 0
273 mov edx, 0ffffffffh
274 ; Activate guest IDT
275 DEBUG_CHAR('1')
276 lidt [edx + CPUM.Hyper.idtr]
277 ; Load selectors
278 DEBUG_CHAR('2')
279 FIXUP FIX_HYPER_DS, 1
280 mov eax, 0ffffh
281 mov ds, eax
282 mov es, eax
283 xor eax, eax
284 mov gs, eax
285 mov fs, eax
286
287 ; Setup stack
288 DEBUG_CHAR('3')
289 lss esp, [edx + CPUM.Hyper.esp]
290
291 ; Restore TSS selector; must mark it as not busy before using ltr (!)
292 DEBUG_CHAR('4')
293 FIXUP FIX_GC_TSS_GDTE_DW2, 2
294 and dword [0ffffffffh], ~0200h ; clear busy flag (2nd type2 bit)
295 DEBUG_CHAR('5')
296 ltr word [edx + CPUM.Hyper.tr]
297 DEBUG_CHAR('6')
298
299 ; Activate the ldt (now we can safely crash).
300 lldt [edx + CPUM.Hyper.ldtr]
301 DEBUG_CHAR('7')
302
303 ;; use flags.
304 mov esi, [edx + CPUM.fUseFlags]
305
306 ; debug registers
307 test esi, CPUM_USE_DEBUG_REGS
308 jz htg_debug_regs_guest_no
309 jmp htg_debug_regs_guest
310htg_debug_regs_guest_no:
311 DEBUG_CHAR('9')
312
313%ifdef VBOX_WITH_NMI
314 ;
315 ; Setup K7 NMI.
316 ;
317 mov esi, edx
318 ; clear all PerfEvtSeln registers
319 xor eax, eax
320 xor edx, edx
321 mov ecx, MSR_K7_PERFCTR0
322 wrmsr
323 mov ecx, MSR_K7_PERFCTR1
324 wrmsr
325 mov ecx, MSR_K7_PERFCTR2
326 wrmsr
327 mov ecx, MSR_K7_PERFCTR3
328 wrmsr
329
330 mov eax, RT_BIT(20) | RT_BIT(17) | RT_BIT(16) | 076h
331 mov ecx, MSR_K7_EVNTSEL0
332 wrmsr
333 mov eax, 02329B000h
334 mov edx, 0fffffffeh ; -1.6GHz * 5
335 mov ecx, MSR_K7_PERFCTR0
336 wrmsr
337
338 FIXUP FIX_GC_APIC_BASE_32BIT, 1
339 mov eax, 0f0f0f0f0h
340 add eax, 0340h ; APIC_LVTPC
341 mov dword [eax], 0400h ; APIC_DM_NMI
342
343 xor edx, edx
344 mov eax, RT_BIT(20) | RT_BIT(17) | RT_BIT(16) | 076h | RT_BIT(22) ;+EN
345 mov ecx, MSR_K7_EVNTSEL0
346 wrmsr
347
348 mov edx, esi
349%endif
350
351 ; General registers.
352 mov ebx, [edx + CPUM.Hyper.ebx]
353 mov ebp, [edx + CPUM.Hyper.ebp]
354 mov esi, [edx + CPUM.Hyper.esi]
355 mov edi, [edx + CPUM.Hyper.edi]
356 push dword [edx + CPUM.Hyper.eflags]
357 popfd
358 DEBUG_CHAR('!')
359
360 ;;
361 ;; Return to the VMM code which either called the switcher or
362 ;; the code set up to run by HC.
363 ;;
364%ifdef DEBUG_STUFF
365 COM_S_PRINT ';eip='
366 mov eax, [edx + CPUM.Hyper.eip]
367 COM_S_DWORD_REG eax
368 COM_S_CHAR ';'
369%endif
370 mov eax, [edx + CPUM.Hyper.eip]
371%ifdef VBOX_WITH_STATISTICS
372 FIXUP FIX_GC_VM_OFF, 1, VM.StatSwitcherToGC
373 mov edx, 0ffffffffh
374 STAM_PROFILE_ADV_STOP edx
375 FIXUP FIX_GC_CPUM_OFF, 1, 0
376 mov edx, 0ffffffffh
377%endif
378 jmp eax
379
380;;
381; Detour for saving the host DR7 and DR6.
382; esi and edx must be preserved.
383htg_debug_regs_save_dr7and6:
384DEBUG_S_CHAR('s');
385 mov eax, dr7 ; not sure, but if I read the docs right this will trap if GD is set. FIXME!!!
386 mov [edx + CPUM.Host.dr7], eax
387 xor eax, eax ; clear everything. (bit 12? is read as 1...)
388 mov dr7, eax
389 mov eax, dr6 ; just in case we save the state register too.
390 mov [edx + CPUM.Host.dr6], eax
391 jmp htg_debug_regs_no
392
393;;
394; Detour for saving host DR0-3 and loading hypervisor debug registers.
395; esi and edx must be preserved.
396htg_debug_regs_guest:
397 DEBUG_S_CHAR('D')
398 DEBUG_S_CHAR('R')
399 DEBUG_S_CHAR('x')
400 ; save host DR0-3.
401 mov eax, dr0
402 mov [edx + CPUM.Host.dr0], eax
403 mov ebx, dr1
404 mov [edx + CPUM.Host.dr1], ebx
405 mov ecx, dr2
406 mov [edx + CPUM.Host.dr2], ecx
407 mov eax, dr3
408 mov [edx + CPUM.Host.dr3], eax
409 ; load hyper DR0-7
410 mov ebx, [edx + CPUM.Hyper.dr0]
411 mov dr0, ebx
412 mov ecx, [edx + CPUM.Hyper.dr1]
413 mov dr1, ecx
414 mov eax, [edx + CPUM.Hyper.dr2]
415 mov dr2, eax
416 mov ebx, [edx + CPUM.Hyper.dr3]
417 mov dr3, ebx
418 ;mov eax, [edx + CPUM.Hyper.dr6]
419 mov ecx, 0ffff0ff0h
420 mov dr6, ecx
421 mov eax, [edx + CPUM.Hyper.dr7]
422 mov dr7, eax
423 jmp htg_debug_regs_guest_no
424
425ENDPROC vmmR0HostToGuestAsm
426
427
428;;
429; Trampoline for doing a call when starting the hyper visor execution.
430;
431; Push any arguments to the routine.
432; Push the argument frame size (cArg * 4).
433; Push the call target (_cdecl convention).
434; Push the address of this routine.
435;
436;
437ALIGNCODE(16)
438BEGINPROC vmmGCCallTrampoline
439%ifdef DEBUG_STUFF
440 COM_S_CHAR 'c'
441 COM_S_CHAR 't'
442 COM_S_CHAR '!'
443%endif
444
445 ; call routine
446 pop eax ; call address
447 mov esi, edx ; save edx
448 pop edi ; argument count.
449%ifdef DEBUG_STUFF
450 COM_S_PRINT ';eax='
451 COM_S_DWORD_REG eax
452 COM_S_CHAR ';'
453%endif
454 call eax ; do call
455 add esp, edi ; cleanup stack
456
457 ; return to the host context.
458 push byte 0 ; eip
459 mov edx, esi ; CPUM pointer
460
461%ifdef DEBUG_STUFF
462 COM_S_CHAR '`'
463%endif
464 jmp NAME(VMMGCGuestToHostAsm) ; eax = returncode.
465ENDPROC vmmGCCallTrampoline
466
467
468
469;;
470; The C interface.
471;
472ALIGNCODE(16)
473BEGINPROC vmmGCGuestToHost
474%ifdef DEBUG_STUFF
475 push esi
476 COM_NEWLINE
477 DEBUG_CHAR('b')
478 DEBUG_CHAR('a')
479 DEBUG_CHAR('c')
480 DEBUG_CHAR('k')
481 DEBUG_CHAR('!')
482 COM_NEWLINE
483 pop esi
484%endif
485 mov eax, [esp + 4]
486 jmp NAME(VMMGCGuestToHostAsm)
487ENDPROC vmmGCGuestToHost
488
489
490;;
491; VMMGCGuestToHostAsmGuestCtx
492;
493; Switches from Guest Context to Host Context.
494; Of course it's only called from within the GC.
495;
496; @param eax Return code.
497; @param esp + 4 Pointer to CPUMCTXCORE.
498;
499; @remark ASSUMES interrupts disabled.
500;
501ALIGNCODE(16)
502BEGINPROC VMMGCGuestToHostAsmGuestCtx
503 DEBUG_CHAR('~')
504
505%ifdef VBOX_WITH_STATISTICS
506 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalInGC
507 mov edx, 0ffffffffh
508 STAM_PROFILE_ADV_STOP edx
509
510 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalGCToQemu
511 mov edx, 0ffffffffh
512 STAM_PROFILE_ADV_START edx
513
514 FIXUP FIX_GC_VM_OFF, 1, VM.StatSwitcherToHC
515 mov edx, 0ffffffffh
516 STAM_PROFILE_ADV_START edx
517%endif
518
519 ;
520 ; Load the CPUM pointer.
521 ;
522 FIXUP FIX_GC_CPUM_OFF, 1, 0
523 mov edx, 0ffffffffh
524
525 ; Skip return address (assumes called!)
526 lea esp, [esp + 4]
527
528 ;
529 ; Guest Context (assumes esp now points to CPUMCTXCORE structure).
530 ;
531 ; general purpose registers (layout is pushad)
532 push eax
533
534 ; @todo do a rep movsd instead
535 mov eax, [esp + 4 + CPUMCTXCORE.eax]
536 mov [edx + CPUM.Guest.eax], eax
537 mov eax, [esp + 4 + CPUMCTXCORE.ecx]
538 mov [edx + CPUM.Guest.ecx], eax
539 mov eax, [esp + 4 + CPUMCTXCORE.edx]
540 mov [edx + CPUM.Guest.edx], eax
541 mov eax, [esp + 4 + CPUMCTXCORE.ebx]
542 mov [edx + CPUM.Guest.ebx], eax
543 mov eax, [esp + 4 + CPUMCTXCORE.esp]
544 mov [edx + CPUM.Guest.esp], eax
545 mov eax, [esp + 4 + CPUMCTXCORE.ebp]
546 mov [edx + CPUM.Guest.ebp], eax
547 mov eax, [esp + 4 + CPUMCTXCORE.esi]
548 mov [edx + CPUM.Guest.esi], eax
549 mov eax, [esp + 4 + CPUMCTXCORE.edi]
550 mov [edx + CPUM.Guest.edi], eax
551 mov eax, dword [esp + 4 + CPUMCTXCORE.es]
552 mov dword [edx + CPUM.Guest.es], eax
553 mov eax, dword [esp + 4 + CPUMCTXCORE.cs]
554 mov dword [edx + CPUM.Guest.cs], eax
555 mov eax, dword [esp + 4 + CPUMCTXCORE.ss]
556 mov dword [edx + CPUM.Guest.ss], eax
557 mov eax, dword [esp + 4 + CPUMCTXCORE.ds]
558 mov dword [edx + CPUM.Guest.ds], eax
559 mov eax, dword [esp + 4 + CPUMCTXCORE.fs]
560 mov dword [edx + CPUM.Guest.fs], eax
561 mov eax, dword [esp + 4 + CPUMCTXCORE.gs]
562 mov dword [edx + CPUM.Guest.gs], eax
563 mov eax, [esp + 4 + CPUMCTXCORE.eflags]
564 mov dword [edx + CPUM.Guest.eflags], eax
565 mov eax, [esp + 4 + CPUMCTXCORE.eip]
566 mov dword [edx + CPUM.Guest.eip], eax
567 pop eax
568
569 add esp, CPUMCTXCORE_size ; skip CPUMCTXCORE structure
570
571 jmp vmmGCGuestToHostAsm_EIPDone
572ENDPROC VMMGCGuestToHostAsmGuestCtx
573
574
575;;
576; VMMGCGuestToHostAsmHyperCtx
577;
578; This is an alternative entry point which we'll be using
579; when the we have the hypervisor context and need to save
580; that before going to the host.
581;
582; This is typically useful when abandoning the hypervisor
583; because of a trap and want the trap state to be saved.
584;
585; @param eax Return code.
586; @param ecx Points to CPUMCTXCORE.
587; @uses eax,edx,ecx
588ALIGNCODE(16)
589BEGINPROC VMMGCGuestToHostAsmHyperCtx
590 DEBUG_CHAR('#')
591
592%ifdef VBOX_WITH_STATISTICS
593 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalInGC
594 mov edx, 0ffffffffh
595 STAM_PROFILE_ADV_STOP edx
596
597 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalGCToQemu
598 mov edx, 0ffffffffh
599 STAM_PROFILE_ADV_START edx
600
601 FIXUP FIX_GC_VM_OFF, 1, VM.StatSwitcherToHC
602 mov edx, 0ffffffffh
603 STAM_PROFILE_ADV_START edx
604%endif
605
606 ;
607 ; Load the CPUM pointer.
608 ;
609 FIXUP FIX_GC_CPUM_OFF, 1, 0
610 mov edx, 0ffffffffh
611
612 push eax ; save return code.
613 ; general purpose registers
614 mov eax, [ecx + CPUMCTXCORE.edi]
615 mov [edx + CPUM.Hyper.edi], eax
616 mov eax, [ecx + CPUMCTXCORE.esi]
617 mov [edx + CPUM.Hyper.esi], eax
618 mov eax, [ecx + CPUMCTXCORE.ebp]
619 mov [edx + CPUM.Hyper.ebp], eax
620 mov eax, [ecx + CPUMCTXCORE.eax]
621 mov [edx + CPUM.Hyper.eax], eax
622 mov eax, [ecx + CPUMCTXCORE.ebx]
623 mov [edx + CPUM.Hyper.ebx], eax
624 mov eax, [ecx + CPUMCTXCORE.edx]
625 mov [edx + CPUM.Hyper.edx], eax
626 mov eax, [ecx + CPUMCTXCORE.ecx]
627 mov [edx + CPUM.Hyper.ecx], eax
628 mov eax, [ecx + CPUMCTXCORE.esp]
629 mov [edx + CPUM.Hyper.esp], eax
630 ; selectors
631 mov eax, [ecx + CPUMCTXCORE.ss]
632 mov [edx + CPUM.Hyper.ss], eax
633 mov eax, [ecx + CPUMCTXCORE.gs]
634 mov [edx + CPUM.Hyper.gs], eax
635 mov eax, [ecx + CPUMCTXCORE.fs]
636 mov [edx + CPUM.Hyper.fs], eax
637 mov eax, [ecx + CPUMCTXCORE.es]
638 mov [edx + CPUM.Hyper.es], eax
639 mov eax, [ecx + CPUMCTXCORE.ds]
640 mov [edx + CPUM.Hyper.ds], eax
641 mov eax, [ecx + CPUMCTXCORE.cs]
642 mov [edx + CPUM.Hyper.cs], eax
643 ; flags
644 mov eax, [ecx + CPUMCTXCORE.eflags]
645 mov [edx + CPUM.Hyper.eflags], eax
646 ; eip
647 mov eax, [ecx + CPUMCTXCORE.eip]
648 mov [edx + CPUM.Hyper.eip], eax
649 ; jump to common worker code.
650 pop eax ; restore return code.
651 jmp vmmGCGuestToHostAsm_SkipHyperRegs
652
653ENDPROC VMMGCGuestToHostAsmHyperCtx
654
655
656;;
657; VMMGCGuestToHostAsm
658;
659; This is an alternative entry point which we'll be using
660; when the we have saved the guest state already or we haven't
661; been messing with the guest at all.
662;
663; @param eax Return code.
664; @uses eax, edx, ecx (or it may use them in the future)
665;
666ALIGNCODE(16)
667BEGINPROC VMMGCGuestToHostAsm
668 DEBUG_CHAR('%')
669
670%ifdef VBOX_WITH_STATISTICS
671 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalInGC
672 mov edx, 0ffffffffh
673 STAM_PROFILE_ADV_STOP edx
674
675 FIXUP FIX_GC_VM_OFF, 1, VM.StatTotalGCToQemu
676 mov edx, 0ffffffffh
677 STAM_PROFILE_ADV_START edx
678
679 FIXUP FIX_GC_VM_OFF, 1, VM.StatSwitcherToHC
680 mov edx, 0ffffffffh
681 STAM_PROFILE_ADV_START edx
682%endif
683
684 ;
685 ; Load the CPUM pointer.
686 ;
687 FIXUP FIX_GC_CPUM_OFF, 1, 0
688 mov edx, 0ffffffffh
689
690 pop dword [edx + CPUM.Hyper.eip] ; call return from stack
691 jmp short vmmGCGuestToHostAsm_EIPDone
692
693ALIGNCODE(16)
694vmmGCGuestToHostAsm_EIPDone:
695 ; general registers which we care about.
696 mov dword [edx + CPUM.Hyper.ebx], ebx
697 mov dword [edx + CPUM.Hyper.esi], esi
698 mov dword [edx + CPUM.Hyper.edi], edi
699 mov dword [edx + CPUM.Hyper.ebp], ebp
700 mov dword [edx + CPUM.Hyper.esp], esp
701
702 ; special registers which may change.
703vmmGCGuestToHostAsm_SkipHyperRegs:
704 ; str [edx + CPUM.Hyper.tr] - double fault only, and it won't be right then either.
705 sldt [edx + CPUM.Hyper.ldtr]
706
707 ; No need to save CRx here. They are set dynamically according to Guest/Host requirements.
708 ; FPU context is saved before restore of host saving (another) branch.
709
710%ifdef VBOX_WITH_NMI
711 ;
712 ; Disarm K7 NMI.
713 ;
714 mov esi, edx
715 mov edi, eax
716
717 xor edx, edx
718 xor eax, eax
719 mov ecx, MSR_K7_EVNTSEL0
720 wrmsr
721
722 mov eax, edi
723 mov edx, esi
724%endif
725
726
727 ;;
728 ;; Load Intermediate memory context.
729 ;;
730 mov edi, eax ; save return code in EDI (careful with COM_DWORD_REG from here on!)
731 mov ecx, [edx + CPUM.Host.cr3]
732 FIXUP SWITCHER_FIX_INTER_CR3_GC, 1
733 mov eax, 0ffffffffh
734 mov cr3, eax
735 DEBUG_CHAR('?')
736
737 ;; We're now in intermediate memory context!
738%ifdef NEED_ID
739 ;;
740 ;; Jump to identity mapped location
741 ;;
742 FIXUP FIX_GC_2_ID_NEAR_REL, 1, NAME(IDExitTarget) - NAME(Start)
743 jmp near NAME(IDExitTarget)
744
745 ; We're now on identity mapped pages!
746ALIGNCODE(16)
747GLOBALNAME IDExitTarget
748 DEBUG_CHAR('1')
749 mov edx, cr4
750%ifdef NEED_PAE_ON_32BIT_HOST
751 and edx, ~X86_CR4_PAE
752%else
753 or edx, X86_CR4_PAE
754%endif
755 mov eax, cr0
756 and eax, ~X86_CR0_PG
757 mov cr0, eax
758 DEBUG_CHAR('2')
759 mov cr4, edx
760 FIXUP SWITCHER_FIX_INTER_CR3_HC, 1
761 mov edx, 0ffffffffh
762 mov cr3, edx
763 or eax, X86_CR0_PG
764 DEBUG_CHAR('3')
765 mov cr0, eax
766 DEBUG_CHAR('4')
767
768 ;;
769 ;; Jump to HC mapping.
770 ;;
771 FIXUP FIX_ID_2_HC_NEAR_REL, 1, NAME(HCExitTarget) - NAME(Start)
772 jmp near NAME(HCExitTarget)
773%else
774 ;;
775 ;; Jump to HC mapping.
776 ;;
777 FIXUP FIX_GC_2_HC_NEAR_REL, 1, NAME(HCExitTarget) - NAME(Start)
778 jmp near NAME(HCExitTarget)
779%endif
780
781
782 ;
783 ; When we arrive here we're at the host context
784 ; mapping of the switcher code.
785 ;
786ALIGNCODE(16)
787GLOBALNAME HCExitTarget
788 DEBUG_CHAR('9')
789 ; load final cr3
790 mov cr3, ecx
791 DEBUG_CHAR('@')
792
793
794 ;;
795 ;; Restore Host context.
796 ;;
797 ; Load CPUM pointer into edx
798 FIXUP FIX_HC_CPUM_OFF, 1, 0
799 mov edx, 0ffffffffh
800 ; activate host gdt and idt
801 lgdt [edx + CPUM.Host.gdtr]
802 DEBUG_CHAR('0')
803 lidt [edx + CPUM.Host.idtr]
804 DEBUG_CHAR('1')
805 ; Restore TSS selector; must mark it as not busy before using ltr (!)
806%if 1 ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
807 movzx eax, word [edx + CPUM.Host.tr] ; eax <- TR
808 and al, 0F8h ; mask away TI and RPL bits, get descriptor offset.
809 add eax, [edx + CPUM.Host.gdtr + 2] ; eax <- GDTR.address + descriptor offset.
810 and dword [eax + 4], ~0200h ; clear busy flag (2nd type2 bit)
811 ltr word [edx + CPUM.Host.tr]
812%else
813 movzx eax, word [edx + CPUM.Host.tr] ; eax <- TR
814 and al, 0F8h ; mask away TI and RPL bits, get descriptor offset.
815 add eax, [edx + CPUM.Host.gdtr + 2] ; eax <- GDTR.address + descriptor offset.
816 mov ecx, [eax + 4] ; ecx <- 2nd descriptor dword
817 mov ebx, ecx ; save orginal value
818 and ecx, ~0200h ; clear busy flag (2nd type2 bit)
819 mov [eax + 4], ecx ; not using xchg here is paranoia..
820 ltr word [edx + CPUM.Host.tr]
821 xchg [eax + 4], ebx ; using xchg is paranoia too...
822%endif
823 ; activate ldt
824 DEBUG_CHAR('2')
825 lldt [edx + CPUM.Host.ldtr]
826 ; Restore segment registers
827 mov eax, [edx + CPUM.Host.ds]
828 mov ds, eax
829 mov eax, [edx + CPUM.Host.es]
830 mov es, eax
831 mov eax, [edx + CPUM.Host.fs]
832 mov fs, eax
833 mov eax, [edx + CPUM.Host.gs]
834 mov gs, eax
835 ; restore stack
836 lss esp, [edx + CPUM.Host.esp]
837
838
839 FIXUP FIX_NO_SYSENTER_JMP, 0, gth_sysenter_no - NAME(Start) ; this will insert a jmp gth_sysenter_no if host doesn't use sysenter.
840 ; restore MSR_IA32_SYSENTER_CS register.
841 mov ecx, MSR_IA32_SYSENTER_CS
842 mov eax, [edx + CPUM.Host.SysEnter.cs]
843 mov ebx, [edx + CPUM.Host.SysEnter.cs + 4]
844 xchg edx, ebx ; save/load edx
845 wrmsr ; MSR[ecx] <- edx:eax
846 xchg edx, ebx ; restore edx
847 jmp short gth_sysenter_no
848
849ALIGNCODE(16)
850gth_sysenter_no:
851
852 ;; @todo AMD syscall
853
854 ; Restore FPU if guest has used it.
855 ; Using fxrstor should ensure that we're not causing unwanted exception on the host.
856 mov esi, [edx + CPUM.fUseFlags] ; esi == use flags.
857 test esi, CPUM_USED_FPU
858 jz near gth_fpu_no
859 mov ecx, cr0
860 and ecx, ~(X86_CR0_TS | X86_CR0_EM)
861 mov cr0, ecx
862
863 FIXUP FIX_NO_FXSAVE_JMP, 0, gth_no_fxsave - NAME(Start) ; this will insert a jmp gth_no_fxsave if fxsave isn't supported.
864 fxsave [edx + CPUM.Guest.fpu]
865 fxrstor [edx + CPUM.Host.fpu]
866 jmp near gth_fpu_no
867
868gth_no_fxsave:
869 fnsave [edx + CPUM.Guest.fpu]
870 mov eax, [edx + CPUM.Host.fpu] ; control word
871 not eax ; 1 means exception ignored (6 LS bits)
872 and eax, byte 03Fh ; 6 LS bits only
873 test eax, [edx + CPUM.Host.fpu + 4] ; status word
874 jz gth_no_exceptions_pending
875
876 ; technically incorrect, but we certainly don't want any exceptions now!!
877 and dword [edx + CPUM.Host.fpu + 4], ~03Fh
878
879gth_no_exceptions_pending:
880 frstor [edx + CPUM.Host.fpu]
881 jmp short gth_fpu_no
882
883ALIGNCODE(16)
884gth_fpu_no:
885
886 ; Control registers.
887 ; Would've liked to have these highere up in case of crashes, but
888 ; the fpu stuff must be done before we restore cr0.
889 mov ecx, [edx + CPUM.Host.cr4]
890 mov cr4, ecx
891 mov ecx, [edx + CPUM.Host.cr0]
892 mov cr0, ecx
893 ;mov ecx, [edx + CPUM.Host.cr2] ; assumes this is waste of time.
894 ;mov cr2, ecx
895
896 ; restore debug registers (if modified) (esi must still be fUseFlags!)
897 ; (must be done after cr4 reload because of the debug extension.)
898 test esi, CPUM_USE_DEBUG_REGS | CPUM_USE_DEBUG_REGS_HOST
899 jz short gth_debug_regs_no
900 jmp gth_debug_regs_restore
901gth_debug_regs_no:
902
903 ; restore general registers.
904 mov eax, edi ; restore return code. eax = return code !!
905 mov edi, [edx + CPUM.Host.edi]
906 mov esi, [edx + CPUM.Host.esi]
907 mov ebx, [edx + CPUM.Host.ebx]
908 mov ebp, [edx + CPUM.Host.ebp]
909 push dword [edx + CPUM.Host.eflags]
910 popfd
911
912%ifdef DEBUG_STUFF
913; COM_S_CHAR '4'
914%endif
915 retf
916
917;;
918; Detour for restoring the host debug registers.
919; edx and edi must be preserved.
920gth_debug_regs_restore:
921 DEBUG_S_CHAR('d')
922 xor eax, eax
923 mov dr7, eax ; paranoia or not?
924 test esi, CPUM_USE_DEBUG_REGS
925 jz short gth_debug_regs_dr7
926 DEBUG_S_CHAR('r')
927 mov eax, [edx + CPUM.Host.dr0]
928 mov dr0, eax
929 mov ebx, [edx + CPUM.Host.dr1]
930 mov dr1, ebx
931 mov ecx, [edx + CPUM.Host.dr2]
932 mov dr2, ecx
933 mov eax, [edx + CPUM.Host.dr3]
934 mov dr3, eax
935gth_debug_regs_dr7:
936 mov ebx, [edx + CPUM.Host.dr6]
937 mov dr6, ebx
938 mov ecx, [edx + CPUM.Host.dr7]
939 mov dr7, ecx
940 jmp gth_debug_regs_no
941
942ENDPROC VMMGCGuestToHostAsm
943
944
945GLOBALNAME End
946;
947; The description string (in the text section).
948;
949NAME(Description):
950 db SWITCHER_DESCRIPTION
951 db 0
952
953extern NAME(Relocate)
954
955;
956; End the fixup records.
957;
958BEGINDATA
959 db FIX_THE_END ; final entry.
960GLOBALNAME FixupsEnd
961
962;;
963; The switcher definition structure.
964ALIGNDATA(16)
965GLOBALNAME Def
966 istruc VMMSWITCHERDEF
967 at VMMSWITCHERDEF.pvCode, RTCCPTR_DEF NAME(Start)
968 at VMMSWITCHERDEF.pvFixups, RTCCPTR_DEF NAME(Fixups)
969 at VMMSWITCHERDEF.pszDesc, RTCCPTR_DEF NAME(Description)
970 at VMMSWITCHERDEF.pfnRelocate, RTCCPTR_DEF NAME(Relocate)
971 at VMMSWITCHERDEF.enmType, dd SWITCHER_TYPE
972 at VMMSWITCHERDEF.cbCode, dd NAME(End) - NAME(Start)
973 at VMMSWITCHERDEF.offR0HostToGuest, dd NAME(vmmR0HostToGuest) - NAME(Start)
974 at VMMSWITCHERDEF.offGCGuestToHost, dd NAME(vmmGCGuestToHost) - NAME(Start)
975 at VMMSWITCHERDEF.offGCCallTrampoline, dd NAME(vmmGCCallTrampoline) - NAME(Start)
976 at VMMSWITCHERDEF.offGCGuestToHostAsm, dd NAME(VMMGCGuestToHostAsm) - NAME(Start)
977 at VMMSWITCHERDEF.offGCGuestToHostAsmHyperCtx, dd NAME(VMMGCGuestToHostAsmHyperCtx)- NAME(Start)
978 at VMMSWITCHERDEF.offGCGuestToHostAsmGuestCtx, dd NAME(VMMGCGuestToHostAsmGuestCtx)- NAME(Start)
979 ; disasm help
980 at VMMSWITCHERDEF.offHCCode0, dd 0
981%ifdef NEED_ID
982 at VMMSWITCHERDEF.cbHCCode0, dd NAME(IDEnterTarget) - NAME(Start)
983%else
984 at VMMSWITCHERDEF.cbHCCode0, dd NAME(FarJmpGCTarget) - NAME(Start)
985%endif
986 at VMMSWITCHERDEF.offHCCode1, dd NAME(HCExitTarget) - NAME(Start)
987 at VMMSWITCHERDEF.cbHCCode1, dd NAME(End) - NAME(HCExitTarget)
988%ifdef NEED_ID
989 at VMMSWITCHERDEF.offIDCode0, dd NAME(IDEnterTarget) - NAME(Start)
990 at VMMSWITCHERDEF.cbIDCode0, dd NAME(FarJmpGCTarget) - NAME(IDEnterTarget)
991 at VMMSWITCHERDEF.offIDCode1, dd NAME(IDExitTarget) - NAME(Start)
992 at VMMSWITCHERDEF.cbIDCode1, dd NAME(HCExitTarget) - NAME(IDExitTarget)
993%else
994 at VMMSWITCHERDEF.offIDCode0, dd 0
995 at VMMSWITCHERDEF.cbIDCode0, dd 0
996 at VMMSWITCHERDEF.offIDCode1, dd 0
997 at VMMSWITCHERDEF.cbIDCode1, dd 0
998%endif
999 at VMMSWITCHERDEF.offGCCode, dd NAME(FarJmpGCTarget) - NAME(Start)
1000%ifdef NEED_ID
1001 at VMMSWITCHERDEF.cbGCCode, dd NAME(IDExitTarget) - NAME(FarJmpGCTarget)
1002%else
1003 at VMMSWITCHERDEF.cbGCCode, dd NAME(HCExitTarget) - NAME(FarJmpGCTarget)
1004%endif
1005
1006 iend
1007
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