VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp@ 60307

Last change on this file since 60307 was 60307, checked in by vboxsync, 9 years ago

VMM: APIC rewrite. Initial commit, work in progress.
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File size: 31.9 KB
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1/* $Id: PDMRCDevice.cpp 60307 2016-04-04 15:23:11Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, RC Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/vm.h>
28#include <VBox/vmm/vmm.h>
29#include <VBox/vmm/patm.h>
30
31#include <VBox/log.h>
32#include <VBox/err.h>
33#include <iprt/asm.h>
34#include <iprt/assert.h>
35#include <iprt/string.h>
36
37#include "dtrace/VBoxVMM.h"
38#include "PDMInline.h"
39
40
41/*********************************************************************************************************************************
42* Global Variables *
43*********************************************************************************************************************************/
44RT_C_DECLS_BEGIN
45extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp;
46extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp;
47extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp;
48extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp;
49extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp;
50extern DECLEXPORT(const PDMHPETHLPRC) g_pdmRCHpetHlp;
51extern DECLEXPORT(const PDMDRVHLPRC) g_pdmRCDrvHlp;
52/** @todo missing PDMPCIRAWHLPRC */
53RT_C_DECLS_END
54
55
56/*********************************************************************************************************************************
57* Internal Functions *
58*********************************************************************************************************************************/
59static bool pdmRCIsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc);
60
61
62/** @name Raw-Mode Context Device Helpers
63 * @{
64 */
65
66/** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysRead} */
67static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70
71#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
72 /*
73 * Just check the busmaster setting here and forward the request to the generic read helper.
74 */
75 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
76 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
77
78 if (!PCIDevIsBusmaster(pPciDev))
79 {
80 Log(("pdmRCDevHlp_PCIPhysRead: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
81 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
82 return VERR_PDM_NOT_PCI_BUS_MASTER;
83 }
84#endif
85
86 return pDevIns->pHlpRC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
87}
88
89
90/** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysWrite} */
91static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
92{
93 PDMDEV_ASSERT_DEVINS(pDevIns);
94
95 /*
96 * Just check the busmaster setting here and forward the request to the generic read helper.
97 */
98 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
99 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
100
101 if (!PCIDevIsBusmaster(pPciDev))
102 {
103 Log(("pdmRCDevHlp_PCIPhysWrite: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
104 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
105 return VERR_PDM_NOT_PCI_BUS_MASTER;
106 }
107
108 return pDevIns->pHlpRC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
109}
110
111
112/** @interface_method_impl{PDMDEVHLPRC,pfnPCISetIrq} */
113static DECLCALLBACK(void) pdmRCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
114{
115 PDMDEV_ASSERT_DEVINS(pDevIns);
116 LogFlow(("pdmRCDevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
117
118 PVM pVM = pDevIns->Internal.s.pVMRC;
119 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
120 PPDMPCIBUS pPciBus = pDevIns->Internal.s.pPciBusRC;
121
122 pdmLock(pVM);
123 uint32_t uTagSrc;
124 if (iLevel & PDM_IRQ_LEVEL_HIGH)
125 {
126 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
127 if (iLevel == PDM_IRQ_LEVEL_HIGH)
128 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
129 else
130 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
131 }
132 else
133 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
134
135 if ( pPciDev
136 && pPciBus
137 && pPciBus->pDevInsRC)
138 {
139 pPciBus->pfnSetIrqRC(pPciBus->pDevInsRC, pPciDev, iIrq, iLevel, uTagSrc);
140
141 pdmUnlock(pVM);
142
143 if (iLevel == PDM_IRQ_LEVEL_LOW)
144 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
145 }
146 else
147 {
148 pdmUnlock(pVM);
149
150 /* queue for ring-3 execution. */
151 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
152 AssertReturnVoid(pTask);
153
154 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
155 pTask->pDevInsR3 = PDMDEVINS_2_R3PTR(pDevIns);
156 pTask->u.SetIRQ.iIrq = iIrq;
157 pTask->u.SetIRQ.iLevel = iLevel;
158 pTask->u.SetIRQ.uTagSrc = uTagSrc;
159
160 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
161 }
162
163 LogFlow(("pdmRCDevHlp_PCISetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
164}
165
166
167/** @interface_method_impl{PDMDEVHLPRC,pfnISASetIrq} */
168static DECLCALLBACK(void) pdmRCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
169{
170 PDMDEV_ASSERT_DEVINS(pDevIns);
171 LogFlow(("pdmRCDevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
172 PVM pVM = pDevIns->Internal.s.pVMRC;
173
174 pdmLock(pVM);
175 uint32_t uTagSrc;
176 if (iLevel & PDM_IRQ_LEVEL_HIGH)
177 {
178 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
179 if (iLevel == PDM_IRQ_LEVEL_HIGH)
180 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
181 else
182 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
183 }
184 else
185 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
186
187 bool fRc = pdmRCIsaSetIrq(pVM, iIrq, iLevel, uTagSrc);
188
189 if (iLevel == PDM_IRQ_LEVEL_LOW && fRc)
190 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
191 pdmUnlock(pVM);
192 LogFlow(("pdmRCDevHlp_ISASetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
193}
194
195
196/** @interface_method_impl{PDMDEVHLPRC,pfnPhysRead} */
197static DECLCALLBACK(int) pdmRCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
198{
199 PDMDEV_ASSERT_DEVINS(pDevIns);
200 LogFlow(("pdmRCDevHlp_PhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
201 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
202
203 VBOXSTRICTRC rcStrict = PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
204 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
205
206 Log(("pdmRCDevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
207 return VBOXSTRICTRC_VAL(rcStrict);
208}
209
210
211/** @interface_method_impl{PDMDEVHLPRC,pfnPhysWrite} */
212static DECLCALLBACK(int) pdmRCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
213{
214 PDMDEV_ASSERT_DEVINS(pDevIns);
215 LogFlow(("pdmRCDevHlp_PhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
216 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
217
218 VBOXSTRICTRC rcStrict = PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
219 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
220
221 Log(("pdmRCDevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
222 return VBOXSTRICTRC_VAL(rcStrict);
223}
224
225
226/** @interface_method_impl{PDMDEVHLPRC,pfnA20IsEnabled} */
227static DECLCALLBACK(bool) pdmRCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
228{
229 PDMDEV_ASSERT_DEVINS(pDevIns);
230 LogFlow(("pdmRCDevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
231
232 bool fEnabled = PGMPhysIsA20Enabled(VMMGetCpu0(pDevIns->Internal.s.pVMRC));
233
234 Log(("pdmRCDevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
235 return fEnabled;
236}
237
238
239/** @interface_method_impl{PDMDEVHLPRC,pfnVMState} */
240static DECLCALLBACK(VMSTATE) pdmRCDevHlp_VMState(PPDMDEVINS pDevIns)
241{
242 PDMDEV_ASSERT_DEVINS(pDevIns);
243
244 VMSTATE enmVMState = pDevIns->Internal.s.pVMRC->enmVMState;
245
246 LogFlow(("pdmRCDevHlp_VMState: caller=%p/%d: returns %d\n", pDevIns, pDevIns->iInstance, enmVMState));
247 return enmVMState;
248}
249
250
251/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetError} */
252static DECLCALLBACK(int) pdmRCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
253{
254 PDMDEV_ASSERT_DEVINS(pDevIns);
255 va_list args;
256 va_start(args, pszFormat);
257 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
258 va_end(args);
259 return rc;
260}
261
262
263/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetErrorV} */
264static DECLCALLBACK(int) pdmRCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
265{
266 PDMDEV_ASSERT_DEVINS(pDevIns);
267 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
268 return rc;
269}
270
271
272/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetRuntimeError} */
273static DECLCALLBACK(int) pdmRCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
274{
275 PDMDEV_ASSERT_DEVINS(pDevIns);
276 va_list va;
277 va_start(va, pszFormat);
278 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
279 va_end(va);
280 return rc;
281}
282
283
284/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetRuntimeErrorV} */
285static DECLCALLBACK(int) pdmRCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
286{
287 PDMDEV_ASSERT_DEVINS(pDevIns);
288 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
289 return rc;
290}
291
292
293/** @interface_method_impl{PDMDEVHLPRC,pfnPATMSetMMIOPatchInfo} */
294static DECLCALLBACK(int) pdmRCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
295{
296 PDMDEV_ASSERT_DEVINS(pDevIns);
297 LogFlow(("pdmRCDevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
298
299 return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMRC, GCPhys, (RTRCPTR)(uintptr_t)pCachedData);
300}
301
302
303/** @interface_method_impl{PDMDEVHLPRC,pfnGetVM} */
304static DECLCALLBACK(PVM) pdmRCDevHlp_GetVM(PPDMDEVINS pDevIns)
305{
306 PDMDEV_ASSERT_DEVINS(pDevIns);
307 LogFlow(("pdmRCDevHlp_GetVM: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
308 return pDevIns->Internal.s.pVMRC;
309}
310
311
312/** @interface_method_impl{PDMDEVHLPRC,pfnGetVMCPU} */
313static DECLCALLBACK(PVMCPU) pdmRCDevHlp_GetVMCPU(PPDMDEVINS pDevIns)
314{
315 PDMDEV_ASSERT_DEVINS(pDevIns);
316 LogFlow(("pdmRCDevHlp_GetVMCPU: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
317 return VMMGetCpu(pDevIns->Internal.s.pVMRC);
318}
319
320
321/** @interface_method_impl{PDMDEVHLPRC,pfnGetCurrentCpuId} */
322static DECLCALLBACK(VMCPUID) pdmRCDevHlp_GetCurrentCpuId(PPDMDEVINS pDevIns)
323{
324 PDMDEV_ASSERT_DEVINS(pDevIns);
325 VMCPUID idCpu = VMMGetCpuId(pDevIns->Internal.s.pVMRC);
326 LogFlow(("pdmRCDevHlp_GetCurrentCpuId: caller='%p'/%d for CPU %u\n", pDevIns, pDevIns->iInstance, idCpu));
327 return idCpu;
328}
329
330
331/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGet} */
332static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
333{
334 PDMDEV_ASSERT_DEVINS(pDevIns);
335 LogFlow(("pdmRCDevHlp_TMTimeVirtGet: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
336 return TMVirtualGet(pDevIns->Internal.s.pVMRC);
337}
338
339
340/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGetFreq} */
341static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
342{
343 PDMDEV_ASSERT_DEVINS(pDevIns);
344 LogFlow(("pdmRCDevHlp_TMTimeVirtGetFreq: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
345 return TMVirtualGetFreq(pDevIns->Internal.s.pVMRC);
346}
347
348
349/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGetNano} */
350static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
351{
352 PDMDEV_ASSERT_DEVINS(pDevIns);
353 LogFlow(("pdmRCDevHlp_TMTimeVirtGetNano: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
354 return TMVirtualToNano(pDevIns->Internal.s.pVMRC, TMVirtualGet(pDevIns->Internal.s.pVMRC));
355}
356
357
358/** @interface_method_impl{PDMDEVHLPRC,pfnDBGFTraceBuf} */
359static DECLCALLBACK(RTTRACEBUF) pdmRCDevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
360{
361 PDMDEV_ASSERT_DEVINS(pDevIns);
362 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMRC->hTraceBufRC;
363 LogFlow(("pdmRCDevHlp_DBGFTraceBuf: caller='%p'/%d: returns %p\n", pDevIns, pDevIns->iInstance, hTraceBuf));
364 return hTraceBuf;
365}
366
367
368/**
369 * The Raw-Mode Context Device Helper Callbacks.
370 */
371extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp =
372{
373 PDM_DEVHLPRC_VERSION,
374 pdmRCDevHlp_PCIPhysRead,
375 pdmRCDevHlp_PCIPhysWrite,
376 pdmRCDevHlp_PCISetIrq,
377 pdmRCDevHlp_ISASetIrq,
378 pdmRCDevHlp_PhysRead,
379 pdmRCDevHlp_PhysWrite,
380 pdmRCDevHlp_A20IsEnabled,
381 pdmRCDevHlp_VMState,
382 pdmRCDevHlp_VMSetError,
383 pdmRCDevHlp_VMSetErrorV,
384 pdmRCDevHlp_VMSetRuntimeError,
385 pdmRCDevHlp_VMSetRuntimeErrorV,
386 pdmRCDevHlp_PATMSetMMIOPatchInfo,
387 pdmRCDevHlp_GetVM,
388 pdmRCDevHlp_GetVMCPU,
389 pdmRCDevHlp_GetCurrentCpuId,
390 pdmRCDevHlp_TMTimeVirtGet,
391 pdmRCDevHlp_TMTimeVirtGetFreq,
392 pdmRCDevHlp_TMTimeVirtGetNano,
393 pdmRCDevHlp_DBGFTraceBuf,
394 PDM_DEVHLPRC_VERSION
395};
396
397/** @} */
398
399
400
401
402/** @name PIC RC Helpers
403 * @{
404 */
405
406/** @interface_method_impl{PDMPICHLPRC,pfnSetInterruptFF} */
407static DECLCALLBACK(void) pdmRCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
408{
409 PDMDEV_ASSERT_DEVINS(pDevIns);
410 PVM pVM = pDevIns->Internal.s.pVMRC;
411 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
412
413 if (pVM->pdm.s.Apic.pfnLocalInterruptRC)
414 {
415 LogFlow(("pdmRCPicHlp_SetInterruptFF: caller='%p'/%d: Setting local interrupt on LAPIC\n",
416 pDevIns, pDevIns->iInstance));
417 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
418 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
419 pVM->pdm.s.Apic.pfnLocalInterruptRC(pVM->pdm.s.Apic.pDevInsRC, pVCpu, 0 /* u8Pin */, 1 /* u8Level*/,
420 VINF_SUCCESS /*rcRZ*/);
421 return;
422 }
423
424 LogFlow(("pdmRCPicHlp_SetInterruptFF: caller=%p/%d: VMMCPU_FF_INTERRUPT_PIC %d -> 1\n",
425 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
426
427 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
428}
429
430
431/** @interface_method_impl{PDMPICHLPRC,pfnClearInterruptFF} */
432static DECLCALLBACK(void) pdmRCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
433{
434 PDMDEV_ASSERT_DEVINS(pDevIns);
435 PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
436 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
437
438 if (pVM->pdm.s.Apic.pfnLocalInterruptRC)
439 {
440 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
441 LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller='%s'/%d: Clearing local interrupt on LAPIC\n",
442 pDevIns, pDevIns->iInstance));
443 /* Lower the LAPIC's LINT0 line instead of signaling the CPU directly. */
444 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
445 pVM->pdm.s.Apic.pfnLocalInterruptRC(pVM->pdm.s.Apic.pDevInsRC, pVCpu, 0 /* u8Pin */, 0 /* u8Level */,
446 VINF_SUCCESS /* rcRZ */);
447 return;
448 }
449
450 LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller=%p/%d: VMCPU_FF_INTERRUPT_PIC %d -> 0\n",
451 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
452
453 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
454}
455
456
457/** @interface_method_impl{PDMPICHLPRC,pfnLock} */
458static DECLCALLBACK(int) pdmRCPicHlp_Lock(PPDMDEVINS pDevIns, int rc)
459{
460 PDMDEV_ASSERT_DEVINS(pDevIns);
461 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
462}
463
464
465/** @interface_method_impl{PDMPICHLPRC,pfnUnlock} */
466static DECLCALLBACK(void) pdmRCPicHlp_Unlock(PPDMDEVINS pDevIns)
467{
468 PDMDEV_ASSERT_DEVINS(pDevIns);
469 pdmUnlock(pDevIns->Internal.s.pVMRC);
470}
471
472
473/**
474 * The Raw-Mode Context PIC Helper Callbacks.
475 */
476extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp =
477{
478 PDM_PICHLPRC_VERSION,
479 pdmRCPicHlp_SetInterruptFF,
480 pdmRCPicHlp_ClearInterruptFF,
481 pdmRCPicHlp_Lock,
482 pdmRCPicHlp_Unlock,
483 PDM_PICHLPRC_VERSION
484};
485
486/** @} */
487
488
489
490
491/** @name APIC RC Helpers
492 * @{
493 */
494
495/** @interface_method_impl{PDMAPICHLPRC,pfnSetInterruptFF} */
496static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
497{
498 PDMDEV_ASSERT_DEVINS(pDevIns);
499 PVM pVM = pDevIns->Internal.s.pVMRC;
500 PVMCPU pVCpu = &pVM->aCpus[idCpu];
501
502 AssertReturnVoid(idCpu < pVM->cCpus);
503
504 LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
505 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
506 switch (enmType)
507 {
508 case PDMAPICIRQ_HARDWARE:
509 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
510 break;
511 case PDMAPICIRQ_NMI:
512 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
513 break;
514 case PDMAPICIRQ_SMI:
515 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
516 break;
517 case PDMAPICIRQ_EXTINT:
518 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
519 break;
520 default:
521 AssertMsgFailed(("enmType=%d\n", enmType));
522 break;
523 }
524}
525
526
527/** @interface_method_impl{PDMAPICHLPRC,pfnClearInterruptFF} */
528static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
529{
530 PDMDEV_ASSERT_DEVINS(pDevIns);
531 PVM pVM = pDevIns->Internal.s.pVMRC;
532 PVMCPU pVCpu = &pVM->aCpus[idCpu];
533
534 AssertReturnVoid(idCpu < pVM->cCpus);
535
536 LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
537 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
538
539 /* Note: NMI/SMI can't be cleared. */
540 switch (enmType)
541 {
542 case PDMAPICIRQ_HARDWARE:
543 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
544 break;
545 case PDMAPICIRQ_EXTINT:
546 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
547 break;
548 default:
549 AssertMsgFailed(("enmType=%d\n", enmType));
550 break;
551 }
552}
553
554
555/** @interface_method_impl{PDMAPICHLPRC,pfnCalcIrqTag} */
556static DECLCALLBACK(uint32_t) pdmRCApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
557{
558 PDMDEV_ASSERT_DEVINS(pDevIns);
559 PVM pVM = pDevIns->Internal.s.pVMRC;
560
561 pdmLock(pVM);
562
563 uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
564 if (u8Level == PDM_IRQ_LEVEL_HIGH)
565 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
566 else
567 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
568
569
570 pdmUnlock(pVM);
571 LogFlow(("pdmRCApicHlp_CalcIrqTag: caller=%p/%d: returns %#x (u8Level=%d)\n",
572 pDevIns, pDevIns->iInstance, uTagSrc, u8Level));
573 return uTagSrc;
574}
575
576
577/** @interface_method_impl{PDMAPICHLPRC,pfnChangeFeature} */
578static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICMODE enmMode)
579{
580 PDMDEV_ASSERT_DEVINS(pDevIns);
581 LogFlow(("pdmRCApicHlp_ChangeFeature: caller=%p/%d: mode=%d\n", pDevIns, pDevIns->iInstance, (int)enmMode));
582 switch (enmMode)
583 {
584 case PDMAPICMODE_NONE:
585 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
586 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
587 break;
588 case PDMAPICMODE_APIC:
589 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
590 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
591 break;
592 case PDMAPICMODE_X2APIC:
593 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
594 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
595 break;
596 default:
597 AssertMsgFailed(("Unknown APIC mode: %d\n", (int)enmMode));
598 }
599}
600
601
602/** @interface_method_impl{PDMAPICHLPRC,pfnLock} */
603static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
604{
605 PDMDEV_ASSERT_DEVINS(pDevIns);
606 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
607}
608
609
610/** @interface_method_impl{PDMAPICHLPRC,pfnUnlock} */
611static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)
612{
613 PDMDEV_ASSERT_DEVINS(pDevIns);
614 pdmUnlock(pDevIns->Internal.s.pVMRC);
615}
616
617
618/** @interface_method_impl{PDMAPICHLPRC,pfnGetCpuId} */
619static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns)
620{
621 PDMDEV_ASSERT_DEVINS(pDevIns);
622 return VMMGetCpuId(pDevIns->Internal.s.pVMRC);
623}
624
625
626/**
627 * The Raw-Mode Context APIC Helper Callbacks.
628 */
629extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =
630{
631 PDM_APICHLPRC_VERSION,
632 pdmRCApicHlp_SetInterruptFF,
633 pdmRCApicHlp_ClearInterruptFF,
634 pdmRCApicHlp_CalcIrqTag,
635 pdmRCApicHlp_ChangeFeature,
636 pdmRCApicHlp_Lock,
637 pdmRCApicHlp_Unlock,
638 pdmRCApicHlp_GetCpuId,
639 PDM_APICHLPRC_VERSION
640};
641
642/** @} */
643
644
645
646
647/** @name I/O APIC RC Helpers
648 * @{
649 */
650
651/** @interface_method_impl{PDMIOAPICHLPRC,pfnApicBusDeliver} */
652static DECLCALLBACK(int) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
653 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)
654{
655 PDMDEV_ASSERT_DEVINS(pDevIns);
656 PVM pVM = pDevIns->Internal.s.pVMRC;
657 LogFlow(("pdmRCIoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
658 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc));
659 Assert(pVM->pdm.s.Apic.pDevInsRC);
660 if (pVM->pdm.s.Apic.pfnBusDeliverRC)
661 return pVM->pdm.s.Apic.pfnBusDeliverRC(pVM->pdm.s.Apic.pDevInsRC, u8Dest, u8DestMode, u8DeliveryMode, iVector,
662 u8Polarity, u8TriggerMode, uTagSrc);
663 return VINF_SUCCESS;
664}
665
666
667/** @interface_method_impl{PDMIOAPICHLPRC,pfnLock} */
668static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
669{
670 PDMDEV_ASSERT_DEVINS(pDevIns);
671 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
672}
673
674
675/** @interface_method_impl{PDMIOAPICHLPRC,pfnUnlock} */
676static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns)
677{
678 PDMDEV_ASSERT_DEVINS(pDevIns);
679 pdmUnlock(pDevIns->Internal.s.pVMRC);
680}
681
682
683/**
684 * The Raw-Mode Context I/O APIC Helper Callbacks.
685 */
686extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp =
687{
688 PDM_IOAPICHLPRC_VERSION,
689 pdmRCIoApicHlp_ApicBusDeliver,
690 pdmRCIoApicHlp_Lock,
691 pdmRCIoApicHlp_Unlock,
692 PDM_IOAPICHLPRC_VERSION
693};
694
695/** @} */
696
697
698
699
700/** @name PCI Bus RC Helpers
701 * @{
702 */
703
704/** @interface_method_impl{PDMPCIHLPRC,pfnIsaSetIrq} */
705static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
706{
707 PDMDEV_ASSERT_DEVINS(pDevIns);
708 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
709 PVM pVM = pDevIns->Internal.s.pVMRC;
710
711 pdmLock(pVM);
712 pdmRCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel, uTagSrc);
713 pdmUnlock(pVM);
714}
715
716
717/** @interface_method_impl{PDMPCIHLPRC,pfnIoApicSetIrq} */
718static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
719{
720 PDMDEV_ASSERT_DEVINS(pDevIns);
721 Log4(("pdmRCPciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
722 PVM pVM = pDevIns->Internal.s.pVMRC;
723
724 if (pVM->pdm.s.IoApic.pDevInsRC)
725 {
726 pdmLock(pVM);
727 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel, uTagSrc);
728 pdmUnlock(pVM);
729 }
730 else if (pVM->pdm.s.IoApic.pDevInsR3)
731 {
732 /* queue for ring-3 execution. */
733 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
734 if (pTask)
735 {
736 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
737 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
738 pTask->u.SetIRQ.iIrq = iIrq;
739 pTask->u.SetIRQ.iLevel = iLevel;
740 pTask->u.SetIRQ.uTagSrc = uTagSrc;
741
742 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
743 }
744 else
745 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
746 }
747}
748
749
750/** @interface_method_impl{PDMPCIHLPRC,pfnIoApicSendMsi} */
751static DECLCALLBACK(void) pdmRCPciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
752{
753 PDMDEV_ASSERT_DEVINS(pDevIns);
754 Log4(("pdmRCPciHlp_IoApicSendMsi: GCPhys=%p uValue=%d uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
755 PVM pVM = pDevIns->Internal.s.pVMRC;
756
757 if (pVM->pdm.s.IoApic.pDevInsRC)
758 {
759 pdmLock(pVM);
760 pVM->pdm.s.IoApic.pfnSendMsiRC(pVM->pdm.s.IoApic.pDevInsRC, GCPhys, uValue, uTagSrc);
761 pdmUnlock(pVM);
762 }
763 else
764 {
765 AssertFatalMsgFailed(("Lazy bastarts!"));
766 }
767}
768
769
770/** @interface_method_impl{PDMPCIHLPRC,pfnLock} */
771static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
772{
773 PDMDEV_ASSERT_DEVINS(pDevIns);
774 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
775}
776
777
778/** @interface_method_impl{PDMPCIHLPRC,pfnUnlock} */
779static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns)
780{
781 PDMDEV_ASSERT_DEVINS(pDevIns);
782 pdmUnlock(pDevIns->Internal.s.pVMRC);
783}
784
785
786/**
787 * The Raw-Mode Context PCI Bus Helper Callbacks.
788 */
789extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp =
790{
791 PDM_PCIHLPRC_VERSION,
792 pdmRCPciHlp_IsaSetIrq,
793 pdmRCPciHlp_IoApicSetIrq,
794 pdmRCPciHlp_IoApicSendMsi,
795 pdmRCPciHlp_Lock,
796 pdmRCPciHlp_Unlock,
797 PDM_PCIHLPRC_VERSION, /* the end */
798};
799
800/** @} */
801
802
803
804
805/** @name HPET RC Helpers
806 * @{
807 */
808
809
810/**
811 * The Raw-Mode Context HPET Helper Callbacks.
812 */
813extern DECLEXPORT(const PDMHPETHLPRC) g_pdmRCHpetHlp =
814{
815 PDM_HPETHLPRC_VERSION,
816 PDM_HPETHLPRC_VERSION, /* the end */
817};
818
819/** @} */
820
821
822
823
824/** @name Raw-Mode Context Driver Helpers
825 * @{
826 */
827
828/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetError} */
829static DECLCALLBACK(int) pdmRCDrvHlp_VMSetError(PPDMDRVINS pDrvIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
830{
831 PDMDRV_ASSERT_DRVINS(pDrvIns);
832 va_list args;
833 va_start(args, pszFormat);
834 int rc2 = VMSetErrorV(pDrvIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
835 va_end(args);
836 return rc;
837}
838
839
840/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetErrorV} */
841static DECLCALLBACK(int) pdmRCDrvHlp_VMSetErrorV(PPDMDRVINS pDrvIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
842{
843 PDMDRV_ASSERT_DRVINS(pDrvIns);
844 int rc2 = VMSetErrorV(pDrvIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
845 return rc;
846}
847
848
849/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetRuntimeError} */
850static DECLCALLBACK(int) pdmRCDrvHlp_VMSetRuntimeError(PPDMDRVINS pDrvIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
851{
852 PDMDRV_ASSERT_DRVINS(pDrvIns);
853 va_list va;
854 va_start(va, pszFormat);
855 int rc = VMSetRuntimeErrorV(pDrvIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
856 va_end(va);
857 return rc;
858}
859
860
861/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetRuntimeErrorV} */
862static DECLCALLBACK(int) pdmRCDrvHlp_VMSetRuntimeErrorV(PPDMDRVINS pDrvIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
863{
864 PDMDRV_ASSERT_DRVINS(pDrvIns);
865 int rc = VMSetRuntimeErrorV(pDrvIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
866 return rc;
867}
868
869
870/** @interface_method_impl{PDMDRVHLPRC,pfnAssertEMT} */
871static DECLCALLBACK(bool) pdmRCDrvHlp_AssertEMT(PPDMDRVINS pDrvIns, const char *pszFile, unsigned iLine, const char *pszFunction)
872{
873 PDMDRV_ASSERT_DRVINS(pDrvIns);
874 if (VM_IS_EMT(pDrvIns->Internal.s.pVMRC))
875 return true;
876
877 RTAssertMsg1Weak("AssertEMT", iLine, pszFile, pszFunction);
878 RTAssertPanic();
879 return false;
880}
881
882
883/** @interface_method_impl{PDMDRVHLPRC,pfnAssertOther} */
884static DECLCALLBACK(bool) pdmRCDrvHlp_AssertOther(PPDMDRVINS pDrvIns, const char *pszFile, unsigned iLine, const char *pszFunction)
885{
886 PDMDRV_ASSERT_DRVINS(pDrvIns);
887 if (!VM_IS_EMT(pDrvIns->Internal.s.pVMRC))
888 return true;
889
890 /* Note: While we don't have any other threads but EMT(0) in RC, might
891 still have drive code compiled in which it shouldn't execute. */
892 RTAssertMsg1Weak("AssertOther", iLine, pszFile, pszFunction);
893 RTAssertPanic();
894 return false;
895}
896
897
898/** @interface_method_impl{PDMDRVHLPRC,pfnFTSetCheckpoint} */
899static DECLCALLBACK(int) pdmRCDrvHlp_FTSetCheckpoint(PPDMDRVINS pDrvIns, FTMCHECKPOINTTYPE enmType)
900{
901 PDMDRV_ASSERT_DRVINS(pDrvIns);
902 return FTMSetCheckpoint(pDrvIns->Internal.s.pVMRC, enmType);
903}
904
905
906/**
907 * The Raw-Mode Context Driver Helper Callbacks.
908 */
909extern DECLEXPORT(const PDMDRVHLPRC) g_pdmRCDrvHlp =
910{
911 PDM_DRVHLPRC_VERSION,
912 pdmRCDrvHlp_VMSetError,
913 pdmRCDrvHlp_VMSetErrorV,
914 pdmRCDrvHlp_VMSetRuntimeError,
915 pdmRCDrvHlp_VMSetRuntimeErrorV,
916 pdmRCDrvHlp_AssertEMT,
917 pdmRCDrvHlp_AssertOther,
918 pdmRCDrvHlp_FTSetCheckpoint,
919 PDM_DRVHLPRC_VERSION
920};
921
922/** @} */
923
924
925
926
927/**
928 * Sets an irq on the PIC and I/O APIC.
929 *
930 * @returns true if delivered, false if postponed.
931 * @param pVM The cross context VM structure.
932 * @param iIrq The irq.
933 * @param iLevel The new level.
934 * @param uTagSrc The IRQ tag and source.
935 *
936 * @remarks The caller holds the PDM lock.
937 */
938static bool pdmRCIsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc)
939{
940 if (RT_LIKELY( ( pVM->pdm.s.IoApic.pDevInsRC
941 || !pVM->pdm.s.IoApic.pDevInsR3)
942 && ( pVM->pdm.s.Pic.pDevInsRC
943 || !pVM->pdm.s.Pic.pDevInsR3)))
944 {
945 if (pVM->pdm.s.Pic.pDevInsRC)
946 pVM->pdm.s.Pic.pfnSetIrqRC(pVM->pdm.s.Pic.pDevInsRC, iIrq, iLevel, uTagSrc);
947 if (pVM->pdm.s.IoApic.pDevInsRC)
948 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel, uTagSrc);
949 return true;
950 }
951
952 /* queue for ring-3 execution. */
953 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
954 AssertReturn(pTask, false);
955
956 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
957 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
958 pTask->u.SetIRQ.iIrq = iIrq;
959 pTask->u.SetIRQ.iLevel = iLevel;
960 pTask->u.SetIRQ.uTagSrc = uTagSrc;
961
962 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
963 return false;
964}
965
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